Lines Matching refs:regDivider
252 uint32_t bitClockDivider = 0U, regDivider = 0U; in WM8962_SetMasterClock() local
260 regDivider = 0U; in WM8962_SetMasterClock()
263 regDivider = 2U; in WM8962_SetMasterClock()
266 regDivider = 3U; in WM8962_SetMasterClock()
269 regDivider = 4U; in WM8962_SetMasterClock()
272 regDivider = 6U; in WM8962_SetMasterClock()
275 regDivider = 7U; in WM8962_SetMasterClock()
278 regDivider = 9U; in WM8962_SetMasterClock()
281 regDivider = 10U; in WM8962_SetMasterClock()
284 regDivider = 11U; in WM8962_SetMasterClock()
287 regDivider = 13U; in WM8962_SetMasterClock()
296 …ECK_RET(WM8962_ModifyReg(handle, WM8962_CLOCK2, WM8962_CLOCK2_BCLK_DIV_MASK, (uint16_t)regDivider), in WM8962_SetMasterClock()