Lines Matching refs:flexioBase
56 return FLEXIO_GetInstance(base->flexioBase); in FLEXIO_UART_GetInstance()
147 ctrlReg = base->flexioBase->CTRL; in FLEXIO_UART_Init()
156 base->flexioBase->CTRL = ctrlReg; in FLEXIO_UART_Init()
170 FLEXIO_SetShifterConfig(base->flexioBase, base->shifterIndex[0], &shifterConfig); in FLEXIO_UART_Init()
215 FLEXIO_SetTimerConfig(base->flexioBase, base->timerIndex[0], &timerConfig); in FLEXIO_UART_Init()
228 FLEXIO_SetShifterConfig(base->flexioBase, base->shifterIndex[1], &shifterConfig); in FLEXIO_UART_Init()
248 FLEXIO_SetTimerConfig(base->flexioBase, base->timerIndex[1], &timerConfig); in FLEXIO_UART_Init()
262 base->flexioBase->SHIFTCFG[base->shifterIndex[0]] = 0; in FLEXIO_UART_Deinit()
263 base->flexioBase->SHIFTCTL[base->shifterIndex[0]] = 0; in FLEXIO_UART_Deinit()
264 base->flexioBase->SHIFTCFG[base->shifterIndex[1]] = 0; in FLEXIO_UART_Deinit()
265 base->flexioBase->SHIFTCTL[base->shifterIndex[1]] = 0; in FLEXIO_UART_Deinit()
266 base->flexioBase->TIMCFG[base->timerIndex[0]] = 0; in FLEXIO_UART_Deinit()
267 base->flexioBase->TIMCMP[base->timerIndex[0]] = 0; in FLEXIO_UART_Deinit()
268 base->flexioBase->TIMCTL[base->timerIndex[0]] = 0; in FLEXIO_UART_Deinit()
269 base->flexioBase->TIMCFG[base->timerIndex[1]] = 0; in FLEXIO_UART_Deinit()
270 base->flexioBase->TIMCMP[base->timerIndex[1]] = 0; in FLEXIO_UART_Deinit()
271 base->flexioBase->TIMCTL[base->timerIndex[1]] = 0; in FLEXIO_UART_Deinit()
273 base->flexioBase->SHIFTSTAT = (1UL << base->shifterIndex[0]); in FLEXIO_UART_Deinit()
274 base->flexioBase->SHIFTSTAT = (1UL << base->shifterIndex[1]); in FLEXIO_UART_Deinit()
276 base->flexioBase->TIMSTAT = (1UL << base->timerIndex[0]); in FLEXIO_UART_Deinit()
277 base->flexioBase->TIMSTAT = (1UL << base->timerIndex[1]); in FLEXIO_UART_Deinit()
319 FLEXIO_EnableShifterStatusInterrupts(base->flexioBase, 1UL << base->shifterIndex[0]); in FLEXIO_UART_EnableInterrupts()
323 FLEXIO_EnableShifterStatusInterrupts(base->flexioBase, 1UL << base->shifterIndex[1]); in FLEXIO_UART_EnableInterrupts()
339 FLEXIO_DisableShifterStatusInterrupts(base->flexioBase, 1UL << base->shifterIndex[0]); in FLEXIO_UART_DisableInterrupts()
343 FLEXIO_DisableShifterStatusInterrupts(base->flexioBase, 1UL << base->shifterIndex[1]); in FLEXIO_UART_DisableInterrupts()
358 …((FLEXIO_GetShifterStatusFlags(base->flexioBase) & (1UL << base->shifterIndex[0])) >> base->shifte… in FLEXIO_UART_GetStatusFlags()
360 …(((FLEXIO_GetShifterStatusFlags(base->flexioBase) & (1UL << base->shifterIndex[1])) >> (base->shif… in FLEXIO_UART_GetStatusFlags()
363 …(((FLEXIO_GetShifterErrorFlags(base->flexioBase) & (1UL << base->shifterIndex[1])) >> (base->shift… in FLEXIO_UART_GetStatusFlags()
383 FLEXIO_ClearShifterStatusFlags(base->flexioBase, 1UL << base->shifterIndex[0]); in FLEXIO_UART_ClearStatusFlags()
387 FLEXIO_ClearShifterStatusFlags(base->flexioBase, 1UL << base->shifterIndex[1]); in FLEXIO_UART_ClearStatusFlags()
391 FLEXIO_ClearShifterErrorFlags(base->flexioBase, 1UL << base->shifterIndex[1]); in FLEXIO_UART_ClearStatusFlags()
419 …while ((0U == (FLEXIO_GetShifterStatusFlags(base->flexioBase) & (1UL << base->shifterIndex[0]))) && in FLEXIO_UART_WriteBlocking()
422 … while (0U == (FLEXIO_GetShifterStatusFlags(base->flexioBase) & (1UL << base->shifterIndex[0]))) in FLEXIO_UART_WriteBlocking()
433 base->flexioBase->SHIFTBUF[base->shifterIndex[0]] = *txData++; in FLEXIO_UART_WriteBlocking()
476 *rxData++ = (uint8_t)(base->flexioBase->SHIFTBUFBYS[base->shifterIndex[1]]); in FLEXIO_UART_ReadBlocking()
906 ((base->flexioBase->SHIFTSIEN & (1UL << base->shifterIndex[1])) != 0U)) in FLEXIO_UART_TransferHandleIRQ()
959 (uint8_t)(base->flexioBase->SHIFTBUFBYS[base->shifterIndex[1]]); in FLEXIO_UART_TransferHandleIRQ()
984 ((base->flexioBase->SHIFTSIEN & (1UL << base->shifterIndex[0])) != 0U)) in FLEXIO_UART_TransferHandleIRQ()