Lines Matching refs:BME_XOR32

150 #define ADC_TOG_SC1(base, index, value) (BME_XOR32(&ADC_SC1_REG(base, index), (uint32_t)(value)))
331 #define ADC_TOG_CFG1(base, value) (BME_XOR32(&ADC_CFG1_REG(base), (uint32_t)(value)))
479 #define ADC_TOG_CFG2(base, value) (BME_XOR32(&ADC_CFG2_REG(base), (uint32_t)(value)))
668 #define ADC_TOG_CV1(base, value) (BME_XOR32(&ADC_CV1_REG(base), (uint32_t)(value)))
715 #define ADC_TOG_CV2(base, value) (BME_XOR32(&ADC_CV2_REG(base), (uint32_t)(value)))
757 #define ADC_TOG_SC2(base, value) (BME_XOR32(&ADC_SC2_REG(base), (uint32_t)(value)))
934 #define ADC_TOG_SC3(base, value) (BME_XOR32(&ADC_SC3_REG(base), (uint32_t)(value)))
1093 #define ADC_TOG_OFS(base, value) (BME_XOR32(&ADC_OFS_REG(base), (uint32_t)(value)))
1145 #define ADC_TOG_PG(base, value)  (BME_XOR32(&ADC_PG_REG(base), (uint32_t)(value)))
1195 #define ADC_TOG_MG(base, value)  (BME_XOR32(&ADC_MG_REG(base), (uint32_t)(value)))
1251 #define ADC_TOG_CLPD(base, value) (BME_XOR32(&ADC_CLPD_REG(base), (uint32_t)(value)))
1293 #define ADC_TOG_CLPS(base, value) (BME_XOR32(&ADC_CLPS_REG(base), (uint32_t)(value)))
1335 #define ADC_TOG_CLP4(base, value) (BME_XOR32(&ADC_CLP4_REG(base), (uint32_t)(value)))
1377 #define ADC_TOG_CLP3(base, value) (BME_XOR32(&ADC_CLP3_REG(base), (uint32_t)(value)))
1419 #define ADC_TOG_CLP2(base, value) (BME_XOR32(&ADC_CLP2_REG(base), (uint32_t)(value)))
1461 #define ADC_TOG_CLP1(base, value) (BME_XOR32(&ADC_CLP1_REG(base), (uint32_t)(value)))
1503 #define ADC_TOG_CLP0(base, value) (BME_XOR32(&ADC_CLP0_REG(base), (uint32_t)(value)))
1561 #define ADC_TOG_CLMD(base, value) (BME_XOR32(&ADC_CLMD_REG(base), (uint32_t)(value)))
1603 #define ADC_TOG_CLMS(base, value) (BME_XOR32(&ADC_CLMS_REG(base), (uint32_t)(value)))
1645 #define ADC_TOG_CLM4(base, value) (BME_XOR32(&ADC_CLM4_REG(base), (uint32_t)(value)))
1687 #define ADC_TOG_CLM3(base, value) (BME_XOR32(&ADC_CLM3_REG(base), (uint32_t)(value)))
1729 #define ADC_TOG_CLM2(base, value) (BME_XOR32(&ADC_CLM2_REG(base), (uint32_t)(value)))
1771 #define ADC_TOG_CLM1(base, value) (BME_XOR32(&ADC_CLM1_REG(base), (uint32_t)(value)))
1813 #define ADC_TOG_CLM0(base, value) (BME_XOR32(&ADC_CLM0_REG(base), (uint32_t)(value)))
3708 #define DCDC_TOG_REG0(base, value) (BME_XOR32(&DCDC_REG0_REG(base), (uint32_t)(value)))
4018 #define DCDC_TOG_REG1(base, value) (BME_XOR32(&DCDC_REG1_REG(base), (uint32_t)(value)))
4141 #define DCDC_TOG_REG2(base, value) (BME_XOR32(&DCDC_REG2_REG(base), (uint32_t)(value)))
4269 #define DCDC_TOG_REG3(base, value) (BME_XOR32(&DCDC_REG3_REG(base), (uint32_t)(value)))
4499 #define DCDC_TOG_REG4(base, value) (BME_XOR32(&DCDC_REG4_REG(base), (uint32_t)(value)))
4556 #define DCDC_TOG_REG6(base, value) (BME_XOR32(&DCDC_REG6_REG(base), (uint32_t)(value)))
4652 #define DCDC_TOG_REG7(base, value) (BME_XOR32(&DCDC_REG7_REG(base), (uint32_t)(value)))
4750 #define DMA_TOG_SAR(base, index, value) (BME_XOR32(&DMA_SAR_REG(base, index), (uint32_t)(value)))
4778 #define DMA_TOG_DAR(base, index, value) (BME_XOR32(&DMA_DAR_REG(base, index), (uint32_t)(value)))
4811 #define DMA_TOG_DSR_BCR(base, index, value) (BME_XOR32(&DMA_DSR_BCR_REG(base, index), (uint32_t)(va…
4984 #define DMA_TOG_DCR(base, index, value) (BME_XOR32(&DMA_DCR_REG(base, index), (uint32_t)(value)))
7091 #define GPIO_TOG_PDOR(base, value) (BME_XOR32(&GPIO_PDOR_REG(base), (uint32_t)(value)))
7192 #define GPIO_TOG_PDDR(base, value) (BME_XOR32(&GPIO_PDDR_REG(base), (uint32_t)(value)))
9892 #define LPTMR_TOG_CSR(base, value) (BME_XOR32(&LPTMR_CSR_REG(base), (uint32_t)(value)))
10064 #define LPTMR_TOG_PSR(base, value) (BME_XOR32(&LPTMR_PSR_REG(base), (uint32_t)(value)))
10186 #define LPTMR_TOG_CMR(base, value) (BME_XOR32(&LPTMR_CMR_REG(base), (uint32_t)(value)))
10230 #define LPTMR_TOG_CNR(base, value) (BME_XOR32(&LPTMR_CNR_REG(base), (uint32_t)(value)))
10285 #define LPUART_TOG_BAUD(base, value) (BME_XOR32(&LPUART_BAUD_REG(base), (uint32_t)(value)))
10571 #define LPUART_TOG_STAT(base, value) (BME_XOR32(&LPUART_STAT_REG(base), (uint32_t)(value)))
11014 #define LPUART_TOG_CTRL(base, value) (BME_XOR32(&LPUART_CTRL_REG(base), (uint32_t)(value)))
11606 #define LPUART_TOG_DATA(base, value) (BME_XOR32(&LPUART_DATA_REG(base), (uint32_t)(value)))
11871 #define LPUART_TOG_MATCH(base, value) (BME_XOR32(&LPUART_MATCH_REG(base), (uint32_t)(value)))
11936 #define LPUART_TOG_MODIR(base, value) (BME_XOR32(&LPUART_MODIR_REG(base), (uint32_t)(value)))
12161 #define LTC_TOG_MD(base, value)  (BME_XOR32(&LTC_MD_REG(base), (uint32_t)(value)))
12305 #define LTC_TOG_KS(base, value)  (BME_XOR32(&LTC_KS_REG(base), (uint32_t)(value)))
12337 #define LTC_TOG_DS(base, value)  (BME_XOR32(&LTC_DS_REG(base), (uint32_t)(value)))
12385 #define LTC_TOG_ICVS(base, value) (BME_XOR32(&LTC_ICVS_REG(base), (uint32_t)(value)))
12485 #define LTC_TOG_CTL(base, value) (BME_XOR32(&LTC_CTL_REG(base), (uint32_t)(value)))
12879 #define LTC_TOG_STA(base, value) (BME_XOR32(&LTC_STA_REG(base), (uint32_t)(value)))
13041 #define LTC_TOG_AADSZ(base, value) (BME_XOR32(&LTC_AADSZ_REG(base), (uint32_t)(value)))
13105 #define LTC_TOG_CTX(base, index, value) (BME_XOR32(&LTC_CTX_REG(base, index), (uint32_t)(value)))
13134 #define LTC_TOG_KEY(base, index, value) (BME_XOR32(&LTC_KEY_REG(base, index), (uint32_t)(value)))
16242 #define PIT_TOG_MCR(base, value) (BME_XOR32(&PIT_MCR_REG(base), (uint32_t)(value)))
16352 #define PIT_TOG_LDVAL(base, index, value) (BME_XOR32(&PIT_LDVAL_REG(base, index), (uint32_t)(value)…
16394 #define PIT_TOG_TCTRL(base, index, value) (BME_XOR32(&PIT_TCTRL_REG(base, index), (uint32_t)(value)…
16482 #define PIT_TOG_TFLG(base, index, value) (BME_XOR32(&PIT_TFLG_REG(base, index), (uint32_t)(value)))
16911 #define PORT_TOG_PCR(base, index, value) (BME_XOR32(&PORT_PCR_REG(base, index), (uint32_t)(value)))
17250 #define PORT_TOG_ISFR(base, value) (BME_XOR32(&PORT_ISFR_REG(base), (uint32_t)(value)))
17929 #define RSIM_TOG_CONTROL(base, value) (BME_XOR32(&RSIM_CONTROL_REG(base), (uint32_t)(value)))
18301 #define RSIM_TOG_ACTIVE_DELAY(base, value) (BME_XOR32(&RSIM_ACTIVE_DELAY_REG(base), (uint32_t)(valu…
18425 #define RSIM_TOG_ANA_TEST(base, value) (BME_XOR32(&RSIM_ANA_TEST_REG(base), (uint32_t)(value)))
18502 #define RTC_TOG_TSR(base, value) (BME_XOR32(&RTC_TSR_REG(base), (uint32_t)(value)))
18523 #define RTC_TOG_TPR(base, value) (BME_XOR32(&RTC_TPR_REG(base), (uint32_t)(value)))
18567 #define RTC_TOG_TAR(base, value) (BME_XOR32(&RTC_TAR_REG(base), (uint32_t)(value)))
18588 #define RTC_TOG_TCR(base, value) (BME_XOR32(&RTC_TCR_REG(base), (uint32_t)(value)))
18684 #define RTC_TOG_CR(base, value)  (BME_XOR32(&RTC_CR_REG(base), (uint32_t)(value)))
18911 #define RTC_TOG_SR(base, value)  (BME_XOR32(&RTC_SR_REG(base), (uint32_t)(value)))
19007 #define RTC_TOG_LR(base, value)  (BME_XOR32(&RTC_LR_REG(base), (uint32_t)(value)))
19109 #define RTC_TOG_IER(base, value) (BME_XOR32(&RTC_IER_REG(base), (uint32_t)(value)))
19258 #define SIM_TOG_SOPT1(base, value) (BME_XOR32(&SIM_SOPT1_REG(base), (uint32_t)(value)))
19332 #define SIM_TOG_SOPT2(base, value) (BME_XOR32(&SIM_SOPT2_REG(base), (uint32_t)(value)))
19424 #define SIM_TOG_SOPT4(base, value) (BME_XOR32(&SIM_SOPT4_REG(base), (uint32_t)(value)))
19552 #define SIM_TOG_SOPT5(base, value) (BME_XOR32(&SIM_SOPT5_REG(base), (uint32_t)(value)))
19634 #define SIM_TOG_SOPT7(base, value) (BME_XOR32(&SIM_SOPT7_REG(base), (uint32_t)(value)))
19877 #define SIM_TOG_SCGC4(base, value) (BME_XOR32(&SIM_SCGC4_REG(base), (uint32_t)(value)))
19986 #define SIM_TOG_SCGC5(base, value) (BME_XOR32(&SIM_SCGC5_REG(base), (uint32_t)(value)))
20232 #define SIM_TOG_SCGC6(base, value) (BME_XOR32(&SIM_SCGC6_REG(base), (uint32_t)(value)))
20487 #define SIM_TOG_SCGC7(base, value) (BME_XOR32(&SIM_SCGC7_REG(base), (uint32_t)(value)))
20534 #define SIM_TOG_CLKDIV1(base, value) (BME_XOR32(&SIM_CLKDIV1_REG(base), (uint32_t)(value)))
20624 #define SIM_TOG_FCFG1(base, value) (BME_XOR32(&SIM_FCFG1_REG(base), (uint32_t)(value)))
20833 #define SIM_TOG_COPC(base, value) (BME_XOR32(&SIM_COPC_REG(base), (uint32_t)(value)))
21391 #define SPI_TOG_MCR(base, value) (BME_XOR32(&SPI_MCR_REG(base), (uint32_t)(value)))
21716 #define SPI_TOG_TCR(base, value) (BME_XOR32(&SPI_TCR_REG(base), (uint32_t)(value)))
21763 #define SPI_TOG_CTAR_SLAVE(base, index, value) (BME_XOR32(&SPI_CTAR_SLAVE_REG(base, index), (uint32…
21861 #define SPI_TOG_CTAR(base, index, value) (BME_XOR32(&SPI_CTAR_REG(base, index), (uint32_t)(value)))
22187 #define SPI_TOG_SR(base, value)  (BME_XOR32(&SPI_SR_REG(base), (uint32_t)(value)))
22418 #define SPI_TOG_RSER(base, value) (BME_XOR32(&SPI_RSER_REG(base), (uint32_t)(value)))
22610 #define SPI_TOG_PUSHR(base, value) (BME_XOR32(&SPI_PUSHR_REG(base), (uint32_t)(value)))
22765 #define SPI_TOG_PUSHR_SLAVE(base, value) (BME_XOR32(&SPI_PUSHR_SLAVE_REG(base), (uint32_t)(value)))
23121 #define TPM_TOG_SC(base, value)  (BME_XOR32(&TPM_SC_REG(base), (uint32_t)(value)))
23284 #define TPM_TOG_CNT(base, value) (BME_XOR32(&TPM_CNT_REG(base), (uint32_t)(value)))
23333 #define TPM_TOG_MOD(base, value) (BME_XOR32(&TPM_MOD_REG(base), (uint32_t)(value)))
23388 #define TPM_TOG_CnSC(base, index, value) (BME_XOR32(&TPM_CnSC_REG(base, index), (uint32_t)(value)))
23550 #define TPM_TOG_CnV(base, index, value) (BME_XOR32(&TPM_CnV_REG(base, index), (uint32_t)(value)))
23602 #define TPM_TOG_STATUS(base, value) (BME_XOR32(&TPM_STATUS_REG(base), (uint32_t)(value)))
23726 #define TPM_TOG_COMBINE(base, value) (BME_XOR32(&TPM_COMBINE_REG(base), (uint32_t)(value)))
23841 #define TPM_TOG_FILTER(base, value) (BME_XOR32(&TPM_FILTER_REG(base), (uint32_t)(value)))
23936 #define TPM_TOG_QDCTRL(base, value) (BME_XOR32(&TPM_QDCTRL_REG(base), (uint32_t)(value)))
24038 #define TPM_TOG_CONF(base, value) (BME_XOR32(&TPM_CONF_REG(base), (uint32_t)(value)))
24283 #define TRNG_TOG_MCTL(base, value) (BME_XOR32(&TRNG_MCTL_REG(base), (uint32_t)(value)))
24531 #define TRNG_TOG_SCMISC(base, value) (BME_XOR32(&TRNG_SCMISC_REG(base), (uint32_t)(value)))
24598 #define TRNG_TOG_PKRRNG(base, value) (BME_XOR32(&TRNG_PKRRNG_REG(base), (uint32_t)(value)))
24649 #define TRNG_TOG_PKRMAX(base, value) (BME_XOR32(&TRNG_PKRMAX_REG(base), (uint32_t)(value)))
24747 #define TRNG_TOG_SDCTL(base, value) (BME_XOR32(&TRNG_SDCTL_REG(base), (uint32_t)(value)))
24814 #define TRNG_TOG_SBLIM(base, value) (BME_XOR32(&TRNG_SBLIM_REG(base), (uint32_t)(value)))
24909 #define TRNG_TOG_FRQMIN(base, value) (BME_XOR32(&TRNG_FRQMIN_REG(base), (uint32_t)(value)))
24959 #define TRNG_TOG_FRQMAX(base, value) (BME_XOR32(&TRNG_FRQMAX_REG(base), (uint32_t)(value)))
25094 #define TRNG_TOG_SCML(base, value) (BME_XOR32(&TRNG_SCML_REG(base), (uint32_t)(value)))
25166 #define TRNG_TOG_SCR1L(base, value) (BME_XOR32(&TRNG_SCR1L_REG(base), (uint32_t)(value)))
25292 #define TRNG_TOG_SCR2L(base, value) (BME_XOR32(&TRNG_SCR2L_REG(base), (uint32_t)(value)))
25471 #define TRNG_TOG_SCR3L(base, value) (BME_XOR32(&TRNG_SCR3L_REG(base), (uint32_t)(value)))
25597 #define TRNG_TOG_SCR4L(base, value) (BME_XOR32(&TRNG_SCR4L_REG(base), (uint32_t)(value)))
25670 #define TRNG_TOG_SCR5L(base, value) (BME_XOR32(&TRNG_SCR5L_REG(base), (uint32_t)(value)))
25796 #define TRNG_TOG_SCR6PL(base, value) (BME_XOR32(&TRNG_SCR6PL_REG(base), (uint32_t)(value)))
26590 #define TRNG_TOG_SEC_CFG(base, value) (BME_XOR32(&TRNG_SEC_CFG_REG(base), (uint32_t)(value)))
26683 #define TRNG_TOG_INT_CTRL(base, value) (BME_XOR32(&TRNG_INT_CTRL_REG(base), (uint32_t)(value)))
26789 #define TRNG_TOG_INT_MASK(base, value) (BME_XOR32(&TRNG_INT_MASK_REG(base), (uint32_t)(value)))
26884 #define TRNG_TOG_INT_STATUS(base, value) (BME_XOR32(&TRNG_INT_STATUS_REG(base), (uint32_t)(value)))
27125 #define TSI_TOG_GENCS(base, value) (BME_XOR32(&TSI_GENCS_REG(base), (uint32_t)(value)))
27502 #define TSI_TOG_DATA(base, value) (BME_XOR32(&TSI_DATA_REG(base), (uint32_t)(value)))
27615 #define TSI_TOG_TSHD(base, value) (BME_XOR32(&TSI_TSHD_REG(base), (uint32_t)(value)))
27845 #define XCVR_TOG_RX_DIG_CTRL(base, value) (BME_XOR32(&XCVR_RX_DIG_CTRL_REG(base), (uint32_t)(value)…
28073 #define XCVR_TOG_AGC_CTRL_0(base, value) (BME_XOR32(&XCVR_AGC_CTRL_0_REG(base), (uint32_t)(value)))
28261 #define XCVR_TOG_AGC_CTRL_1(base, value) (BME_XOR32(&XCVR_AGC_CTRL_1_REG(base), (uint32_t)(value)))
28412 #define XCVR_TOG_AGC_CTRL_2(base, value) (BME_XOR32(&XCVR_AGC_CTRL_2_REG(base), (uint32_t)(value)))
28597 #define XCVR_TOG_AGC_CTRL_3(base, value) (BME_XOR32(&XCVR_AGC_CTRL_3_REG(base), (uint32_t)(value)))
28798 #define XCVR_TOG_RSSI_CTRL_0(base, value) (BME_XOR32(&XCVR_RSSI_CTRL_0_REG(base), (uint32_t)(value)…
28941 #define XCVR_TOG_RSSI_CTRL_1(base, value) (BME_XOR32(&XCVR_RSSI_CTRL_1_REG(base), (uint32_t)(value)…
29037 #define XCVR_TOG_DCOC_CTRL_0(base, value) (BME_XOR32(&XCVR_DCOC_CTRL_0_REG(base), (uint32_t)(value)…
29227 #define XCVR_TOG_DCOC_CTRL_1(base, value) (BME_XOR32(&XCVR_DCOC_CTRL_1_REG(base), (uint32_t)(value)…
29331 #define XCVR_TOG_DCOC_CTRL_2(base, value) (BME_XOR32(&XCVR_DCOC_CTRL_2_REG(base), (uint32_t)(value)…
29374 #define XCVR_TOG_DCOC_CTRL_3(base, value) (BME_XOR32(&XCVR_DCOC_CTRL_3_REG(base), (uint32_t)(value)…
29459 #define XCVR_TOG_DCOC_CTRL_4(base, value) (BME_XOR32(&XCVR_DCOC_CTRL_4_REG(base), (uint32_t)(value)…
29516 #define XCVR_TOG_DCOC_CAL_GAIN(base, value) (BME_XOR32(&XCVR_DCOC_CAL_GAIN_REG(base), (uint32_t)(va…
29757 #define XCVR_TOG_DCOC_CAL_RCP(base, value) (BME_XOR32(&XCVR_DCOC_CAL_RCP_REG(base), (uint32_t)(valu…
29817 #define XCVR_TOG_IQMC_CTRL(base, value) (BME_XOR32(&XCVR_IQMC_CTRL_REG(base), (uint32_t)(value)))
29872 #define XCVR_TOG_IQMC_CAL(base, value) (BME_XOR32(&XCVR_IQMC_CAL_REG(base), (uint32_t)(value)))
29927 #define XCVR_TOG_TCA_AGC_VAL_3_0(base, value) (BME_XOR32(&XCVR_TCA_AGC_VAL_3_0_REG(base), (uint32_t…
30012 #define XCVR_TOG_TCA_AGC_VAL_7_4(base, value) (BME_XOR32(&XCVR_TCA_AGC_VAL_7_4_REG(base), (uint32_t…
30097 #define XCVR_TOG_TCA_AGC_VAL_8(base, value) (BME_XOR32(&XCVR_TCA_AGC_VAL_8_REG(base), (uint32_t)(va…
30137 #define XCVR_TOG_BBF_RES_TUNE_VAL_7_0(base, value) (BME_XOR32(&XCVR_BBF_RES_TUNE_VAL_7_0_REG(base),…
30282 #define XCVR_TOG_BBF_RES_TUNE_VAL_10_8(base, value) (BME_XOR32(&XCVR_BBF_RES_TUNE_VAL_10_8_REG(base…
30352 #define XCVR_TOG_TCA_AGC_LIN_VAL_2_0(base, value) (BME_XOR32(&XCVR_TCA_AGC_LIN_VAL_2_0_REG(base), (…
30424 #define XCVR_TOG_TCA_AGC_LIN_VAL_5_3(base, value) (BME_XOR32(&XCVR_TCA_AGC_LIN_VAL_5_3_REG(base), (…
30497 #define XCVR_TOG_TCA_AGC_LIN_VAL_8_6(base, value) (BME_XOR32(&XCVR_TCA_AGC_LIN_VAL_8_6_REG(base), (…
30570 #define XCVR_TOG_BBF_RES_TUNE_LIN_VAL_3_0(base, value) (BME_XOR32(&XCVR_BBF_RES_TUNE_LIN_VAL_3_0_RE…
30659 #define XCVR_TOG_BBF_RES_TUNE_LIN_VAL_7_4(base, value) (BME_XOR32(&XCVR_BBF_RES_TUNE_LIN_VAL_7_4_RE…
30748 #define XCVR_TOG_BBF_RES_TUNE_LIN_VAL_10_8(base, value) (BME_XOR32(&XCVR_BBF_RES_TUNE_LIN_VAL_10_8_…
30821 #define XCVR_TOG_AGC_GAIN_TBL_03_00(base, value) (BME_XOR32(&XCVR_AGC_GAIN_TBL_03_00_REG(base), (ui…
30966 #define XCVR_TOG_AGC_GAIN_TBL_07_04(base, value) (BME_XOR32(&XCVR_AGC_GAIN_TBL_07_04_REG(base), (ui…
31111 #define XCVR_TOG_AGC_GAIN_TBL_11_08(base, value) (BME_XOR32(&XCVR_AGC_GAIN_TBL_11_08_REG(base), (ui…
31256 #define XCVR_TOG_AGC_GAIN_TBL_15_12(base, value) (BME_XOR32(&XCVR_AGC_GAIN_TBL_15_12_REG(base), (ui…
31401 #define XCVR_TOG_AGC_GAIN_TBL_19_16(base, value) (BME_XOR32(&XCVR_AGC_GAIN_TBL_19_16_REG(base), (ui…
31546 #define XCVR_TOG_AGC_GAIN_TBL_23_20(base, value) (BME_XOR32(&XCVR_AGC_GAIN_TBL_23_20_REG(base), (ui…
31691 #define XCVR_TOG_AGC_GAIN_TBL_26_24(base, value) (BME_XOR32(&XCVR_AGC_GAIN_TBL_26_24_REG(base), (ui…
31806 #define XCVR_TOG_DCOC_OFFSET_(base, index, value) (BME_XOR32(&XCVR_DCOC_OFFSET__REG(base, index), (…
31899 #define XCVR_TOG_DCOC_TZA_STEP_(base, index, value) (BME_XOR32(&XCVR_DCOC_TZA_STEP__REG(base, index…
32100 #define XCVR_TOG_DCOC_CAL_IIR(base, value) (BME_XOR32(&XCVR_DCOC_CAL_IIR_REG(base), (uint32_t)(valu…
32235 #define XCVR_TOG_RX_CHF_COEF(base, index, value) (BME_XOR32(&XCVR_RX_CHF_COEF_REG(base, index), (ui…
32275 #define XCVR_TOG_TX_DIG_CTRL(base, value) (BME_XOR32(&XCVR_TX_DIG_CTRL_REG(base), (uint32_t)(value)…
32518 #define XCVR_TOG_TX_DATA_PAD_PAT(base, value) (BME_XOR32(&XCVR_TX_DATA_PAD_PAT_REG(base), (uint32_t…
32605 #define XCVR_TOG_TX_GFSK_MOD_CTRL(base, value) (BME_XOR32(&XCVR_TX_GFSK_MOD_CTRL_REG(base), (uint32…
32740 #define XCVR_TOG_TX_GFSK_COEFF2(base, value) (BME_XOR32(&XCVR_TX_GFSK_COEFF2_REG(base), (uint32_t)(…
32766 #define XCVR_TOG_TX_GFSK_COEFF1(base, value) (BME_XOR32(&XCVR_TX_GFSK_COEFF1_REG(base), (uint32_t)(…
32787 #define XCVR_TOG_TX_FSK_MOD_SCALE(base, value) (BME_XOR32(&XCVR_TX_FSK_MOD_SCALE_REG(base), (uint32…
32858 #define XCVR_TOG_TX_DFT_MOD_PAT(base, value) (BME_XOR32(&XCVR_TX_DFT_MOD_PAT_REG(base), (uint32_t)(…
32884 #define XCVR_TOG_TX_DFT_TONE_0_1(base, value) (BME_XOR32(&XCVR_TX_DFT_TONE_0_1_REG(base), (uint32_t…
32952 #define XCVR_TOG_TX_DFT_TONE_2_3(base, value) (BME_XOR32(&XCVR_TX_DFT_TONE_2_3_REG(base), (uint32_t…
33015 #define XCVR_TOG_PLL_MOD_OVRD(base, value) (BME_XOR32(&XCVR_PLL_MOD_OVRD_REG(base), (uint32_t)(valu…
33137 #define XCVR_TOG_PLL_CHAN_MAP(base, value) (BME_XOR32(&XCVR_PLL_CHAN_MAP_REG(base), (uint32_t)(valu…
33264 #define XCVR_TOG_PLL_LOCK_DETECT(base, value) (BME_XOR32(&XCVR_PLL_LOCK_DETECT_REG(base), (uint32_t…
33483 #define XCVR_TOG_PLL_HP_MOD_CTRL(base, value) (BME_XOR32(&XCVR_PLL_HP_MOD_CTRL_REG(base), (uint32_t…
33671 #define XCVR_TOG_PLL_HPM_CAL_CTRL(base, value) (BME_XOR32(&XCVR_PLL_HPM_CAL_CTRL_REG(base), (uint32…
33779 #define XCVR_TOG_PLL_LD_HPM_CAL1(base, value) (BME_XOR32(&XCVR_PLL_LD_HPM_CAL1_REG(base), (uint32_t…
33883 #define XCVR_TOG_PLL_LD_HPM_CAL2(base, value) (BME_XOR32(&XCVR_PLL_LD_HPM_CAL2_REG(base), (uint32_t…
33952 #define XCVR_TOG_PLL_HPM_SDM_FRACTION(base, value) (BME_XOR32(&XCVR_PLL_HPM_SDM_FRACTION_REG(base),…
34010 #define XCVR_TOG_PLL_LP_MOD_CTRL(base, value) (BME_XOR32(&XCVR_PLL_LP_MOD_CTRL_REG(base), (uint32_t…
34225 #define XCVR_TOG_PLL_LP_SDM_CTRL1(base, value) (BME_XOR32(&XCVR_PLL_LP_SDM_CTRL1_REG(base), (uint32…
34298 #define XCVR_TOG_PLL_LP_SDM_CTRL2(base, value) (BME_XOR32(&XCVR_PLL_LP_SDM_CTRL2_REG(base), (uint32…
34341 #define XCVR_TOG_PLL_LP_SDM_CTRL3(base, value) (BME_XOR32(&XCVR_PLL_LP_SDM_CTRL3_REG(base), (uint32…
34453 #define XCVR_TOG_PLL_DELAY_MATCH(base, value) (BME_XOR32(&XCVR_PLL_DELAY_MATCH_REG(base), (uint32_t…
34529 #define XCVR_TOG_PLL_CTUNE_CTRL(base, value) (BME_XOR32(&XCVR_PLL_CTUNE_CTRL_REG(base), (uint32_t)(…
34849 #define XCVR_TOG_CTRL(base, value) (BME_XOR32(&XCVR_CTRL_REG(base), (uint32_t)(value)))
35091 #define XCVR_TOG_OVERWRITE_VER(base, value) (BME_XOR32(&XCVR_OVERWRITE_VER_REG(base), (uint32_t)(va…
35138 #define XCVR_TOG_DMA_CTRL(base, value) (BME_XOR32(&XCVR_DMA_CTRL_REG(base), (uint32_t)(value)))
35268 #define XCVR_TOG_DTEST_CTRL(base, value) (BME_XOR32(&XCVR_DTEST_CTRL_REG(base), (uint32_t)(value)))
35492 #define XCVR_TOG_PB_CTRL(base, value) (BME_XOR32(&XCVR_PB_CTRL_REG(base), (uint32_t)(value)))
35537 #define XCVR_TOG_TSM_CTRL(base, value) (BME_XOR32(&XCVR_TSM_CTRL_REG(base), (uint32_t)(value)))
35748 #define XCVR_TOG_END_OF_SEQ(base, value) (BME_XOR32(&XCVR_END_OF_SEQ_REG(base), (uint32_t)(value)))
35847 #define XCVR_TOG_TSM_OVRD0(base, value) (BME_XOR32(&XCVR_TSM_OVRD0_REG(base), (uint32_t)(value)))
36423 #define XCVR_TOG_TSM_OVRD1(base, value) (BME_XOR32(&XCVR_TSM_OVRD1_REG(base), (uint32_t)(value)))
36987 #define XCVR_TOG_TSM_OVRD2(base, value) (BME_XOR32(&XCVR_TSM_OVRD2_REG(base), (uint32_t)(value)))
37550 #define XCVR_TOG_TSM_OVRD3(base, value) (BME_XOR32(&XCVR_TSM_OVRD3_REG(base), (uint32_t)(value)))
37780 #define XCVR_TOG_PA_POWER(base, value) (BME_XOR32(&XCVR_PA_POWER_REG(base), (uint32_t)(value)))
37820 #define XCVR_TOG_PA_BIAS_TBL0(base, value) (BME_XOR32(&XCVR_PA_BIAS_TBL0_REG(base), (uint32_t)(valu…
37923 #define XCVR_TOG_PA_BIAS_TBL1(base, value) (BME_XOR32(&XCVR_PA_BIAS_TBL1_REG(base), (uint32_t)(valu…
38024 #define XCVR_TOG_RECYCLE_COUNT(base, value) (BME_XOR32(&XCVR_RECYCLE_COUNT_REG(base), (uint32_t)(va…
38105 #define XCVR_TOG_TSM_TIMING00(base, value) (BME_XOR32(&XCVR_TSM_TIMING00_REG(base), (uint32_t)(valu…
38198 #define XCVR_TOG_TSM_TIMING01(base, value) (BME_XOR32(&XCVR_TSM_TIMING01_REG(base), (uint32_t)(valu…
38291 #define XCVR_TOG_TSM_TIMING02(base, value) (BME_XOR32(&XCVR_TSM_TIMING02_REG(base), (uint32_t)(valu…
38384 #define XCVR_TOG_TSM_TIMING03(base, value) (BME_XOR32(&XCVR_TSM_TIMING03_REG(base), (uint32_t)(valu…
38477 #define XCVR_TOG_TSM_TIMING04(base, value) (BME_XOR32(&XCVR_TSM_TIMING04_REG(base), (uint32_t)(valu…
38538 #define XCVR_TOG_TSM_TIMING05(base, value) (BME_XOR32(&XCVR_TSM_TIMING05_REG(base), (uint32_t)(valu…
38631 #define XCVR_TOG_TSM_TIMING06(base, value) (BME_XOR32(&XCVR_TSM_TIMING06_REG(base), (uint32_t)(valu…
38692 #define XCVR_TOG_TSM_TIMING07(base, value) (BME_XOR32(&XCVR_TSM_TIMING07_REG(base), (uint32_t)(valu…
38789 #define XCVR_TOG_TSM_TIMING08(base, value) (BME_XOR32(&XCVR_TSM_TIMING08_REG(base), (uint32_t)(valu…
38886 #define XCVR_TOG_TSM_TIMING09(base, value) (BME_XOR32(&XCVR_TSM_TIMING09_REG(base), (uint32_t)(valu…
38979 #define XCVR_TOG_TSM_TIMING10(base, value) (BME_XOR32(&XCVR_TSM_TIMING10_REG(base), (uint32_t)(valu…
39040 #define XCVR_TOG_TSM_TIMING11(base, value) (BME_XOR32(&XCVR_TSM_TIMING11_REG(base), (uint32_t)(valu…
39101 #define XCVR_TOG_TSM_TIMING12(base, value) (BME_XOR32(&XCVR_TSM_TIMING12_REG(base), (uint32_t)(valu…
39162 #define XCVR_TOG_TSM_TIMING13(base, value) (BME_XOR32(&XCVR_TSM_TIMING13_REG(base), (uint32_t)(valu…
39255 #define XCVR_TOG_TSM_TIMING14(base, value) (BME_XOR32(&XCVR_TSM_TIMING14_REG(base), (uint32_t)(valu…
39318 #define XCVR_TOG_TSM_TIMING15(base, value) (BME_XOR32(&XCVR_TSM_TIMING15_REG(base), (uint32_t)(valu…
39381 #define XCVR_TOG_TSM_TIMING16(base, value) (BME_XOR32(&XCVR_TSM_TIMING16_REG(base), (uint32_t)(valu…
39478 #define XCVR_TOG_TSM_TIMING17(base, value) (BME_XOR32(&XCVR_TSM_TIMING17_REG(base), (uint32_t)(valu…
39571 #define XCVR_TOG_TSM_TIMING18(base, value) (BME_XOR32(&XCVR_TSM_TIMING18_REG(base), (uint32_t)(valu…
39632 #define XCVR_TOG_TSM_TIMING19(base, value) (BME_XOR32(&XCVR_TSM_TIMING19_REG(base), (uint32_t)(valu…
39693 #define XCVR_TOG_TSM_TIMING20(base, value) (BME_XOR32(&XCVR_TSM_TIMING20_REG(base), (uint32_t)(valu…
39754 #define XCVR_TOG_TSM_TIMING21(base, value) (BME_XOR32(&XCVR_TSM_TIMING21_REG(base), (uint32_t)(valu…
39815 #define XCVR_TOG_TSM_TIMING22(base, value) (BME_XOR32(&XCVR_TSM_TIMING22_REG(base), (uint32_t)(valu…
39876 #define XCVR_TOG_TSM_TIMING23(base, value) (BME_XOR32(&XCVR_TSM_TIMING23_REG(base), (uint32_t)(valu…
39937 #define XCVR_TOG_TSM_TIMING24(base, value) (BME_XOR32(&XCVR_TSM_TIMING24_REG(base), (uint32_t)(valu…
39998 #define XCVR_TOG_TSM_TIMING25(base, value) (BME_XOR32(&XCVR_TSM_TIMING25_REG(base), (uint32_t)(valu…
40059 #define XCVR_TOG_TSM_TIMING26(base, value) (BME_XOR32(&XCVR_TSM_TIMING26_REG(base), (uint32_t)(valu…
40152 #define XCVR_TOG_TSM_TIMING27(base, value) (BME_XOR32(&XCVR_TSM_TIMING27_REG(base), (uint32_t)(valu…
40213 #define XCVR_TOG_TSM_TIMING28(base, value) (BME_XOR32(&XCVR_TSM_TIMING28_REG(base), (uint32_t)(valu…
40274 #define XCVR_TOG_TSM_TIMING29(base, value) (BME_XOR32(&XCVR_TSM_TIMING29_REG(base), (uint32_t)(valu…
40335 #define XCVR_TOG_TSM_TIMING30(base, value) (BME_XOR32(&XCVR_TSM_TIMING30_REG(base), (uint32_t)(valu…
40428 #define XCVR_TOG_TSM_TIMING31(base, value) (BME_XOR32(&XCVR_TSM_TIMING31_REG(base), (uint32_t)(valu…
40489 #define XCVR_TOG_TSM_TIMING32(base, value) (BME_XOR32(&XCVR_TSM_TIMING32_REG(base), (uint32_t)(valu…
40550 #define XCVR_TOG_TSM_TIMING33(base, value) (BME_XOR32(&XCVR_TSM_TIMING33_REG(base), (uint32_t)(valu…
40611 #define XCVR_TOG_TSM_TIMING34(base, value) (BME_XOR32(&XCVR_TSM_TIMING34_REG(base), (uint32_t)(valu…
40704 #define XCVR_TOG_TSM_TIMING35(base, value) (BME_XOR32(&XCVR_TSM_TIMING35_REG(base), (uint32_t)(valu…
40797 #define XCVR_TOG_TSM_TIMING36(base, value) (BME_XOR32(&XCVR_TSM_TIMING36_REG(base), (uint32_t)(valu…
40890 #define XCVR_TOG_TSM_TIMING37(base, value) (BME_XOR32(&XCVR_TSM_TIMING37_REG(base), (uint32_t)(valu…
40983 #define XCVR_TOG_TSM_TIMING38(base, value) (BME_XOR32(&XCVR_TSM_TIMING38_REG(base), (uint32_t)(valu…
41076 #define XCVR_TOG_TSM_TIMING39(base, value) (BME_XOR32(&XCVR_TSM_TIMING39_REG(base), (uint32_t)(valu…
41169 #define XCVR_TOG_TSM_TIMING40(base, value) (BME_XOR32(&XCVR_TSM_TIMING40_REG(base), (uint32_t)(valu…
41262 #define XCVR_TOG_TSM_TIMING41(base, value) (BME_XOR32(&XCVR_TSM_TIMING41_REG(base), (uint32_t)(valu…
41355 #define XCVR_TOG_TSM_TIMING42(base, value) (BME_XOR32(&XCVR_TSM_TIMING42_REG(base), (uint32_t)(valu…
41448 #define XCVR_TOG_TSM_TIMING43(base, value) (BME_XOR32(&XCVR_TSM_TIMING43_REG(base), (uint32_t)(valu…
41537 #define XCVR_TOG_CORR_CTRL(base, value) (BME_XOR32(&XCVR_CORR_CTRL_REG(base), (uint32_t)(value)))
41634 #define XCVR_TOG_PN_TYPE(base, value) (BME_XOR32(&XCVR_PN_TYPE_REG(base), (uint32_t)(value)))
41691 #define XCVR_TOG_PN_CODE(base, value) (BME_XOR32(&XCVR_PN_CODE_REG(base), (uint32_t)(value)))
41746 #define XCVR_TOG_SYNC_CTRL(base, value) (BME_XOR32(&XCVR_SYNC_CTRL_REG(base), (uint32_t)(value)))
41806 #define XCVR_TOG_SNF_THR(base, value) (BME_XOR32(&XCVR_SNF_THR_REG(base), (uint32_t)(value)))
41848 #define XCVR_TOG_FAD_THR(base, value) (BME_XOR32(&XCVR_FAD_THR_REG(base), (uint32_t)(value)))
41888 #define XCVR_TOG_ZBDEM_AFC(base, value) (BME_XOR32(&XCVR_ZBDEM_AFC_REG(base), (uint32_t)(value)))
41956 #define XCVR_TOG_LPPS_CTRL(base, value) (BME_XOR32(&XCVR_LPPS_CTRL_REG(base), (uint32_t)(value)))
42133 #define XCVR_TOG_ADC_CTRL(base, value) (BME_XOR32(&XCVR_ADC_CTRL_REG(base), (uint32_t)(value)))
42241 #define XCVR_TOG_ADC_TUNE(base, value) (BME_XOR32(&XCVR_ADC_TUNE_REG(base), (uint32_t)(value)))
42330 #define XCVR_TOG_ADC_ADJ(base, value) (BME_XOR32(&XCVR_ADC_ADJ_REG(base), (uint32_t)(value)))
42449 #define XCVR_TOG_ADC_REGS(base, value) (BME_XOR32(&XCVR_ADC_REGS_REG(base), (uint32_t)(value)))
42587 #define XCVR_TOG_ADC_TRIMS(base, value) (BME_XOR32(&XCVR_ADC_TRIMS_REG(base), (uint32_t)(value)))
42662 #define XCVR_TOG_ADC_TEST_CTRL(base, value) (BME_XOR32(&XCVR_ADC_TEST_CTRL_REG(base), (uint32_t)(va…
42782 #define XCVR_TOG_BBF_CTRL(base, value) (BME_XOR32(&XCVR_BBF_CTRL_REG(base), (uint32_t)(value)))
42943 #define XCVR_TOG_RX_ANA_CTRL(base, value) (BME_XOR32(&XCVR_RX_ANA_CTRL_REG(base), (uint32_t)(value)…
43023 #define XCVR_TOG_XTAL_CTRL(base, value) (BME_XOR32(&XCVR_XTAL_CTRL_REG(base), (uint32_t)(value)))
43193 #define XCVR_TOG_XTAL_CTRL2(base, value) (BME_XOR32(&XCVR_XTAL_CTRL2_REG(base), (uint32_t)(value)))
43397 #define XCVR_TOG_BGAP_CTRL(base, value) (BME_XOR32(&XCVR_BGAP_CTRL_REG(base), (uint32_t)(value)))
43485 #define XCVR_TOG_PLL_CTRL(base, value) (BME_XOR32(&XCVR_PLL_CTRL_REG(base), (uint32_t)(value)))
43629 #define XCVR_TOG_PLL_CTRL2(base, value) (BME_XOR32(&XCVR_PLL_CTRL2_REG(base), (uint32_t)(value)))
43722 #define XCVR_TOG_PLL_TEST_CTRL(base, value) (BME_XOR32(&XCVR_PLL_TEST_CTRL_REG(base), (uint32_t)(va…
43844 #define XCVR_TOG_QGEN_CTRL(base, value) (BME_XOR32(&XCVR_QGEN_CTRL_REG(base), (uint32_t)(value)))
43923 #define XCVR_TOG_TCA_CTRL(base, value) (BME_XOR32(&XCVR_TCA_CTRL_REG(base), (uint32_t)(value)))
44032 #define XCVR_TOG_TZA_CTRL(base, value) (BME_XOR32(&XCVR_TZA_CTRL_REG(base), (uint32_t)(value)))
44135 #define XCVR_TOG_TX_ANA_CTRL(base, value) (BME_XOR32(&XCVR_TX_ANA_CTRL_REG(base), (uint32_t)(value)…
44176 #define XCVR_TOG_ANA_SPARE(base, value) (BME_XOR32(&XCVR_ANA_SPARE_REG(base), (uint32_t)(value)))
44326 #define ZLL_TOG_IRQSTS(base, value) (BME_XOR32(&ZLL_IRQSTS_REG(base), (uint32_t)(value)))
44724 #define ZLL_TOG_PHY_CTRL(base, value) (BME_XOR32(&ZLL_PHY_CTRL_REG(base), (uint32_t)(value)))
45310 #define ZLL_TOG_T1CMP(base, value) (BME_XOR32(&ZLL_T1CMP_REG(base), (uint32_t)(value)))
45351 #define ZLL_TOG_T2CMP(base, value) (BME_XOR32(&ZLL_T2CMP_REG(base), (uint32_t)(value)))
45392 #define ZLL_TOG_T2PRIMECMP(base, value) (BME_XOR32(&ZLL_T2PRIMECMP_REG(base), (uint32_t)(value)))
45433 #define ZLL_TOG_T3CMP(base, value) (BME_XOR32(&ZLL_T3CMP_REG(base), (uint32_t)(value)))
45474 #define ZLL_TOG_T4CMP(base, value) (BME_XOR32(&ZLL_T4CMP_REG(base), (uint32_t)(value)))
45514 #define ZLL_TOG_PA_PWR(base, value) (BME_XOR32(&ZLL_PA_PWR_REG(base), (uint32_t)(value)))
45556 #define ZLL_TOG_CHANNEL_NUM0(base, value) (BME_XOR32(&ZLL_CHANNEL_NUM0_REG(base), (uint32_t)(value)…
45649 #define ZLL_TOG_MACSHORTADDRS0(base, value) (BME_XOR32(&ZLL_MACSHORTADDRS0_REG(base), (uint32_t)(va…
45716 #define ZLL_TOG_MACLONGADDRS0_LSB(base, value) (BME_XOR32(&ZLL_MACLONGADDRS0_LSB_REG(base), (uint32…
45741 #define ZLL_TOG_MACLONGADDRS0_MSB(base, value) (BME_XOR32(&ZLL_MACLONGADDRS0_MSB_REG(base), (uint32…
45762 #define ZLL_TOG_RX_FRAME_FILTER(base, value) (BME_XOR32(&ZLL_RX_FRAME_FILTER_REG(base), (uint32_t)(…
45916 #define ZLL_TOG_CCA_LQI_CTRL(base, value) (BME_XOR32(&ZLL_CCA_LQI_CTRL_REG(base), (uint32_t)(value)…
45992 #define ZLL_TOG_CCA2_CTRL(base, value) (BME_XOR32(&ZLL_CCA2_CTRL_REG(base), (uint32_t)(value)))
46069 #define ZLL_TOG_FAD_CTRL(base, value) (BME_XOR32(&ZLL_FAD_CTRL_REG(base), (uint32_t)(value)))
46235 #define ZLL_TOG_SNF_CTRL(base, value) (BME_XOR32(&ZLL_SNF_CTRL_REG(base), (uint32_t)(value)))
46278 #define ZLL_TOG_BSM_CTRL(base, value) (BME_XOR32(&ZLL_BSM_CTRL_REG(base), (uint32_t)(value)))
46320 #define ZLL_TOG_MACSHORTADDRS1(base, value) (BME_XOR32(&ZLL_MACSHORTADDRS1_REG(base), (uint32_t)(va…
46387 #define ZLL_TOG_MACLONGADDRS1_LSB(base, value) (BME_XOR32(&ZLL_MACLONGADDRS1_LSB_REG(base), (uint32…
46412 #define ZLL_TOG_MACLONGADDRS1_MSB(base, value) (BME_XOR32(&ZLL_MACLONGADDRS1_MSB_REG(base), (uint32…
46433 #define ZLL_TOG_DUAL_PAN_CTRL(base, value) (BME_XOR32(&ZLL_DUAL_PAN_CTRL_REG(base), (uint32_t)(valu…
46669 #define ZLL_TOG_CHANNEL_NUM1(base, value) (BME_XOR32(&ZLL_CHANNEL_NUM1_REG(base), (uint32_t)(value)…
46709 #define ZLL_TOG_SAM_CTRL(base, value) (BME_XOR32(&ZLL_SAM_CTRL_REG(base), (uint32_t)(value)))
46843 #define ZLL_TOG_SAM_TABLE(base, value) (BME_XOR32(&ZLL_SAM_TABLE_REG(base), (uint32_t)(value)))
47172 #define ZLL_TOG_SEQ_CTRL_STS(base, value) (BME_XOR32(&ZLL_SEQ_CTRL_STS_REG(base), (uint32_t)(value)…
47464 #define ZLL_TOG_ACKDELAY(base, value) (BME_XOR32(&ZLL_ACKDELAY_REG(base), (uint32_t)(value)))
47530 #define ZLL_TOG_FILTERFAIL_CODE(base, value) (BME_XOR32(&ZLL_FILTERFAIL_CODE_REG(base), (uint32_t)(…
47601 #define ZLL_TOG_RX_WTR_MARK(base, value) (BME_XOR32(&ZLL_RX_WTR_MARK_REG(base), (uint32_t)(value)))
47648 #define ZLL_TOG_SLOT_PRELOAD(base, value) (BME_XOR32(&ZLL_SLOT_PRELOAD_REG(base), (uint32_t)(value)…
47856 #define ZLL_TOG_TMR_PRESCALE(base, value) (BME_XOR32(&ZLL_TMR_PRESCALE_REG(base), (uint32_t)(value)…
47921 #define ZLL_TOG_LENIENCY_LSB(base, value) (BME_XOR32(&ZLL_LENIENCY_LSB_REG(base), (uint32_t)(value)…
47956 #define ZLL_TOG_LENIENCY_MSB(base, value) (BME_XOR32(&ZLL_LENIENCY_MSB_REG(base), (uint32_t)(value)…
48044 #define ZLL_TOG_PKT_BUFFER(base, index, value) (BME_XOR32(&ZLL_PKT_BUFFER_REG(base, index), (uint32…