Lines Matching refs:cmdBuf
273 uint8_t cmdBuf[] = {OPCODE_RDSR}; /* 1-byte Read Status Register #1 command. */ in SPIM_ReadStatusRegister() local
277 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_ReadStatusRegister()
292 …uint8_t cmdBuf[] = {OPCODE_WRSR, 0x00U}; /* 1-byte Write Status Register #1 command + 1-byte d… in SPIM_WriteStatusRegister() local
294 cmdBuf[1] = dataBuf[0]; in SPIM_WriteStatusRegister()
297 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_WriteStatusRegister()
310 uint8_t cmdBuf[] = {OPCODE_RDSR2}; /* 1-byte Read Status Register #1 command. */ in SPIM_ReadStatusRegister2() local
314 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_ReadStatusRegister2()
330 uint8_t cmdBuf[3] = {OPCODE_WRSR, 0U, 0U}; in SPIM_WriteStatusRegister2() local
332 cmdBuf[1] = dataBuf[0]; in SPIM_WriteStatusRegister2()
333 cmdBuf[2] = dataBuf[1]; in SPIM_WriteStatusRegister2()
337 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_WriteStatusRegister2()
351 …uint8_t cmdBuf[] = {OPCODE_WRSR3, 0x00U}; /* 1-byte Write Status Register #2 command + 1-byte d…
352 cmdBuf[1] = dataBuf[0];
356 spim_write(cmdBuf, sizeof (cmdBuf));
370 uint8_t cmdBuf[] = {OPCODE_RDSR3}; /* 1-byte Read Status Register #1 command. */ in SPIM_ReadStatusRegister3() local
374 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_ReadStatusRegister3()
390 …uint8_t cmdBuf[] = {OPCODE_WRSCUR, 0x00U}; /* 1-byte Write Status Register #2 command + 1-byte d…
391 cmdBuf[1] = dataBuf[0];
395 spim_write(cmdBuf, sizeof (cmdBuf));
409 uint8_t cmdBuf[] = {OPCODE_RDSCUR}; /* 1-byte Read Status Register #1 command. */ in SPIM_ReadSecurityRegister() local
413 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_ReadSecurityRegister()
463 uint8_t cmdBuf[] = {0U}; /* 1-byte Write Enable command. */ in spim_set_write_enable() local
464 cmdBuf[0] = isEn ? OPCODE_WREN : OPCODE_WRDI; in spim_set_write_enable()
468 spim_write(cmdBuf, sizeof (cmdBuf)); in spim_set_write_enable()
495 uint8_t cmdBuf[1]; in SPIM_InitFlash() local
505 cmdBuf[0] = OPCODE_RSTEN; in SPIM_InitFlash()
508 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_InitFlash()
512 cmdBuf[0] = OPCODE_RST; in SPIM_InitFlash()
515 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_InitFlash()
519 cmdBuf[0] = OPCODE_RSTEN; in SPIM_InitFlash()
522 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_InitFlash()
526 cmdBuf[0] = OPCODE_RST; in SPIM_InitFlash()
529 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_InitFlash()
568 uint8_t cmdBuf[] = { OPCODE_RDID }; /* 1-byte JEDEC ID command. */ in SPIM_ReadJedecId() local
572 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_ReadJedecId()
582 uint8_t cmdBuf[3]; in spim_enable_spansion_quad_mode() local
585 cmdBuf[0] = 0x5U; /* Read Status Register-1 */ in spim_enable_spansion_quad_mode()
589 spim_write(cmdBuf, sizeof (cmdBuf)); in spim_enable_spansion_quad_mode()
597 cmdBuf[0] = 0x35U; /* Read Configuration Register-1 */ in spim_enable_spansion_quad_mode()
601 spim_write(cmdBuf, sizeof (cmdBuf)); in spim_enable_spansion_quad_mode()
609 cmdBuf[0] = 0x1U; /* Write register */ in spim_enable_spansion_quad_mode()
610 cmdBuf[1] = status1; in spim_enable_spansion_quad_mode()
614 cmdBuf[2] = dataBuf[0] | 0x2U; /* set QUAD */ in spim_enable_spansion_quad_mode()
618 cmdBuf[2] = dataBuf[0] & ~0x2U; /* clear QUAD */ in spim_enable_spansion_quad_mode()
623 spim_write(cmdBuf, 3UL); in spim_enable_spansion_quad_mode()
629 cmdBuf[0] = 0x35U; /* Read Configuration Register-1 */ in spim_enable_spansion_quad_mode()
633 spim_write(cmdBuf, sizeof (cmdBuf)); in spim_enable_spansion_quad_mode()
708 uint8_t cmdBuf[1]; /* 1-byte command. */ in spim_eon_set_qpi_mode() local
716 cmdBuf[0] = OPCODE_ENQPI; in spim_eon_set_qpi_mode()
720 spim_write(cmdBuf, sizeof (cmdBuf)); in spim_eon_set_qpi_mode()
725 cmdBuf[0] = OPCODE_EXQPI; in spim_eon_set_qpi_mode()
729 spim_write(cmdBuf, sizeof (cmdBuf)); in spim_eon_set_qpi_mode()
740 uint8_t cmdBuf[2]; in SPIM_SPANSION_4Bytes_Enable() local
743 cmdBuf[0] = OPCODE_BRRD; in SPIM_SPANSION_4Bytes_Enable()
746 spim_write(cmdBuf, 1UL); in SPIM_SPANSION_4Bytes_Enable()
753 cmdBuf[0] = OPCODE_BRWR; in SPIM_SPANSION_4Bytes_Enable()
757 cmdBuf[1] = dataBuf[0] | 0x80U; /* set EXTADD */ in SPIM_SPANSION_4Bytes_Enable()
761 cmdBuf[1] = dataBuf[0] & ~0x80U; /* clear EXTADD */ in SPIM_SPANSION_4Bytes_Enable()
766 spim_write(cmdBuf, 2UL); in SPIM_SPANSION_4Bytes_Enable()
836 uint8_t cmdBuf[1]; /* 1-byte Enter/Exit 4-Byte Mode command. */ in SPIM_Enable_4Bytes_Mode() local
865 cmdBuf[0] = isEn ? OPCODE_EN4B : OPCODE_EX4B; in SPIM_Enable_4Bytes_Mode()
869 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_Enable_4Bytes_Mode()
928 uint8_t cmdBuf[] = { OPCODE_CHIP_ERASE }; /* 1-byte Chip Erase command. */ in SPIM_ChipErase() local
934 spim_write(cmdBuf, sizeof (cmdBuf)); in SPIM_ChipErase()
955 uint8_t cmdBuf[16]; in SPIM_EraseBlock() local
960 cmdBuf[buf_idx++] = u8ErsCmd; in SPIM_EraseBlock()
964 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 24); in SPIM_EraseBlock()
965 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 16); in SPIM_EraseBlock()
966 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 8); in SPIM_EraseBlock()
967 cmdBuf[buf_idx++] = (uint8_t) (u32Addr & 0xFFUL); in SPIM_EraseBlock()
971 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 16); in SPIM_EraseBlock()
972 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 8); in SPIM_EraseBlock()
973 cmdBuf[buf_idx++] = (uint8_t) (u32Addr & 0xFFUL); in SPIM_EraseBlock()
978 spim_write(cmdBuf, buf_idx); in SPIM_EraseBlock()
1006 uint8_t cmdBuf[16]; in SPIM_WriteInPageDataByIo() local
1014 cmdBuf[0] = wrCmd; in SPIM_WriteInPageDataByIo()
1015 spim_write(cmdBuf, 1UL); /* Write out command. */ in SPIM_WriteInPageDataByIo()
1020 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 24); in SPIM_WriteInPageDataByIo()
1021 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 16); in SPIM_WriteInPageDataByIo()
1022 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 8); in SPIM_WriteInPageDataByIo()
1023 cmdBuf[buf_idx++] = (uint8_t) u32Addr; in SPIM_WriteInPageDataByIo()
1027 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 16); in SPIM_WriteInPageDataByIo()
1028 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 8); in SPIM_WriteInPageDataByIo()
1029 cmdBuf[buf_idx++] = (uint8_t) u32Addr; in SPIM_WriteInPageDataByIo()
1033 spim_write(cmdBuf, buf_idx); /* Write out u32Address. */ in SPIM_WriteInPageDataByIo()
1160 uint8_t cmdBuf[16]; in SPIM_IO_Read() local
1165 cmdBuf[0] = rdCmd; in SPIM_IO_Read()
1167 spim_write(cmdBuf, 1UL); /* Write out command. */ in SPIM_IO_Read()
1172 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 24); in SPIM_IO_Read()
1173 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 16); in SPIM_IO_Read()
1174 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 8); in SPIM_IO_Read()
1175 cmdBuf[buf_idx++] = (uint8_t) u32Addr; in SPIM_IO_Read()
1179 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 16); in SPIM_IO_Read()
1180 cmdBuf[buf_idx++] = (uint8_t) (u32Addr >> 8); in SPIM_IO_Read()
1181 cmdBuf[buf_idx++] = (uint8_t) u32Addr; in SPIM_IO_Read()
1184 spim_write(cmdBuf, buf_idx); /* Write out u32Address. */ in SPIM_IO_Read()
1189 cmdBuf[buf_idx++] = 0x00U; in SPIM_IO_Read()
1193 spim_write(cmdBuf, buf_idx); /* Write out dummy bytes. */ in SPIM_IO_Read()