627 void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask)  in SPI_EnableInt()  argument
630     if((u32Mask & SPI_UNIT_INT_MASK) == SPI_UNIT_INT_MASK)  in SPI_EnableInt()
636     if((u32Mask & SPI_SSACT_INT_MASK) == SPI_SSACT_INT_MASK)  in SPI_EnableInt()
642     if((u32Mask & SPI_SSINACT_INT_MASK) == SPI_SSINACT_INT_MASK)  in SPI_EnableInt()
648     if((u32Mask & SPI_SLVUR_INT_MASK) == SPI_SLVUR_INT_MASK)  in SPI_EnableInt()
654     if((u32Mask & SPI_SLVBE_INT_MASK) == SPI_SLVBE_INT_MASK)  in SPI_EnableInt()
660     if((u32Mask & SPI_TXUF_INT_MASK) == SPI_TXUF_INT_MASK)  in SPI_EnableInt()
666     if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK)  in SPI_EnableInt()
672     if((u32Mask & SPI_FIFO_RXTH_INT_MASK) == SPI_FIFO_RXTH_INT_MASK)  in SPI_EnableInt()
678     if((u32Mask & SPI_FIFO_RXOV_INT_MASK) == SPI_FIFO_RXOV_INT_MASK)  in SPI_EnableInt()
684     if((u32Mask & SPI_FIFO_RXTO_INT_MASK) == SPI_FIFO_RXTO_INT_MASK)  in SPI_EnableInt()
710 void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask)  in SPI_DisableInt()  argument
713     if((u32Mask & SPI_UNIT_INT_MASK) == SPI_UNIT_INT_MASK)  in SPI_DisableInt()
719     if((u32Mask & SPI_SSACT_INT_MASK) == SPI_SSACT_INT_MASK)  in SPI_DisableInt()
725     if((u32Mask & SPI_SSINACT_INT_MASK) == SPI_SSINACT_INT_MASK)  in SPI_DisableInt()
731     if((u32Mask & SPI_SLVUR_INT_MASK) == SPI_SLVUR_INT_MASK)  in SPI_DisableInt()
737     if((u32Mask & SPI_SLVBE_INT_MASK) == SPI_SLVBE_INT_MASK)  in SPI_DisableInt()
743     if((u32Mask & SPI_TXUF_INT_MASK) == SPI_TXUF_INT_MASK)  in SPI_DisableInt()
749     if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK)  in SPI_DisableInt()
755     if((u32Mask & SPI_FIFO_RXTH_INT_MASK) == SPI_FIFO_RXTH_INT_MASK)  in SPI_DisableInt()
761     if((u32Mask & SPI_FIFO_RXOV_INT_MASK) == SPI_FIFO_RXOV_INT_MASK)  in SPI_DisableInt()
767     if((u32Mask & SPI_FIFO_RXTO_INT_MASK) == SPI_FIFO_RXTO_INT_MASK)  in SPI_DisableInt()
793 uint32_t SPI_GetIntFlag(SPI_T *spi, uint32_t u32Mask)  in SPI_GetIntFlag()  argument
799     if((u32Mask & SPI_UNIT_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
806     if((u32Mask & SPI_SSACT_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
813     if((u32Mask & SPI_SSINACT_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
820     if((u32Mask & SPI_SLVUR_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
827     if((u32Mask & SPI_SLVBE_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
834     if((u32Mask & SPI_TXUF_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
841     if((u32Mask & SPI_FIFO_TXTH_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
848     if((u32Mask & SPI_FIFO_RXTH_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
855     if((u32Mask & SPI_FIFO_RXOV_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
862     if((u32Mask & SPI_FIFO_RXTO_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
888 void SPI_ClearIntFlag(SPI_T *spi, uint32_t u32Mask)  in SPI_ClearIntFlag()  argument
890     if(u32Mask & SPI_UNIT_INT_MASK)  in SPI_ClearIntFlag()
895     if(u32Mask & SPI_SSACT_INT_MASK)  in SPI_ClearIntFlag()
900     if(u32Mask & SPI_SSINACT_INT_MASK)  in SPI_ClearIntFlag()
905     if(u32Mask & SPI_SLVUR_INT_MASK)  in SPI_ClearIntFlag()
910     if(u32Mask & SPI_SLVBE_INT_MASK)  in SPI_ClearIntFlag()
915     if(u32Mask & SPI_TXUF_INT_MASK)  in SPI_ClearIntFlag()
920     if(u32Mask & SPI_FIFO_RXOV_INT_MASK)  in SPI_ClearIntFlag()
925     if(u32Mask & SPI_FIFO_RXTO_INT_MASK)  in SPI_ClearIntFlag()
949 uint32_t SPI_GetStatus(SPI_T *spi, uint32_t u32Mask)  in SPI_GetStatus()  argument
955     if((u32Mask & SPI_BUSY_MASK) && (u32TmpValue))  in SPI_GetStatus()
962     if((u32Mask & SPI_RX_EMPTY_MASK) && (u32TmpValue))  in SPI_GetStatus()
969     if((u32Mask & SPI_RX_FULL_MASK) && (u32TmpValue))  in SPI_GetStatus()
976     if((u32Mask & SPI_TX_EMPTY_MASK) && (u32TmpValue))  in SPI_GetStatus()
983     if((u32Mask & SPI_TX_FULL_MASK) && (u32TmpValue))  in SPI_GetStatus()
990     if((u32Mask & SPI_TXRX_RESET_MASK) && (u32TmpValue))  in SPI_GetStatus()
997     if((u32Mask & SPI_SPIEN_STS_MASK) && (u32TmpValue))  in SPI_GetStatus()
1004     if((u32Mask & SPI_SSLINE_STS_MASK) && (u32TmpValue))  in SPI_GetStatus()
1260 void SPII2S_EnableInt(SPI_T *i2s, uint32_t u32Mask)  in SPII2S_EnableInt()  argument
1263     if((u32Mask & SPII2S_FIFO_TXTH_INT_MASK) == SPII2S_FIFO_TXTH_INT_MASK)  in SPII2S_EnableInt()
1269     if((u32Mask & SPII2S_FIFO_RXTH_INT_MASK) == SPII2S_FIFO_RXTH_INT_MASK)  in SPII2S_EnableInt()
1275     if((u32Mask & SPII2S_FIFO_RXOV_INT_MASK) == SPII2S_FIFO_RXOV_INT_MASK)  in SPII2S_EnableInt()
1281     if((u32Mask & SPII2S_FIFO_RXTO_INT_MASK) == SPII2S_FIFO_RXTO_INT_MASK)  in SPII2S_EnableInt()
1287     if((u32Mask & SPII2S_TXUF_INT_MASK) == SPII2S_TXUF_INT_MASK)  in SPII2S_EnableInt()
1293     if((u32Mask & SPII2S_RIGHT_ZC_INT_MASK) == SPII2S_RIGHT_ZC_INT_MASK)  in SPII2S_EnableInt()
1299     if((u32Mask & SPII2S_LEFT_ZC_INT_MASK) == SPII2S_LEFT_ZC_INT_MASK)  in SPII2S_EnableInt()
1320 void SPII2S_DisableInt(SPI_T *i2s, uint32_t u32Mask)  in SPII2S_DisableInt()  argument
1323     if((u32Mask & SPII2S_FIFO_TXTH_INT_MASK) == SPII2S_FIFO_TXTH_INT_MASK)  in SPII2S_DisableInt()
1329     if((u32Mask & SPII2S_FIFO_RXTH_INT_MASK) == SPII2S_FIFO_RXTH_INT_MASK)  in SPII2S_DisableInt()
1335     if((u32Mask & SPII2S_FIFO_RXOV_INT_MASK) == SPII2S_FIFO_RXOV_INT_MASK)  in SPII2S_DisableInt()
1341     if((u32Mask & SPII2S_FIFO_RXTO_INT_MASK) == SPII2S_FIFO_RXTO_INT_MASK)  in SPII2S_DisableInt()
1347     if((u32Mask & SPII2S_TXUF_INT_MASK) == SPII2S_TXUF_INT_MASK)  in SPII2S_DisableInt()
1353     if((u32Mask & SPII2S_RIGHT_ZC_INT_MASK) == SPII2S_RIGHT_ZC_INT_MASK)  in SPII2S_DisableInt()
1359     if((u32Mask & SPII2S_LEFT_ZC_INT_MASK) == SPII2S_LEFT_ZC_INT_MASK)  in SPII2S_DisableInt()