Lines Matching refs:i2s

23 static uint32_t SPII2S_GetSourceClockFreq(SPI_T *i2s);
1019 static uint32_t SPII2S_GetSourceClockFreq(SPI_T *i2s) in SPII2S_GetSourceClockFreq() argument
1023 if(i2s == SPI0) in SPII2S_GetSourceClockFreq()
1043 else if(i2s == SPI1) in SPII2S_GetSourceClockFreq()
1063 else if(i2s == SPI2) in SPII2S_GetSourceClockFreq()
1133 uint32_t SPII2S_Open(SPI_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordW… in SPII2S_Open() argument
1139 if(i2s == SPI0) in SPII2S_Open()
1144 else if(i2s == SPI1) in SPII2S_Open()
1149 else if(i2s == SPI2) in SPII2S_Open()
1161 i2s->I2SCTL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat; in SPII2S_Open()
1163 i2s->FIFOCTL = SPII2S_FIFO_TX_LEVEL_WORD_2 | SPII2S_FIFO_RX_LEVEL_WORD_2; in SPII2S_Open()
1168 u32SrcClk = SPII2S_GetSourceClockFreq(i2s); in SPII2S_Open()
1175i2s->I2SCLK = (i2s->I2SCLK & ~SPI_I2SCLK_BCLKDIV_Msk) | (u32Divider << SPI_I2SCLK_BCLKDIV_Pos); in SPII2S_Open()
1183 i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk); in SPII2S_Open()
1191 i2s->I2SCLK &= ~SPI_I2SCLK_BCLKDIV_Msk; in SPII2S_Open()
1193 if(i2s == SPI0) in SPII2S_Open()
1198 i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk); in SPII2S_Open()
1202 else if(i2s == SPI1) in SPII2S_Open()
1207 i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk); in SPII2S_Open()
1211 else if(i2s == SPI2) in SPII2S_Open()
1216 i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk); in SPII2S_Open()
1225 i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk); in SPII2S_Open()
1240 void SPII2S_Close(SPI_T *i2s) in SPII2S_Close() argument
1242 i2s->I2SCTL &= ~SPI_I2SCTL_I2SEN_Msk; in SPII2S_Close()
1260 void SPII2S_EnableInt(SPI_T *i2s, uint32_t u32Mask) in SPII2S_EnableInt() argument
1265 i2s->FIFOCTL |= SPI_FIFOCTL_TXTHIEN_Msk; in SPII2S_EnableInt()
1271 i2s->FIFOCTL |= SPI_FIFOCTL_RXTHIEN_Msk; in SPII2S_EnableInt()
1277 i2s->FIFOCTL |= SPI_FIFOCTL_RXOVIEN_Msk; in SPII2S_EnableInt()
1283 i2s->FIFOCTL |= SPI_FIFOCTL_RXTOIEN_Msk; in SPII2S_EnableInt()
1289 i2s->FIFOCTL |= SPI_FIFOCTL_TXUFIEN_Msk; in SPII2S_EnableInt()
1295 i2s->I2SCTL |= SPI_I2SCTL_RZCIEN_Msk; in SPII2S_EnableInt()
1301 i2s->I2SCTL |= SPI_I2SCTL_LZCIEN_Msk; in SPII2S_EnableInt()
1320 void SPII2S_DisableInt(SPI_T *i2s, uint32_t u32Mask) in SPII2S_DisableInt() argument
1325 i2s->FIFOCTL &= ~SPI_FIFOCTL_TXTHIEN_Msk; in SPII2S_DisableInt()
1331 i2s->FIFOCTL &= ~SPI_FIFOCTL_RXTHIEN_Msk; in SPII2S_DisableInt()
1337 i2s->FIFOCTL &= ~SPI_FIFOCTL_RXOVIEN_Msk; in SPII2S_DisableInt()
1343 i2s->FIFOCTL &= ~SPI_FIFOCTL_RXTOIEN_Msk; in SPII2S_DisableInt()
1349 i2s->FIFOCTL &= ~SPI_FIFOCTL_TXUFIEN_Msk; in SPII2S_DisableInt()
1355 i2s->I2SCTL &= ~SPI_I2SCTL_RZCIEN_Msk; in SPII2S_DisableInt()
1361 i2s->I2SCTL &= ~SPI_I2SCTL_LZCIEN_Msk; in SPII2S_DisableInt()
1373 uint32_t SPII2S_EnableMCLK(SPI_T *i2s, uint32_t u32BusClock) in SPII2S_EnableMCLK() argument
1378 u32SrcClk = SPII2S_GetSourceClockFreq(i2s); in SPII2S_EnableMCLK()
1394 i2s->I2SCLK = (i2s->I2SCLK & ~SPI_I2SCLK_MCLKDIV_Msk) | (u32Divider << SPI_I2SCLK_MCLKDIV_Pos); in SPII2S_EnableMCLK()
1397 i2s->I2SCTL |= SPI_I2SCTL_MCLKEN_Msk; in SPII2S_EnableMCLK()
1417 void SPII2S_DisableMCLK(SPI_T *i2s) in SPII2S_DisableMCLK() argument
1419 i2s->I2SCTL &= ~SPI_I2SCTL_MCLKEN_Msk; in SPII2S_DisableMCLK()
1430 void SPII2S_SetFIFO(SPI_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold) in SPII2S_SetFIFO() argument
1432 i2s->FIFOCTL = (i2s->FIFOCTL & ~(SPI_FIFOCTL_TXTH_Msk | SPI_FIFOCTL_RXTH_Msk)) | in SPII2S_SetFIFO()