Lines Matching refs:epwm
37 uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32UnitTimeNsec, … in EPWM_ConfigCaptureChannel() argument
44 if(epwm == EPWM0) in EPWM_ConfigCaptureChannel()
62 if(epwm == EPWM0) in EPWM_ConfigCaptureChannel()
110 EPWM_SET_PRESCALER(epwm, u32ChannelNum, u16Prescale); in EPWM_ConfigCaptureChannel()
113 …(epwm)->CTL1 = ((epwm)->CTL1 & ~((1UL << EPWM_CTL1_CNTTYPE0_Pos) << (u32ChannelNum << 1U))) | (1UL… in EPWM_ConfigCaptureChannel()
115 (epwm)->CTL1 &= ~((1UL << EPWM_CTL1_CNTMODE0_Pos) << u32ChannelNum); in EPWM_ConfigCaptureChannel()
116 EPWM_SET_CNR(epwm, u32ChannelNum, u16CNR); in EPWM_ConfigCaptureChannel()
135 uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint… in EPWM_ConfigOutputChannel() argument
142 if(epwm == EPWM0) in EPWM_ConfigOutputChannel()
160 if(epwm == EPWM0) in EPWM_ConfigOutputChannel()
186 EPWM_SET_PRESCALER(epwm, u32ChannelNum, u32Prescale); in EPWM_ConfigOutputChannel()
188 …(epwm)->CTL1 = ((epwm)->CTL1 & ~(((1UL << EPWM_CTL1_CNTTYPE0_Pos) << (u32ChannelNum << 1U))|((1UL … in EPWM_ConfigOutputChannel()
191 EPWM_SET_CNR(epwm, u32ChannelNum, u32CNR); in EPWM_ConfigOutputChannel()
192 EPWM_SET_CMR(epwm, u32ChannelNum, u32DutyCycle * (u32CNR + 1U) / 100U); in EPWM_ConfigOutputChannel()
194 …(epwm)->WGCTL0 = ((epwm)->WGCTL0 & ~(((1UL << EPWM_WGCTL0_PRDPCTL0_Pos) | (1UL << EPWM_WGCTL0_ZPCT… in EPWM_ConfigOutputChannel()
196 …(epwm)->WGCTL1 = ((epwm)->WGCTL1 & ~(((1UL << EPWM_WGCTL1_CMPDCTL0_Pos) | (1UL << EPWM_WGCTL1_CMPU… in EPWM_ConfigOutputChannel()
212 void EPWM_Start(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_Start() argument
214 (epwm)->CNTEN |= u32ChannelMask; in EPWM_Start()
227 void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_Stop() argument
234 (epwm)->PERIOD[i] = 0U; in EPWM_Stop()
249 void EPWM_ForceStop(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_ForceStop() argument
251 (epwm)->CNTEN &= ~u32ChannelMask; in EPWM_ForceStop()
280 void EPWM_EnableADCTrigger(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition) in EPWM_EnableADCTrigger() argument
284 (epwm)->EADCTS0 &= ~((EPWM_EADCTS0_TRGSEL0_Msk) << (u32ChannelNum << 3U)); in EPWM_EnableADCTrigger()
285 (epwm)->EADCTS0 |= ((EPWM_EADCTS0_TRGEN0_Msk | u32Condition) << (u32ChannelNum << 3)); in EPWM_EnableADCTrigger()
289 (epwm)->EADCTS1 &= ~((EPWM_EADCTS1_TRGSEL4_Msk) << ((u32ChannelNum - 4U) << 3U)); in EPWM_EnableADCTrigger()
290 … (epwm)->EADCTS1 |= ((EPWM_EADCTS1_TRGEN4_Msk | u32Condition) << ((u32ChannelNum - 4U) << 3U)); in EPWM_EnableADCTrigger()
303 void EPWM_DisableADCTrigger(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableADCTrigger() argument
307 (epwm)->EADCTS0 &= ~(EPWM_EADCTS0_TRGEN0_Msk << (u32ChannelNum << 3U)); in EPWM_DisableADCTrigger()
311 (epwm)->EADCTS1 &= ~(EPWM_EADCTS1_TRGEN4_Msk << ((u32ChannelNum - 4U) << 3U)); in EPWM_DisableADCTrigger()
325 void EPWM_ClearADCTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition) in EPWM_ClearADCTriggerFlag() argument
327 (epwm)->STATUS = (EPWM_STATUS_EADCTRGF0_Msk << u32ChannelNum); in EPWM_ClearADCTriggerFlag()
340 uint32_t EPWM_GetADCTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetADCTriggerFlag() argument
342 return (((epwm)->STATUS & (EPWM_STATUS_EADCTRGF0_Msk << u32ChannelNum))?1UL:0UL); in EPWM_GetADCTriggerFlag()
359 void EPWM_EnableDACTrigger(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition) in EPWM_EnableDACTrigger() argument
361 (epwm)->DACTRGEN |= (u32Condition << u32ChannelNum); in EPWM_EnableDACTrigger()
373 void EPWM_DisableDACTrigger(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableDACTrigger() argument
375 …(epwm)->DACTRGEN &= ~((EPWM_TRIGGER_DAC_ZERO | EPWM_TRIGGER_DAC_PERIOD | EPWM_TRIGGER_DAC_COMPARE_… in EPWM_DisableDACTrigger()
389 void EPWM_ClearDACTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition) in EPWM_ClearDACTriggerFlag() argument
391 (epwm)->STATUS = EPWM_STATUS_DACTRGF_Msk; in EPWM_ClearDACTriggerFlag()
404 uint32_t EPWM_GetDACTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetDACTriggerFlag() argument
406 return (((epwm)->STATUS & EPWM_STATUS_DACTRGF_Msk)?1UL:0UL); in EPWM_GetDACTriggerFlag()
440 void EPWM_EnableFaultBrake(EPWM_T *epwm, uint32_t u32ChannelMask, uint32_t u32LevelMask, uint32_t u… in EPWM_EnableFaultBrake() argument
453 …(epwm)->BRKCTL[i >> 1U] |= (u32BrakeSource & (EPWM_BRKCTL0_1_SYSEBEN_Msk | EPWM_BRKCTL0_1_SYSLBEN_… in EPWM_EnableFaultBrake()
454 (epwm)->FAILBRK |= (u32BrakeSource & 0xFU); in EPWM_EnableFaultBrake()
458 (epwm)->BRKCTL[i >> 1U] |= u32BrakeSource; in EPWM_EnableFaultBrake()
467 (epwm)->BRKCTL[i >> 1] &= ~EPWM_BRKCTL0_1_BRKAEVEN_Msk; in EPWM_EnableFaultBrake()
468 (epwm)->BRKCTL[i >> 1] |= ((3U) << EPWM_BRKCTL0_1_BRKAEVEN_Pos); in EPWM_EnableFaultBrake()
473 (epwm)->BRKCTL[i >> 1] &= ~EPWM_BRKCTL0_1_BRKAODD_Msk; in EPWM_EnableFaultBrake()
474 (epwm)->BRKCTL[i >> 1] |= ((3U) << EPWM_BRKCTL0_1_BRKAODD_Pos); in EPWM_EnableFaultBrake()
482 (epwm)->BRKCTL[i >> 1U] &= ~EPWM_BRKCTL0_1_BRKAEVEN_Msk; in EPWM_EnableFaultBrake()
483 (epwm)->BRKCTL[i >> 1U] |= ((2U) << EPWM_BRKCTL0_1_BRKAEVEN_Pos); in EPWM_EnableFaultBrake()
488 (epwm)->BRKCTL[i >> 1U] &= ~EPWM_BRKCTL0_1_BRKAODD_Msk; in EPWM_EnableFaultBrake()
489 (epwm)->BRKCTL[i >> 1U] |= ((2U) << EPWM_BRKCTL0_1_BRKAODD_Pos); in EPWM_EnableFaultBrake()
505 void EPWM_EnableCapture(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_EnableCapture() argument
507 (epwm)->CAPINEN |= u32ChannelMask; in EPWM_EnableCapture()
508 (epwm)->CAPCTL |= u32ChannelMask; in EPWM_EnableCapture()
521 void EPWM_DisableCapture(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_DisableCapture() argument
523 (epwm)->CAPINEN &= ~u32ChannelMask; in EPWM_DisableCapture()
524 (epwm)->CAPCTL &= ~u32ChannelMask; in EPWM_DisableCapture()
537 void EPWM_EnableOutput(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_EnableOutput() argument
539 (epwm)->POEN |= u32ChannelMask; in EPWM_EnableOutput()
552 void EPWM_DisableOutput(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_DisableOutput() argument
554 (epwm)->POEN &= ~u32ChannelMask; in EPWM_DisableOutput()
572 void EPWM_EnablePDMA(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32RisingFirst, uint32_t u32Mod… in EPWM_EnablePDMA() argument
576 …(epwm)->PDMACTL = ((epwm)->PDMACTL & ~((EPWM_PDMACTL_CHSEL0_1_Msk | EPWM_PDMACTL_CAPORD0_1_Msk | E… in EPWM_EnablePDMA()
590 void EPWM_DisablePDMA(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisablePDMA() argument
592 (epwm)->PDMACTL &= ~(EPWM_PDMACTL_CHEN0_1_Msk << ((u32ChannelNum >> 1U) << 3U)); in EPWM_DisablePDMA()
607 void EPWM_EnableDeadZone(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Duration) in EPWM_EnableDeadZone() argument
610 (epwm)->DTCTL[(u32ChannelNum) >> 1U] &= ~EPWM_DTCTL0_1_DTCNT_Msk; in EPWM_EnableDeadZone()
611 (epwm)->DTCTL[(u32ChannelNum) >> 1U] |= EPWM_DTCTL0_1_DTEN_Msk | u32Duration; in EPWM_EnableDeadZone()
624 void EPWM_DisableDeadZone(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableDeadZone() argument
627 (epwm)->DTCTL[(u32ChannelNum) >> 1U] &= ~EPWM_DTCTL0_1_DTEN_Msk; in EPWM_DisableDeadZone()
642 void EPWM_EnableCaptureInt(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Edge) in EPWM_EnableCaptureInt() argument
644 (epwm)->CAPIEN |= (u32Edge << u32ChannelNum); in EPWM_EnableCaptureInt()
659 void EPWM_DisableCaptureInt(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Edge) in EPWM_DisableCaptureInt() argument
661 (epwm)->CAPIEN &= ~(u32Edge << u32ChannelNum); in EPWM_DisableCaptureInt()
676 void EPWM_ClearCaptureIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Edge) in EPWM_ClearCaptureIntFlag() argument
678 (epwm)->CAPIF = (u32Edge << u32ChannelNum); in EPWM_ClearCaptureIntFlag()
693 uint32_t EPWM_GetCaptureIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetCaptureIntFlag() argument
695 return (((((epwm)->CAPIF & (EPWM_CAPIF_CFLIF0_Msk << u32ChannelNum)) ? 1UL : 0UL) << 1) | \ in EPWM_GetCaptureIntFlag()
696 (((epwm)->CAPIF & (EPWM_CAPIF_CRLIF0_Msk << u32ChannelNum)) ? 1UL : 0UL)); in EPWM_GetCaptureIntFlag()
710 void EPWM_EnableDutyInt(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32IntDutyType) in EPWM_EnableDutyInt() argument
712 (epwm)->INTEN0 |= (u32IntDutyType << u32ChannelNum); in EPWM_EnableDutyInt()
724 void EPWM_DisableDutyInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableDutyInt() argument
726 …(epwm)->INTEN0 &= ~((uint32_t)(EPWM_DUTY_INT_DOWN_COUNT_MATCH_CMP | EPWM_DUTY_INT_UP_COUNT_MATCH_C… in EPWM_DisableDutyInt()
738 void EPWM_ClearDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearDutyIntFlag() argument
740 (epwm)->INTSTS0 = (EPWM_INTSTS0_CMPUIF0_Msk | EPWM_INTSTS0_CMPDIF0_Msk) << u32ChannelNum; in EPWM_ClearDutyIntFlag()
754 uint32_t EPWM_GetDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetDutyIntFlag() argument
756 …return ((((epwm)->INTSTS0 & ((EPWM_INTSTS0_CMPDIF0_Msk | EPWM_INTSTS0_CMPUIF0_Msk) << u32ChannelNu… in EPWM_GetDutyIntFlag()
770 void EPWM_EnableFaultBrakeInt(EPWM_T *epwm, uint32_t u32BrakeSource) in EPWM_EnableFaultBrakeInt() argument
772 (epwm)->INTEN1 |= (0x7UL << u32BrakeSource); in EPWM_EnableFaultBrakeInt()
786 void EPWM_DisableFaultBrakeInt(EPWM_T *epwm, uint32_t u32BrakeSource) in EPWM_DisableFaultBrakeInt() argument
788 (epwm)->INTEN1 &= ~(0x7UL << u32BrakeSource); in EPWM_DisableFaultBrakeInt()
801 void EPWM_ClearFaultBrakeIntFlag(EPWM_T *epwm, uint32_t u32BrakeSource) in EPWM_ClearFaultBrakeIntFlag() argument
803 (epwm)->INTSTS1 = (0x3fUL << u32BrakeSource); in EPWM_ClearFaultBrakeIntFlag()
817 uint32_t EPWM_GetFaultBrakeIntFlag(EPWM_T *epwm, uint32_t u32BrakeSource) in EPWM_GetFaultBrakeIntFlag() argument
819 return (((epwm)->INTSTS1 & (0x3fUL << u32BrakeSource)) ? 1UL : 0UL); in EPWM_GetFaultBrakeIntFlag()
832 void EPWM_EnablePeriodInt(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32IntPeriodType) in EPWM_EnablePeriodInt() argument
834 (epwm)->INTEN0 |= ((1UL << EPWM_INTEN0_PIEN0_Pos) << u32ChannelNum); in EPWM_EnablePeriodInt()
846 void EPWM_DisablePeriodInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisablePeriodInt() argument
848 (epwm)->INTEN0 &= ~((1UL << EPWM_INTEN0_PIEN0_Pos) << u32ChannelNum); in EPWM_DisablePeriodInt()
860 void EPWM_ClearPeriodIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearPeriodIntFlag() argument
862 (epwm)->INTSTS0 = ((1UL << EPWM_INTSTS0_PIF0_Pos) << u32ChannelNum); in EPWM_ClearPeriodIntFlag()
876 uint32_t EPWM_GetPeriodIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetPeriodIntFlag() argument
878 return ((((epwm)->INTSTS0 & ((1UL << EPWM_INTSTS0_PIF0_Pos) << u32ChannelNum))) ? 1UL : 0UL); in EPWM_GetPeriodIntFlag()
890 void EPWM_EnableZeroInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableZeroInt() argument
892 (epwm)->INTEN0 |= ((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum); in EPWM_EnableZeroInt()
904 void EPWM_DisableZeroInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableZeroInt() argument
906 (epwm)->INTEN0 &= ~((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum); in EPWM_DisableZeroInt()
918 void EPWM_ClearZeroIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearZeroIntFlag() argument
920 (epwm)->INTSTS0 = ((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum); in EPWM_ClearZeroIntFlag()
934 uint32_t EPWM_GetZeroIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetZeroIntFlag() argument
936 return ((((epwm)->INTSTS0 & ((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum))) ? 1UL : 0UL); in EPWM_GetZeroIntFlag()
954 void EPWM_EnableAcc(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32IntFlagCnt, uint32_t u32IntAc… in EPWM_EnableAcc() argument
956 …(epwm)->IFA[u32ChannelNum] = (((epwm)->IFA[u32ChannelNum] & ~((EPWM_IFA0_IFACNT_Msk | EPWM_IFA0_IF… in EPWM_EnableAcc()
969 void EPWM_DisableAcc(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableAcc() argument
971 (epwm)->IFA[u32ChannelNum] = ((epwm)->IFA[u32ChannelNum] & ~(EPWM_IFA0_IFAEN_Msk)); in EPWM_DisableAcc()
983 void EPWM_EnableAccInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableAccInt() argument
985 (epwm)->AINTEN |= (1UL << (u32ChannelNum)); in EPWM_EnableAccInt()
997 void EPWM_DisableAccInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableAccInt() argument
999 (epwm)->AINTEN &= ~(1UL << (u32ChannelNum)); in EPWM_DisableAccInt()
1011 void EPWM_ClearAccInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearAccInt() argument
1013 (epwm)->AINTSTS = (1UL << (u32ChannelNum)); in EPWM_ClearAccInt()
1026 uint32_t EPWM_GetAccInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetAccInt() argument
1028 return (((epwm)->AINTSTS & (1UL << (u32ChannelNum))) ? 1UL : 0UL); in EPWM_GetAccInt()
1040 void EPWM_EnableAccPDMA(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableAccPDMA() argument
1042 (epwm)->APDMACTL |= (1UL << (u32ChannelNum)); in EPWM_EnableAccPDMA()
1054 void EPWM_DisableAccPDMA(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableAccPDMA() argument
1056 (epwm)->APDMACTL &= ~(1UL << (u32ChannelNum)); in EPWM_DisableAccPDMA()
1068 void EPWM_EnableAccStopMode(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableAccStopMode() argument
1070 (epwm)->IFA[u32ChannelNum] |= EPWM_IFA0_STPMOD_Msk; in EPWM_EnableAccStopMode()
1082 void EPWM_DisableAccStopMode(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableAccStopMode() argument
1084 (epwm)->IFA[u32ChannelNum] &= ~EPWM_IFA0_STPMOD_Msk; in EPWM_DisableAccStopMode()
1096 void EPWM_ClearFTDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearFTDutyIntFlag() argument
1098 (epwm)->FTCI = ((EPWM_FTCI_FTCMU0_Msk | EPWM_FTCI_FTCMD0_Msk) << (u32ChannelNum >> 1U)); in EPWM_ClearFTDutyIntFlag()
1112 uint32_t EPWM_GetFTDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetFTDutyIntFlag() argument
1114 …return (((epwm)->FTCI & ((EPWM_FTCI_FTCMU0_Msk | EPWM_FTCI_FTCMD0_Msk) << (u32ChannelNum >> 1U))) … in EPWM_GetFTDutyIntFlag()
1130 void EPWM_EnableLoadMode(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32LoadMode) in EPWM_EnableLoadMode() argument
1132 (epwm)->CTL0 |= (u32LoadMode << u32ChannelNum); in EPWM_EnableLoadMode()
1148 void EPWM_DisableLoadMode(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32LoadMode) in EPWM_DisableLoadMode() argument
1150 (epwm)->CTL0 &= ~(u32LoadMode << u32ChannelNum); in EPWM_DisableLoadMode()
1172 void EPWM_ConfigSyncPhase(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32SyncSrc, uint32_t u32Di… in EPWM_ConfigSyncPhase() argument
1176 …(epwm)->SYNC = (((epwm)->SYNC & ~(((3UL << EPWM_SYNC_SINSRC0_Pos) << (u32ChannelNum << 1U)) | ((1U… in EPWM_ConfigSyncPhase()
1178 (epwm)->PHS[(u32ChannelNum)] = u32StartPhase; in EPWM_ConfigSyncPhase()
1193 void EPWM_EnableSyncPhase(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_EnableSyncPhase() argument
1200 (epwm)->SYNC |= ((1UL << EPWM_SYNC_PHSEN0_Pos) << (i >> 1U)); in EPWM_EnableSyncPhase()
1216 void EPWM_DisableSyncPhase(EPWM_T *epwm, uint32_t u32ChannelMask) in EPWM_DisableSyncPhase() argument
1223 (epwm)->SYNC &= ~((1UL << EPWM_SYNC_PHSEN0_Pos) << (i >> 1U)); in EPWM_DisableSyncPhase()
1247 void EPWM_EnableSyncNoiseFilter(EPWM_T *epwm, uint32_t u32ClkCnt, uint32_t u32ClkDivSel) in EPWM_EnableSyncNoiseFilter() argument
1249 (epwm)->SYNC = ((epwm)->SYNC & ~(EPWM_SYNC_SFLTCNT_Msk | EPWM_SYNC_SFLTCSEL_Msk)) | \ in EPWM_EnableSyncNoiseFilter()
1261 void EPWM_DisableSyncNoiseFilter(EPWM_T *epwm) in EPWM_DisableSyncNoiseFilter() argument
1263 (epwm)->SYNC &= ~EPWM_SYNC_SNFLTEN_Msk; in EPWM_DisableSyncNoiseFilter()
1274 void EPWM_EnableSyncPinInverse(EPWM_T *epwm) in EPWM_EnableSyncPinInverse() argument
1276 (epwm)->SYNC |= EPWM_SYNC_SINPINV_Msk; in EPWM_EnableSyncPinInverse()
1287 void EPWM_DisableSyncPinInverse(EPWM_T *epwm) in EPWM_DisableSyncPinInverse() argument
1289 (epwm)->SYNC &= (~EPWM_SYNC_SINPINV_Msk); in EPWM_DisableSyncPinInverse()
1309 void EPWM_SetClockSource(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32ClkSrcSel) in EPWM_SetClockSource() argument
1311 …(epwm)->CLKSRC = ((epwm)->CLKSRC & ~(EPWM_CLKSRC_ECLKSRC0_Msk << ((u32ChannelNum >> 1U) << 3U))) |… in EPWM_SetClockSource()
1334 void EPWM_EnableBrakeNoiseFilter(EPWM_T *epwm, uint32_t u32BrakePinNum, uint32_t u32ClkCnt, uint32_… in EPWM_EnableBrakeNoiseFilter() argument
1336 …(epwm)->BNF = ((epwm)->BNF & ~((EPWM_BNF_BRK0FCNT_Msk | EPWM_BNF_BRK0NFSEL_Msk) << (u32BrakePinNum… in EPWM_EnableBrakeNoiseFilter()
1349 void EPWM_DisableBrakeNoiseFilter(EPWM_T *epwm, uint32_t u32BrakePinNum) in EPWM_DisableBrakeNoiseFilter() argument
1351 (epwm)->BNF &= ~(EPWM_BNF_BRK0NFEN_Msk << (u32BrakePinNum << 3U)); in EPWM_DisableBrakeNoiseFilter()
1363 void EPWM_EnableBrakePinInverse(EPWM_T *epwm, uint32_t u32BrakePinNum) in EPWM_EnableBrakePinInverse() argument
1365 (epwm)->BNF |= (EPWM_BNF_BRK0PINV_Msk << (u32BrakePinNum << 3U)); in EPWM_EnableBrakePinInverse()
1377 void EPWM_DisableBrakePinInverse(EPWM_T *epwm, uint32_t u32BrakePinNum) in EPWM_DisableBrakePinInverse() argument
1379 (epwm)->BNF &= ~(EPWM_BNF_BRK0PINV_Msk << (u32BrakePinNum * (uint32_t)EPWM_BNF_BRK1NFEN_Pos)); in EPWM_DisableBrakePinInverse()
1392 void EPWM_SetBrakePinSource(EPWM_T *epwm, uint32_t u32BrakePinNum, uint32_t u32SelAnotherModule) in EPWM_SetBrakePinSource() argument
1394 …(epwm)->BNF = ((epwm)->BNF & ~(EPWM_BNF_BK0SRC_Msk << (u32BrakePinNum << 3U))) | (u32SelAnotherMod… in EPWM_SetBrakePinSource()
1423 void EPWM_SetLeadingEdgeBlanking(EPWM_T *epwm, uint32_t u32TrigSrcSel, uint32_t u32TrigType, uint32… in EPWM_SetLeadingEdgeBlanking() argument
1425 (epwm)->LEBCTL = (u32TrigType) | (u32TrigSrcSel) | (u32BlankingEnable); in EPWM_SetLeadingEdgeBlanking()
1427 (epwm)->LEBCNT = (u32BlankingCnt) - 1U; in EPWM_SetLeadingEdgeBlanking()
1441 uint32_t EPWM_GetWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetWrapAroundFlag() argument
1443 return (((epwm)->STATUS & (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum)) ? 1UL : 0UL); in EPWM_GetWrapAroundFlag()
1455 void EPWM_ClearWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearWrapAroundFlag() argument
1457 (epwm)->STATUS = (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum); in EPWM_ClearWrapAroundFlag()