105     uint32_t u32Status1;   /*!<  Status word 1 */  member
287             tx_desc[i].u32Status1 = EMAC_TXFD_PADEN | EMAC_TXFD_CRCAPP | EMAC_TXFD_INTEN;  in EMAC_TxDescInit()
291 …    tx_desc[i].u32Status1 = EMAC_TXFD_PADEN | EMAC_TXFD_CRCAPP | EMAC_TXFD_INTEN | EMAC_TXFD_TTSEN;  in EMAC_TxDescInit()
321         rx_desc[i].u32Status1 = EMAC_DESC_OWN_EMAC;  in EMAC_RxDescInit()
505         if ((desc->u32Status1 & EMAC_DESC_OWN_EMAC) != EMAC_DESC_OWN_EMAC)   /* ownership=CPU */  in EMAC_RecvPkt()
508             status = desc->u32Status1 >> 16;  in EMAC_RecvPkt()
514                 *pu32Size = desc->u32Status1 & 0xFFFFUL;  in EMAC_RecvPkt()
572             if ((desc->u32Status1 | EMAC_DESC_OWN_EMAC) != EMAC_DESC_OWN_EMAC)   /* ownership=CPU */  in EMAC_RecvPktTS()
575                 status = desc->u32Status1 >> 16;  in EMAC_RecvPktTS()
581                     *pu32Size = desc->u32Status1 & 0xFFFFUL;  in EMAC_RecvPktTS()
625     desc->u32Status1 |= EMAC_DESC_OWN_EMAC;  in EMAC_RecvPktDone()
654     status = desc->u32Status1;  in EMAC_SendPkt()
665         desc->u32Status1 |= EMAC_DESC_OWN_EMAC;  in EMAC_SendPkt()
713             if (desc->u32Status1 & EMAC_DESC_OWN_EMAC)  in EMAC_SendPktDone()
793         if ((desc->u32Status1 & EMAC_DESC_OWN_EMAC) != EMAC_DESC_OWN_EMAC)  in EMAC_SendPktDoneTS()
1070     status = desc->u32Status1;  in EMAC_SendPktWoCopy()
1079         desc->u32Status1 |= EMAC_DESC_OWN_EMAC;  in EMAC_SendPktWoCopy()
1102     if (desc->u32Status1 & EMAC_DESC_OWN_EMAC)  in EMAC_ClaimFreeTXBuf()
1122     if ((desc->u32Status1 & EMAC_DESC_OWN_EMAC) != EMAC_DESC_OWN_EMAC)   /* ownership=CPU */  in EMAC_GetAvailRXBufSize()
1124         uint32_t status = desc->u32Status1 >> 16;  in EMAC_GetAvailRXBufSize()
1129             return desc->u32Status1 & 0xFFFFUL;  in EMAC_GetAvailRXBufSize()
1161     desc->u32Status1 |= EMAC_DESC_OWN_EMAC;  in EMAC_RecvPktDoneWoRxTrigger()