Lines Matching refs:u32RetValue
50 uint32_t u32ClkSrc = 0U, u32Div, u32HCLKFreq, u32RetValue = 0U; in SPI_Open() local
368 u32RetValue = u32ClkSrc; in SPI_Open()
375 u32RetValue = u32ClkSrc; in SPI_Open()
382 u32RetValue = (u32ClkSrc / (0x1FFU + 1U)); in SPI_Open()
392 u32RetValue = (u32ClkSrc / (0x1FFU + 1U)); in SPI_Open()
398 u32RetValue = (u32ClkSrc / (u32Div + 1U)); in SPI_Open()
418 u32RetValue = CLK_GetPCLK1Freq(); in SPI_Open()
424 u32RetValue = CLK_GetPCLK0Freq(); in SPI_Open()
430 u32RetValue = CLK_GetPCLK1Freq(); in SPI_Open()
436 u32RetValue = CLK_GetPCLK0Freq(); in SPI_Open()
442 u32RetValue = CLK_GetPCLK1Freq(); in SPI_Open()
448 u32RetValue = CLK_GetPCLK0Freq(); in SPI_Open()
454 u32RetValue = CLK_GetPCLK1Freq(); in SPI_Open()
460 u32RetValue = CLK_GetPCLK0Freq(); in SPI_Open()
466 u32RetValue = CLK_GetPCLK1Freq(); in SPI_Open()
472 u32RetValue = CLK_GetPCLK0Freq(); in SPI_Open()
478 u32RetValue = CLK_GetPCLK1Freq(); in SPI_Open()
482 return u32RetValue; in SPI_Open()
624 uint32_t u32Div, u32RetValue; in SPI_SetBusClock() local
904 u32RetValue = u32ClkSrc; in SPI_SetBusClock()
911 u32RetValue = u32ClkSrc; in SPI_SetBusClock()
918 u32RetValue = (u32ClkSrc / (0x1FFU + 1U)); in SPI_SetBusClock()
928 u32RetValue = (u32ClkSrc / (0x1FFU + 1U)); in SPI_SetBusClock()
934 u32RetValue = (u32ClkSrc / (u32Div + 1U)); in SPI_SetBusClock()
938 return u32RetValue; in SPI_SetBusClock()
1801 uint32_t u32BitRate, u32SrcClk, u32RetValue; in SPII2S_Open() local
1852 u32RetValue = u32SampleRate; in SPII2S_Open()
1868 u32RetValue = CLK_GetPCLK1Freq(); in SPII2S_Open()
1879 u32RetValue = CLK_GetPCLK0Freq(); in SPII2S_Open()
1890 u32RetValue = CLK_GetPCLK1Freq(); in SPII2S_Open()
1901 u32RetValue = CLK_GetPCLK0Freq(); in SPII2S_Open()
1905 return u32RetValue; in SPII2S_Open()
2062 uint32_t u32SrcClk, u32RetValue; in SPII2S_EnableMCLK() local
2087 … u32RetValue = u32SrcClk; /* If MCLKDIV=0, master clock rate is equal to the source clock rate. */ in SPII2S_EnableMCLK()
2091 …u32RetValue = ((u32SrcClk >> 1U) / u32Divider); /* If MCLKDIV>0, master clock rate = source clock … in SPII2S_EnableMCLK()
2094 return u32RetValue; in SPII2S_EnableMCLK()