Lines Matching refs:u32Mask
1237 void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask) in SPI_EnableInt() argument
1240 if((u32Mask & SPI_UNIT_INT_MASK) == SPI_UNIT_INT_MASK) in SPI_EnableInt()
1246 if((u32Mask & SPI_SSACT_INT_MASK) == SPI_SSACT_INT_MASK) in SPI_EnableInt()
1252 if((u32Mask & SPI_SSINACT_INT_MASK) == SPI_SSINACT_INT_MASK) in SPI_EnableInt()
1258 if((u32Mask & SPI_SLVUR_INT_MASK) == SPI_SLVUR_INT_MASK) in SPI_EnableInt()
1264 if((u32Mask & SPI_SLVBE_INT_MASK) == SPI_SLVBE_INT_MASK) in SPI_EnableInt()
1270 if((u32Mask & SPI_TXUF_INT_MASK) == SPI_TXUF_INT_MASK) in SPI_EnableInt()
1276 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK) in SPI_EnableInt()
1282 if((u32Mask & SPI_FIFO_RXTH_INT_MASK) == SPI_FIFO_RXTH_INT_MASK) in SPI_EnableInt()
1288 if((u32Mask & SPI_FIFO_RXOV_INT_MASK) == SPI_FIFO_RXOV_INT_MASK) in SPI_EnableInt()
1294 if((u32Mask & SPI_FIFO_RXTO_INT_MASK) == SPI_FIFO_RXTO_INT_MASK) in SPI_EnableInt()
1320 void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask) in SPI_DisableInt() argument
1323 if((u32Mask & SPI_UNIT_INT_MASK) == SPI_UNIT_INT_MASK) in SPI_DisableInt()
1329 if((u32Mask & SPI_SSACT_INT_MASK) == SPI_SSACT_INT_MASK) in SPI_DisableInt()
1335 if((u32Mask & SPI_SSINACT_INT_MASK) == SPI_SSINACT_INT_MASK) in SPI_DisableInt()
1341 if((u32Mask & SPI_SLVUR_INT_MASK) == SPI_SLVUR_INT_MASK) in SPI_DisableInt()
1347 if((u32Mask & SPI_SLVBE_INT_MASK) == SPI_SLVBE_INT_MASK) in SPI_DisableInt()
1353 if((u32Mask & SPI_TXUF_INT_MASK) == SPI_TXUF_INT_MASK) in SPI_DisableInt()
1359 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK) in SPI_DisableInt()
1365 if((u32Mask & SPI_FIFO_RXTH_INT_MASK) == SPI_FIFO_RXTH_INT_MASK) in SPI_DisableInt()
1371 if((u32Mask & SPI_FIFO_RXOV_INT_MASK) == SPI_FIFO_RXOV_INT_MASK) in SPI_DisableInt()
1377 if((u32Mask & SPI_FIFO_RXTO_INT_MASK) == SPI_FIFO_RXTO_INT_MASK) in SPI_DisableInt()
1403 uint32_t SPI_GetIntFlag(SPI_T *spi, uint32_t u32Mask) in SPI_GetIntFlag() argument
1409 if((u32Mask & SPI_UNIT_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1416 if((u32Mask & SPI_SSACT_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1423 if((u32Mask & SPI_SSINACT_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1430 if((u32Mask & SPI_SLVUR_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1437 if((u32Mask & SPI_SLVBE_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1444 if((u32Mask & SPI_TXUF_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1451 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1458 if((u32Mask & SPI_FIFO_RXTH_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1465 if((u32Mask & SPI_FIFO_RXOV_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1472 if((u32Mask & SPI_FIFO_RXTO_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()
1498 void SPI_ClearIntFlag(SPI_T *spi, uint32_t u32Mask) in SPI_ClearIntFlag() argument
1500 if(u32Mask & SPI_UNIT_INT_MASK) in SPI_ClearIntFlag()
1505 if(u32Mask & SPI_SSACT_INT_MASK) in SPI_ClearIntFlag()
1510 if(u32Mask & SPI_SSINACT_INT_MASK) in SPI_ClearIntFlag()
1515 if(u32Mask & SPI_SLVUR_INT_MASK) in SPI_ClearIntFlag()
1520 if(u32Mask & SPI_SLVBE_INT_MASK) in SPI_ClearIntFlag()
1525 if(u32Mask & SPI_TXUF_INT_MASK) in SPI_ClearIntFlag()
1530 if(u32Mask & SPI_FIFO_RXOV_INT_MASK) in SPI_ClearIntFlag()
1535 if(u32Mask & SPI_FIFO_RXTO_INT_MASK) in SPI_ClearIntFlag()
1559 uint32_t SPI_GetStatus(SPI_T *spi, uint32_t u32Mask) in SPI_GetStatus() argument
1565 if((u32Mask & SPI_BUSY_MASK) && (u32TmpValue)) in SPI_GetStatus()
1572 if((u32Mask & SPI_RX_EMPTY_MASK) && (u32TmpValue)) in SPI_GetStatus()
1579 if((u32Mask & SPI_RX_FULL_MASK) && (u32TmpValue)) in SPI_GetStatus()
1586 if((u32Mask & SPI_TX_EMPTY_MASK) && (u32TmpValue)) in SPI_GetStatus()
1593 if((u32Mask & SPI_TX_FULL_MASK) && (u32TmpValue)) in SPI_GetStatus()
1600 if((u32Mask & SPI_TXRX_RESET_MASK) && (u32TmpValue)) in SPI_GetStatus()
1607 if((u32Mask & SPI_SPIEN_STS_MASK) && (u32TmpValue)) in SPI_GetStatus()
1614 if((u32Mask & SPI_SSLINE_STS_MASK) && (u32TmpValue)) in SPI_GetStatus()
1633 uint32_t SPI_GetStatus2(SPI_T *spi, uint32_t u32Mask) in SPI_GetStatus2() argument
1641 if(u32Mask & SPI_SLVBENUM_MASK) in SPI_GetStatus2()
1935 void SPII2S_EnableInt(SPI_T *i2s, uint32_t u32Mask) in SPII2S_EnableInt() argument
1938 if((u32Mask & SPII2S_FIFO_TXTH_INT_MASK) == SPII2S_FIFO_TXTH_INT_MASK) in SPII2S_EnableInt()
1944 if((u32Mask & SPII2S_FIFO_RXTH_INT_MASK) == SPII2S_FIFO_RXTH_INT_MASK) in SPII2S_EnableInt()
1950 if((u32Mask & SPII2S_FIFO_RXOV_INT_MASK) == SPII2S_FIFO_RXOV_INT_MASK) in SPII2S_EnableInt()
1956 if((u32Mask & SPII2S_FIFO_RXTO_INT_MASK) == SPII2S_FIFO_RXTO_INT_MASK) in SPII2S_EnableInt()
1962 if((u32Mask & SPII2S_TXUF_INT_MASK) == SPII2S_TXUF_INT_MASK) in SPII2S_EnableInt()
1968 if((u32Mask & SPII2S_RIGHT_ZC_INT_MASK) == SPII2S_RIGHT_ZC_INT_MASK) in SPII2S_EnableInt()
1974 if((u32Mask & SPII2S_LEFT_ZC_INT_MASK) == SPII2S_LEFT_ZC_INT_MASK) in SPII2S_EnableInt()
1979 if((u32Mask & SPII2S_SLAVE_ERR_INT_MASK) == SPII2S_SLAVE_ERR_INT_MASK) in SPII2S_EnableInt()
2001 void SPII2S_DisableInt(SPI_T *i2s, uint32_t u32Mask) in SPII2S_DisableInt() argument
2004 if((u32Mask & SPII2S_FIFO_TXTH_INT_MASK) == SPII2S_FIFO_TXTH_INT_MASK) in SPII2S_DisableInt()
2010 if((u32Mask & SPII2S_FIFO_RXTH_INT_MASK) == SPII2S_FIFO_RXTH_INT_MASK) in SPII2S_DisableInt()
2016 if((u32Mask & SPII2S_FIFO_RXOV_INT_MASK) == SPII2S_FIFO_RXOV_INT_MASK) in SPII2S_DisableInt()
2022 if((u32Mask & SPII2S_FIFO_RXTO_INT_MASK) == SPII2S_FIFO_RXTO_INT_MASK) in SPII2S_DisableInt()
2028 if((u32Mask & SPII2S_TXUF_INT_MASK) == SPII2S_TXUF_INT_MASK) in SPII2S_DisableInt()
2034 if((u32Mask & SPII2S_RIGHT_ZC_INT_MASK) == SPII2S_RIGHT_ZC_INT_MASK) in SPII2S_DisableInt()
2040 if((u32Mask & SPII2S_LEFT_ZC_INT_MASK) == SPII2S_LEFT_ZC_INT_MASK) in SPII2S_DisableInt()
2045 if((u32Mask & SPII2S_SLAVE_ERR_INT_MASK) == SPII2S_SLAVE_ERR_INT_MASK) in SPII2S_DisableInt()