1043     uint32_t u32PllSrcClk, u32NR, u32NF, u32NO, u32PllClk;  in CLK_EnablePLL()  local
1105         u32NR = 3UL;  in CLK_EnablePLL()
1112         for(; u32NR <= 32UL; u32NR++)   /* max NR = 32 since NR = INDIV+1 and INDIV = 0~31 */  in CLK_EnablePLL()
1114             u32Tmp = u32PllSrcClk / u32NR;                      /* FREF = FIN/NR */  in CLK_EnablePLL()
1126                             u32MinNR = u32NR;  in CLK_EnablePLL()
1404     uint32_t u32FIN, u32NF, u32NR, u32NO;  in CLK_GetPLLClockFreq()  local
1435             u32NR = ((u32PllReg & CLK_PLLCTL_INDIV_Msk) >> CLK_PLLCTL_INDIV_Pos) + 1UL;  in CLK_GetPLLClockFreq()
1438             u32PllFreq = (((u32FIN >> 2) * (u32NF << 1)) / (u32NR * u32NO) << 2);  in CLK_GetPLLClockFreq()
1639     uint32_t u32NR = 0UL, u32NF = 0UL, u32NO, u32X = 0UL;  in CLK_EnablePLLFN()  local
1693         u32NR = 3UL;  in CLK_EnablePLLFN()
1695         for(; u32NR <= 32UL; u32NR++)   /* max NR = 32 since NR = INDIV+1 and INDIV = 0~31 */  in CLK_EnablePLLFN()
1697             u32FREF = u32FIN / u32NR;                               /* FREF = FIN/NR */  in CLK_EnablePLLFN()
1701                 fNX_X = (float)((u32FVCO * u32NR)>>1)/u32FIN;  in CLK_EnablePLLFN()
1713         if(u32NR <= 32UL)  in CLK_EnablePLLFN()
1718                              ((u32NR - 1UL) << CLK_PLLFNCTL0_INDIV_Pos) |  in CLK_EnablePLLFN()
1723 …        u32PllClk = (uint32_t)((float)u32FIN / (((u32NO + 1UL) * u32NR)<<11) * ((u32NF<<12)+u32X));  in CLK_EnablePLLFN()
1727     if((u32PllFreq > FREQ_500MHZ) || (u32PllFreq < FREQ_50MHZ) || (u32NR==33) )  in CLK_EnablePLLFN()
1754     uint32_t u32FIN, u32NF, u32NR, u32NO, u32X;  in CLK_GetPLLFNClockFreq()  local
1787             u32NR = ((u32PllReg0 & CLK_PLLFNCTL0_INDIV_Msk) >> CLK_PLLFNCTL0_INDIV_Pos) + 1UL;  in CLK_GetPLLFNClockFreq()
1790             u32PllFreq = (uint32_t)((float)u32FIN / ((u32NO * u32NR)<<11) * ( ((u32NF<<12)+u32X)));  in CLK_GetPLLFNClockFreq()