269 …_TIMER_SYNC(epwm, u32ChannelMask, u32SyncSrc) ((epwm)->SSCTL = ((epwm)->SSCTL & ~EPWM_SSCTL_SSRC_M…  argument
280 #define EPWM_DISABLE_TIMER_SYNC(epwm, u32ChannelMask) \  argument
284             if((u32ChannelMask) & (1 << i)) \
308 #define EPWM_ENABLE_OUTPUT_INVERTER(epwm, u32ChannelMask) ((epwm)->POLCTL = (u32ChannelMask))  argument
341 #define EPWM_MASK_OUTPUT(epwm, u32ChannelMask, u32LevelMask) \  argument
343         (epwm)->MSKEN = (u32ChannelMask); \
439 #define EPWM_SET_ALIGNED_TYPE(epwm, u32ChannelMask, u32AlignedType) \  argument
443             if((u32ChannelMask) & (1 << i)) \
457 #define EPWM_SET_LOAD_WINDOW(epwm, u32ChannelMask) ((epwm)->LOAD |= (u32ChannelMask))  argument
479 #define EPWM_CLR_COUNTER(epwm, u32ChannelMask) ((epwm)->CNTCLR |= (u32ChannelMask))  argument
510 #define EPWM_SET_OUTPUT_LEVEL(epwm, u32ChannelMask, u32ZeroLevel, u32CmpUpLevel, u32PeriodLevel, u3…  argument
514             if((u32ChannelMask) & (1 << i)) { \
535 #define EPWM_TRIGGER_BRAKE(epwm, u32ChannelMask, u32BrakeType) ((epwm)->SWBRK |= ((u32ChannelMask) …  argument
556 void EPWM_Start(EPWM_T *epwm, uint32_t u32ChannelMask);
557 void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask);
558 void EPWM_ForceStop(EPWM_T *epwm, uint32_t u32ChannelMask);
569 void EPWM_EnableFaultBrake(EPWM_T *epwm, uint32_t u32ChannelMask, uint32_t u32LevelMask, uint32_t u…
570 void EPWM_EnableCapture(EPWM_T *epwm, uint32_t u32ChannelMask);
571 void EPWM_DisableCapture(EPWM_T *epwm, uint32_t u32ChannelMask);
572 void EPWM_EnableOutput(EPWM_T *epwm, uint32_t u32ChannelMask);
573 void EPWM_DisableOutput(EPWM_T *epwm, uint32_t u32ChannelMask);
613 void EPWM_EnableSyncPhase(EPWM_T *epwm, uint32_t u32ChannelMask);
614 void EPWM_DisableSyncPhase(EPWM_T *epwm, uint32_t u32ChannelMask);