65     u32 data;  in synopGMAC_get_mdc_clk_div()  local
66     data = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacGmiiAddr);  in synopGMAC_get_mdc_clk_div()
67     data &= GmiiCsrClkMask;  in synopGMAC_get_mdc_clk_div()
68     return data;  in synopGMAC_get_mdc_clk_div()
82 s32 synopGMAC_read_phy_reg(u32 *RegBase,u32 PhyBase, u32 RegOffset, u16 * data)  in synopGMAC_read_phy_reg()  argument
98         * data = (u16)(synopGMACReadReg(RegBase,GmacGmiiData) & 0xFFFF);  in synopGMAC_read_phy_reg()
115 s32 synopGMAC_write_phy_reg(u32 *RegBase, u32 PhyBase, u32 RegOffset, u16 data)  in synopGMAC_write_phy_reg()  argument
120 …synopGMACWriteReg(RegBase,GmacGmiiData,data); // write the data in to GmacGmiiData register of syn…  in synopGMAC_write_phy_reg()
173     u32 data = 0;  in synopGMAC_read_version()  local
175     data = synopGMACReadReg((u32 *)gmacdev->MacBase, GmacVersion );  in synopGMAC_read_version()
176     gmacdev->Version = data;  in synopGMAC_read_version()
177     TR("The data read from %08x is %08x\n",(gmacdev->MacBase+GmacVersion),data);  in synopGMAC_read_version()
191     u32 data = 0;  in synopGMAC_reset()  local
196     	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaBusMode);  in synopGMAC_reset()
197     }while(data & 1);  in synopGMAC_reset()
199     TR("DATA after Reset = %08x\n",data);  in synopGMAC_reset()
209     TR("DATA after Reset = %08x\n",data);  in synopGMAC_reset_nocheck()
511     u32 data;  in synopGMAC_back_off_limit()  local
512     data = synopGMACReadReg((u32 *)gmacdev->MacBase, GmacConfig);  in synopGMAC_back_off_limit()
513     data &= (~GmacBackoffLimit);  in synopGMAC_back_off_limit()
514     data |= value;  in synopGMAC_back_off_limit()
515     synopGMACWriteReg((u32 *)gmacdev->MacBase, GmacConfig,data);  in synopGMAC_back_off_limit()
624 void synopGMAC_write_hash_table_high(synopGMACdevice * gmacdev, u32 data)  in synopGMAC_write_hash_table_high()  argument
626     synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacHashHigh,data);  in synopGMAC_write_hash_table_high()
637 void synopGMAC_write_hash_table_low(synopGMACdevice * gmacdev, u32 data)  in synopGMAC_write_hash_table_low()  argument
639     synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacHashLow,data);  in synopGMAC_write_hash_table_low()
723     u32 data;  in synopGMAC_set_pass_control()  local
724     data = synopGMACReadReg((u32 *)gmacdev->MacBase, GmacFrameFilter);  in synopGMAC_set_pass_control()
725     data &= (~GmacPassControl);  in synopGMAC_set_pass_control()
726     data |= passcontrol;  in synopGMAC_set_pass_control()
727     synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacFrameFilter,data);  in synopGMAC_set_pass_control()
1090     u16 data;  in synopGMAC_check_phy_init()  local
1097 …   status = synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,PHY_STATUS_REG, &data);  in synopGMAC_check_phy_init()
1101         if((data & Mii_AutoNegCmplt) != 0) {  in synopGMAC_check_phy_init()
1107 … = synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,PHY_SPECIFIC_STATUS_REG, &data);  in synopGMAC_check_phy_init()
1111     if((data & Mii_phy_status_link_up) == 0) {  in synopGMAC_check_phy_init()
1120 … = synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,PHY_SPECIFIC_STATUS_REG, &data);  in synopGMAC_check_phy_init()
1126     gmacdev->DuplexMode = (data & Mii_phy_status_full_duplex)  ? FULLDUPLEX: HALFDUPLEX ;  in synopGMAC_check_phy_init()
1131 …  status = synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,PHY_CONTROL_REG, &data);  in synopGMAC_check_phy_init()
1139 … = synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,PHY_SPECIFIC_STATUS_REG, &data);  in synopGMAC_check_phy_init()
1142     if(data & Mii_phy_status_speed_1000)  in synopGMAC_check_phy_init()
1144     else if(data & Mii_phy_status_speed_100)  in synopGMAC_check_phy_init()
1163     u32 data;  in synopGMAC_set_mac_addr()  local
1165     data = (MacAddr[5] << 8) | MacAddr[4];  in synopGMAC_set_mac_addr()
1166     synopGMACWriteReg((u32 *)gmacdev->MacBase,MacHigh,data);  in synopGMAC_set_mac_addr()
1167     data = (MacAddr[3] << 24) | (MacAddr[2] << 16) | (MacAddr[1] << 8) | MacAddr[0] ;  in synopGMAC_set_mac_addr()
1168     synopGMACWriteReg((u32 *)gmacdev->MacBase,MacLow,data);  in synopGMAC_set_mac_addr()
1751     u32 data;  in synopGMAC_clear_interrupt()  local
1752     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaStatus);  in synopGMAC_clear_interrupt()
1753     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaStatus ,data);  in synopGMAC_clear_interrupt()
1763     u32 data;  in synopGMAC_get_interrupt_type()  local
1765     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaStatus);  in synopGMAC_get_interrupt_type()
1766 …synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaStatus ,data); //This is the appropriate location to…  in synopGMAC_get_interrupt_type()
1767     TR("DMA status reg is  %08x\n",data);  in synopGMAC_get_interrupt_type()
1768     if(data & DmaIntErrorMask)  interrupts     |= synopGMACDmaError;  in synopGMAC_get_interrupt_type()
1769     if(data & DmaIntRxNormMask) interrupts     |= synopGMACDmaRxNormal;  in synopGMAC_get_interrupt_type()
1770     if(data & DmaIntRxAbnMask)  interrupts     |= synopGMACDmaRxAbnormal;  in synopGMAC_get_interrupt_type()
1771     if(data & DmaIntRxStoppedMask)  interrupts |= synopGMACDmaRxStopped;  in synopGMAC_get_interrupt_type()
1772     if(data & DmaIntTxNormMask) interrupts     |= synopGMACDmaTxNormal;  in synopGMAC_get_interrupt_type()
1773     if(data & DmaIntTxAbnMask)  interrupts     |= synopGMACDmaTxAbnormal;  in synopGMAC_get_interrupt_type()
1774     if(data & DmaIntTxStoppedMask)  interrupts |= synopGMACDmaTxStopped;  in synopGMAC_get_interrupt_type()
1795     u32 data;  in synopGMAC_enable_interrupt()  local
1796     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaInterrupt);  in synopGMAC_enable_interrupt()
1797     data |= interrupts;  in synopGMAC_enable_interrupt()
1798     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaInterrupt, data);  in synopGMAC_enable_interrupt()
1837     u32 data;  in synopGMAC_enable_dma_rx()  local
1838     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_enable_dma_rx()
1839     data |= DmaRxStart;  in synopGMAC_enable_dma_rx()
1840     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_enable_dma_rx()
1852     u32 data;  in synopGMAC_enable_dma_tx()  local
1853     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_enable_dma_tx()
1854     data |= DmaTxStart;  in synopGMAC_enable_dma_tx()
1855     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_enable_dma_tx()
1861     u32 data;  in synopGMAC_enable_under_size_pkt()  local
1862     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_enable_under_size_pkt()
1863     data |= DmaFwdUnderSzFrames;  in synopGMAC_enable_under_size_pkt()
1864     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_enable_under_size_pkt()
1870     u32 data;  in synopGMAC_disable_under_size_pkt()  local
1871     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_disable_under_size_pkt()
1872     data &= ~DmaFwdUnderSzFrames;  in synopGMAC_disable_under_size_pkt()
1873     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_disable_under_size_pkt()
1879     u32 data;  in synopGMAC_enable_crc_err_pkt()  local
1880     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_enable_crc_err_pkt()
1881     data |= DmaFwdErrorFrames;  in synopGMAC_enable_crc_err_pkt()
1882     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_enable_crc_err_pkt()
1888     u32 data;  in synopGMAC_disable_crc_err_pkt()  local
1889     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_disable_crc_err_pkt()
1890     data &= ~DmaFwdErrorFrames;  in synopGMAC_disable_crc_err_pkt()
1891     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_disable_crc_err_pkt()
1986     u32 data;  in synopGMAC_disable_dma_tx()  local
1987     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_disable_dma_tx()
1988     data &= (~DmaTxStart);  in synopGMAC_disable_dma_tx()
1989     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_disable_dma_tx()
1999     u32 data;  in synopGMAC_disable_dma_rx()  local
2000     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_disable_dma_rx()
2001     data &= (~DmaRxStart);  in synopGMAC_disable_dma_rx()
2002     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_disable_dma_rx()
2123     u32 data;  in synopGMAC_is_magic_packet_received()  local
2124     data =  synopGMACReadReg((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus);  in synopGMAC_is_magic_packet_received()
2125     return((data & GmacPmtMagicPktReceived) == GmacPmtMagicPktReceived);  in synopGMAC_is_magic_packet_received()
2134     u32 data;  in synopGMAC_is_wakeup_frame_received()  local
2135     data =  synopGMACReadReg((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus);  in synopGMAC_is_wakeup_frame_received()
2136     return((data & GmacPmtWakeupFrameReceived) == GmacPmtWakeupFrameReceived);  in synopGMAC_is_wakeup_frame_received()