192     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaBusMode ,DmaResetOn);  in synopGMAC_reset()
196     	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaBusMode);  in synopGMAC_reset()
206     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaBusMode ,DmaResetOn);  in synopGMAC_reset_nocheck()
225     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaBusMode ,init_value);  in synopGMAC_dma_bus_mode_init()
241     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl, init_value);  in synopGMAC_dma_control_init()
973     omr_reg = synopGMACReadReg((u32 *)gmacdev->DmaBase,DmaControl);  in synopGMAC_pause_control()
975     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl, omr_reg);  in synopGMAC_pause_control()
1194     gmacdev->DmaBase = dmaBase;  in synopGMAC_attach()
1280 …synopGMACWriteReg((u32 *)gmacdev->DmaBase,DmaRxBaseAddr,(u32)((u64)gmacdev->RxDescDma & 0xFFFFFFFF…  in synopGMAC_init_rx_desc_base()
1293 …synopGMACWriteReg((u32 *)gmacdev->DmaBase,DmaTxBaseAddr,(u32)((u64)gmacdev->TxDescDma & 0xFFFFFFFF…  in synopGMAC_init_tx_desc_base()
1752     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaStatus);  in synopGMAC_clear_interrupt()
1753     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaStatus ,data);  in synopGMAC_clear_interrupt()
1765     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaStatus);  in synopGMAC_get_interrupt_type()
1766 …synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaStatus ,data); //This is the appropriate location to…  in synopGMAC_get_interrupt_type()
1796     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaInterrupt);  in synopGMAC_enable_interrupt()
1798     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaInterrupt, data);  in synopGMAC_enable_interrupt()
1813     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaInterrupt, DmaIntDisable);  in synopGMAC_disable_interrupt_all()
1826     synopGMACClearBits((u32 *)gmacdev->DmaBase, DmaInterrupt, interrupts);  in synopGMAC_disable_interrupt()
1838     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_enable_dma_rx()
1840     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_enable_dma_rx()
1853     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_enable_dma_tx()
1855     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_enable_dma_tx()
1862     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_enable_under_size_pkt()
1864     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_enable_under_size_pkt()
1871     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_disable_under_size_pkt()
1873     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_disable_under_size_pkt()
1880     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_enable_crc_err_pkt()
1882     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_enable_crc_err_pkt()
1889     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_disable_crc_err_pkt()
1891     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_disable_crc_err_pkt()
1905     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaTxPollDemand, 0);  in synopGMAC_resume_dma_tx()
1917     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaRxPollDemand, 0);  in synopGMAC_resume_dma_rx()
1987     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_disable_dma_tx()
1989     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_disable_dma_tx()
2000     data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);  in synopGMAC_disable_dma_rx()
2002     synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);  in synopGMAC_disable_dma_rx()
2196     synopGMACClearBits((u32 *)gmacdev->DmaBase,DmaControl,DmaDisableDropTcpCs);  in synopGMAC_rx_tcpip_chksum_drop_enable()
2208     synopGMACSetBits((u32 *)gmacdev->DmaBase,DmaControl,DmaDisableDropTcpCs);  in synopGMAC_rx_tcpip_chksum_drop_disable()