626 void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask)  in SPI_EnableInt()  argument
629     if((u32Mask & SPI_UNIT_INT_MASK) == SPI_UNIT_INT_MASK)  in SPI_EnableInt()
635     if((u32Mask & SPI_SSACT_INT_MASK) == SPI_SSACT_INT_MASK)  in SPI_EnableInt()
641     if((u32Mask & SPI_SSINACT_INT_MASK) == SPI_SSINACT_INT_MASK)  in SPI_EnableInt()
647     if((u32Mask & SPI_SLVUR_INT_MASK) == SPI_SLVUR_INT_MASK)  in SPI_EnableInt()
653     if((u32Mask & SPI_SLVBE_INT_MASK) == SPI_SLVBE_INT_MASK)  in SPI_EnableInt()
659     if((u32Mask & SPI_TXUF_INT_MASK) == SPI_TXUF_INT_MASK)  in SPI_EnableInt()
665     if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK)  in SPI_EnableInt()
671     if((u32Mask & SPI_FIFO_RXTH_INT_MASK) == SPI_FIFO_RXTH_INT_MASK)  in SPI_EnableInt()
677     if((u32Mask & SPI_FIFO_RXOV_INT_MASK) == SPI_FIFO_RXOV_INT_MASK)  in SPI_EnableInt()
683     if((u32Mask & SPI_FIFO_RXTO_INT_MASK) == SPI_FIFO_RXTO_INT_MASK)  in SPI_EnableInt()
709 void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask)  in SPI_DisableInt()  argument
712     if((u32Mask & SPI_UNIT_INT_MASK) == SPI_UNIT_INT_MASK)  in SPI_DisableInt()
718     if((u32Mask & SPI_SSACT_INT_MASK) == SPI_SSACT_INT_MASK)  in SPI_DisableInt()
724     if((u32Mask & SPI_SSINACT_INT_MASK) == SPI_SSINACT_INT_MASK)  in SPI_DisableInt()
730     if((u32Mask & SPI_SLVUR_INT_MASK) == SPI_SLVUR_INT_MASK)  in SPI_DisableInt()
736     if((u32Mask & SPI_SLVBE_INT_MASK) == SPI_SLVBE_INT_MASK)  in SPI_DisableInt()
742     if((u32Mask & SPI_TXUF_INT_MASK) == SPI_TXUF_INT_MASK)  in SPI_DisableInt()
748     if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK)  in SPI_DisableInt()
754     if((u32Mask & SPI_FIFO_RXTH_INT_MASK) == SPI_FIFO_RXTH_INT_MASK)  in SPI_DisableInt()
760     if((u32Mask & SPI_FIFO_RXOV_INT_MASK) == SPI_FIFO_RXOV_INT_MASK)  in SPI_DisableInt()
766     if((u32Mask & SPI_FIFO_RXTO_INT_MASK) == SPI_FIFO_RXTO_INT_MASK)  in SPI_DisableInt()
792 uint32_t SPI_GetIntFlag(SPI_T *spi, uint32_t u32Mask)  in SPI_GetIntFlag()  argument
798     if((u32Mask & SPI_UNIT_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
805     if((u32Mask & SPI_SSACT_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
812     if((u32Mask & SPI_SSINACT_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
819     if((u32Mask & SPI_SLVUR_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
826     if((u32Mask & SPI_SLVBE_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
833     if((u32Mask & SPI_TXUF_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
840     if((u32Mask & SPI_FIFO_TXTH_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
847     if((u32Mask & SPI_FIFO_RXTH_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
854     if((u32Mask & SPI_FIFO_RXOV_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
861     if((u32Mask & SPI_FIFO_RXTO_INT_MASK) && (u32TmpVal))  in SPI_GetIntFlag()
887 void SPI_ClearIntFlag(SPI_T *spi, uint32_t u32Mask)  in SPI_ClearIntFlag()  argument
889     if(u32Mask & SPI_UNIT_INT_MASK)  in SPI_ClearIntFlag()
894     if(u32Mask & SPI_SSACT_INT_MASK)  in SPI_ClearIntFlag()
899     if(u32Mask & SPI_SSINACT_INT_MASK)  in SPI_ClearIntFlag()
904     if(u32Mask & SPI_SLVUR_INT_MASK)  in SPI_ClearIntFlag()
909     if(u32Mask & SPI_SLVBE_INT_MASK)  in SPI_ClearIntFlag()
914     if(u32Mask & SPI_TXUF_INT_MASK)  in SPI_ClearIntFlag()
919     if(u32Mask & SPI_FIFO_RXOV_INT_MASK)  in SPI_ClearIntFlag()
924     if(u32Mask & SPI_FIFO_RXTO_INT_MASK)  in SPI_ClearIntFlag()
948 uint32_t SPI_GetStatus(SPI_T *spi, uint32_t u32Mask)  in SPI_GetStatus()  argument
954     if((u32Mask & SPI_BUSY_MASK) && (u32TmpValue))  in SPI_GetStatus()
961     if((u32Mask & SPI_RX_EMPTY_MASK) && (u32TmpValue))  in SPI_GetStatus()
968     if((u32Mask & SPI_RX_FULL_MASK) && (u32TmpValue))  in SPI_GetStatus()
975     if((u32Mask & SPI_TX_EMPTY_MASK) && (u32TmpValue))  in SPI_GetStatus()
982     if((u32Mask & SPI_TX_FULL_MASK) && (u32TmpValue))  in SPI_GetStatus()
989     if((u32Mask & SPI_TXRX_RESET_MASK) && (u32TmpValue))  in SPI_GetStatus()
996     if((u32Mask & SPI_SPIEN_STS_MASK) && (u32TmpValue))  in SPI_GetStatus()
1003     if((u32Mask & SPI_SSLINE_STS_MASK) && (u32TmpValue))  in SPI_GetStatus()
1259 void SPII2S_EnableInt(SPI_T *i2s, uint32_t u32Mask)  in SPII2S_EnableInt()  argument
1262     if((u32Mask & SPII2S_FIFO_TXTH_INT_MASK) == SPII2S_FIFO_TXTH_INT_MASK)  in SPII2S_EnableInt()
1268     if((u32Mask & SPII2S_FIFO_RXTH_INT_MASK) == SPII2S_FIFO_RXTH_INT_MASK)  in SPII2S_EnableInt()
1274     if((u32Mask & SPII2S_FIFO_RXOV_INT_MASK) == SPII2S_FIFO_RXOV_INT_MASK)  in SPII2S_EnableInt()
1280     if((u32Mask & SPII2S_FIFO_RXTO_INT_MASK) == SPII2S_FIFO_RXTO_INT_MASK)  in SPII2S_EnableInt()
1286     if((u32Mask & SPII2S_TXUF_INT_MASK) == SPII2S_TXUF_INT_MASK)  in SPII2S_EnableInt()
1292     if((u32Mask & SPII2S_RIGHT_ZC_INT_MASK) == SPII2S_RIGHT_ZC_INT_MASK)  in SPII2S_EnableInt()
1298     if((u32Mask & SPII2S_LEFT_ZC_INT_MASK) == SPII2S_LEFT_ZC_INT_MASK)  in SPII2S_EnableInt()
1319 void SPII2S_DisableInt(SPI_T *i2s, uint32_t u32Mask)  in SPII2S_DisableInt()  argument
1322     if((u32Mask & SPII2S_FIFO_TXTH_INT_MASK) == SPII2S_FIFO_TXTH_INT_MASK)  in SPII2S_DisableInt()
1328     if((u32Mask & SPII2S_FIFO_RXTH_INT_MASK) == SPII2S_FIFO_RXTH_INT_MASK)  in SPII2S_DisableInt()
1334     if((u32Mask & SPII2S_FIFO_RXOV_INT_MASK) == SPII2S_FIFO_RXOV_INT_MASK)  in SPII2S_DisableInt()
1340     if((u32Mask & SPII2S_FIFO_RXTO_INT_MASK) == SPII2S_FIFO_RXTO_INT_MASK)  in SPII2S_DisableInt()
1346     if((u32Mask & SPII2S_TXUF_INT_MASK) == SPII2S_TXUF_INT_MASK)  in SPII2S_DisableInt()
1352     if((u32Mask & SPII2S_RIGHT_ZC_INT_MASK) == SPII2S_RIGHT_ZC_INT_MASK)  in SPII2S_DisableInt()
1358     if((u32Mask & SPII2S_LEFT_ZC_INT_MASK) == SPII2S_LEFT_ZC_INT_MASK)  in SPII2S_DisableInt()