22 static uint32_t SPII2S_GetSourceClockFreq(SPI_T *i2s);
1018 static uint32_t SPII2S_GetSourceClockFreq(SPI_T *i2s)  in SPII2S_GetSourceClockFreq()  argument
1022     if(i2s == SPI0)  in SPII2S_GetSourceClockFreq()
1042     else if(i2s == SPI1)  in SPII2S_GetSourceClockFreq()
1062     else if(i2s == SPI2)  in SPII2S_GetSourceClockFreq()
1132 uint32_t SPII2S_Open(SPI_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordW…  in SPII2S_Open()  argument
1138     if(i2s == SPI0)  in SPII2S_Open()
1143     else if(i2s == SPI1)  in SPII2S_Open()
1148     else if(i2s == SPI2)  in SPII2S_Open()
1160     i2s->I2SCTL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat;  in SPII2S_Open()
1162     SPI_SetFIFO(i2s, 2, 1);  in SPII2S_Open()
1167         u32SrcClk = SPII2S_GetSourceClockFreq(i2s);  in SPII2S_Open()
1174 …    i2s->I2SCLK = (i2s->I2SCLK & ~SPI_I2SCLK_BCLKDIV_Msk) | (u32Divider << SPI_I2SCLK_BCLKDIV_Pos);  in SPII2S_Open()
1182         i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk);  in SPII2S_Open()
1190         i2s->I2SCLK &= ~SPI_I2SCLK_BCLKDIV_Msk;  in SPII2S_Open()
1192         if(i2s == SPI0)  in SPII2S_Open()
1197             i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk);  in SPII2S_Open()
1201         else if(i2s == SPI1)  in SPII2S_Open()
1206             i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk);  in SPII2S_Open()
1210         else if(i2s == SPI2)  in SPII2S_Open()
1215             i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk);  in SPII2S_Open()
1224             i2s->I2SCTL |= (SPI_I2SCTL_RXEN_Msk | SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_I2SEN_Msk);  in SPII2S_Open()
1239 void SPII2S_Close(SPI_T *i2s)  in SPII2S_Close()  argument
1241     i2s->I2SCTL &= ~SPI_I2SCTL_I2SEN_Msk;  in SPII2S_Close()
1259 void SPII2S_EnableInt(SPI_T *i2s, uint32_t u32Mask)  in SPII2S_EnableInt()  argument
1264         i2s->FIFOCTL |= SPI_FIFOCTL_TXTHIEN_Msk;  in SPII2S_EnableInt()
1270         i2s->FIFOCTL |= SPI_FIFOCTL_RXTHIEN_Msk;  in SPII2S_EnableInt()
1276         i2s->FIFOCTL |= SPI_FIFOCTL_RXOVIEN_Msk;  in SPII2S_EnableInt()
1282         i2s->FIFOCTL |= SPI_FIFOCTL_RXTOIEN_Msk;  in SPII2S_EnableInt()
1288         i2s->FIFOCTL |= SPI_FIFOCTL_TXUFIEN_Msk;  in SPII2S_EnableInt()
1294         i2s->I2SCTL |= SPI_I2SCTL_RZCIEN_Msk;  in SPII2S_EnableInt()
1300         i2s->I2SCTL |= SPI_I2SCTL_LZCIEN_Msk;  in SPII2S_EnableInt()
1319 void SPII2S_DisableInt(SPI_T *i2s, uint32_t u32Mask)  in SPII2S_DisableInt()  argument
1324         i2s->FIFOCTL &= ~SPI_FIFOCTL_TXTHIEN_Msk;  in SPII2S_DisableInt()
1330         i2s->FIFOCTL &= ~SPI_FIFOCTL_RXTHIEN_Msk;  in SPII2S_DisableInt()
1336         i2s->FIFOCTL &= ~SPI_FIFOCTL_RXOVIEN_Msk;  in SPII2S_DisableInt()
1342         i2s->FIFOCTL &= ~SPI_FIFOCTL_RXTOIEN_Msk;  in SPII2S_DisableInt()
1348         i2s->FIFOCTL &= ~SPI_FIFOCTL_TXUFIEN_Msk;  in SPII2S_DisableInt()
1354         i2s->I2SCTL &= ~SPI_I2SCTL_RZCIEN_Msk;  in SPII2S_DisableInt()
1360         i2s->I2SCTL &= ~SPI_I2SCTL_LZCIEN_Msk;  in SPII2S_DisableInt()
1372 uint32_t SPII2S_EnableMCLK(SPI_T *i2s, uint32_t u32BusClock)  in SPII2S_EnableMCLK()  argument
1377     u32SrcClk = SPII2S_GetSourceClockFreq(i2s);  in SPII2S_EnableMCLK()
1393     i2s->I2SCLK = (i2s->I2SCLK & ~SPI_I2SCLK_MCLKDIV_Msk) | (u32Divider << SPI_I2SCLK_MCLKDIV_Pos);  in SPII2S_EnableMCLK()
1396     i2s->I2SCTL |= SPI_I2SCTL_MCLKEN_Msk;  in SPII2S_EnableMCLK()
1416 void SPII2S_DisableMCLK(SPI_T *i2s)  in SPII2S_DisableMCLK()  argument
1418     i2s->I2SCTL &= ~SPI_I2SCTL_MCLKEN_Msk;  in SPII2S_DisableMCLK()
1429 void SPII2S_SetFIFO(SPI_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)  in SPII2S_SetFIFO()  argument
1431     i2s->FIFOCTL = (i2s->FIFOCTL & ~(SPI_FIFOCTL_TXTH_Msk | SPI_FIFOCTL_RXTH_Msk)) |  in SPII2S_SetFIFO()