Lines Matching refs:u32ChannelNum

36 uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32UnitTimeNsec, uin…  in PWM_ConfigCaptureChannel()  argument
84 PWM_SET_PRESCALER(pwm, u32ChannelNum, --u16Prescale); in PWM_ConfigCaptureChannel()
87 …)->CTL1 = ((pwm)->CTL1 & ~(PWM_CTL1_CNTTYPE0_Msk << (u32ChannelNum << 1))) | (1UL << (u32ChannelNu… in PWM_ConfigCaptureChannel()
89 (pwm)->CTL1 &= ~(PWM_CTL1_CNTTYPE0_Msk << u32ChannelNum); in PWM_ConfigCaptureChannel()
90 PWM_SET_CNR(pwm, u32ChannelNum, u16CNR); in PWM_ConfigCaptureChannel()
109 uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_… in PWM_ConfigOutputChannel() argument
156 PWM_SET_PRESCALER(pwm, u32ChannelNum, --u16Prescale); in PWM_ConfigOutputChannel()
158 … ((pwm)->CTL1 & ~((PWM_CTL1_CNTTYPE0_Msk << (u32ChannelNum << 1)) | (PWM_CTL1_CNTTYPE0_Msk << u32C… in PWM_ConfigOutputChannel()
160 PWM_SET_CNR(pwm, u32ChannelNum, --u16CNR); in PWM_ConfigOutputChannel()
161 PWM_SET_CMR(pwm, u32ChannelNum, u32DutyCycle * (u16CNR + 1) / 100); in PWM_ConfigOutputChannel()
163 … ((pwm)->WGCTL0 & ~((PWM_WGCTL0_PRDPCTL0_Msk | PWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum << 1))) | \ in PWM_ConfigOutputChannel()
164 (PWM_OUTPUT_HIGH << ((u32ChannelNum << 1) + PWM_WGCTL0_ZPCTL0_Pos)); in PWM_ConfigOutputChannel()
165 …(pwm)->WGCTL1 & ~((PWM_WGCTL1_CMPDCTL0_Msk | PWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum << 1))) | \ in PWM_ConfigOutputChannel()
166 (PWM_OUTPUT_LOW << ((u32ChannelNum << 1) + PWM_WGCTL1_CMPUCTL0_Pos)); in PWM_ConfigOutputChannel()
266 void PWM_EnableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition) in PWM_EnableADCTrigger() argument
268 if(u32ChannelNum < 4) in PWM_EnableADCTrigger()
270 (pwm)->EADCTS0 &= ~((PWM_EADCTS0_TRGSEL0_Msk) << (u32ChannelNum << 3)); in PWM_EnableADCTrigger()
271 (pwm)->EADCTS0 |= ((PWM_EADCTS0_TRGEN0_Msk | u32Condition) << (u32ChannelNum << 3)); in PWM_EnableADCTrigger()
275 (pwm)->EADCTS1 &= ~((PWM_EADCTS1_TRGSEL4_Msk) << ((u32ChannelNum - 4) << 3)); in PWM_EnableADCTrigger()
276 (pwm)->EADCTS1 |= ((PWM_EADCTS1_TRGEN4_Msk | u32Condition) << ((u32ChannelNum - 4) << 3)); in PWM_EnableADCTrigger()
289 void PWM_DisableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisableADCTrigger() argument
291 if(u32ChannelNum < 4) in PWM_DisableADCTrigger()
293 (pwm)->EADCTS0 &= ~(PWM_EADCTS0_TRGEN0_Msk << (u32ChannelNum << 3)); in PWM_DisableADCTrigger()
297 (pwm)->EADCTS1 &= ~(PWM_EADCTS1_TRGEN4_Msk << ((u32ChannelNum - 4) << 3)); in PWM_DisableADCTrigger()
311 void PWM_ClearADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition) in PWM_ClearADCTriggerFlag() argument
313 (pwm)->STATUS = (PWM_STATUS_EADCTRG0_Msk << u32ChannelNum); in PWM_ClearADCTriggerFlag()
326 uint32_t PWM_GetADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_GetADCTriggerFlag() argument
328 return (((pwm)->STATUS & (PWM_STATUS_EADCTRG0_Msk << u32ChannelNum)) ? 1 : 0); in PWM_GetADCTriggerFlag()
491 void PWM_EnablePDMA(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32RisingFirst, uint32_t u32Mode) in PWM_EnablePDMA() argument
494 u32IsOddCh = u32ChannelNum & 0x1; in PWM_EnablePDMA()
495 …0_1_Msk | PWM_PDMACTL_CAPORD0_1_Msk | PWM_PDMACTL_CAPMOD0_1_Msk) << ((u32ChannelNum >> 1) << 3))) … in PWM_EnablePDMA()
497 u32Mode | PWM_PDMACTL_CHEN0_1_Msk) << ((u32ChannelNum >> 1) << 3)); in PWM_EnablePDMA()
509 void PWM_DisablePDMA(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisablePDMA() argument
511 (pwm)->PDMACTL &= ~(PWM_PDMACTL_CHEN0_1_Msk << ((u32ChannelNum >> 1) << 3)); in PWM_DisablePDMA()
526 void PWM_EnableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Duration) in PWM_EnableDeadZone() argument
529 *(__IO uint32_t *)(&((pwm)->DTCTL0_1) + (u32ChannelNum >> 1)) &= ~PWM_DTCTL0_1_DTCNT_Msk; in PWM_EnableDeadZone()
530 …*(__IO uint32_t *)(&((pwm)->DTCTL0_1) + (u32ChannelNum >> 1)) |= PWM_DTCTL0_1_DTEN_Msk | u32Durati… in PWM_EnableDeadZone()
543 void PWM_DisableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisableDeadZone() argument
546 *(__IO uint32_t *)(&((pwm)->DTCTL0_1) + (u32ChannelNum >> 1)) &= ~PWM_DTCTL0_1_DTEN_Msk; in PWM_DisableDeadZone()
561 void PWM_EnableCaptureInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge) in PWM_EnableCaptureInt() argument
563 (pwm)->CAPIEN |= (u32Edge << u32ChannelNum); in PWM_EnableCaptureInt()
578 void PWM_DisableCaptureInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge) in PWM_DisableCaptureInt() argument
580 (pwm)->CAPIEN &= ~(u32Edge << u32ChannelNum); in PWM_DisableCaptureInt()
595 void PWM_ClearCaptureIntFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge) in PWM_ClearCaptureIntFlag() argument
597 (pwm)->CAPIF = (u32Edge << u32ChannelNum); in PWM_ClearCaptureIntFlag()
612 uint32_t PWM_GetCaptureIntFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_GetCaptureIntFlag() argument
614 return (((((pwm)->CAPIF & (PWM_CAPIF_CFLIF0_Msk << u32ChannelNum)) ? 1 : 0) << 1) | \ in PWM_GetCaptureIntFlag()
615 (((pwm)->CAPIF & (PWM_CAPIF_CRLIF0_Msk << u32ChannelNum)) ? 1 : 0)); in PWM_GetCaptureIntFlag()
629 void PWM_EnableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntDutyType) in PWM_EnableDutyInt() argument
631 (pwm)->INTEN0 |= (u32IntDutyType << u32ChannelNum); in PWM_EnableDutyInt()
643 void PWM_DisableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisableDutyInt() argument
645 …NTEN0 &= ~((PWM_DUTY_INT_DOWN_COUNT_MATCH_CMP | PWM_DUTY_INT_UP_COUNT_MATCH_CMP) << u32ChannelNum); in PWM_DisableDutyInt()
657 void PWM_ClearDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_ClearDutyIntFlag() argument
659 (pwm)->INTSTS0 = (PWM_INTSTS0_CMPUIF0_Msk | PWM_INTSTS0_CMPDIF0_Msk) << u32ChannelNum; in PWM_ClearDutyIntFlag()
673 uint32_t PWM_GetDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_GetDutyIntFlag() argument
675 …(pwm)->INTSTS0 & ((PWM_INTSTS0_CMPDIF0_Msk | PWM_INTSTS0_CMPUIF0_Msk) << u32ChannelNum))) ? 1 : 0); in PWM_GetDutyIntFlag()
751 void PWM_EnablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntPeriodType) in PWM_EnablePeriodInt() argument
753 (pwm)->INTEN0 |= (PWM_INTEN0_PIEN0_Msk << ((u32ChannelNum>>1)<<1)); in PWM_EnablePeriodInt()
765 void PWM_DisablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisablePeriodInt() argument
767 (pwm)->INTEN0 &= ~(PWM_INTEN0_PIEN0_Msk << ((u32ChannelNum>>1)<<1)); in PWM_DisablePeriodInt()
779 void PWM_ClearPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_ClearPeriodIntFlag() argument
781 (pwm)->INTSTS0 = (PWM_INTSTS0_PIF0_Msk << ((u32ChannelNum>>1)<<1)); in PWM_ClearPeriodIntFlag()
795 uint32_t PWM_GetPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_GetPeriodIntFlag() argument
797 return ((((pwm)->INTSTS0 & (PWM_INTSTS0_PIF0_Msk << ((u32ChannelNum>>1)<<1)))) ? 1 : 0); in PWM_GetPeriodIntFlag()
809 void PWM_EnableZeroInt(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_EnableZeroInt() argument
811 (pwm)->INTEN0 |= (PWM_INTEN0_ZIEN0_Msk << ((u32ChannelNum>>1)<<1)); in PWM_EnableZeroInt()
823 void PWM_DisableZeroInt(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisableZeroInt() argument
825 (pwm)->INTEN0 &= ~(PWM_INTEN0_ZIEN0_Msk << ((u32ChannelNum>>1)<<1)); in PWM_DisableZeroInt()
837 void PWM_ClearZeroIntFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_ClearZeroIntFlag() argument
839 (pwm)->INTSTS0 = (PWM_INTSTS0_ZIF0_Msk << ((u32ChannelNum>>1)<<1)); in PWM_ClearZeroIntFlag()
853 uint32_t PWM_GetZeroIntFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_GetZeroIntFlag() argument
855 return ((((pwm)->INTSTS0 & (PWM_INTSTS0_ZIF0_Msk << ((u32ChannelNum>>1)<<1)))) ? 1 : 0); in PWM_GetZeroIntFlag()
892 void PWM_EnableLoadMode(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32LoadMode) in PWM_EnableLoadMode() argument
894 (pwm)->CTL0 |= (u32LoadMode << u32ChannelNum); in PWM_EnableLoadMode()
910 void PWM_DisableLoadMode(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32LoadMode) in PWM_DisableLoadMode() argument
912 (pwm)->CTL0 &= ~(u32LoadMode << u32ChannelNum); in PWM_DisableLoadMode()
932 void PWM_SetClockSource(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32ClkSrcSel) in PWM_SetClockSource() argument
934 (pwm)->CLKSRC = ((pwm)->CLKSRC & ~(PWM_CLKSRC_ECLKSRC0_Msk << ((u32ChannelNum >> 1) << 3))) | \ in PWM_SetClockSource()
935 (u32ClkSrcSel << ((u32ChannelNum >> 1) << 3)); in PWM_SetClockSource()
1033 uint32_t PWM_GetWrapAroundFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_GetWrapAroundFlag() argument
1035 return (((pwm)->STATUS & (PWM_STATUS_CNTMAX0_Msk << u32ChannelNum)) ? 1 : 0); in PWM_GetWrapAroundFlag()
1047 void PWM_ClearWrapAroundFlag(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_ClearWrapAroundFlag() argument
1049 (pwm)->STATUS = (PWM_STATUS_CNTMAX0_Msk << u32ChannelNum); in PWM_ClearWrapAroundFlag()
1067 void PWM_EnableAcc(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntFlagCnt, uint32_t u32IntAccSr… in PWM_EnableAcc() argument
1069 …(pwm)->IFA[(u32ChannelNum>>1)<<1] &= ~(PWM_IFA0_IFAEN_Msk | PWM_IFA0_IFACNT_Msk | PWM_IFA0_IFASEL_… in PWM_EnableAcc()
1070 …(pwm)->IFA[(u32ChannelNum>>1)<<1] |= (PWM_IFA0_IFAEN_Msk | u32IntFlagCnt | (u32IntAccSrc << PWM_IF… in PWM_EnableAcc()
1082 void PWM_DisableAcc(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisableAcc() argument
1084 (pwm)->IFA[(u32ChannelNum>>1)<<1] &= ~PWM_IFA0_IFAEN_Msk; in PWM_DisableAcc()
1096 void PWM_EnableAccInt(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_EnableAccInt() argument
1098 (pwm)->AINTEN |= (1UL << ((u32ChannelNum>>1)<<1)); in PWM_EnableAccInt()
1110 void PWM_DisableAccInt(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisableAccInt() argument
1112 (pwm)->AINTEN &= ~(1UL << ((u32ChannelNum>>1)<<1)); in PWM_DisableAccInt()
1124 void PWM_ClearAccInt(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_ClearAccInt() argument
1126 (pwm)->AINTSTS = (1UL << ((u32ChannelNum>>1)<<1)); in PWM_ClearAccInt()
1139 uint32_t PWM_GetAccInt(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_GetAccInt() argument
1141 return (((pwm)->AINTSTS & (1UL << ((u32ChannelNum>>1)<<1))) ? 1UL : 0UL); in PWM_GetAccInt()
1153 void PWM_EnableAccPDMA(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_EnableAccPDMA() argument
1155 (pwm)->APDMACTL |= (1UL << ((u32ChannelNum>>1)<<1)); in PWM_EnableAccPDMA()
1167 void PWM_DisableAccPDMA(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisableAccPDMA() argument
1169 (pwm)->APDMACTL &= ~(1UL << ((u32ChannelNum>>1)<<1)); in PWM_DisableAccPDMA()
1181 void PWM_EnableAccStopMode(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_EnableAccStopMode() argument
1183 (pwm)->IFA[(u32ChannelNum>>1)<<1] |= PWM_IFA0_STPMOD_Msk; in PWM_EnableAccStopMode()
1195 void PWM_DisableAccStopMode(PWM_T *pwm, uint32_t u32ChannelNum) in PWM_DisableAccStopMode() argument
1197 (pwm)->IFA[u32ChannelNum] &= ~PWM_IFA0_STPMOD_Msk; in PWM_DisableAccStopMode()