113     uint32_t i;  in PWM_ConfigOutputChannel()  local
143         i = (u32PWMClockSrc / u32Frequency) / u16Prescale;  in PWM_ConfigOutputChannel()
145         if(i > (0x10000))  in PWM_ConfigOutputChannel()
148         u16CNR = i;  in PWM_ConfigOutputChannel()
152     i = u32PWMClockSrc / (u16Prescale * u16CNR);  in PWM_ConfigOutputChannel()
168     return(i);  in PWM_ConfigOutputChannel()
183     uint32_t i;  in PWM_Start()  local
185     for (i = 0UL; i < PWM_CHANNEL_NUM; i ++)  in PWM_Start()
187         if (u32ChannelMask & (1UL << i))  in PWM_Start()
189             (pwm)->CNTEN |= (1UL << ((i >> 1UL) << 1UL));  in PWM_Start()
206     uint32_t i;  in PWM_Stop()  local
208     for (i = 0UL; i < PWM_CHANNEL_NUM; i ++)  in PWM_Stop()
210         if (u32ChannelMask & (1UL << i))  in PWM_Stop()
212             (pwm)->PERIOD[((i >> 1UL) << 1UL)] = 0UL;  in PWM_Stop()
229     uint32_t i;  in PWM_ForceStop()  local
231     for (i = 0UL; i < PWM_CHANNEL_NUM; i ++)  in PWM_ForceStop()
233         if (u32ChannelMask & (1UL << i))  in PWM_ForceStop()
235             (pwm)->CNTEN &= ~(1UL << ((i >> 1UL) << 1UL));  in PWM_ForceStop()
362     uint32_t i;  in PWM_EnableFaultBrake()  local
363     for(i = 0; i < PWM_CHANNEL_NUM; i ++)  in PWM_EnableFaultBrake()
365         if(u32ChannelMask & (1 << i))  in PWM_EnableFaultBrake()
372 …*(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) |= (u32BrakeSource & (PWM_BRKCTL0_1_SYSEBEN_Msk…  in PWM_EnableFaultBrake()
377                 *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) |= u32BrakeSource;  in PWM_EnableFaultBrake()
381         if(u32LevelMask & (1 << i))  in PWM_EnableFaultBrake()
383             if((i & 0x1) == 0)  in PWM_EnableFaultBrake()
386                 *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) &= ~PWM_BRKCTL0_1_BRKAEVEN_Msk;  in PWM_EnableFaultBrake()
387 …       *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) |= ((3UL) << PWM_BRKCTL0_1_BRKAEVEN_Pos);  in PWM_EnableFaultBrake()
392                 *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) &= ~PWM_BRKCTL0_1_BRKAODD_Msk;  in PWM_EnableFaultBrake()
393 …        *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) |= ((3UL) << PWM_BRKCTL0_1_BRKAODD_Pos);  in PWM_EnableFaultBrake()
398             if((i & 0x1) == 0)  in PWM_EnableFaultBrake()
401                 *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) &= ~PWM_BRKCTL0_1_BRKAEVEN_Msk;  in PWM_EnableFaultBrake()
402 …       *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) |= ((2UL) << PWM_BRKCTL0_1_BRKAEVEN_Pos);  in PWM_EnableFaultBrake()
407                 *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) &= ~PWM_BRKCTL0_1_BRKAODD_Msk;  in PWM_EnableFaultBrake()
408 …        *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) |= ((2UL) << PWM_BRKCTL0_1_BRKAODD_Pos);  in PWM_EnableFaultBrake()