Lines Matching refs:u32ChannelNum
35 uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32UnitTimeNsec, … in EPWM_ConfigCaptureChannel() argument
108 EPWM_SET_PRESCALER(epwm, u32ChannelNum, u16Prescale); in EPWM_ConfigCaptureChannel()
111 …>CTL1 = ((epwm)->CTL1 & ~(EPWM_CTL1_CNTTYPE0_Msk << (u32ChannelNum << 1U))) | (1UL << (u32ChannelN… in EPWM_ConfigCaptureChannel()
113 (epwm)->CTL1 &= ~(EPWM_CTL1_CNTMODE0_Msk << u32ChannelNum); in EPWM_ConfigCaptureChannel()
114 EPWM_SET_CNR(epwm, u32ChannelNum, u16CNR); in EPWM_ConfigCaptureChannel()
133 uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint… in EPWM_ConfigOutputChannel() argument
184 EPWM_SET_PRESCALER(epwm, u32ChannelNum, u32Prescale); in EPWM_ConfigOutputChannel()
186 …m)->CTL1 & ~((EPWM_CTL1_CNTTYPE0_Msk << (u32ChannelNum << 1U))|((1UL << EPWM_CTL1_CNTMODE0_Pos) <<… in EPWM_ConfigOutputChannel()
189 EPWM_SET_CNR(epwm, u32ChannelNum, u32CNR); in EPWM_ConfigOutputChannel()
190 EPWM_SET_CMR(epwm, u32ChannelNum, u32DutyCycle * (u32CNR + 1U) / 100U); in EPWM_ConfigOutputChannel()
192 …pwm)->WGCTL0 & ~((EPWM_WGCTL0_PRDPCTL0_Msk | EPWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum << 1U))) | \ in EPWM_ConfigOutputChannel()
193 … ((uint32_t)EPWM_OUTPUT_HIGH << ((u32ChannelNum << 1U) + (uint32_t)EPWM_WGCTL0_ZPCTL0_Pos)); in EPWM_ConfigOutputChannel()
194 …m)->WGCTL1 & ~((EPWM_WGCTL1_CMPDCTL0_Msk | EPWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum << 1U))) | \ in EPWM_ConfigOutputChannel()
195 … ((uint32_t)EPWM_OUTPUT_LOW << ((u32ChannelNum << 1U) + (uint32_t)EPWM_WGCTL1_CMPUCTL0_Pos)); in EPWM_ConfigOutputChannel()
278 void EPWM_EnableADCTrigger(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition) in EPWM_EnableADCTrigger() argument
280 if(u32ChannelNum < 4U) in EPWM_EnableADCTrigger()
282 (epwm)->EADCTS0 &= ~((EPWM_EADCTS0_TRGSEL0_Msk) << (u32ChannelNum << 3U)); in EPWM_EnableADCTrigger()
283 (epwm)->EADCTS0 |= ((EPWM_EADCTS0_TRGEN0_Msk | u32Condition) << (u32ChannelNum << 3)); in EPWM_EnableADCTrigger()
287 (epwm)->EADCTS1 &= ~((EPWM_EADCTS1_TRGSEL4_Msk) << ((u32ChannelNum - 4U) << 3U)); in EPWM_EnableADCTrigger()
288 … (epwm)->EADCTS1 |= ((EPWM_EADCTS1_TRGEN4_Msk | u32Condition) << ((u32ChannelNum - 4U) << 3U)); in EPWM_EnableADCTrigger()
301 void EPWM_DisableADCTrigger(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableADCTrigger() argument
303 if(u32ChannelNum < 4U) in EPWM_DisableADCTrigger()
305 (epwm)->EADCTS0 &= ~(EPWM_EADCTS0_TRGEN0_Msk << (u32ChannelNum << 3U)); in EPWM_DisableADCTrigger()
309 (epwm)->EADCTS1 &= ~(EPWM_EADCTS1_TRGEN4_Msk << ((u32ChannelNum - 4U) << 3U)); in EPWM_DisableADCTrigger()
327 int32_t EPWM_EnableADCTriggerPrescale(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Prescale, u… in EPWM_EnableADCTriggerPrescale() argument
330 if ((epwm)->EADCPSCCTL & (1UL << u32ChannelNum)) in EPWM_EnableADCTriggerPrescale()
333 if(u32ChannelNum < 4UL) in EPWM_EnableADCTriggerPrescale()
335 …(epwm)->EADCPSC0 = ((epwm)->EADCPSC0 & ~((EPWM_EADCPSC0_EADCPSC0_Msk) << (u32ChannelNum << 3))) | \ in EPWM_EnableADCTriggerPrescale()
336 (u32Prescale << (u32ChannelNum << 3)); in EPWM_EnableADCTriggerPrescale()
337 …(epwm)->EADCPSCNT0 = ((epwm)->EADCPSCNT0 & ~((EPWM_EADCPSCNT0_PSCNT0_Msk) << (u32ChannelNum << 3))… in EPWM_EnableADCTriggerPrescale()
338 (u32PrescaleCnt << (u32ChannelNum << 3)); in EPWM_EnableADCTriggerPrescale()
342 …(epwm)->EADCPSC1 = ((epwm)->EADCPSC1 & ~((EPWM_EADCPSC1_EADCPSC4_Msk) << ((u32ChannelNum - 4UL) <<… in EPWM_EnableADCTriggerPrescale()
343 (u32Prescale << ((u32ChannelNum - 4UL) << 3)); in EPWM_EnableADCTriggerPrescale()
344 …ADCPSCNT1 = ((epwm)->EADCPSCNT1 & ~((EPWM_EADCPSCNT1_PSCNT4_Msk) << ((u32ChannelNum - 4UL) << 3)))… in EPWM_EnableADCTriggerPrescale()
345 (u32PrescaleCnt << ((u32ChannelNum - 4UL) << 3)); in EPWM_EnableADCTriggerPrescale()
348 (epwm)->EADCPSCCTL |= EPWM_EADCPSCCTL_PSCEN0_Msk << u32ChannelNum; in EPWM_EnableADCTriggerPrescale()
362 void EPWM_DisableADCTriggerPrescale(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableADCTriggerPrescale() argument
364 (epwm)->EADCPSCCTL &= ~(EPWM_EADCPSCCTL_PSCEN0_Msk << u32ChannelNum); in EPWM_DisableADCTriggerPrescale()
377 void EPWM_ClearADCTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition) in EPWM_ClearADCTriggerFlag() argument
379 (epwm)->STATUS = (EPWM_STATUS_EADCTRGF0_Msk << u32ChannelNum); in EPWM_ClearADCTriggerFlag()
392 uint32_t EPWM_GetADCTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetADCTriggerFlag() argument
394 return (((epwm)->STATUS & (EPWM_STATUS_EADCTRGF0_Msk << u32ChannelNum))?1UL:0UL); in EPWM_GetADCTriggerFlag()
411 void EPWM_EnableDACTrigger(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition) in EPWM_EnableDACTrigger() argument
413 (epwm)->DACTRGEN |= (u32Condition << u32ChannelNum); in EPWM_EnableDACTrigger()
425 void EPWM_DisableDACTrigger(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableDACTrigger() argument
428 EPWM_TRIGGER_DAC_COMPARE_DOWN) << u32ChannelNum); in EPWM_DisableDACTrigger()
441 void EPWM_ClearDACTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition) in EPWM_ClearDACTriggerFlag() argument
456 uint32_t EPWM_GetDACTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetDACTriggerFlag() argument
624 void EPWM_EnablePDMA(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32RisingFirst, uint32_t u32Mod… in EPWM_EnablePDMA() argument
627 u32IsOddCh = u32ChannelNum & 0x1U; in EPWM_EnablePDMA()
628 …1_Msk | EPWM_PDMACTL_CAPORD0_1_Msk | EPWM_PDMACTL_CAPMOD0_1_Msk) << ((u32ChannelNum >> 1U) << 3U))… in EPWM_EnablePDMA()
630 u32Mode | EPWM_PDMACTL_CHEN0_1_Msk) << ((u32ChannelNum >> 1U) << 3U)); in EPWM_EnablePDMA()
642 void EPWM_DisablePDMA(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisablePDMA() argument
644 (epwm)->PDMACTL &= ~(EPWM_PDMACTL_CHEN0_1_Msk << ((u32ChannelNum >> 1U) << 3U)); in EPWM_DisablePDMA()
659 void EPWM_EnableDeadZone(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Duration) in EPWM_EnableDeadZone() argument
662 (epwm)->DTCTL[(u32ChannelNum) >> 1U] &= ~EPWM_DTCTL0_1_DTCNT_Msk; in EPWM_EnableDeadZone()
663 (epwm)->DTCTL[(u32ChannelNum) >> 1U] |= EPWM_DTCTL0_1_DTEN_Msk | u32Duration; in EPWM_EnableDeadZone()
676 void EPWM_DisableDeadZone(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableDeadZone() argument
679 (epwm)->DTCTL[(u32ChannelNum) >> 1U] &= ~EPWM_DTCTL0_1_DTEN_Msk; in EPWM_DisableDeadZone()
694 void EPWM_EnableCaptureInt(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Edge) in EPWM_EnableCaptureInt() argument
696 (epwm)->CAPIEN |= (u32Edge << u32ChannelNum); in EPWM_EnableCaptureInt()
711 void EPWM_DisableCaptureInt(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Edge) in EPWM_DisableCaptureInt() argument
713 (epwm)->CAPIEN &= ~(u32Edge << u32ChannelNum); in EPWM_DisableCaptureInt()
728 void EPWM_ClearCaptureIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Edge) in EPWM_ClearCaptureIntFlag() argument
730 (epwm)->CAPIF = (u32Edge << u32ChannelNum); in EPWM_ClearCaptureIntFlag()
745 uint32_t EPWM_GetCaptureIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetCaptureIntFlag() argument
747 return (((((epwm)->CAPIF & (EPWM_CAPIF_CFLIF0_Msk << u32ChannelNum)) ? 1UL : 0UL) << 1) | \ in EPWM_GetCaptureIntFlag()
748 (((epwm)->CAPIF & (EPWM_CAPIF_CRLIF0_Msk << u32ChannelNum)) ? 1UL : 0UL)); in EPWM_GetCaptureIntFlag()
762 void EPWM_EnableDutyInt(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32IntDutyType) in EPWM_EnableDutyInt() argument
764 (epwm)->INTEN0 |= (u32IntDutyType << u32ChannelNum); in EPWM_EnableDutyInt()
776 void EPWM_DisableDutyInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableDutyInt() argument
778 …uint32_t)(EPWM_DUTY_INT_DOWN_COUNT_MATCH_CMP | EPWM_DUTY_INT_UP_COUNT_MATCH_CMP) << u32ChannelNum); in EPWM_DisableDutyInt()
790 void EPWM_ClearDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearDutyIntFlag() argument
792 (epwm)->INTSTS0 = (EPWM_INTSTS0_CMPUIF0_Msk | EPWM_INTSTS0_CMPDIF0_Msk) << u32ChannelNum; in EPWM_ClearDutyIntFlag()
806 uint32_t EPWM_GetDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetDutyIntFlag() argument
808 …->INTSTS0 & ((EPWM_INTSTS0_CMPDIF0_Msk | EPWM_INTSTS0_CMPUIF0_Msk) << u32ChannelNum))) ? 1UL : 0UL… in EPWM_GetDutyIntFlag()
884 void EPWM_EnablePeriodInt(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32IntPeriodType) in EPWM_EnablePeriodInt() argument
886 (epwm)->INTEN0 |= ((1UL << EPWM_INTEN0_PIEN0_Pos) << u32ChannelNum); in EPWM_EnablePeriodInt()
898 void EPWM_DisablePeriodInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisablePeriodInt() argument
900 (epwm)->INTEN0 &= ~((1UL << EPWM_INTEN0_PIEN0_Pos) << u32ChannelNum); in EPWM_DisablePeriodInt()
912 void EPWM_ClearPeriodIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearPeriodIntFlag() argument
914 (epwm)->INTSTS0 = ((1UL << EPWM_INTSTS0_PIF0_Pos) << u32ChannelNum); in EPWM_ClearPeriodIntFlag()
928 uint32_t EPWM_GetPeriodIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetPeriodIntFlag() argument
930 return ((((epwm)->INTSTS0 & ((1UL << EPWM_INTSTS0_PIF0_Pos) << u32ChannelNum))) ? 1UL : 0UL); in EPWM_GetPeriodIntFlag()
942 void EPWM_EnableZeroInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableZeroInt() argument
944 (epwm)->INTEN0 |= ((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum); in EPWM_EnableZeroInt()
956 void EPWM_DisableZeroInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableZeroInt() argument
958 (epwm)->INTEN0 &= ~((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum); in EPWM_DisableZeroInt()
970 void EPWM_ClearZeroIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearZeroIntFlag() argument
972 (epwm)->INTSTS0 = ((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum); in EPWM_ClearZeroIntFlag()
986 uint32_t EPWM_GetZeroIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetZeroIntFlag() argument
988 return ((((epwm)->INTSTS0 & ((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum))) ? 1UL : 0UL); in EPWM_GetZeroIntFlag()
1006 void EPWM_EnableAcc(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32IntFlagCnt, uint32_t u32IntAc… in EPWM_EnableAcc() argument
1008 …(epwm)->IFA[u32ChannelNum] = (((epwm)->IFA[u32ChannelNum] & ~((EPWM_IFA0_IFACNT_Msk | EPWM_IFA0_IF… in EPWM_EnableAcc()
1021 void EPWM_DisableAcc(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableAcc() argument
1023 (epwm)->IFA[u32ChannelNum] = ((epwm)->IFA[u32ChannelNum] & ~(EPWM_IFA0_IFAEN_Msk)); in EPWM_DisableAcc()
1035 void EPWM_EnableAccInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableAccInt() argument
1037 (epwm)->AINTEN |= (1UL << (u32ChannelNum)); in EPWM_EnableAccInt()
1049 void EPWM_DisableAccInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableAccInt() argument
1051 (epwm)->AINTEN &= ~(1UL << (u32ChannelNum)); in EPWM_DisableAccInt()
1063 void EPWM_ClearAccInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearAccInt() argument
1065 (epwm)->AINTSTS = (1UL << (u32ChannelNum)); in EPWM_ClearAccInt()
1078 uint32_t EPWM_GetAccInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetAccInt() argument
1080 return (((epwm)->AINTSTS & (1UL << (u32ChannelNum))) ? 1UL : 0UL); in EPWM_GetAccInt()
1092 void EPWM_EnableAccPDMA(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableAccPDMA() argument
1094 (epwm)->APDMACTL |= (1UL << (u32ChannelNum)); in EPWM_EnableAccPDMA()
1106 void EPWM_DisableAccPDMA(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableAccPDMA() argument
1108 (epwm)->APDMACTL &= ~(1UL << (u32ChannelNum)); in EPWM_DisableAccPDMA()
1120 void EPWM_EnableAccStopMode(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableAccStopMode() argument
1122 (epwm)->IFA[u32ChannelNum] |= EPWM_IFA0_STPMOD_Msk; in EPWM_EnableAccStopMode()
1134 void EPWM_DisableAccStopMode(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableAccStopMode() argument
1136 (epwm)->IFA[u32ChannelNum] &= ~EPWM_IFA0_STPMOD_Msk; in EPWM_DisableAccStopMode()
1148 void EPWM_ClearFTDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearFTDutyIntFlag() argument
1150 (epwm)->FTCI = ((EPWM_FTCI_FTCMU0_Msk | EPWM_FTCI_FTCMD0_Msk) << (u32ChannelNum >> 1U)); in EPWM_ClearFTDutyIntFlag()
1164 uint32_t EPWM_GetFTDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetFTDutyIntFlag() argument
1166 …return (((epwm)->FTCI & ((EPWM_FTCI_FTCMU0_Msk | EPWM_FTCI_FTCMD0_Msk) << (u32ChannelNum >> 1U))) … in EPWM_GetFTDutyIntFlag()
1182 void EPWM_EnableLoadMode(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32LoadMode) in EPWM_EnableLoadMode() argument
1184 (epwm)->CTL0 |= (u32LoadMode << u32ChannelNum); in EPWM_EnableLoadMode()
1200 void EPWM_DisableLoadMode(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32LoadMode) in EPWM_DisableLoadMode() argument
1202 (epwm)->CTL0 &= ~(u32LoadMode << u32ChannelNum); in EPWM_DisableLoadMode()
1224 void EPWM_ConfigSyncPhase(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32SyncSrc, uint32_t u32Di… in EPWM_ConfigSyncPhase() argument
1227 u32ChannelNum >>= 1U; in EPWM_ConfigSyncPhase()
1228 …& ~(((3UL << EPWM_SYNC_SINSRC0_Pos) << (u32ChannelNum << 1U)) | ((1UL << EPWM_SYNC_PHSDIR0_Pos) <<… in EPWM_ConfigSyncPhase()
1229 …32Direction << EPWM_SYNC_PHSDIR0_Pos << u32ChannelNum) | ((u32SyncSrc << EPWM_SYNC_SINSRC0_Pos) <<… in EPWM_ConfigSyncPhase()
1230 (epwm)->PHS[(u32ChannelNum)] = u32StartPhase; in EPWM_ConfigSyncPhase()
1361 void EPWM_SetClockSource(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32ClkSrcSel) in EPWM_SetClockSource() argument
1363 …(epwm)->CLKSRC = ((epwm)->CLKSRC & ~(EPWM_CLKSRC_ECLKSRC0_Msk << ((u32ChannelNum >> 1U) << 3U))) |… in EPWM_SetClockSource()
1364 (u32ClkSrcSel << ((u32ChannelNum >> 1U) << 3U)); in EPWM_SetClockSource()
1493 uint32_t EPWM_GetWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetWrapAroundFlag() argument
1495 return (((epwm)->STATUS & (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum)) ? 1UL : 0UL); in EPWM_GetWrapAroundFlag()
1507 void EPWM_ClearWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearWrapAroundFlag() argument
1509 (epwm)->STATUS = (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum); in EPWM_ClearWrapAroundFlag()
1527 void EPWM_EnableFaultDetect(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32AfterPrescaler, uint3… in EPWM_EnableFaultDetect() argument
1529 (epwm)->FDEN = ((epwm)->FDEN & ~(EPWM_FDEN_FDCKS0_Msk << (u32ChannelNum))) | \ in EPWM_EnableFaultDetect()
1530 … ((EPWM_FDEN_FDEN0_Msk | ((u32AfterPrescaler) << EPWM_FDEN_FDCKS0_Pos)) << (u32ChannelNum)); in EPWM_EnableFaultDetect()
1531 …(epwm)->FDCTL[(u32ChannelNum)] = ((epwm)->FDCTL[(u32ChannelNum)] & ~EPWM_FDCTL0_FDCKSEL_Msk) | (u3… in EPWM_EnableFaultDetect()
1543 void EPWM_DisableFaultDetect(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableFaultDetect() argument
1545 (epwm)->FDEN &= ~(EPWM_FDEN_FDEN0_Msk << (u32ChannelNum)); in EPWM_DisableFaultDetect()
1557 void EPWM_EnableFaultDetectOutput(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableFaultDetectOutput() argument
1559 (epwm)->FDEN &= ~(EPWM_FDEN_FDODIS0_Msk << (u32ChannelNum)); in EPWM_EnableFaultDetectOutput()
1571 void EPWM_DisableFaultDetectOutput(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableFaultDetectOutput() argument
1573 (epwm)->FDEN |= (EPWM_FDEN_FDODIS0_Msk << (u32ChannelNum)); in EPWM_DisableFaultDetectOutput()
1586 void EPWM_EnableFaultDetectDeglitch(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32DeglitchSmpCy… in EPWM_EnableFaultDetectDeglitch() argument
1588 …(epwm)->FDCTL[(u32ChannelNum)] = ((epwm)->FDCTL[(u32ChannelNum)] & (~EPWM_FDCTL0_DGSMPCYC_Msk)) | \ in EPWM_EnableFaultDetectDeglitch()
1601 void EPWM_DisableFaultDetectDeglitch(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableFaultDetectDeglitch() argument
1603 (epwm)->FDCTL[(u32ChannelNum)] &= ~EPWM_FDCTL0_FDDGEN_Msk; in EPWM_DisableFaultDetectDeglitch()
1616 void EPWM_EnableFaultDetectMask(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32MaskCnt) in EPWM_EnableFaultDetectMask() argument
1618 …(epwm)->FDCTL[(u32ChannelNum)] = ((epwm)->FDCTL[(u32ChannelNum)] & (~EPWM_FDCTL0_TRMSKCNT_Msk)) | … in EPWM_EnableFaultDetectMask()
1630 void EPWM_DisableFaultDetectMask(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableFaultDetectMask() argument
1632 (epwm)->FDCTL[(u32ChannelNum)] &= ~EPWM_FDCTL0_FDMSKEN_Msk; in EPWM_DisableFaultDetectMask()
1644 void EPWM_EnableFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_EnableFaultDetectInt() argument
1646 (epwm)->FDIEN |= (EPWM_FDIEN_FDIEN0_Msk << (u32ChannelNum)); in EPWM_EnableFaultDetectInt()
1658 void EPWM_DisableFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_DisableFaultDetectInt() argument
1660 (epwm)->FDIEN &= ~(EPWM_FDIEN_FDIEN0_Msk << (u32ChannelNum)); in EPWM_DisableFaultDetectInt()
1672 void EPWM_ClearFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_ClearFaultDetectInt() argument
1674 (epwm)->FDSTS = (EPWM_FDSTS_FDIF0_Msk << (u32ChannelNum)); in EPWM_ClearFaultDetectInt()
1687 uint32_t EPWM_GetFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum) in EPWM_GetFaultDetectInt() argument
1689 return (((epwm)->FDSTS & (EPWM_FDSTS_FDIF0_Msk << (u32ChannelNum))) ? 1UL : 0UL); in EPWM_GetFaultDetectInt()