Lines Matching refs:LPSCC

272         u32Hclk1Div = (LPSCC->CLKDIV0 & LPSCC_CLKDIV0_HCLK1DIV_Msk) >> LPSCC_CLKDIV0_HCLK1DIV_Pos;  in CLK_GetHCLK1Freq()
296     if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV1)  in CLK_GetPCLK2Freq()
300     else if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV2)  in CLK_GetPCLK2Freq()
304     else if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV4)  in CLK_GetPCLK2Freq()
308     else if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV8)  in CLK_GetPCLK2Freq()
312     else if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV16)  in CLK_GetPCLK2Freq()
643             u32div = (uint32_t)&LPSCC->CLKDIV0;  in CLK_SetModuleClock()
682             u32sel = (uint32_t)&LPSCC->CLKSEL0;  in CLK_SetModuleClock()
861         *(volatile uint32_t *)((uint32_t)&LPSCC->CLKEN0)  |= 1 << MODULE_IP_EN_Pos(u32ModuleIdx);  in CLK_EnableModuleClock()
959         *(volatile uint32_t *)((uint32_t)&LPSCC->CLKEN0)  &= ~(1 << MODULE_IP_EN_Pos(u32ModuleIdx));  in CLK_DisableModuleClock()
1452             u32sel = (uint32_t)&LPSCC->CLKSEL0;  in CLK_GetModuleClockSource()
1522             u32div = (uint32_t)&LPSCC->CLKDIV0;  in CLK_GetModuleClockDivider()