Lines Matching refs:CLKDIV0
272 u32Hclk1Div = (LPSCC->CLKDIV0 & LPSCC_CLKDIV0_HCLK1DIV_Msk) >> LPSCC_CLKDIV0_HCLK1DIV_Pos; in CLK_GetHCLK1Freq()
296 if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV1) in CLK_GetPCLK2Freq()
300 else if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV2) in CLK_GetPCLK2Freq()
304 else if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV4) in CLK_GetPCLK2Freq()
308 else if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV8) in CLK_GetPCLK2Freq()
312 else if((LPSCC->CLKDIV0 & LPSCC_CLKDIV0_APB2DIV_Msk) == LPSCC_CLKDIV0_PCLK2DIV16) in CLK_GetPCLK2Freq()
361 CLK->CLKDIV0 &= (~CLK_CLKDIV0_HCLK0DIV_Msk); in CLK_SetCoreClock()
424 CLK->CLKDIV0 = (CLK->CLKDIV0 & (~CLK_CLKDIV0_HCLK0DIV_Msk)) | u32ClkDiv; in CLK_SetHCLK()
643 u32div = (uint32_t)&LPSCC->CLKDIV0; in CLK_SetModuleClock()
647 u32div = (uint32_t)&CLK->CLKDIV0 + (u32DivTbl[MODULE_CLKDIV(u32ModuleIdx)]); in CLK_SetModuleClock()
1522 u32div = (uint32_t)&LPSCC->CLKDIV0; in CLK_GetModuleClockDivider()
1526 u32div = (uint32_t)&CLK->CLKDIV0 + (u32DivTbl[MODULE_CLKDIV(u32ModuleIdx)]); in CLK_GetModuleClockDivider()