Lines Matching refs:CLK_PMUCTL_PDMSEL_Pos

476 #define CLK_PMUCTL_PDMSEL_PD        (0x0UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
477 #define CLK_PMUCTL_PDMSEL_NPD0      (0x0UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
478 #define CLK_PMUCTL_PDMSEL_NPD1      (0x1UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
479 #define CLK_PMUCTL_PDMSEL_NPD2      (0x2UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
480 #define CLK_PMUCTL_PDMSEL_NPD3      (0x3UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
481 #define CLK_PMUCTL_PDMSEL_NPD4      (0x4UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
482 #define CLK_PMUCTL_PDMSEL_NPD5      (0x5UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
483 #define CLK_PMUCTL_PDMSEL_SPD0      (0x8UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
484 #define CLK_PMUCTL_PDMSEL_SPD1      (0x9UL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
485 #define CLK_PMUCTL_PDMSEL_SPD2      (0xAUL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
486 #define CLK_PMUCTL_PDMSEL_DPD0      (0xCUL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …
487 #define CLK_PMUCTL_PDMSEL_DPD1      (0xDUL << CLK_PMUCTL_PDMSEL_Pos)        /*!< Select power down …