Lines Matching full:description
9 …<description>nRF9230_enga reference description for system-on-chip with many ARM 32-bit Cortex-M33…
54 <description>Factory Information Configuration Registers</description>
68 <description>Unspecified</description>
74 <description>Device address type.</description>
82 <description>Device address type.</description>
88 <description>Public address.</description>
93 <description>Random address.</description>
104 <description>Description collection: 48 bit device address.</description>
112 <description>Device address [n].</description>
122 <description>Description collection: Encryption Root.</description>
130 <description>Encryption root word [n].</description>
140 <description>Description collection: Identity Root.</description>
148 <description>Identity root word [n].</description>
157 <description>Device info</description>
163 <description>Configuration identifier</description>
171 <description>Identification number for the HW</description>
179 <description>Part code</description>
187 <description>Part code</description>
193 <description>Unspecified</description>
202 <description>Part Variant, Hardware version and Production configuration</description>
210 …<description>Part Variant, Hardware version and Production configuration, encoded as ASCII</descri…
216 <description>Unspecified</description>
225 <description>Package option</description>
233 <description>Package option</description>
239 <description>Unspecified</description>
248 <description>RAM variant</description>
256 <description>RAM variant</description>
262 <description>Unspecified</description>
271 <description>MRAM variant</description>
279 <description>MRAM variant</description>
285 <description>Unspecified</description>
294 <description>Code memory page size in bytes</description>
302 <description>Code memory page size in bytes</description>
308 <description>Unspecified</description>
317 <description>Code memory size</description>
325 <description>Code memory size in number of pages</description>
331 <description>Unspecified</description>
340 <description>Device type</description>
348 <description>Device type</description>
354 <description>Device is an physical DIE</description>
359 <description>Device is an FPGA</description>
369 <description>SIP-specific device info</description>
375 <description>SIP part number</description>
392 …<description>Description collection: SIP hardware revision, encoded in ASCII, ex B0A or B1A</descr…
410 …<description>Description collection: SIP VARIANT, encoded in ASCII, ex SIAA, SIBA or SICA</descrip…
426 <description>PMIC version</description>
434 <description>PMIC version, incremental code</description>
444 <description>Description collection: Test site, in ascii</description>
453 <description>Lot number + test index in hex format (number digits 0-9).</description>
461 <description>Lot number in hex format</description>
467 <description>Test ID in hex format</description>
477 <description>Description collection: Test program id, in ascii</description>
486 <description>OSAT part number</description>
503 <description>Description collection: OSAT production build version</description>
512 <description>Unspecified</description>
518 <description>Unspecified</description>
524 …<description>LF oscillator configuration. Note. This configuration overrides corresponding LF osci…
532 <description>LF oscillator source.</description>
538 … <description>LF oscillator source is unconfigured. Default will be used.</description>
543 <description>Use LFXO as source for the LF oscillator.</description>
548 <description>Use LFRC as source for the LF oscillator.</description>
553 <description>Use LFLPRC as source for the LF oscillator.</description>
558 <description>Use LF Synth as source for the LF oscillator.</description>
567 …<description>LFXO configuration. Note. This configuration overrides corresponding LFXO configurati…
575 <description>LFXO crystal or external signal accuracy.</description>
581 <description>The accuracy is unconfigured.</description>
586 … <description>LFXO crystal or external signal has an accuracy of 500 ppm.</description>
591 … <description>LFXO crystal or external signal has an accuracy of 250 ppm.</description>
596 … <description>LFXO crystal or external signal has an accuracy of 150 ppm.</description>
601 … <description>LFXO crystal or external signal has an accuracy of 100 ppm.</description>
606 … <description>LFXO crystal or external signal has an accuracy of 75 ppm.</description>
611 … <description>LFXO crystal or external signal has an accuracy of 50 ppm.</description>
616 … <description>LFXO crystal or external signal has an accuracy of 30 ppm.</description>
621 … <description>LFXO crystal or external signal has an accuracy of 20 ppm.</description>
628 … <description>LFXO mode. LFXO will not start unless MODE is configured.</description>
634 <description>The mode is unconfigured.</description>
639 <description>LFXO Pierce mode.</description>
644 <description>LFXO PIXO mode.</description>
649 <description>LFXO in external sine wave mode.</description>
654 <description>LFXO in external square wave mode.</description>
661 … <description>Built-in load capacitors selection in 1 pF steps. Max. value 25 pF.</description>
667 …<description>The built-in load capacitors is unconfigured. LFXO will not start unless LOADCAP is c…
672 …<description>Do not use the built-in load capacitors, only external capacitors will be used.</desc…
679 <description>LFXO startup time in ms.</description>
685 <description>Startup time has not been configured.</description>
694 …description>LFXO calibration needed. Must be written to 0xFFFFFFFF after any modification of the L…
702 …description>LFXO calibration needed. Must be written to 0xFFFFFFFF after any modification of the L…
708 <description>Calibrate the LFXO at startup.</description>
717 …description>LFRC autocalibration configuration. Note. This configuration overrides corresponding L…
725 <description>Temperature measurement interval in 0.25 s steps.</description>
731 …<description>Temperature delta that should trigger a calibration in 0.25 degrees steps.</descripti…
737 …<description>Maximum number of TEMPINTERVAL periods in between calibrations, independent of temper…
743 <description>LFRC.AUTOCALCONFIG register enable.</description>
749 … <description>LFRC.AUTOCALCONFIG register has been configured and can be used.</description>
754 … <description>LFRC.AUTOCALCONFIG register has not been configured and cannot be used.</description>
764 <description>Unspecified</description>
770 …<description>HFXO64M configuration. Note. This configuration overrides corresponding XO configurat…
778 <description>HFXO64M mode.</description>
784 <description>The mode is unconfigured.</description>
789 <description>Normal operating mode.</description>
794 <description>TCXO/bypass mode</description>
799 <description>Reserved value</description>
804 <description>Reserved value</description>
809 <description>Reserved value</description>
814 <description>Reserved value</description>
819 <description>Reserved value</description>
831 <description>Unspecified</description>
837 <description>Unspecified</description>
843 <description>Unspecified</description>
849 <description>Trim value for GLOBAL.SAADC.CALVREF</description>
857 <description>Trim value</description>
867 … <description>Description collection: Trim value for GLOBAL.SAADC.CALGAIN</description>
875 <description>Trim value</description>
883 <description>Trim value for GLOBAL.SAADC.CALOFFSET</description>
891 <description>Trim value</description>
901 … <description>Description collection: Trim value for GLOBAL.SAADC.LINCALCOEFF</description>
909 <description>Trim value</description>
917 <description>Trim value for GLOBAL.SAADC.CALIREF</description>
925 <description>Trim value</description>
933 <description>Trim value for GLOBAL.SAADC.CALVREFTC</description>
941 <description>Trim value</description>
950 <description>Unspecified</description>
956 <description>Unspecified</description>
962 <description>Trim value for GLOBAL.CANPLL.TRIM.CTUNE</description>
970 <description>Trim value</description>
980 <description>Unspecified</description>
986 <description>Trim value for GLOBAL.COMP.REFTRIM</description>
994 <description>Trim value</description>
1004 <description>Unspecified</description>
1010 <description>Unspecified</description>
1016 <description>Unspecified</description>
1022 <description>Trim value for APPLICATION.HSFLL.TRIM.VSUP</description>
1030 <description>Trim value</description>
1040 … <description>Description collection: Trim value for APPLICATION.HSFLL.TRIM.COARSE</description>
1048 <description>Trim value</description>
1058 … <description>Description collection: Trim value for APPLICATION.HSFLL.TRIM.FINE</description>
1066 <description>Trim value</description>
1076 <description>Unspecified</description>
1084 <description>Unspecified</description>
1090 …<description>Description cluster: Trim value for APPLICATION.MEMCONF.BLOCKTYPE[n].TRIM</descriptio…
1098 <description>Trim value</description>
1109 <description>Unspecified</description>
1115 <description>Unspecified</description>
1121 <description>Unspecified</description>
1127 <description>Trim value for RADIOCORE.HSFLL.TRIM.VSUP</description>
1135 <description>Trim value</description>
1145 … <description>Description collection: Trim value for RADIOCORE.HSFLL.TRIM.COARSE</description>
1153 <description>Trim value</description>
1163 … <description>Description collection: Trim value for RADIOCORE.HSFLL.TRIM.FINE</description>
1171 <description>Trim value</description>
1181 <description>Unspecified</description>
1189 <description>Unspecified</description>
1195 … <description>Description cluster: Trim value for RADIOCORE.MEMCONF.BLOCKTYPE[n].TRIM</description>
1203 <description>Trim value</description>
1217 <description>USBHSCORE</description>
1232 <description>Control and Status Register</description>
1240 <description>Mode: Host only. VBUS Valid Override Enable (VbvalidOvEn)</description>
1246 …<description>Override is disabled and bvalid signal from the respective PHY selected is used inter…
1251 …<description>The vbus-valid signal received from the PHY is overridden with GOTGCTL.VbvalidOvVal</…
1258 <description>Mode: Host only. VBUS Valid OverrideValue (VbvalidOvVal)</description>
1264 <description>vbusvalid value when GOTGCTL.VbvalidOvEn = 1</description>
1269 <description>vbusvalid value when GOTGCTL.VbvalidOvEn is 1</description>
1276 …<description>Mode: Host only. A-Peripheral Session Valid Override Enable (AvalidOvEn)</description>
1282 <description>Derive AValid from PHY</description>
1287 <description>Derive Avalid from GOTGCTL.AvalidOvVal</description>
1294 … <description>Mode: Host only. A-Peripheral Session Valid OverrideValue (AvalidOvVal)</description>
1300 <description>Avalid value is 1'b0 when GOTGCTL.AvalidOvEn =1</description>
1305 <description>Avalid value is 1'b1 when GOTGCTL.AvalidOvEn =1</description>
1312 …<description>Mode: Device only. B-Peripheral Session Valid Override Value (BvalidOvEn)</descriptio…
1318 …<description>Override is disabled and bvalid signal from the respective PHY selected is used inter…
1323 …<description>Internally Bvalid received from the PHY is overridden with GOTGCTL.BvalidOvVal</descr…
1330 …<description>Mode: Device only. B-Peripheral Session Valid OverrideValue (BvalidOvVal)</descriptio…
1336 <description>Bvalid value when GOTGCTL.BvalidOvEn =1</description>
1341 <description>Bvalid value when GOTGCTL.BvalidOvEn =1</description>
1348 <description>Mode: Host and Device. Debounce Filter Bypass</description>
1354 <description>Debounce Filter Bypass is disabled.</description>
1359 <description>Debounce Filter Bypass is enabled.</description>
1366 <description>Mode: Host and Device. Connector ID Status (ConIDSts)</description>
1373 <description>The core is in A-Device mode.</description>
1378 <description>The core is in B-Device mode.</description>
1385 <description>Mode: Host only. Long/Short Debounce Time (DbncTime)</description>
1392 …<description>Long debounce time, used for physical connections (100 ms + 2.5 micro-sec)</descripti…
1397 … <description>Short debounce time, used for soft connections (2.5 micro-sec)</description>
1404 <description>Mode: Host only. A-Session Valid (ASesVld)</description>
1411 <description>A-session is not valid.</description>
1416 <description>A-session is valid.</description>
1423 <description>Mode: Device only. B-Session Valid (BSesVld)</description>
1430 <description>B-session is not valid.</description>
1435 <description>B-session is valid.</description>
1442 <description>OTG Version (OTGVer)</description>
1448 <description>Supports OTG Version 1.3</description>
1453 <description>Supports OTG Version 2.0</description>
1460 <description>Current Mode of Operation (CurMod)</description>
1467 <description>Current mode is device mode.</description>
1472 <description>Current mode is host mode.</description>
1479 <description>Mode: Host and Device. Multi Valued ID pin (MultValIdBC)</description>
1486 <description>B-Device connected to ACA. VBUS is on.</description>
1491 <description>B-Device connected to ACA. VBUS is off.</description>
1496 <description>A-Device connected to ACA</description>
1501 <description>A-Device not connected to ACA</description>
1506 <description>B-Device not connected to ACA</description>
1513 …description>Mode: Device Only. This bit when programmed to 1'b1 results in the core asserting chir…
1519 …<description>The controller does not assert chirp_on before sending an actual Chirp 'K' signal on …
1524 …<description>The controller asserts chirp_on before sending an actual Chirp 'K' signal on USB.</de…
1533 <description>Interrupt Register</description>
1541 <description>Mode: Host and Device. Session End Detected (SesEndDet)</description>
1547 <description>Session is Active</description>
1552 <description>SessionEnd utmiotg_bvalid signal is deasserted</description>
1559 …<description>Mode: Host and Device. Session Request Success Status Change (SesReqSucStsChng)</desc…
1565 <description>No Change in Session Request Status</description>
1570 <description>Session Request Status has changed</description>
1577 …<description>Mode: Host and Device. Host Negotiation Success Status Change (HstNegSucStsChng)</des…
1583 <description>No Change</description>
1588 <description>Host Negotiation Status Change</description>
1595 <description>Mode:Host and Device. Host Negotiation Detected (HstNegDet)</description>
1601 <description>No Active HNP Request</description>
1606 <description>Active HNP request detected</description>
1613 … <description>Mode: Host and Device. A-Device Timeout Change (ADevTOUTChg)</description>
1619 <description>No A-Device Timeout</description>
1624 <description>A-Device Timeout</description>
1631 <description>Mode: Host only. Debounce Done (DbnceDone)</description>
1637 <description>After Connect waiting for Debounce to complete</description>
1642 <description>Debounce completed</description>
1649 …<description>This bit when set indicates that there is a change in the value of at least one ACA p…
1655 <description>Indicates there is no change in ACA pin value</description>
1660 <description>Indicates there is a change in ACA pin value</description>
1669 <description>AHB Configuration Register</description>
1677 <description>Mode: Host and device. Global Interrupt Mask (GlblIntrMsk)</description>
1683 <description>Mask the interrupt assertion to the application</description>
1688 <description>Unmask the interrupt assertion to the application.</description>
1695 <description>Mode: Host and device. Burst Length/Type (HBstLen)</description>
1701 <description>1 word or single</description>
1706 <description>4 words or INCR</description>
1711 <description>8 words</description>
1716 <description>16 words or INCR4</description>
1721 <description>32 words</description>
1726 <description>64 words or INCR8</description>
1731 <description>128 words</description>
1736 <description>256 words or INCR16</description>
1741 <description>Others reserved</description>
1748 <description>Mode: Host and device. DMA Enable (DMAEn)</description>
1754 <description>Core operates in Slave mode</description>
1759 <description>Core operates in a DMA mode</description>
1766 … <description>Mode: Host and device. Non-Periodic TxFIFO Empty Level (NPTxFEmpLvl)</description>
1772 …<description>DIEPINTn.TxFEmp interrupt indicates that the Non-Periodic TxFIFO is half empty or tha…
1777 …description>GINTSTS.NPTxFEmp interrupt indicates that the Non-Periodic TxFIFO is completely empty …
1784 <description>Mode: Host and Device. Remote Memory Support (RemMemSupp)</description>
1790 <description>Remote Memory Support Feature disabled</description>
1795 <description>Remote Memory Support Feature enabled</description>
1802 …<description>Mode: Host and Device. Notify All DMA Write Transactions (NotiAllDmaWrit)</descriptio…
1808 <description>Unspecified</description>
1813 …description>The core asserts int_dma_req for all the DMA write transactions on the AHB interface a…
1820 <description>Mode: Host and Device. AHB Single Support (AHBSingle)</description>
1826 … <description>The remaining data in the transfer is sent using INCR burst size</description>
1831 … <description>The remaining data in the transfer is sent using Single burst size</description>
1840 <description>USB Configuration Register</description>
1848 <description>Mode: Host and Device. HS/FS Timeout Calibration (TOutCal)</description>
1854 <description>Add 0 PHY clocks</description>
1859 <description>Add 1 PHY clocks</description>
1864 <description>Add 2 PHY clocks</description>
1869 <description>Add 3 PHY clocks</description>
1874 <description>Add 4 PHY clocks</description>
1879 <description>Add 5 PHY clocks</description>
1884 <description>Add 6 PHY clocks</description>
1889 <description>Add 7 PHY clocks</description>
1896 <description>Mode: Host and Device. PHY Interface (PHYIf)</description>
1902 <description>PHY 8bit Mode</description>
1907 <description>PHY 16bit Mode</description>
1914 <description>Mode: Host and Device. ULPI or UTMI+ Select (ULPI_UTMI_Sel)</description>
1921 <description>UTMI+ Interface</description>
1926 <description>ULPI Interface</description>
1933 … <description>Mode: Host and Device. Full-Speed Serial Interface Select (FSIntf)</description>
1940 <description>6-pin unidirectional full-speed serial interface</description>
1945 <description>3-pin bidirectional full-speed serial interface</description>
1952 <description>PHYSel</description>
1959 <description>USB 2.0 high-speed UTMI+ or ULPI PHY is selected</description>
1964 <description>USB 1.1 full-speed serial transceiver is selected</description>
1971 <description>Mode: Device only. USB Turnaround Time (USBTrdTim)</description>
1977 <description>MAC interface is 16-bit UTMI+.</description>
1982 <description>MAC interface is 8-bit UTMI+.</description>
1989 <description>PHY Low-Power Clock Select (PhyLPwrClkSel)</description>
1995 <description>480-MHz Internal PLL clock</description>
2000 <description>48-MHz External Clock</description>
2007 … <description>Mode: Device only. TermSel DLine Pulsing Selection (TermSelDLPulse)</description>
2013 <description>Data line pulsing using utmi_txvalid</description>
2018 <description>Data line pulsing using utmi_termsel</description>
2025 <description>Mode: Host and Device. IC_USB-Capable (IC_USBCap)</description>
2032 <description>IC_USB PHY Interface is not selected</description>
2037 <description>IC_USB PHY Interface is selected</description>
2044 <description>Mode: Device only. Tx End Delay (TxEndDelay)</description>
2050 <description>Normal Mode</description>
2055 <description>Tx End delay</description>
2062 <description>Mode: Host and device. Force Host Mode (ForceHstMode)</description>
2068 <description>Normal Mode</description>
2073 <description>Force Host Mode</description>
2080 <description>Mode:Host and device. Force Device Mode (ForceDevMode)</description>
2086 <description>Normal Mode</description>
2091 <description>Force Device Mode</description>
2098 <description>Mode: Host and device. Corrupt Tx packet (CorruptTxPkt)</description>
2105 <description>Normal Mode</description>
2110 <description>Debug Mode</description>
2119 <description>Reset Register</description>
2127 <description>Mode: Host and Device. Core Soft Reset (CSftRst)</description>
2133 <description>No reset</description>
2138 <description>Resets hclk and phy_clock domains</description>
2145 …<description>Mode: Host and Device. PIU FS Dedicated Controller Soft Reset (PIUFSSftRst)</descript…
2151 <description>No Reset</description>
2156 <description>PIU FS Dedicated Controller Soft Reset</description>
2163 <description>Mode: Host only. Host Frame Counter Reset (FrmCntrRst)</description>
2169 <description>No reset</description>
2174 <description>Host Frame Counter Reset</description>
2181 <description>Mode: Host and Device. RxFIFO Flush (RxFFlsh)</description>
2187 <description>Does not flush the entire RxFIFO</description>
2192 <description>Flushes the entire RxFIFO</description>
2199 <description>Mode: Host and Device. TxFIFO Flush (TxFFlsh)</description>
2205 <description>No Flush</description>
2210 <description>Selectively flushes a single or all transmit FIFOs</description>
2217 <description>Mode: Host and Device. TxFIFO Number (TxFNum)</description>
2223 …description>-Periodic TxFIFO flush in host mode -Periodic TxFIFO 0 flush in device mode when in sh…
2228 …description>-Periodic TxFIFO flush in host mode -Periodic TxFIFO 1 flush in device mode when in sh…
2233 …description>-Periodic TxFIFO 2 flush in device mode when in shared FIFO operation -TXFIFO 2 flush …
2238 …description>-Periodic TxFIFO 3 flush in device mode when in shared FIFO operation -TXFIFO 3 flush …
2243 …description>-Periodic TxFIFO 4 flush in device mode when in shared FIFO operation -TXFIFO 4 flush …
2248 …description>-Periodic TxFIFO 5 flush in device mode when in shared FIFO operation -TXFIFO 5 flush …
2253 …description>-Periodic TxFIFO 6 flush in device mode when in shared FIFO operation -TXFIFO 6 flush …
2258 …description>-Periodic TxFIFO 7 flush in device mode when in shared FIFO operation -TXFIFO 7 flush …
2263 …description>-Periodic TxFIFO 8 flush in device mode when in shared FIFO operation -TXFIFO 8 flush …
2268 …description>-Periodic TxFIFO 9 flush in device mode when in shared FIFO operation -TXFIFO 9 flush …
2273 …description>-Periodic TxFIFO 10 flush in device mode when in shared FIFO operation -TXFIFO 10 flus…
2278 …description>-Periodic TxFIFO 11 flush in device mode when in shared FIFO operation -TXFIFO 11 flus…
2283 …description>-Periodic TxFIFO 12 flush in device mode when in shared FIFO operation -TXFIFO 12 flus…
2288 …description>-Periodic TxFIFO 13 flush in Device mode when in shared FIFO operation -TXFIFO 13 flus…
2293 …description>-Periodic TxFIFO 14 flush in Device mode when in shared FIFO operation -TXFIFO 14 flus…
2298 …description>-Periodic TxFIFO 15 flush in Device mode when in shared FIFO operation - TXFIFO 15 flu…
2303 <description>Flush all the transmit FIFOs in device or host mode</description>
2310 <description>Mode: Host and Device. Core Soft Reset Done (CSftRstDone)</description>
2316 <description>No reset</description>
2321 <description>Core Soft Reset is done</description>
2328 <description>Mode: Host and Device. DMA Request Signal (DMAReq)</description>
2335 <description>No DMA request</description>
2340 <description>DMA request is in progress</description>
2347 <description>Mode: Host and Device. AHB Master Idle (AHBIdle)</description>
2354 <description>Not Idle</description>
2359 <description>AHB Master Idle</description>
2368 <description>Interrupt Register</description>
2376 <description>Mode: Host and Device. Current Mode of Operation (CurMod)</description>
2383 <description>Device mode</description>
2388 <description>Host mode</description>
2395 <description>Mode: Host and Device. Mode Mismatch Interrupt (ModeMis)</description>
2401 <description>No Mode Mismatch Interrupt</description>
2406 <description>Mode Mismatch Interrupt</description>
2413 <description>Mode: Host and Device. OTG Interrupt (OTGInt)</description>
2420 <description>No Interrupt</description>
2425 <description>OTG Interrupt</description>
2432 <description>Mode: Host and Device. Start of (micro)Frame (Sof)</description>
2438 <description>No Start of Frame</description>
2443 <description>Start of Frame</description>
2450 <description>Mode: Host and Device. RxFIFO Non-Empty (RxFLvl)</description>
2457 <description>Rx Fifo is empty</description>
2462 <description>Rx Fifo is not empty</description>
2469 <description>Mode: Host and Device. Non-periodic TxFIFO Empty (NPTxFEmp)</description>
2476 <description>Non-periodic TxFIFO is not empty</description>
2481 <description>Non-periodic TxFIFO is empty</description>
2488 … <description>Mode: Device only. Global IN Non-periodic NAK Effective (GINNakEff)</description>
2495 <description>Global Non-periodic IN NAK not active</description>
2500 <description>Set Global Non-periodic IN NAK bit</description>
2507 <description>Mode: Device only. Global OUT NAK Effective (GOUTNakEff)</description>
2514 <description>Not Active</description>
2519 <description>Global OUT NAK Effective</description>
2526 <description>Mode: Device only. Early Suspend (ErlySusp)</description>
2532 <description>No Idle state detected</description>
2537 <description>3ms of Idle state detected</description>
2544 <description>Mode: Device only. USB Suspend (USBSusp)</description>
2550 <description>Not Active</description>
2555 <description>USB Suspend</description>
2562 <description>Mode: Device only. USB Reset (USBRst)</description>
2568 <description>Not active</description>
2573 <description>USB Reset</description>
2580 <description>Mode: Device only. Enumeration Done (EnumDone)</description>
2586 <description>Not active</description>
2591 <description>Enumeration Done</description>
2598 …<description>Mode: Device only. Isochronous OUT Packet Dropped Interrupt (ISOOutDrop)</description>
2604 <description>Not active</description>
2609 <description>Isochronous OUT Packet Dropped Interrupt</description>
2616 <description>Mode: Device only. End of Periodic Frame Interrupt (EOPF)</description>
2622 <description>Not active</description>
2627 <description>End of Periodic Frame Interrupt</description>
2634 <description>Mode: Device only. Restore Done Interrupt (RstrDoneInt)</description>
2640 <description>Not active</description>
2645 <description>Restore Done Interrupt</description>
2652 <description>Mode: Device only. Endpoint Mismatch Interrupt (EPMis)</description>
2658 <description>Not active</description>
2663 <description>Endpoint Mismatch Interrupt</description>
2670 <description>Mode: Device only. IN Endpoints Interrupt (IEPInt)</description>
2677 <description>Not active</description>
2682 <description>IN Endpoints Interrupt</description>
2689 <description>Mode: Device only. OUT Endpoints Interrupt (OEPInt)</description>
2696 <description>Not active</description>
2701 <description>OUT Endpoints Interrupt</description>
2708 … <description>Mode: Device only. Incomplete Isochronous IN Transfer (incompISOIN)</description>
2714 <description>Not active</description>
2719 <description>Incomplete Isochronous IN Transfer</description>
2726 <description>Incomplete Periodic Transfer (incomplP)</description>
2732 <description>Not active</description>
2737 <description>Incomplete Periodic Transfer</description>
2744 <description>Mode: Device only. Data Fetch Suspended (FetSusp)</description>
2750 <description>Not active</description>
2755 <description>Data Fetch Suspended</description>
2762 <description>Mode: Device only. Reset detected Interrupt (ResetDet)</description>
2768 <description>Not active</description>
2773 <description>Reset detected Interrupt</description>
2780 <description>Mode: Host only. Host Port Interrupt (PrtInt)</description>
2787 <description>Not active</description>
2792 <description>Host Port Interrupt</description>
2799 <description>Mode: Host only. Host Channels Interrupt (HChInt)</description>
2806 <description>Not active</description>
2811 <description>Host Channels Interrupt</description>
2818 … <description>Mode: Host and Device. LPM Transaction Received Interrupt (LPM_Int).</description>
2824 <description>Not Active</description>
2829 <description>LPM Transaction Received Interrupt</description>
2836 … <description>Mode: Host and Device. Connector ID Status Change (ConIDStsChng)</description>
2842 <description>Not Active</description>
2847 <description>Connector ID Status Change</description>
2854 <description>Mode: Host only. Disconnect Detected Interrupt (DisconnInt)</description>
2860 <description>Not active</description>
2865 <description>Disconnect Detected Interrupt</description>
2872 …<description>Mode: Host and Device. Session Request/New Session Detected Interrupt (SessReqInt)</d…
2878 <description>Not active</description>
2883 <description>Session Request New Session Detected Interrupt</description>
2890 …<description>Mode: Host and Device. Resume/Remote Wakeup Detected Interrupt (WkUpInt)</description>
2896 <description>Not active</description>
2901 <description>Resume or Remote Wakeup Detected Interrupt</description>
2910 <description>Interrupt Mask Register</description>
2918 … <description>Mode: Host and Device. Mode Mismatch Interrupt Mask (ModeMisMsk)</description>
2924 <description>Mode Mismatch Interrupt Mask</description>
2929 <description>No Mode Mismatch Interrupt Mask</description>
2936 <description>Mode: Host and Device. OTG Interrupt Mask (OTGIntMsk)</description>
2942 <description>OTG Interrupt Mask</description>
2947 <description>No OTG Interrupt Mask</description>
2954 <description>Mode: Host and Device. Start of (micro)Frame Mask (SofMsk)</description>
2960 <description>Start of Frame Mask</description>
2965 <description>No Start of Frame Mask</description>
2972 … <description>Mode: Host and Device. Receive FIFO Non-Empty Mask (RxFLvlMsk)</description>
2978 <description>Receive FIFO Non-Empty Mask</description>
2983 <description>No Receive FIFO Non-Empty Mask</description>
2990 … <description>Mode: Host and Device. Non-periodic TxFIFO Empty Mask (NPTxFEmpMsk)</description>
2996 <description>Non-periodic TxFIFO Empty Mask</description>
3001 <description>No Non-periodic TxFIFO Empty Mask</description>
3008 …<description>Mode: Device only,. Global Non-periodic IN NAK Effective Mask (GINNakEffMsk)</descrip…
3014 <description>Global Non-periodic IN NAK Effective Mask</description>
3019 <description>No Global Non-periodic IN NAK Effective Mask</description>
3026 … <description>Mode: Device only. Global OUT NAK Effective Mask (GOUTNakEffMsk)</description>
3032 <description>Global OUT NAK Effective Mask</description>
3037 <description>No Global OUT NAK Effective Mask</description>
3044 <description>Mode: Device only. Early Suspend Mask (ErlySuspMsk)</description>
3050 <description>Early Suspend Mask</description>
3055 <description>No Early Suspend Mask</description>
3062 <description>Mode: Device only. USB Suspend Mask (USBSuspMsk)</description>
3068 <description>USB Suspend Mask</description>
3073 <description>No USB Suspend Mask</description>
3080 <description>Mode: Device only. USB Reset Mask (USBRstMsk)</description>
3086 <description>USB Reset Mask</description>
3091 <description>No USB Reset Mask</description>
3098 <description>Mode: Device only. Enumeration Done Mask (EnumDoneMsk)</description>
3104 <description>Enumeration Done Mask</description>
3109 <description>No Enumeration Done Mask</description>
3116 …<description>Mode: Device only. Isochronous OUT Packet Dropped Interrupt Mask (ISOOutDropMsk)</des…
3122 <description>Isochronous OUT Packet Dropped Interrupt Mask</description>
3127 <description>No Isochronous OUT Packet Dropped Interrupt Mask</description>
3134 … <description>Mode: Device only. End of Periodic Frame Interrupt Mask (EOPFMsk)</description>
3140 <description>End of Periodic Frame Interrupt Mask</description>
3145 <description>No End of Periodic Frame Interrupt Mask</description>
3152 … <description>Mode: Host and Device. Restore Done Interrupt Mask (RstrDoneIntMsk)</description>
3158 <description>Restore Done Interrupt Mask</description>
3163 <description>No Restore Done Interrupt Mask</description>
3170 … <description>Mode: Device only. Endpoint Mismatch Interrupt Mask (EPMisMsk)</description>
3176 <description>Endpoint Mismatch Interrupt Mask</description>
3181 <description>No Endpoint Mismatch Interrupt Mask</description>
3188 <description>Mode: Device only. IN Endpoints Interrupt Mask (IEPIntMsk)</description>
3194 <description>IN Endpoints Interrupt Mask</description>
3199 <description>No IN Endpoints Interrupt Mask</description>
3206 <description>Mode: Device only. OUT Endpoints Interrupt Mask (OEPIntMsk)</description>
3212 <description>OUT Endpoints Interrupt Mask</description>
3217 <description>No OUT Endpoints Interrupt Mask</description>
3224 <description>Incomplete Periodic Transfer Mask (incomplPMsk)</description>
3230 …<description>Host mode: Incomplete Periodic Transfer MaskDevice mode: Incomplete Isochronous OUT T…
3235 …<description>Host mode: No Incomplete Periodic Transfer MaskDevice mode: No Incomplete Isochronous…
3242 <description>Mode: Device only. Data Fetch Suspended Mask (FetSuspMsk)</description>
3248 <description>Data Fetch Suspended Mask</description>
3253 <description>No Data Fetch Suspended Mask</description>
3260 … <description>Mode: Device only. Reset detected Interrupt Mask (ResetDetMsk)</description>
3266 <description>Reset detected Interrupt Mask</description>
3271 <description>No Reset detected Interrupt Mask</description>
3278 <description>Mode: Host only. Host Port Interrupt Mask (PrtIntMsk)</description>
3284 <description>Host Port Interrupt Mask</description>
3289 <description>No Host Port Interrupt Mask</description>
3296 <description>Mode: Host only. Host Channels Interrupt Mask (HChIntMsk)</description>
3302 <description>Host Channels Interrupt Mask</description>
3307 <description>No Host Channels Interrupt Mask</description>
3314 … <description>Mode: Host and Device. LPM Transaction Received Interrupt (LPM_Int)</description>
3320 <description>LPM Transaction received interrupt Mask</description>
3325 <description>No LPM Transaction received interrupt Mask</description>
3332 …<description>Mode: Host and Device. Connector ID Status Change Mask (ConIDStsChngMsk)</description>
3338 <description>Connector ID Status Change Mask</description>
3343 <description>No Connector ID Status Change Mask</description>
3350 …<description>Mode: Host and Device. Disconnect Detected Interrupt Mask (DisconnIntMsk)</descriptio…
3356 <description>Disconnect Detected Interrupt Mask</description>
3361 <description>No Disconnect Detected Interrupt Mask</description>
3368 …<description>Mode: Host and Device. Session Request/New Session Detected Interrupt Mask (SessReqIn…
3374 <description>Session Request or New Session Detected Interrupt Mask</description>
3379 … <description>No Session Request or New Session Detected Interrupt Mask</description>
3386 …<description>Mode: Host and Device. Resume/Remote Wakeup Detected Interrupt Mask (WkUpIntMsk)</des…
3392 <description>Resume or Remote Wakeup Detected Interrupt Mask</description>
3397 <description>Unmask Resume Remote Wakeup Detected Interrupt</description>
3406 <description>Receive Status Debug Read Register</description>
3414 <description>Channel Number (ChNum)</description>
3421 <description>Channel or EndPoint 0</description>
3426 <description>Channel or EndPoint 1</description>
3431 <description>Channel or EndPoint 2</description>
3436 <description>Channel or EndPoint 3</description>
3441 <description>Channel or EndPoint 4</description>
3446 <description>Channel or EndPoint 5</description>
3451 <description>Channel or EndPoint 6</description>
3456 <description>Channel or EndPoint 7</description>
3461 <description>Channel or EndPoint 8</description>
3466 <description>Channel or EndPoint 9</description>
3471 <description>Channel or EndPoint 10</description>
3476 <description>Channel or EndPoint 11</description>
3481 <description>Channel or EndPoint 12</description>
3486 <description>Channel or EndPoint 13</description>
3491 <description>Channel or EndPoint 14</description>
3496 <description>Channel or EndPoint 15</description>
3503 <description>Byte Count (BCnt)</description>
3510 <description>Data PID (DPID)</description>
3517 <description>DATA0</description>
3522 <description>DATA2</description>
3527 <description>DATA1</description>
3532 <description>MDATA</description>
3539 … <description>Packet Status (PktSts) indicates the status of the received packet.</description>
3546 <description>Global OUT NAK in device mode (triggers an interrupt)</description>
3551 …<description>IN data packet received in host mode and OUT data packet received in device mode</des…
3556 …<description>IN or OUT transfer completed in both host and device mode (triggers an interrupt)</de…
3561 … <description>SETUP transaction completed in device mode (triggers an interrupt)</description>
3566 <description>Data toggle error (triggers an interrupt) in host mode</description>
3571 <description>SETUP data packet received in device mode</description>
3576 <description>Channel halted in host mode (triggers an interrupt)</description>
3583 <description>Mode: Device only. Frame Number (FN)</description>
3592 <description>Receive Status Read/Pop Register</description>
3600 <description>Channel Number (ChNum)</description>
3607 <description>Channel or EndPoint 0</description>
3612 <description>Channel or EndPoint 1</description>
3617 <description>Channel or EndPoint 2</description>
3622 <description>Channel or EndPoint 3</description>
3627 <description>Channel or EndPoint 4</description>
3632 <description>Channel or EndPoint 5</description>
3637 <description>Channel or EndPoint 6</description>
3642 <description>Channel or EndPoint 7</description>
3647 <description>Channel or EndPoint 8</description>
3652 <description>Channel or EndPoint 9</description>
3657 <description>Channel or EndPoint 10</description>
3662 <description>Channel or EndPoint 11</description>
3667 <description>Channel or EndPoint 12</description>
3672 <description>Channel or EndPoint 13</description>
3677 <description>Channel or EndPoint 14</description>
3682 <description>Channel or EndPoint 15</description>
3689 <description>Byte Count (BCnt)</description>
3696 <description>Data PID (DPID)</description>
3703 <description>DATA0</description>
3708 <description>DATA2</description>
3713 <description>DATA1</description>
3718 <description>MDATA</description>
3725 … <description>Packet Status (PktSts) indicates the status of the received packet.</description>
3732 <description>Global OUT NAK in device mode (triggers an interrupt)</description>
3737 …<description>IN data packet received in host mode and OUT data packet received in device mode</des…
3742 …<description>IN or OUT transfer completed in both host and device mode (triggers an interrupt)</de…
3747 … <description>SETUP transaction completed in device mode (triggers an interrupt)</description>
3752 <description>Data toggle error (triggers an interrupt) in host mode</description>
3759 <description>Mode: Device only. Frame Number (FN)</description>
3768 <description>Receive FIFO Size Register</description>
3776 <description>Mode: Host and Device. RxFIFO Depth (RxFDep)</description>
3784 <description>Non-periodic Transmit FIFO Size Register</description>
3792 <description>Non-periodic Transmit RAM Start Address (NPTxFStAddr)</description>
3798 <description>Mode: Host only. Non-periodic TxFIFO Depth (NPTxFDep)</description>
3806 <description>Non-periodic Transmit FIFO/Queue Status Register</description>
3814 <description>Non-periodic TxFIFO Space Avail (NPTxFSpcAvail)</description>
3821 … <description>Non-periodic Transmit Request Queue Space Available (NPTxQSpcAvail)</description>
3828 <description>Non-periodic Transmit Request Queue is full</description>
3833 <description>1 location available</description>
3838 <description>2 locations available</description>
3843 <description>3 locations available</description>
3848 <description>4 locations available</description>
3853 <description>5 locations available</description>
3858 <description>6 locations available</description>
3863 <description>7 locations available</description>
3868 <description>8 locations available</description>
3875 <description>Top of the Non-periodic Transmit Request Queue (NPTxQTop)</description>
3882 <description>IN/OUT token</description>
3887 <description>Zero-length transmit packet (device IN/host OUT)</description>
3892 <description>PING/CSPLIT token</description>
3897 <description>Channel halt command</description>
3906 <description>General Purpose Input/Output Register</description>
3927 <description>User ID Register</description>
3935 <description>User ID (UserID) Application-programmable ID field.</description>
3943 <description>Synopsys ID Register</description>
3951 <description>Release number of the controller being used currently.</description>
3960 <description>User Hardware Configuration 1 Register</description>
3968 <description>This 32-bit field uses two bits per</description>
3977 <description>User Hardware Configuration 2 Register</description>
3985 <description>Mode of Operation (OtgMode)</description>
3992 <description>HNP- and SRP-Capable OTG (Host and Device)</description>
3997 <description>SRP-Capable OTG (Host and Device)</description>
4002 <description>Non-HNP and Non-SRP Capable OTG (Host and Device)</description>
4007 <description>SRP-Capable Device</description>
4012 <description>Non-OTG Device</description>
4017 <description>SRP-Capable Host</description>
4022 <description>Non-OTG Host</description>
4029 <description>Architecture (OtgArch)</description>
4036 <description>Slave Mode</description>
4041 <description>External DMA Mode</description>
4046 <description>Internal DMA Mode</description>
4053 <description>Point-to-Point (SingPnt)</description>
4060 <description>Multi-point application (hub and split support)</description>
4065 <description>Single-point application (no hub and split support)</description>
4072 <description>High-Speed PHY Interface Type (HSPhyType)</description>
4079 <description>High-Speed interface not supported</description>
4084 <description>High Speed Interface UTMI+ is supported</description>
4089 <description>High Speed Interface ULPI is supported</description>
4094 <description>High Speed Interfaces UTMI+ and ULPI is supported</description>
4101 <description>Full-Speed PHY Interface Type (FSPhyType)</description>
4108 <description>Full-speed interface not supported</description>
4113 <description>Dedicated full-speed interface is supported</description>
4118 <description>FS pins shared with UTMI+ pins is supported</description>
4123 <description>FS pins shared with ULPI pins is supported</description>
4130 <description>Number of Device Endpoints (NumDevEps)</description>
4137 <description>End point 0</description>
4142 <description>End point 1</description>
4147 <description>End point 2</description>
4152 <description>End point 3</description>
4157 <description>End point 4</description>
4162 <description>End point 5</description>
4167 <description>End point 6</description>
4172 <description>End point 7</description>
4177 <description>End point 8</description>
4182 <description>End point 9</description>
4187 <description>End point 10</description>
4192 <description>End point 11</description>
4197 <description>End point 12</description>
4202 <description>End point 13</description>
4207 <description>End point 14</description>
4212 <description>End point 15</description>
4219 <description>Number of Host Channels (NumHstChnl)</description>
4226 <description>Host Channel 1</description>
4231 <description>Host Channel 2</description>
4236 <description>Host Channel 3</description>
4241 <description>Host Channel 4</description>
4246 <description>Host Channel 5</description>
4251 <description>Host Channel 6</description>
4256 <description>Host Channel 7</description>
4261 <description>Host Channel 8</description>
4266 <description>Host Channel 9</description>
4271 <description>Host Channel 10</description>
4276 <description>Host Channel 11</description>
4281 <description>Host Channel 12</description>
4286 <description>Host Channel 13</description>
4291 <description>Host Channel 14</description>
4296 <description>Host Channel 15</description>
4301 <description>Host Channel 16</description>
4308 <description>Periodic OUT Channels Supported in Host Mode (PerioSupport)</description>
4315 <description>Periodic OUT Channels is not supported in Host Mode</description>
4320 <description>Periodic OUT Channels Supported in Host Mode Supported</description>
4327 <description>Dynamic FIFO Sizing Enabled (DynFifoSizing)</description>
4334 <description>Dynamic FIFO Sizing Disabled</description>
4339 <description>Dynamic FIFO Sizing Enabled</description>
4346 <description>Multi Processor Interrupt Enabled (MultiProcIntrpt)</description>
4353 <description>No Multi Processor Interrupt Enabled</description>
4358 <description>Multi Processor Interrupt Enabled</description>
4365 <description>Non-periodic Request Queue Depth (NPTxQDepth)</description>
4372 <description>Queue size 2</description>
4377 <description>Queue size 4</description>
4382 <description>Queue size 8</description>
4389 <description>Host Mode Periodic Request Queue Depth (PTxQDepth)</description>
4396 <description>Queue Depth 2</description>
4401 <description>Queue Depth 4</description>
4406 <description>Queue Depth 8</description>
4411 <description>Queue Depth 16</description>
4418 … <description>Device Mode IN Token Sequence Learning Queue Depth (TknQDepth)</description>
4427 <description>User Hardware Configuration 3 Register</description>
4435 <description>Width of Transfer Size Counters (XferSizeWidth)</description>
4442 <description>Width of Transfer Size Counter 11 bits</description>
4447 <description>Width of Transfer Size Counter 12 bits</description>
4452 <description>Width of Transfer Size Counter 13 bits</description>
4457 <description>Width of Transfer Size Counter 14 bits</description>
4462 <description>Width of Transfer Size Counter 15 bits</description>
4467 <description>Width of Transfer Size Counter 16 bits</description>
4472 <description>Width of Transfer Size Counter 17 bits</description>
4477 <description>Width of Transfer Size Counter 18 bits</description>
4482 <description>Width of Transfer Size Counter 19 bits</description>
4489 <description>Width of Packet Size Counters (PktSizeWidth)</description>
4496 <description>Width of Packet Size Counter 4</description>
4501 <description>Width of Packet Size Counter 5</description>
4506 <description>Width of Packet Size Counter 6</description>
4511 <description>Width of Packet Size Counter 7</description>
4516 <description>Width of Packet Size Counter 8</description>
4521 <description>Width of Packet Size Counter 9</description>
4526 <description>Width of Packet Size Counter 10</description>
4533 <description>OTG Function Enabled (OtgEn)</description>
4540 <description>Not OTG Capable</description>
4545 <description>OTG Capable</description>
4552 <description>I2C Selection (I2CIntSel)</description>
4559 <description>I2C Interface is not available</description>
4564 <description>I2C Interface is available</description>
4571 <description>Vendor Control Interface Support (VndctlSupt)</description>
4578 <description>Vendor Control Interface is not available.</description>
4583 <description>Vendor Control Interface is available.</description>
4590 <description>Optional Features Removed (OptFeature)</description>
4597 <description>Optional features were not Removed</description>
4602 <description>Optional Features have been Removed</description>
4609 <description>Reset Style for Clocked always Blocks in RTL (RstType)</description>
4616 <description>Asynchronous reset is used in the core</description>
4621 <description>Synchronous reset is used in the core</description>
4628 …<description>This bit indicates whether ADP logic is present within or external to the controller<…
4635 <description>ADP logic is not present along with the controller</description>
4640 <description>ADP logic is present along with the controller</description>
4647 <description>HSIC mode specified for Mode of Operation</description>
4654 <description>No HSIC capability</description>
4659 <description>HSIC-capable with shared UTMI PHY interface</description>
4666 … <description>This bit indicates the controller support for Battery Charger.</description>
4673 <description>No Battery Charger Support</description>
4678 <description>Battery Charger Support present</description>
4685 <description>LPM mode specified for Mode of Operation.</description>
4692 <description>LPM disabled</description>
4697 <description>LPM enabled</description>
4704 <description>DFIFO Depth (DfifoDepth - EP_LOC_CNT)</description>
4713 <description>User Hardware Configuration 4 Register</description>
4721 … <description>Number of Device Mode Periodic IN Endpoints (NumDevPerioEps)</description>
4728 <description>Number of Periodic IN EPs is 0</description>
4733 <description>Number of Periodic IN EPs is 1</description>
4738 <description>Number of Periodic IN EPs is 2</description>
4743 <description>Number of Periodic IN EPs is 3</description>
4748 <description>Number of Periodic IN EPs is 4</description>
4753 <description>Number of Periodic IN EPs is 5</description>
4758 <description>Number of Periodic IN EPs is 6</description>
4763 <description>Number of Periodic IN EPs is 7</description>
4768 <description>Number of Periodic IN EPs is 8</description>
4773 <description>Number of Periodic IN EPs is 9</description>
4778 <description>Number of Periodic IN EPs is 10</description>
4783 <description>Number of Periodic IN EPs is 11</description>
4788 <description>Number of Periodic IN EPs is 12</description>
4793 <description>Number of Periodic IN EPs is 13</description>
4798 <description>Number of Periodic IN EPs is 14</description>
4803 <description>Number of Periodic IN EPs is 15</description>
4810 <description>Enable Partial Power Down (PartialPwrDn)</description>
4817 <description>Partial Power Down disabled</description>
4822 <description>Partial Power Down enabled</description>
4829 <description>Minimum AHB Frequency Less Than 60 MHz (AhbFreq)</description>
4836 <description>Minimum AHB Frequency More Than 60 MHz</description>
4841 <description>Minimum AHB Frequency Less Than 60 MHz</description>
4848 <description>Enable Hibernation (Hibernation)</description>
4855 <description>Hibernation feature disabled</description>
4860 <description>Hibernation feature enabled</description>
4867 <description>Enable Hibernation</description>
4874 <description>Extended Hibernation feature not enabled</description>
4879 <description>Extended Hibernation feature enabled</description>
4886 <description>Enhanced LPM Support1 (EnhancedLPMSupt1)</description>
4893 …<description>Reject L1 Request even if Non-Periodic (Bulk/Interrupt) TxFIFO is not empty.</descrip…
4898 …<description>Accept L1 Request even if Non-Periodic (Bulk/Interrupt) TxFIFO is not empty</descript…
4905 <description>Service Interval Flow</description>
4912 <description>Service Interval Flow not supported</description>
4917 <description>Service Interval Flow supported</description>
4924 <description>Interpacket Gap ISOC OUT Worst-case Support (ipgisocSupt)</description>
4931 <description>Interpacket Gap ISOC OUT Worst-case Support is Disabled</description>
4936 … <description>Interpacket Gap ISOC OUT Worst-case Support is Enabled (Default)</description>
4943 <description>Active Clock Gating Support</description>
4950 <description>Unspecified</description>
4955 <description>Active Clock Gating Support</description>
4962 <description>Enhanced LPM Support (EnhancedLPMSupt)</description>
4969 <description>Enhanced LPM Support is enabled</description>
4976 <description>UTMI+ PHY/ULPI-to-Internal UTMI+ Wrapper Data Width</description>
4983 <description>8 bits</description>
4988 <description>16 bits</description>
4993 <description>8/16 bits, software selectable</description>
5000 <description>Number of Device Mode Control Endpoints in Addition to</description>
5007 <description>End point 0</description>
5012 <description>End point 1</description>
5017 <description>End point 2</description>
5022 <description>End point 3</description>
5027 <description>End point 4</description>
5032 <description>End point 5</description>
5037 <description>End point 6</description>
5042 <description>End point 7</description>
5047 <description>End point 8</description>
5052 <description>End point 9</description>
5057 <description>End point 10</description>
5062 <description>End point 11</description>
5067 <description>End point 12</description>
5072 <description>End point 13</description>
5077 <description>End point 14</description>
5082 <description>End point 15</description>
5089 <description>IDDIG Filter Enable (IddgFltr)</description>
5096 <description>Iddig Filter Disabled</description>
5101 <description>Iddig Filter Enabled</description>
5108 <description>VBUS Valid Filter Enabled (VBusValidFltr)</description>
5115 <description>Vbus Valid Filter Disabled</description>
5120 <description>Vbus Valid Filter Enabled</description>
5127 <description>a_valid Filter Enabled (AValidFltr)</description>
5134 <description>No filter</description>
5139 <description>Filter</description>
5146 <description>b_valid Filter Enabled (BValidFltr)</description>
5153 <description>No Filter</description>
5158 <description>Filter</description>
5165 <description>session_end Filter Enabled (SessEndFltr)</description>
5172 <description>No filter</description>
5177 <description>Filter</description>
5184 <description>Enable Dedicated Transmit FIFO for device IN Endpoints</description>
5191 <description>Dedicated Transmit FIFO Operation not enabled</description>
5196 <description>Dedicated Transmit FIFO Operation enabled</description>
5203 … <description>Number of Device Mode IN Endpoints Including Control Endpoints (INEps)</description>
5210 <description>1 IN Endpoint</description>
5215 <description>2 IN Endpoints</description>
5220 <description>3 IN Endpoints</description>
5225 <description>4 IN Endpoints</description>
5230 <description>5 IN Endpoints</description>
5235 <description>6 IN Endpoints</description>
5240 <description>7 IN Endpoints</description>
5245 <description>8 IN Endpoints</description>
5250 <description>9 IN Endpoints</description>
5255 <description>10 IN Endpoints</description>
5260 <description>11 IN Endpoints</description>
5265 <description>12 IN Endpoints</description>
5270 <description>13 IN Endpoints</description>
5275 <description>14 IN Endpoints</description>
5280 <description>15 IN Endpoints</description>
5285 <description>16 IN Endpoints</description>
5292 <description>Scatter/Gather DMA configuration</description>
5299 <description>Non-Scatter/Gather DMA configuration</description>
5304 <description>Scatter/Gather DMA configuration</description>
5311 <description>Scatter/Gather DMA configuration</description>
5318 <description>Non Dynamic configuration</description>
5323 <description>Dynamic configuration</description>
5332 <description>LPM Config Register</description>
5340 <description>LPM-Capable (LPMCap)</description>
5346 <description>LPM capability is not enabled</description>
5351 <description>LPM capability is enabled</description>
5358 … <description>Mode: Device only. LPM response programmed by application (AppL1Res)</description>
5364 …<description>The core responds with a NYET when an error is detected in either of the LPM token pa…
5369 … <description>The core responds with an ACK only on a successful LPM transaction</description>
5376 <description>Host-Initiated Resume Duration (HIRD)</description>
5382 <description>RemoteWakeEnable (bRemoteWake)</description>
5388 <description>Remote Wakeup is disabled</description>
5393 … <description>In Host or device mode, this field takes the value of remote wake up</description>
5400 <description>Enable utmi_sleep_n (EnblSlpM)</description>
5406 …<description>utmi_sleep_n assertion from the core is not transferred to the external PHY</descript…
5411 …<description>utmi_sleep_n assertion from the core is transferred to the external PHY when utmi_l1_…
5418 <description>BESL/HIRD Threshold (HIRD_Thres)</description>
5424 <description>LPM Response (CoreL1Res)</description>
5431 <description>ERROR : No handshake response</description>
5436 <description>STALL response</description>
5441 <description>NYET response</description>
5446 <description>ACK response</description>
5453 <description>Port Sleep Status (SlpSts)</description>
5460 … <description>In Host or Device mode, this bit indicates core is not in L1</description>
5465 …description>In Host mode, this bit indicates the core transitions to Sleep state as a successful L…
5472 <description>Sleep State Resume OK (L1ResumeOK)</description>
5479 … <description>The application/core cannot start Resume from Sleep state</description>
5484 <description>The application/core can start Resume from Sleep state</description>
5491 <description>LPM Channel Index</description>
5497 <description>Channel 0</description>
5502 <description>Channel 1</description>
5507 <description>Channel 2</description>
5512 <description>Channel 3</description>
5517 <description>Channel 4</description>
5522 <description>Channel 5</description>
5527 <description>Channel 6</description>
5532 <description>Channel 7</description>
5537 <description>Channel 8</description>
5542 <description>Channel 9</description>
5547 <description>Channel 10</description>
5552 <description>Channel 11</description>
5557 <description>Channel 12</description>
5562 <description>Channel 13</description>
5567 <description>Channel 14</description>
5572 <description>Channel15</description>
5579 <description>LPM Retry Count (LPM_Retry_Cnt)</description>
5585 <description>Zero LPM retries</description>
5590 <description>One LPM retry</description>
5595 <description>Two LPM retries</description>
5600 <description>Three LPM retries</description>
5605 <description>Four LPM retries</description>
5610 <description>Five LPM retries</description>
5615 <description>Six LPM retries</description>
5620 <description>Seven LPM retries</description>
5627 <description>Send LPM Transaction (SndLPM)</description>
5633 …<description>In host-only mode: Received the response from the device for the LPM transaction</des…
5638 …<description>In host-only mode: Sending LPM transaction containing EXT and LPM tokens</description>
5645 <description>LPM Retry Count Status (LPM_RetryCnt_Sts)</description>
5652 <description>Zero LPM retries remaining</description>
5657 <description>One LPM retry remaining</description>
5662 <description>Two LPM retries remaining</description>
5667 <description>Three LPM retries remaining</description>
5672 <description>Four LPM retries remaining</description>
5677 <description>Five LPM retries remaining</description>
5682 <description>Six LPM retries remaining</description>
5687 <description>Seven LPM retries remaining</description>
5694 <description>LPM Enable BESL (LPM_EnBESL)</description>
5700 <description>BESL is disabled</description>
5705 <description>BESL is enabled as defined in LPM Errata</description>
5712 <description>LPM Restore Sleep Status (LPM_RestoreSlpSts)</description>
5718 …<description>Puts the core in Shallow Sleep mode based on the BESL value from the Host</descriptio…
5723 … <description>Puts the core in Deep Sleep mode based on the BESL value from the Host</description>
5732 <description>Global Power Down Register</description>
5740 <description>PMU Interrupt Select (PMUIntSel)</description>
5746 <description>Internal DWC_otg_core interrupt is selected</description>
5751 <description>External DWC_otg_pmu interrupt is selected</description>
5758 <description>PMU Active (PMUActv)</description>
5764 <description>Disable PMU module</description>
5769 <description>Enable PMU module</description>
5776 <description>Restore</description>
5782 <description>The controller in normal mode of operation</description>
5787 <description>The controller in Restore mode</description>
5794 <description>Power Down Clamp (PwrDnClmp)</description>
5800 <description>Disable PMU power clamp</description>
5805 <description>Enable PMU power clamp</description>
5812 <description>Power Down ResetN (PwrDnRst_n)</description>
5818 <description>Reset the controller</description>
5823 <description>The controller is in normal operation</description>
5830 <description>Power Down Switch (PwrDnSwtch)</description>
5836 <description>The controller is in ON state</description>
5841 <description>The controller is in OFF state</description>
5848 <description>DisableVBUS</description>
5854 …<description>Host mode:HPRT0.PrtPwr was not programmed to 0, and in Device mode:Session Valid</des…
5859 …<description>Host mode:HPRT0.PrtPwr was programmed to 0 and in Device mode:Session End</descriptio…
5866 <description>Line State Change (LnStsChng)</description>
5872 <description>No LineState change on USB</description>
5877 <description>LineState change on USB</description>
5884 <description>LineStageChangeMsk</description>
5890 <description>No LineStateChange Interrupt Mask</description>
5895 <description>Mask for LineStateChange Interrupt</description>
5902 <description>ResetDetected</description>
5908 <description>Reset not detected</description>
5913 <description>Reset detected</description>
5920 <description>ResetDetMsk</description>
5926 <description>No ResetDetect Interrupt Mask</description>
5931 <description>Mask for ResetDetect Interrupt</description>
5938 <description>DisconnectDetect</description>
5944 <description>Disconnect not detected</description>
5949 <description>Disconnect detected</description>
5956 <description>DisconnectDetectMsk</description>
5962 <description>No DisconnectDetect Interrupt Mask</description>
5967 <description>Mask for DisconnectDetect Interrupt</description>
5974 <description>ConnectDet</description>
5980 <description>Connect not detected</description>
5985 <description>Connect detected</description>
5992 <description>ConnDetMsk</description>
5998 <description>No ConnectDet Interrupt Mask</description>
6003 <description>Mask for ConnectDet Interrupt</description>
6010 <description>SRPDetect</description>
6016 <description>SRP not detected</description>
6021 <description>SRP detected</description>
6028 <description>SRPDetectMsk</description>
6034 <description>No SRPDetect Interrupt Mask</description>
6039 <description>Mask for SRPDetect Interrupt</description>
6046 <description>Status Change Interrupt (StsChngInt)</description>
6052 <description>No Status change</description>
6057 <description>Status change detected</description>
6064 <description>StsChngIntMsk</description>
6070 <description>No Status Change Interrupt Mask</description>
6075 <description>Mask for Status Change Interrupt</description>
6082 <description>LineState</description>
6089 <description>Linestate on USB: DM = 0, DP = 0</description>
6094 <description>Linestate on USB: DM = 0, DP = 1</description>
6099 <description>Linestate on USB: DM = 1, DP = 0</description>
6104 <description>Linestate on USB: Not-defined</description>
6111 …description>This bit indicates the status of the signal IDDIG. The application must read this bit …
6118 <description>Host Mode</description>
6123 <description>Device Mode</description>
6130 <description>B Session Valid (BSessVld)</description>
6137 <description>B_Valid is 0</description>
6142 <description>B_Valid is 1</description>
6149 <description>MultValIdBC</description>
6156 <description>OTG device as B-device</description>
6161 <description>OTG device as B-device, can connect</description>
6166 <description>OTG device as B-device, cannot connect</description>
6171 <description>OTG device as A-device</description>
6176 <description>ID_OTG pin is grounded</description>
6181 <description>OTG device as A-device, RID_A=1 and RID_GND=1</description>
6186 <description>ID pull down when ID_OTG is floating</description>
6191 … <description>OTG device as B-device, can connect, RID_C=1 and RID_FLOAT=1</description>
6196 … <description>OTG device as B-device, cannot connect, RID_B=1 and RID_FLOAT=1</description>
6201 <description>OTG device as A-device</description>
6210 <description>Global DFIFO Configuration Register</description>
6218 <description>GDFIFOCfg</description>
6224 … <description>This field provides the start address of the EP info controller.</description>
6232 <description>Interrupt Mask Register 2</description>
6247 <description>Interrupt Register 2</description>
6262 <description>Host Periodic Transmit FIFO Size Register</description>
6270 <description>Host Periodic TxFIFO Start Address (PTxFStAddr)</description>
6276 <description>Host Periodic TxFIFO Depth (PTxFSize)</description>
6286 … <description>Description collection: Device IN Endpoint Transmit FIFO Size Register</description>
6294 … <description>IN Endpoint FIFOn Transmit RAM Start Address (INEPnTxFStAddr)</description>
6300 <description>IN Endpoint TxFIFO Depth (INEPnTxFDep)</description>
6308 <description>Host Configuration Register</description>
6316 <description>FS/LS PHY Clock Select (FSLSPclkSel)</description>
6322 <description>PHY clock is running at 30/60 MHz</description>
6327 <description>PHY clock is running at 48 MHz</description>
6332 <description>PHY clock is running at 6 MHz</description>
6339 <description>FS- and LS-Only Support (FSLSSupp)</description>
6345 … <description>HS/FS/LS, based on the maximum speed supported by the connected device</description>
6350 <description>FS/LS-only, even if the connected device can support HS</description>
6357 <description>Enable 32 KHz Suspend mode (Ena32KHzS)</description>
6363 <description>32 KHz Suspend mode disabled</description>
6368 <description>32 KHz Suspend mode enabled</description>
6375 <description>Resume Validation Period (ResValid)</description>
6381 <description>Mode Change Ready Timer Enable (ModeChTimEn)</description>
6387 …description>The Host core waits for either 200 PHY clock cycles or a linestate of SE0 at the end o…
6392 …<description>The Host core waits only for a linestate of SE0 at the end of resume to change the op…
6401 <description>Host Frame Interval Register</description>
6409 <description>Frame Interval (FrInt)</description>
6415 <description>Reload Control (HFIRRldCtrl)</description>
6421 <description>The HFIR cannot be reloaded dynamically</description>
6426 <description>The HFIR can be dynamically reloaded during runtime</description>
6435 <description>Host Frame Number/Frame Time Remaining Register</description>
6443 <description>Frame Number (FrNum)</description>
6450 <description>No SOF is transmitted</description>
6455 <description>SOF is transmitted</description>
6462 <description>Frame Time Remaining (FrRem)</description>
6471 <description>Host All Channels Interrupt Register</description>
6485 <description>Not active</description>
6490 <description>Host Channel Interrupt</description>
6499 <description>Host All Channels Interrupt Mask Register</description>
6507 <description>Channel Interrupt Mask (HAINTMsk)</description>
6513 <description>Unmask Channel interrupt</description>
6518 <description>Mask Channel interrupt</description>
6527 <description>Host Port Control and Status Register</description>
6535 <description>Port Connect Status (PrtConnSts)</description>
6542 <description>No device is attached to the port</description>
6547 <description>A device is attached to the port</description>
6554 <description>Port Connect Detected (PrtConnDet)</description>
6560 <description>No device connection detected</description>
6565 <description>Device connection detected</description>
6572 <description>Port Enable (PrtEna)</description>
6578 <description>Port disabled</description>
6583 <description>Port enabled</description>
6590 <description>Port Enable/Disable Change (PrtEnChng)</description>
6596 <description>Port Enable bit 2 has not changed</description>
6601 <description>Port Enable bit 2 changed</description>
6608 <description>Port Overcurrent Active (PrtOvrCurrAct)</description>
6615 <description>No overcurrent condition</description>
6620 <description>Overcurrent condition</description>
6627 <description>Port Overcurrent Change (PrtOvrCurrChng)</description>
6633 <description>Status of port overcurrent status is not changed</description>
6638 <description>Status of port overcurrent changed</description>
6645 <description>Port Resume (PrtRes)</description>
6651 <description>No resume driven</description>
6656 <description>Resume driven</description>
6663 <description>Port Suspend (PrtSusp)</description>
6669 <description>Port not in Suspend mode</description>
6674 <description>Port in Suspend mode</description>
6681 <description>Port Reset (PrtRst)</description>
6687 <description>Port not in reset</description>
6692 <description>Port in reset</description>
6699 <description>Port Line Status (PrtLnSts)</description>
6706 <description>Logic level of D+</description>
6711 <description>Logic level of D-</description>
6718 <description>Port Power (PrtPwr)</description>
6724 <description>Power off</description>
6729 <description>Power on</description>
6736 <description>Port Test Control (PrtTstCtl)</description>
6742 <description>Test mode disabled</description>
6747 <description>Test_J mode</description>
6752 <description>Test_K mode</description>
6757 <description>Test_SE0_NAK mode</description>
6762 <description>Test_Packet mode</description>
6767 <description>Test_force_Enable</description>
6774 <description>Port Speed (PrtSpd)</description>
6781 <description>High speed</description>
6786 <description>Full speed</description>
6791 <description>Low speed</description>
6802 <description>Unspecified</description>
6808 <description>Description cluster: Host Channel Characteristics Register</description>
6816 <description>Maximum Packet Size (MPS)</description>
6822 <description>Endpoint Number (EPNum)</description>
6828 <description>End point 0</description>
6833 <description>End point 1</description>
6838 <description>End point 2</description>
6843 <description>End point 3</description>
6848 <description>End point 4</description>
6853 <description>End point 5</description>
6858 <description>End point 6</description>
6863 <description>End point 7</description>
6868 <description>End point 8</description>
6873 <description>End point 9</description>
6878 <description>End point 10</description>
6883 <description>End point 11</description>
6888 <description>End point 12</description>
6893 <description>End point 13</description>
6898 <description>End point 14</description>
6903 <description>End point 15</description>
6910 <description>Endpoint Direction (EPDir)</description>
6916 <description>OUT Direction</description>
6921 <description>IN Direction</description>
6928 <description>Low-Speed Device (LSpdDev)</description>
6934 <description>Not Communicating with low speed device</description>
6939 <description>Communicating with low speed device</description>
6946 <description>Endpoint Type (EPType)</description>
6952 <description>Control</description>
6957 <description>Isochronous</description>
6962 <description>Bulk</description>
6967 <description>Interrupt</description>
6974 <description>Multi Count (MC) / Error Count (EC)</description>
6980 <description>1 transaction</description>
6985 … <description>2 transactions to be issued for this endpoint per microframe</description>
6990 … <description>3 transactions to be issued for this endpoint per microframe</description>
6997 <description>Device Address (DevAddr)</description>
7003 <description>Odd Frame (OddFrm)</description>
7009 <description>Even Frame Transfer</description>
7014 <description>Odd Frame Transfer</description>
7021 <description>Channel Disable (ChDis)</description>
7027 <description>Transmit/Recieve normal</description>
7032 <description>Stop transmitting/receiving data on channel</description>
7039 <description>Channel Enable (ChEna)</description>
7045 …description>If Scatter/Gather mode is enabled, indicates that the descriptor structure is not yet …
7050 …description>If Scatter/Gather mode is enabled, indicates that the descriptor structure and data bu…
7059 <description>Description cluster: Host Channel Interrupt Register</description>
7067 <description>Transfer Completed (XferCompl)</description>
7073 <description>Transfer in progress or No Active Transfer</description>
7078 <description>Transfer completed normally without any errors</description>
7085 <description>Channel Halted (ChHltd)</description>
7091 <description>Channel not halted</description>
7096 <description>Channel Halted</description>
7103 <description>AHB Error (AHBErr)</description>
7109 <description>No AHB error</description>
7114 <description>AHB error during AHB read/write</description>
7121 <description>STALL Response Received Interrupt (STALL)</description>
7127 <description>No Stall Response Received Interrupt</description>
7132 <description>Stall Response Received Interrupt</description>
7139 <description>NAK Response Received Interrupt (NAK)</description>
7145 <description>No NAK Response Received Interrupt</description>
7150 <description>NAK Response Received Interrupt</description>
7157 <description>ACK Response Received/Transmitted Interrupt (ACK)</description>
7163 <description>No ACK Response Received or Transmitted Interrupt</description>
7168 <description>ACK Response Received or Transmitted Interrup</description>
7175 <description>NYET Response Received Interrupt (NYET)</description>
7181 <description>No NYET Response Received Interrupt</description>
7186 <description>NYET Response Received Interrupt</description>
7193 <description>Transaction Error (XactErr)</description>
7199 <description>No Transaction Error</description>
7204 <description>Transaction Error</description>
7211 <description>Babble Error (BblErr)</description>
7217 <description>No Babble Error</description>
7222 <description>Babble Error</description>
7229 <description>Frame Overrun (FrmOvrun).</description>
7235 <description>No Frame Overrun</description>
7240 <description>Frame Overrun</description>
7252 <description>No Data Toggle Error</description>
7257 <description>Data Toggle Error</description>
7266 <description>Description cluster: Host Channel Interrupt Mask Register</description>
7279 <description>Transfer Completed Mask</description>
7284 <description>No Transfer Completed Mask</description>
7296 <description>Channel Halted Mask</description>
7301 <description>No Channel Halted Mask</description>
7313 <description>AHB Error Mask</description>
7318 <description>No AHB Error Mask</description>
7330 <description>Mask STALL Response Received Interrupt</description>
7335 <description>No STALL Response Received Interrupt Mask</description>
7347 <description>Mask NAK Response Received Interrupt</description>
7352 <description>No NAK Response Received Interrupt Mask</description>
7364 <description>Mask ACK Response Received/Transmitted Interrupt</description>
7369 <description>No ACK Response Received/Transmitted Interrupt Mask</description>
7381 <description>Mask NYET Response Received Interrupt</description>
7386 <description>No NYET Response Received Interrupt Mask</description>
7398 <description>Mask Transaction Error</description>
7403 <description>No Transaction Error Mask</description>
7415 <description>Mask Babble Error</description>
7420 <description>No Babble Error Mask</description>
7432 <description>Mask Overrun Mask</description>
7437 <description>No Frame Overrun Mask</description>
7449 <description>Mask Data Toggle Error</description>
7454 <description>No Data Toggle Error Mask</description>
7463 <description>Description cluster: Host Channel Transfer Size Register</description>
7471 <description>Non-Scatter/Gather DMA Mode:</description>
7477 <description>Non-Scatter/Gather DMA Mode:</description>
7483 <description>PID (Pid)</description>
7489 <description>DATA0</description>
7494 <description>DATA2</description>
7499 <description>DATA1</description>
7504 <description>MDATA (non-control)/SETUP (control)</description>
7511 <description>Do Ping (DoPng)</description>
7517 <description>No ping protocol</description>
7522 <description>Ping protocol</description>
7531 <description>Description cluster: Host Channel DMA Address Register</description>
7539 <description>In Buffer DMA Mode:</description>
7548 <description>Device Configuration Register</description>
7556 <description>Device Speed (DevSpd)</description>
7562 <description>High speed USB 2.0 PHY clock is 30 MHz or 60 MHz</description>
7567 <description>Full speed USB 2.0 PHY clock is 30 MHz or 60 MHz</description>
7572 <description>Low speed USB 1.1 transceiver clock is 6 MHz</description>
7577 <description>Full speed USB 1.1 transceiver clock is 48 MHz</description>
7584 <description>Non-Zero-Length Status OUT Handshake (NZStsOUTHShk)</description>
7590 …description>Send the received OUT packet to the application (zero-length or non-zero length) and s…
7595 …<description>Send a STALL handshake on a nonzero-length status OUT transaction and do not send the…
7602 <description>Enable 32 KHz Suspend mode (Ena32KHzSusp)</description>
7608 <description>USB 1.1 Full-Speed Serial Transceiver not selected</description>
7613 … <description>USB 1.1 Full-Speed Serial Transceiver Interface selected</description>
7620 <description>Device Address (DevAddr)</description>
7626 <description>Periodic Frame Interval (PerFrInt)</description>
7632 <description>80 percent of the (micro)Frame interval</description>
7637 <description>85 percent of the (micro)Frame interval</description>
7642 <description>90 percent of the (micro)Frame interval</description>
7647 <description>95 percent of the (micro)Frame interval</description>
7654 <description>XCVRDLY</description>
7660 … <description>No delay between xcvr_sel and txvalid during Device chirp</description>
7665 … <description>Enable delay between xcvr_sel and txvalid during Device chirp</description>
7672 <description>Erratic Error Interrupt Mask</description>
7678 <description>Early suspend interrupt is generated on erratic error</description>
7683 <description>Mask early suspend interrupt on erratic error</description>
7690 <description>Worst-Case Inter-Packet Gap ISOC OUT Support (ipgisocSupt)</description>
7696 … <description>Worst-Case Inter-Packet Gap ISOC OUT Support is disabled</description>
7701 <description>Worst-Case Inter-Packet Gap ISOC OUT Support is enabled</description>
7708 <description>Periodic Scheduling Interval (PerSchIntvl)</description>
7714 <description>25 percent of (micro)Frame</description>
7719 <description>50 percent of (micro)Frame</description>
7724 <description>75 percent of (micro)Frame</description>
7731 <description>Resume Validation Period (ResValid)</description>
7739 <description>Device Control Register</description>
7747 <description>Remote Wakeup Signaling (RmtWkUpSig)</description>
7753 <description>Core does not send Remote Wakeup Signaling</description>
7758 <description>Core sends Remote Wakeup Signaling</description>
7765 <description>Soft Disconnect (SftDiscon)</description>
7771 …<description>The core drives the phy_opmode_o signal on the UTMI+ to 2'b00, which generates a devi…
7776 …<description>The core drives the phy_opmode_o signal on the UTMI+ to 2'b01, which generates a devi…
7783 <description>Global Non-periodic IN NAK Status (GNPINNakSts)</description>
7790 …<description>A handshake is sent out based on the data availability in the transmit FIFO</descript…
7795 …<description>A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the dat…
7802 <description>Global OUT NAK Status (GOUTNakSts)</description>
7809 …<description>A handshake is sent based on the FIFO Status and the NAK and STALL bit settings.</des…
7814 …description>No data is written to the RxFIFO, irrespective of space availability. Sends a NAK hand…
7821 <description>Test Control (TstCtl)</description>
7827 <description>Test mode disabled</description>
7832 <description>Test_J mode</description>
7837 <description>Test_K mode</description>
7842 <description>Test_SE0_NAK mode</description>
7847 <description>Test_Packet mode</description>
7852 <description>Test_force_Enable</description>
7859 <description>Set Global Non-periodic IN NAK (SGNPInNak)</description>
7866 <description>Disable Global Non-periodic IN NAK</description>
7871 <description>Set Global Non-periodic IN NAK</description>
7878 <description>Clear Global Non-periodic IN NAK (CGNPInNak)</description>
7885 <description>Disable Global Non-periodic IN NAK</description>
7890 <description>Clear Global Non-periodic IN NAK</description>
7897 <description>Set Global OUT NAK (SGOUTNak)</description>
7904 <description>Disable Global OUT NAK</description>
7909 <description>Set Global OUT NAK</description>
7916 <description>Clear Global OUT NAK (CGOUTNak)</description>
7923 <description>Disable Clear Global OUT NAK</description>
7928 <description>Clear Global OUT NAK</description>
7935 <description>Power-On Programming Done (PWROnPrgDone)</description>
7941 <description>Power-On Programming not done</description>
7946 <description>Power-On Programming Done</description>
7953 … <description>Ignore Frame Number Feature for Isochronous Endpoints (IgnrFrmNum)</description>
7959 …description>Scatter/Gather DMA Mode: The core transmits the packets only in the frame number in wh…
7964 …description>Scatter/Gather DMA Mode: The core ignores the frame number, sending packets immediatel…
7971 <description>NAK on Babble Error (NakOnBble)</description>
7977 <description>Disable NAK on Babble Error</description>
7982 <description>NAK on Babble Error</description>
7989 <description>DeepSleepBESLReject</description>
7995 <description>Deep Sleep BESL Reject feature is disabled</description>
8000 <description>Deep Sleep BESL Reject feature is enabled</description>
8007 … <description>Service Interval based scheduling for Isochronous IN Endpoints</description>
8013 … <description>The controller behavior depends on DCTL.IgnrFrmNum field.</description>
8018 …<description>Scatter/Gather DMA Mode: The controller can transmit the packets in any frame of the …
8025 … <description>Disable the correction to OpMode/XcvrSel/TermSel on UTMI Interface.</description>
8031 …<description>Opmode, XcvrSel, TermSel are changed by the Device Controller after TxValid goes LOW …
8036 …<description>Opmode, XcvrSel, TermSel are changed by the Device Controller immediately on soft dis…
8043 <description>Disable the correction of TermSel on UTMI Interface.</description>
8049 …<description>Valid Combination of XcvrSel and TermSel is driven by the Device Controller.</descrip…
8054 …<description>Invalid Combination of XcvrSel and TermSel is driven by the Device Controller.</descr…
8063 <description>Device Status Register</description>
8071 <description>Suspend Status (SuspSts)</description>
8078 <description>No suspend state</description>
8083 <description>Suspend state</description>
8090 <description>Enumerated Speed (EnumSpd)</description>
8097 <description>High speed (PHY clock is running at 30 or 60 MHz)</description>
8102 <description>Full speed (PHY clock is running at 30 or 60 MHz)</description>
8107 <description>Low speed (PHY clock is running at 6 MHz)</description>
8112 <description>Full speed (PHY clock is running at 48 MHz)</description>
8119 <description>Erratic Error (ErrticErr)</description>
8126 <description>No Erratic Error</description>
8131 <description>Erratic Error</description>
8138 <description>Frame or Microframe Number of the Received SOF (SOFFN)</description>
8145 <description>Device Line Status (DevLnSts)</description>
8154 <description>Device IN Endpoint Common Interrupt Mask Register</description>
8162 <description>Transfer Completed Interrupt Mask (XferComplMsk)</description>
8168 <description>Mask Transfer Completed Interrupt</description>
8173 <description>No Transfer Completed Interrupt Mask</description>
8180 <description>Endpoint Disabled Interrupt Mask (EPDisbldMsk)</description>
8186 <description>Mask Endpoint Disabled Interrupt</description>
8191 <description>No Endpoint Disabled Interrupt Mask</description>
8198 <description>AHB Error Mask (AHBErrMsk)</description>
8204 <description>Mask AHB Error Interrupt</description>
8209 <description>No AHB Error Interrupt Mask</description>
8216 … <description>Timeout Condition Mask (TimeOUTMsk) (Non-isochronous endpoints)</description>
8222 <description>Mask Timeout Condition Interrupt</description>
8227 <description>No Timeout Condition Interrupt Mask</description>
8234 <description>IN Token Received When TxFIFO Empty Mask (INTknTXFEmpMsk)</description>
8240 <description>Mask IN Token Received When TxFIFO Empty Interrupt</description>
8245 <description>No IN Token Received When TxFIFO Empty Interrupt</description>
8252 <description>IN Token received with EP Mismatch Mask (INTknEPMisMsk)</description>
8258 <description>Mask IN Token received with EP Mismatch Interrupt</description>
8263 <description>No Mask IN Token received with EP Mismatch Interrupt</description>
8270 <description>IN Endpoint NAK Effective Mask (INEPNakEffMsk)</description>
8276 <description>Mask IN Endpoint NAK Effective Interrupt</description>
8281 <description>No IN Endpoint NAK Effective Interrupt Mask</description>
8288 <description>Fifo Underrun Mask (TxfifoUndrnMsk)</description>
8294 <description>Mask Fifo Underrun Interrupt</description>
8299 <description>No Fifo Underrun Interrupt Mask</description>
8306 <description>NAK interrupt Mask (NAKMsk)</description>
8312 <description>Mask NAK Interrupt</description>
8317 <description>No Mask NAK Interrupt</description>
8326 <description>Device OUT Endpoint Common Interrupt Mask Register</description>
8334 <description>Transfer Completed Interrupt Mask (XferComplMsk)</description>
8340 <description>Mask Transfer Completed Interrupt</description>
8345 <description>No Transfer Completed Interrupt Mask</description>
8352 <description>Endpoint Disabled Interrupt Mask (EPDisbldMsk)</description>
8358 <description>Mask Endpoint Disabled Interrupt</description>
8363 <description>No Endpoint Disabled Interrupt Mask</description>
8370 <description>AHB Error (AHBErrMsk)</description>
8376 <description>Mask AHB Error Interrupt</description>
8381 <description>No AHB Error Interrupt Mask</description>
8388 <description>SETUP Phase Done Mask (SetUPMsk)</description>
8394 <description>Mask SETUP Phase Done Interrupt</description>
8399 <description>No SETUP Phase Done Interrupt Mask</description>
8406 … <description>OUT Token Received when Endpoint Disabled Mask (OUTTknEPdisMsk)</description>
8412 … <description>Mask OUT Token Received when Endpoint Disabled Interrupt</description>
8417 … <description>No OUT Token Received when Endpoint Disabled Interrupt Mask</description>
8424 <description>Status Phase Received Mask (StsPhseRcvdMsk)</description>
8430 <description>Status Phase Received Mask</description>
8435 <description>No Status Phase Received Mask</description>
8442 <description>Back-to-Back SETUP Packets Received Mask (Back2BackSETup)</description>
8448 <description>Mask Back-to-Back SETUP Packets Received Interrupt</description>
8453 <description>No Back-to-Back SETUP Packets Received Interrupt Mask</description>
8460 <description>OUT Packet Error Mask (OutPktErrMsk)</description>
8466 <description>Mask OUT Packet Error Interrupt</description>
8471 <description>No OUT Packet Error Interrupt Mask</description>
8478 <description>Babble Error interrupt Mask (BbleErrMsk)</description>
8484 <description>Mask Babble Error Interrupt</description>
8489 <description>No Babble Error Interrupt Mask</description>
8496 <description>NAK interrupt Mask (NAKMsk)</description>
8502 <description>Mask NAK Interrupt</description>
8507 <description>No NAK Interrupt Mask</description>
8514 <description>NYET interrupt Mask (NYETMsk)</description>
8520 <description>Mask NYET Interrupt</description>
8525 <description>No NYET Interrupt Mask</description>
8534 <description>Device All Endpoints Interrupt Register</description>
8542 <description>IN Endpoint 0 Interrupt Bit</description>
8549 <description>No Interrupt</description>
8554 <description>Interrupt is active for IN EP0</description>
8561 <description>IN Endpoint 1 Interrupt Bit</description>
8568 <description>No Interrupt</description>
8573 <description>Interrupt is active for the IN EP</description>
8580 <description>IN Endpoint 2 Interrupt Bit</description>
8587 <description>No Interrupt</description>
8592 <description>Interrupt is active for the IN EP</description>
8599 <description>IN Endpoint 3 Interrupt Bit</description>
8606 <description>No Interrupt</description>
8611 <description>Interrupt is active for the IN EP</description>
8618 <description>IN Endpoint 4 Interrupt Bit</description>
8625 <description>No Interrupt</description>
8630 <description>Interrupt is active for the IN EP</description>
8637 <description>IN Endpoint 5 Interrupt Bit</description>
8644 <description>No Interrupt</description>
8649 <description>Interrupt is active for the IN EP</description>
8656 <description>IN Endpoint 6 Interrupt Bit</description>
8663 <description>No Interrupt</description>
8668 <description>Interrupt is active for the IN EP</description>
8675 <description>IN Endpoint 7 Interrupt Bit</description>
8682 <description>No Interrupt</description>
8687 <description>Interrupt is active for the IN EP</description>
8694 <description>IN Endpoint 8 Interrupt Bit</description>
8701 <description>No Interrupt</description>
8706 <description>Interrupt is active for the IN EP</description>
8713 <description>IN Endpoint 9 Interrupt Bit</description>
8720 <description>No Interrupt</description>
8725 <description>Interrupt is active for the IN EP</description>
8732 <description>IN Endpoint 10 Interrupt Bit</description>
8739 <description>No Interrupt</description>
8744 <description>Interrupt is active for the IN EP</description>
8751 <description>IN Endpoint 11 Interrupt Bit</description>
8758 <description>No Interrupt</description>
8763 <description>Interrupt is active for the IN EP</description>
8770 <description>OUT Endpoint 0 Interrupt Bit</description>
8777 <description>No Interrupt</description>
8782 <description>Interrupt is active for OUT EP0</description>
8789 <description>OUT Endpoint 1 Interrupt Bit</description>
8796 <description>No Interrupt</description>
8801 <description>Interrupt is active for the OUT EP</description>
8808 <description>OUT Endpoint 2 Interrupt Bit</description>
8815 <description>No Interrupt</description>
8820 <description>Interrupt is active for the OUT EP</description>
8827 <description>OUT Endpoint 3 Interrupt Bit</description>
8834 <description>No Interrupt</description>
8839 <description>Interrupt is active for the OUT EP</description>
8846 <description>OUT Endpoint 4 Interrupt Bit</description>
8853 <description>No Interrupt</description>
8858 <description>Interrupt is active for the OUT EP</description>
8865 <description>OUT Endpoint 5 Interrupt Bit</description>
8872 <description>No Interrupt</description>
8877 <description>Interrupt is active for the OUT EP</description>
8884 <description>OUT Endpoint 12 Interrupt Bit</description>
8891 <description>No Interrupt</description>
8896 <description>Interrupt is active for the OUT EP</description>
8903 <description>OUT Endpoint 13 Interrupt Bit</description>
8910 <description>No Interrupt</description>
8915 <description>Interrupt is active for the OUT EP</description>
8922 <description>OUT Endpoint 14 Interrupt Bit</description>
8929 <description>No Interrupt</description>
8934 <description>Interrupt is active for the OUT EP</description>
8941 <description>OUT Endpoint 15 Interrupt Bit</description>
8948 <description>No Interrupt</description>
8953 <description>Interrupt is active for the OUT EP</description>
8962 <description>Device All Endpoints Interrupt Mask Register</description>
8970 <description>IN Endpoint 0 Interrupt mask Bit</description>
8976 <description>Mask IN Endpoint 0 Interrupt</description>
8981 <description>No Interrupt mask</description>
8988 <description>IN Endpoint 1 Interrupt mask Bit</description>
8994 <description>Mask IN Endpoint Interrupt</description>
8999 <description>No Interrupt mask</description>
9006 <description>IN Endpoint 2 Interrupt mask Bit</description>
9012 <description>Mask IN Endpoint Interrupt</description>
9017 <description>No Interrupt mask</description>
9024 <description>IN Endpoint 3 Interrupt mask Bit</description>
9030 <description>Mask IN Endpoint Interrupt</description>
9035 <description>No Interrupt mask</description>
9042 <description>IN Endpoint 4 Interrupt mask Bit</description>
9048 <description>Mask IN Endpoint Interrupt</description>
9053 <description>No Interrupt mask</description>
9060 <description>IN Endpoint 5 Interrupt mask Bit</description>
9066 <description>Mask IN Endpoint Interrupt</description>
9071 <description>No Interrupt mask</description>
9078 <description>IN Endpoint 6 Interrupt mask Bit</description>
9084 <description>Mask IN Endpoint Interrupt</description>
9089 <description>No Interrupt mask</description>
9096 <description>IN Endpoint 7 Interrupt mask Bit</description>
9102 <description>Mask IN Endpoint Interrupt</description>
9107 <description>No Interrupt mask</description>
9114 <description>IN Endpoint 8 Interrupt mask Bit</description>
9120 <description>Mask IN Endpoint Interrupt</description>
9125 <description>No Interrupt mask</description>
9132 <description>IN Endpoint 9 Interrupt mask Bit</description>
9138 <description>Mask IN Endpoint Interrupt</description>
9143 <description>No Interrupt mask</description>
9150 <description>IN Endpoint 10 Interrupt mask Bit</description>
9156 <description>Mask IN Endpoint Interrupt</description>
9161 <description>No Interrupt mask</description>
9168 <description>IN Endpoint 11 Interrupt mask Bit</description>
9174 <description>Mask IN Endpoint Interrupt</description>
9179 <description>No Interrupt mask</description>
9186 <description>OUT Endpoint 0 Interrupt mask Bit</description>
9192 <description>Mask OUT Endpoint 0 Interrupt</description>
9197 <description>No Interrupt mask</description>
9204 <description>OUT Endpoint 1 Interrupt mask Bit</description>
9210 <description>Mask OUT Endpoint Interrupt</description>
9215 <description>No Interrupt mask</description>
9222 <description>OUT Endpoint 2 Interrupt mask Bit</description>
9228 <description>Mask OUT Endpoint Interrupt</description>
9233 <description>No Interrupt mask</description>
9240 <description>OUT Endpoint 3 Interrupt mask Bit</description>
9246 <description>Mask OUT Endpoint Interrupt</description>
9251 <description>No Interrupt mask</description>
9258 <description>OUT Endpoint 4 Interrupt mask Bit</description>
9264 <description>Mask OUT Endpoint Interrupt</description>
9269 <description>No Interrupt mask</description>
9276 <description>OUT Endpoint 5 Interrupt mask Bit</description>
9282 <description>Mask OUT Endpoint Interrupt</description>
9287 <description>No Interrupt mask</description>
9294 <description>OUT Endpoint 12 Interrupt mask Bit</description>
9300 <description>Mask OUT Endpoint Interrupt</description>
9305 <description>No Interrupt mask</description>
9312 <description>OUT Endpoint 13 Interrupt mask Bit</description>
9318 <description>Mask OUT Endpoint Interrupt</description>
9323 <description>No Interrupt mask</description>
9330 <description>OUT Endpoint 14 Interrupt mask Bit</description>
9336 <description>Mask OUT Endpoint Interrupt</description>
9341 <description>No Interrupt mask</description>
9348 <description>OUT Endpoint 15 Interrupt mask Bit</description>
9354 <description>Mask OUT Endpoint Interrupt</description>
9359 <description>No Interrupt mask</description>
9368 <description>Device VBUS Discharge Time Register</description>
9376 <description>Device VBUS Discharge Time (DVBUSDis)</description>
9384 <description>Device VBUS Pulsing Time Register</description>
9392 <description>Device VBUS Pulsing Time (DVBUSPulse)</description>
9400 <description>Device Threshold Control Register</description>
9408 <description>Non-ISO IN Endpoints Threshold Enable. (NonISOThrEn)</description>
9414 <description>No thresholding</description>
9419 <description>Enable thresholding for non-isochronous IN endpoints</description>
9431 <description>No thresholding</description>
9436 <description>Enables thresholding for isochronous IN endpoints</description>
9443 <description>Transmit Threshold Length (TxThrLen)</description>
9449 <description>AHB Threshold Ratio (AHBThrRatio)</description>
9455 <description>AHB threshold = MAC threshold</description>
9460 <description>AHB threshold = MAC threshold /2</description>
9465 <description>AHB threshold = MAC threshold /4</description>
9470 <description>AHB threshold = MAC threshold /8</description>
9477 <description>Receive Threshold Enable (RxThrEn)</description>
9483 <description>Disable thresholding</description>
9488 <description>Enable thresholding in the receive direction</description>
9495 <description>Receive Threshold Length (RxThrLen)</description>
9501 <description>Arbiter Parking Enable (ArbPrkEn)</description>
9507 <description>Disable DMA arbiter parking</description>
9512 <description>Enable DMA arbiter parking for IN endpoints</description>
9521 <description>Device IN Endpoint FIFO Empty Interrupt Mask Register</description>
9529 <description>IN EP Tx FIFO Empty Interrupt Mask Bits (InEpTxfEmpMsk)</description>
9535 <description>Mask IN EP0 Tx FIFO Empty Interrupt</description>
9540 <description>Mask IN EP1 Tx FIFO Empty Interrupt</description>
9545 <description>Mask IN EP2 Tx FIFO Empty Interrupt</description>
9550 <description>Mask IN EP3 Tx FIFO Empty Interrupt</description>
9555 <description>Mask IN EP4 Tx FIFO Empty Interrupt</description>
9560 <description>Mask IN EP5 Tx FIFO Empty Interrupt</description>
9565 <description>Mask IN EP6 Tx FIFO Empty Interrupt</description>
9570 <description>Mask IN EP7 Tx FIFO Empty Interrupt</description>
9575 <description>Mask IN EP8 Tx FIFO Empty Interrupt</description>
9580 <description>Mask IN EP9 Tx FIFO Empty Interrupt</description>
9585 <description>Mask IN EP10 Tx FIFO Empty Interrupt</description>
9590 <description>Mask IN EP11 Tx FIFO Empty Interrupt</description>
9595 <description>Mask IN EP12 Tx FIFO Empty Interrupt</description>
9600 <description>Mask IN EP13 Tx FIFO Empty Interrupt</description>
9605 <description>Mask IN EP14 Tx FIFO Empty Interrupt</description>
9610 <description>Mask IN EP15 Tx FIFO Empty Interrupt</description>
9619 <description>Device Control IN Endpoint 0 Control Register</description>
9627 <description>Maximum Packet Size (MPS)</description>
9633 <description>64 bytes</description>
9638 <description>32 bytes</description>
9643 <description>16 bytes</description>
9648 <description>8 bytes</description>
9655 <description>USB Active Endpoint (USBActEP)</description>
9662 <description>Control endpoint is always active</description>
9669 <description>NAK Status (NAKSts)</description>
9676 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
9681 … <description>The core is transmitting NAK handshakes on this endpoint</description>
9688 <description>Endpoint Type (EPType)</description>
9695 <description>Endpoint Control 0</description>
9702 <description>STALL Handshake (Stall)</description>
9708 <description>No Stall</description>
9713 <description>Stall Handshake</description>
9720 <description>TxFIFO Number (TxFNum)</description>
9726 <description>Tx FIFO 0</description>
9731 <description>Tx FIFO 1</description>
9736 <description>Tx FIFO 2</description>
9741 <description>Tx FIFO 3</description>
9746 <description>Tx FIFO 4</description>
9751 <description>Tx FIFO 5</description>
9756 <description>Tx FIFO 6</description>
9761 <description>Tx FIFO 7</description>
9766 <description>Tx FIFO 8</description>
9771 <description>Tx FIFO 9</description>
9776 <description>Tx FIFO 10</description>
9781 <description>Tx FIFO 11</description>
9786 <description>Tx FIFO 12</description>
9791 <description>Tx FIFO 13</description>
9796 <description>Tx FIFO 14</description>
9801 <description>Tx FIFO 15</description>
9814 <description>No action</description>
9819 <description>Clear NAK</description>
9832 <description>No action</description>
9837 <description>Set NAK</description>
9844 <description>Endpoint Disable (EPDis)</description>
9850 <description>No action</description>
9855 <description>Disabled Endpoint</description>
9862 <description>Endpoint Enable (EPEna)</description>
9868 <description>No action</description>
9873 <description>Enable Endpoint</description>
9882 <description>Device IN Endpoint 0 Interrupt Register</description>
9890 <description>Transfer Completed Interrupt (XferCompl)</description>
9896 <description>No Transfer Complete Interrupt</description>
9901 <description>Transfer Completed Interrupt</description>
9908 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
9914 <description>No Endpoint Disabled Interrupt</description>
9919 <description>Endpoint Disabled Interrupt</description>
9926 <description>AHB Error (AHBErr)</description>
9932 <description>No AHB Error Interrupt</description>
9937 <description>AHB Error interrupt</description>
9944 <description>Timeout Condition (TimeOUT)</description>
9950 <description>No Timeout interrupt</description>
9955 <description>Timeout interrupt</description>
9962 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
9968 <description>No IN Token Received when TxFIFO Empty interrupt</description>
9973 <description>IN Token Received when TxFIFO Empty Interrupt</description>
9980 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
9986 <description>No IN Token Received with EP Mismatch interrupt</description>
9991 <description>IN Token Received with EP Mismatch interrupt</description>
9998 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
10004 <description>No IN Endpoint NAK Effective interrupt</description>
10009 <description>IN Endpoint NAK Effective interrupt</description>
10016 <description>Transmit FIFO Empty (TxFEmp)</description>
10023 <description>No Transmit FIFO Empty interrupt</description>
10028 <description>Transmit FIFO Empty interrupt</description>
10035 <description>Fifo Underrun (TxfifoUndrn)</description>
10041 <description>No Fifo Underrun interrupt</description>
10046 <description>Fifo Underrun interrupt</description>
10053 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
10059 <description>No BNA interrupt</description>
10064 <description>BNA interrupt</description>
10071 <description>Packet Drop Status (PktDrpSts)</description>
10077 <description>No interrupt</description>
10082 <description>Packet Drop Status</description>
10089 <description>NAK Interrupt (BbleErr)</description>
10095 <description>No interrupt</description>
10100 <description>BbleErr interrupt</description>
10107 <description>NAK Interrupt (NAKInterrupt)</description>
10113 <description>No interrupt</description>
10118 <description>NAK Interrupt</description>
10125 <description>NYET Interrupt (NYETIntrpt)</description>
10131 <description>No interrupt</description>
10136 <description>NYET Interrupt</description>
10145 <description>Device IN Endpoint 0 Transfer Size Register</description>
10153 <description>Transfer Size (XferSize)</description>
10159 <description>Packet Count (PktCnt)</description>
10167 <description>Device IN Endpoint 0 DMA Address Register</description>
10175 <description>DMAAddr</description>
10183 <description>Device IN Endpoint Transmit FIFO Status Register 0</description>
10191 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
10200 <description>Device Control IN Endpoint Control Register</description>
10208 <description>Maximum Packet Size (MPS)</description>
10214 <description>USB Active Endpoint (USBActEP)</description>
10220 <description>Not Active</description>
10225 <description>USB Active Endpoint</description>
10238 <description>DATA0 or Even Frame</description>
10243 <description>DATA1 or Odd Frame</description>
10250 <description>NAK Status (NAKSts)</description>
10257 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
10262 … <description>The core is transmitting NAK handshakes on this endpoint</description>
10269 <description>Endpoint Type (EPType)</description>
10275 <description>Control</description>
10280 <description>Isochronous</description>
10285 <description>Bulk</description>
10290 <description>Interrupt</description>
10297 <description>STALL Handshake (Stall)</description>
10303 <description>STALL All non-active tokens</description>
10308 <description>STALL All Active Tokens</description>
10315 <description>TxFIFO Number (TxFNum)</description>
10321 <description>Tx FIFO 0</description>
10326 <description>Tx FIFO 1</description>
10331 <description>Tx FIFO 2</description>
10336 <description>Tx FIFO 3</description>
10341 <description>Tx FIFO 4</description>
10346 <description>Tx FIFO 5</description>
10351 <description>Tx FIFO 6</description>
10356 <description>Tx FIFO 7</description>
10361 <description>Tx FIFO 8</description>
10366 <description>Tx FIFO 9</description>
10371 <description>Tx FIFO 10</description>
10376 <description>Tx FIFO 11</description>
10381 <description>Tx FIFO 12</description>
10386 <description>Tx FIFO 13</description>
10391 <description>Tx FIFO 14</description>
10396 <description>Tx FIFO 15</description>
10403 <description>Clear NAK (CNAK)</description>
10410 <description>No Clear NAK</description>
10415 <description>Clear NAK</description>
10422 <description>Set NAK (SNAK)</description>
10429 <description>No Set NAK</description>
10434 <description>Set NAK</description>
10441 <description>Set DATA0 PID (SetD0PID)</description>
10448 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
10453 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
10460 <description>Set DATA1 PID (SetD1PID)</description>
10467 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
10472 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
10479 <description>Endpoint Disable (EPDis)</description>
10485 <description>No Action</description>
10490 <description>Disable Endpoint</description>
10497 <description>Endpoint Enable (EPEna)</description>
10503 <description>No Action</description>
10508 <description>Enable Endpoint</description>
10517 <description>Device IN Endpoint Interrupt Register</description>
10525 <description>Transfer Completed Interrupt (XferCompl)</description>
10531 <description>No Transfer Complete Interrupt</description>
10536 <description>Transfer Complete Interrupt</description>
10543 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
10549 <description>No Endpoint Disabled Interrupt</description>
10554 <description>Endpoint Disabled Interrupt</description>
10561 <description>AHB Error (AHBErr)</description>
10567 <description>No AHB Error Interrupt</description>
10572 <description>AHB Error interrupt</description>
10579 <description>Timeout Condition (TimeOUT)</description>
10585 <description>No Timeout interrupt</description>
10590 <description>Timeout interrupt</description>
10597 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
10603 <description>No IN Token Received interrupt</description>
10608 <description>IN Token Received Interrupt</description>
10615 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
10621 <description>No IN Token Received with EP Mismatch interrupt</description>
10626 <description>IN Token Received with EP Mismatch interrupt</description>
10633 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
10639 <description>No Endpoint NAK Effective interrupt</description>
10644 <description>IN Endpoint NAK Effective interrupt</description>
10651 <description>Transmit FIFO Empty (TxFEmp)</description>
10658 <description>No Transmit FIFO Empty interrupt</description>
10663 <description>Transmit FIFO Empty interrupt</description>
10670 <description>Fifo Underrun (TxfifoUndrn)</description>
10676 <description>No Tx FIFO Underrun interrupt</description>
10681 <description>TxFIFO Underrun interrupt</description>
10688 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
10694 <description>No BNA interrupt</description>
10699 <description>BNA interrupt</description>
10706 <description>Packet Drop Status (PktDrpSts)</description>
10712 <description>No interrupt</description>
10717 <description>Packet Drop Status interrupt</description>
10724 <description>NAK Interrupt (BbleErr)</description>
10730 <description>No interrupt</description>
10735 <description>BbleErr interrupt</description>
10742 <description>NAK Interrupt (NAKInterrupt)</description>
10748 <description>No NAK interrupt</description>
10753 <description>NAK Interrupt</description>
10760 <description>NYET Interrupt (NYETIntrpt)</description>
10766 <description>No NYET interrupt</description>
10771 <description>NYET Interrupt</description>
10780 <description>Device IN Endpoint Transfer Size Register</description>
10788 <description>Transfer Size (XferSize)</description>
10794 <description>Packet Count (PktCnt)</description>
10800 <description>MC</description>
10806 <description>1 packet</description>
10811 <description>2 packets</description>
10816 <description>3 packets</description>
10825 <description>Device IN Endpoint DMA Address Register</description>
10833 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
10841 <description>Device IN Endpoint Transmit FIFO Status Register</description>
10849 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
10858 <description>Device Control IN Endpoint Control Register</description>
10866 <description>Maximum Packet Size (MPS)</description>
10872 <description>USB Active Endpoint (USBActEP)</description>
10878 <description>Not Active</description>
10883 <description>USB Active Endpoint</description>
10896 <description>DATA0 or Even Frame</description>
10901 <description>DATA1 or Odd Frame</description>
10908 <description>NAK Status (NAKSts)</description>
10915 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
10920 … <description>The core is transmitting NAK handshakes on this endpoint</description>
10927 <description>Endpoint Type (EPType)</description>
10933 <description>Control</description>
10938 <description>Isochronous</description>
10943 <description>Bulk</description>
10948 <description>Interrupt</description>
10955 <description>STALL Handshake (Stall)</description>
10961 <description>STALL All non-active tokens</description>
10966 <description>STALL All Active Tokens</description>
10973 <description>TxFIFO Number (TxFNum)</description>
10979 <description>Tx FIFO 0</description>
10984 <description>Tx FIFO 1</description>
10989 <description>Tx FIFO 2</description>
10994 <description>Tx FIFO 3</description>
10999 <description>Tx FIFO 4</description>
11004 <description>Tx FIFO 5</description>
11009 <description>Tx FIFO 6</description>
11014 <description>Tx FIFO 7</description>
11019 <description>Tx FIFO 8</description>
11024 <description>Tx FIFO 9</description>
11029 <description>Tx FIFO 10</description>
11034 <description>Tx FIFO 11</description>
11039 <description>Tx FIFO 12</description>
11044 <description>Tx FIFO 13</description>
11049 <description>Tx FIFO 14</description>
11054 <description>Tx FIFO 15</description>
11061 <description>Clear NAK (CNAK)</description>
11068 <description>No Clear NAK</description>
11073 <description>Clear NAK</description>
11080 <description>Set NAK (SNAK)</description>
11087 <description>No Set NAK</description>
11092 <description>Set NAK</description>
11099 <description>Set DATA0 PID (SetD0PID)</description>
11106 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
11111 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
11118 <description>Set DATA1 PID (SetD1PID)</description>
11125 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
11130 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
11137 <description>Endpoint Disable (EPDis)</description>
11143 <description>No Action</description>
11148 <description>Disable Endpoint</description>
11155 <description>Endpoint Enable (EPEna)</description>
11161 <description>No Action</description>
11166 <description>Enable Endpoint</description>
11175 <description>Device IN Endpoint Interrupt Register</description>
11183 <description>Transfer Completed Interrupt (XferCompl)</description>
11189 <description>No Transfer Complete Interrupt</description>
11194 <description>Transfer Complete Interrupt</description>
11201 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
11207 <description>No Endpoint Disabled Interrupt</description>
11212 <description>Endpoint Disabled Interrupt</description>
11219 <description>AHB Error (AHBErr)</description>
11225 <description>No AHB Error Interrupt</description>
11230 <description>AHB Error interrupt</description>
11237 <description>Timeout Condition (TimeOUT)</description>
11243 <description>No Timeout interrupt</description>
11248 <description>Timeout interrupt</description>
11255 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
11261 <description>No IN Token Received interrupt</description>
11266 <description>IN Token Received Interrupt</description>
11273 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
11279 <description>No IN Token Received with EP Mismatch interrupt</description>
11284 <description>IN Token Received with EP Mismatch interrupt</description>
11291 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
11297 <description>No Endpoint NAK Effective interrupt</description>
11302 <description>IN Endpoint NAK Effective interrupt</description>
11309 <description>Transmit FIFO Empty (TxFEmp)</description>
11316 <description>No Transmit FIFO Empty interrupt</description>
11321 <description>Transmit FIFO Empty interrupt</description>
11328 <description>Fifo Underrun (TxfifoUndrn)</description>
11334 <description>No Tx FIFO Underrun interrupt</description>
11339 <description>TxFIFO Underrun interrupt</description>
11346 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
11352 <description>No BNA interrupt</description>
11357 <description>BNA interrupt</description>
11364 <description>Packet Drop Status (PktDrpSts)</description>
11370 <description>No interrupt</description>
11375 <description>Packet Drop Status interrupt</description>
11382 <description>NAK Interrupt (BbleErr)</description>
11388 <description>No interrupt</description>
11393 <description>BbleErr interrupt</description>
11400 <description>NAK Interrupt (NAKInterrupt)</description>
11406 <description>No NAK interrupt</description>
11411 <description>NAK Interrupt</description>
11418 <description>NYET Interrupt (NYETIntrpt)</description>
11424 <description>No NYET interrupt</description>
11429 <description>NYET Interrupt</description>
11438 <description>Device IN Endpoint Transfer Size Register</description>
11446 <description>Transfer Size (XferSize)</description>
11452 <description>Packet Count (PktCnt)</description>
11458 <description>MC</description>
11464 <description>1 packet</description>
11469 <description>2 packets</description>
11474 <description>3 packets</description>
11483 <description>Device IN Endpoint DMA Address Register</description>
11491 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
11499 <description>Device IN Endpoint Transmit FIFO Status Register</description>
11507 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
11516 <description>Device Control IN Endpoint Control Register</description>
11524 <description>Maximum Packet Size (MPS)</description>
11530 <description>USB Active Endpoint (USBActEP)</description>
11536 <description>Not Active</description>
11541 <description>USB Active Endpoint</description>
11554 <description>DATA0 or Even Frame</description>
11559 <description>DATA1 or Odd Frame</description>
11566 <description>NAK Status (NAKSts)</description>
11573 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
11578 … <description>The core is transmitting NAK handshakes on this endpoint</description>
11585 <description>Endpoint Type (EPType)</description>
11591 <description>Control</description>
11596 <description>Isochronous</description>
11601 <description>Bulk</description>
11606 <description>Interrupt</description>
11613 <description>STALL Handshake (Stall)</description>
11619 <description>STALL All non-active tokens</description>
11624 <description>STALL All Active Tokens</description>
11631 <description>TxFIFO Number (TxFNum)</description>
11637 <description>Tx FIFO 0</description>
11642 <description>Tx FIFO 1</description>
11647 <description>Tx FIFO 2</description>
11652 <description>Tx FIFO 3</description>
11657 <description>Tx FIFO 4</description>
11662 <description>Tx FIFO 5</description>
11667 <description>Tx FIFO 6</description>
11672 <description>Tx FIFO 7</description>
11677 <description>Tx FIFO 8</description>
11682 <description>Tx FIFO 9</description>
11687 <description>Tx FIFO 10</description>
11692 <description>Tx FIFO 11</description>
11697 <description>Tx FIFO 12</description>
11702 <description>Tx FIFO 13</description>
11707 <description>Tx FIFO 14</description>
11712 <description>Tx FIFO 15</description>
11719 <description>Clear NAK (CNAK)</description>
11726 <description>No Clear NAK</description>
11731 <description>Clear NAK</description>
11738 <description>Set NAK (SNAK)</description>
11745 <description>No Set NAK</description>
11750 <description>Set NAK</description>
11757 <description>Set DATA0 PID (SetD0PID)</description>
11764 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
11769 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
11776 <description>Set DATA1 PID (SetD1PID)</description>
11783 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
11788 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
11795 <description>Endpoint Disable (EPDis)</description>
11801 <description>No Action</description>
11806 <description>Disable Endpoint</description>
11813 <description>Endpoint Enable (EPEna)</description>
11819 <description>No Action</description>
11824 <description>Enable Endpoint</description>
11833 <description>Device IN Endpoint Interrupt Register</description>
11841 <description>Transfer Completed Interrupt (XferCompl)</description>
11847 <description>No Transfer Complete Interrupt</description>
11852 <description>Transfer Complete Interrupt</description>
11859 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
11865 <description>No Endpoint Disabled Interrupt</description>
11870 <description>Endpoint Disabled Interrupt</description>
11877 <description>AHB Error (AHBErr)</description>
11883 <description>No AHB Error Interrupt</description>
11888 <description>AHB Error interrupt</description>
11895 <description>Timeout Condition (TimeOUT)</description>
11901 <description>No Timeout interrupt</description>
11906 <description>Timeout interrupt</description>
11913 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
11919 <description>No IN Token Received interrupt</description>
11924 <description>IN Token Received Interrupt</description>
11931 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
11937 <description>No IN Token Received with EP Mismatch interrupt</description>
11942 <description>IN Token Received with EP Mismatch interrupt</description>
11949 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
11955 <description>No Endpoint NAK Effective interrupt</description>
11960 <description>IN Endpoint NAK Effective interrupt</description>
11967 <description>Transmit FIFO Empty (TxFEmp)</description>
11974 <description>No Transmit FIFO Empty interrupt</description>
11979 <description>Transmit FIFO Empty interrupt</description>
11986 <description>Fifo Underrun (TxfifoUndrn)</description>
11992 <description>No Tx FIFO Underrun interrupt</description>
11997 <description>TxFIFO Underrun interrupt</description>
12004 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
12010 <description>No BNA interrupt</description>
12015 <description>BNA interrupt</description>
12022 <description>Packet Drop Status (PktDrpSts)</description>
12028 <description>No interrupt</description>
12033 <description>Packet Drop Status interrupt</description>
12040 <description>NAK Interrupt (BbleErr)</description>
12046 <description>No interrupt</description>
12051 <description>BbleErr interrupt</description>
12058 <description>NAK Interrupt (NAKInterrupt)</description>
12064 <description>No NAK interrupt</description>
12069 <description>NAK Interrupt</description>
12076 <description>NYET Interrupt (NYETIntrpt)</description>
12082 <description>No NYET interrupt</description>
12087 <description>NYET Interrupt</description>
12096 <description>Device IN Endpoint Transfer Size Register</description>
12104 <description>Transfer Size (XferSize)</description>
12110 <description>Packet Count (PktCnt)</description>
12116 <description>MC</description>
12122 <description>1 packet</description>
12127 <description>2 packets</description>
12132 <description>3 packets</description>
12141 <description>Device IN Endpoint DMA Address Register</description>
12149 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
12157 <description>Device IN Endpoint Transmit FIFO Status Register</description>
12165 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
12174 <description>Device Control IN Endpoint Control Register</description>
12182 <description>Maximum Packet Size (MPS)</description>
12188 <description>USB Active Endpoint (USBActEP)</description>
12194 <description>Not Active</description>
12199 <description>USB Active Endpoint</description>
12212 <description>DATA0 or Even Frame</description>
12217 <description>DATA1 or Odd Frame</description>
12224 <description>NAK Status (NAKSts)</description>
12231 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
12236 … <description>The core is transmitting NAK handshakes on this endpoint</description>
12243 <description>Endpoint Type (EPType)</description>
12249 <description>Control</description>
12254 <description>Isochronous</description>
12259 <description>Bulk</description>
12264 <description>Interrupt</description>
12271 <description>STALL Handshake (Stall)</description>
12277 <description>STALL All non-active tokens</description>
12282 <description>STALL All Active Tokens</description>
12289 <description>TxFIFO Number (TxFNum)</description>
12295 <description>Tx FIFO 0</description>
12300 <description>Tx FIFO 1</description>
12305 <description>Tx FIFO 2</description>
12310 <description>Tx FIFO 3</description>
12315 <description>Tx FIFO 4</description>
12320 <description>Tx FIFO 5</description>
12325 <description>Tx FIFO 6</description>
12330 <description>Tx FIFO 7</description>
12335 <description>Tx FIFO 8</description>
12340 <description>Tx FIFO 9</description>
12345 <description>Tx FIFO 10</description>
12350 <description>Tx FIFO 11</description>
12355 <description>Tx FIFO 12</description>
12360 <description>Tx FIFO 13</description>
12365 <description>Tx FIFO 14</description>
12370 <description>Tx FIFO 15</description>
12377 <description>Clear NAK (CNAK)</description>
12384 <description>No Clear NAK</description>
12389 <description>Clear NAK</description>
12396 <description>Set NAK (SNAK)</description>
12403 <description>No Set NAK</description>
12408 <description>Set NAK</description>
12415 <description>Set DATA0 PID (SetD0PID)</description>
12422 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
12427 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
12434 <description>Set DATA1 PID (SetD1PID)</description>
12441 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
12446 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
12453 <description>Endpoint Disable (EPDis)</description>
12459 <description>No Action</description>
12464 <description>Disable Endpoint</description>
12471 <description>Endpoint Enable (EPEna)</description>
12477 <description>No Action</description>
12482 <description>Enable Endpoint</description>
12491 <description>Device IN Endpoint Interrupt Register</description>
12499 <description>Transfer Completed Interrupt (XferCompl)</description>
12505 <description>No Transfer Complete Interrupt</description>
12510 <description>Transfer Complete Interrupt</description>
12517 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
12523 <description>No Endpoint Disabled Interrupt</description>
12528 <description>Endpoint Disabled Interrupt</description>
12535 <description>AHB Error (AHBErr)</description>
12541 <description>No AHB Error Interrupt</description>
12546 <description>AHB Error interrupt</description>
12553 <description>Timeout Condition (TimeOUT)</description>
12559 <description>No Timeout interrupt</description>
12564 <description>Timeout interrupt</description>
12571 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
12577 <description>No IN Token Received interrupt</description>
12582 <description>IN Token Received Interrupt</description>
12589 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
12595 <description>No IN Token Received with EP Mismatch interrupt</description>
12600 <description>IN Token Received with EP Mismatch interrupt</description>
12607 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
12613 <description>No Endpoint NAK Effective interrupt</description>
12618 <description>IN Endpoint NAK Effective interrupt</description>
12625 <description>Transmit FIFO Empty (TxFEmp)</description>
12632 <description>No Transmit FIFO Empty interrupt</description>
12637 <description>Transmit FIFO Empty interrupt</description>
12644 <description>Fifo Underrun (TxfifoUndrn)</description>
12650 <description>No Tx FIFO Underrun interrupt</description>
12655 <description>TxFIFO Underrun interrupt</description>
12662 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
12668 <description>No BNA interrupt</description>
12673 <description>BNA interrupt</description>
12680 <description>Packet Drop Status (PktDrpSts)</description>
12686 <description>No interrupt</description>
12691 <description>Packet Drop Status interrupt</description>
12698 <description>NAK Interrupt (BbleErr)</description>
12704 <description>No interrupt</description>
12709 <description>BbleErr interrupt</description>
12716 <description>NAK Interrupt (NAKInterrupt)</description>
12722 <description>No NAK interrupt</description>
12727 <description>NAK Interrupt</description>
12734 <description>NYET Interrupt (NYETIntrpt)</description>
12740 <description>No NYET interrupt</description>
12745 <description>NYET Interrupt</description>
12754 <description>Device IN Endpoint Transfer Size Register</description>
12762 <description>Transfer Size (XferSize)</description>
12768 <description>Packet Count (PktCnt)</description>
12774 <description>MC</description>
12780 <description>1 packet</description>
12785 <description>2 packets</description>
12790 <description>3 packets</description>
12799 <description>Device IN Endpoint DMA Address Register</description>
12807 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
12815 <description>Device IN Endpoint Transmit FIFO Status Register</description>
12823 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
12832 <description>Device Control IN Endpoint Control Register</description>
12840 <description>Maximum Packet Size (MPS)</description>
12846 <description>USB Active Endpoint (USBActEP)</description>
12852 <description>Not Active</description>
12857 <description>USB Active Endpoint</description>
12870 <description>DATA0 or Even Frame</description>
12875 <description>DATA1 or Odd Frame</description>
12882 <description>NAK Status (NAKSts)</description>
12889 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
12894 … <description>The core is transmitting NAK handshakes on this endpoint</description>
12901 <description>Endpoint Type (EPType)</description>
12907 <description>Control</description>
12912 <description>Isochronous</description>
12917 <description>Bulk</description>
12922 <description>Interrupt</description>
12929 <description>STALL Handshake (Stall)</description>
12935 <description>STALL All non-active tokens</description>
12940 <description>STALL All Active Tokens</description>
12947 <description>TxFIFO Number (TxFNum)</description>
12953 <description>Tx FIFO 0</description>
12958 <description>Tx FIFO 1</description>
12963 <description>Tx FIFO 2</description>
12968 <description>Tx FIFO 3</description>
12973 <description>Tx FIFO 4</description>
12978 <description>Tx FIFO 5</description>
12983 <description>Tx FIFO 6</description>
12988 <description>Tx FIFO 7</description>
12993 <description>Tx FIFO 8</description>
12998 <description>Tx FIFO 9</description>
13003 <description>Tx FIFO 10</description>
13008 <description>Tx FIFO 11</description>
13013 <description>Tx FIFO 12</description>
13018 <description>Tx FIFO 13</description>
13023 <description>Tx FIFO 14</description>
13028 <description>Tx FIFO 15</description>
13035 <description>Clear NAK (CNAK)</description>
13042 <description>No Clear NAK</description>
13047 <description>Clear NAK</description>
13054 <description>Set NAK (SNAK)</description>
13061 <description>No Set NAK</description>
13066 <description>Set NAK</description>
13073 <description>Set DATA0 PID (SetD0PID)</description>
13080 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
13085 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
13092 <description>Set DATA1 PID (SetD1PID)</description>
13099 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
13104 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
13111 <description>Endpoint Disable (EPDis)</description>
13117 <description>No Action</description>
13122 <description>Disable Endpoint</description>
13129 <description>Endpoint Enable (EPEna)</description>
13135 <description>No Action</description>
13140 <description>Enable Endpoint</description>
13149 <description>Device IN Endpoint Interrupt Register</description>
13157 <description>Transfer Completed Interrupt (XferCompl)</description>
13163 <description>No Transfer Complete Interrupt</description>
13168 <description>Transfer Complete Interrupt</description>
13175 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
13181 <description>No Endpoint Disabled Interrupt</description>
13186 <description>Endpoint Disabled Interrupt</description>
13193 <description>AHB Error (AHBErr)</description>
13199 <description>No AHB Error Interrupt</description>
13204 <description>AHB Error interrupt</description>
13211 <description>Timeout Condition (TimeOUT)</description>
13217 <description>No Timeout interrupt</description>
13222 <description>Timeout interrupt</description>
13229 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
13235 <description>No IN Token Received interrupt</description>
13240 <description>IN Token Received Interrupt</description>
13247 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
13253 <description>No IN Token Received with EP Mismatch interrupt</description>
13258 <description>IN Token Received with EP Mismatch interrupt</description>
13265 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
13271 <description>No Endpoint NAK Effective interrupt</description>
13276 <description>IN Endpoint NAK Effective interrupt</description>
13283 <description>Transmit FIFO Empty (TxFEmp)</description>
13290 <description>No Transmit FIFO Empty interrupt</description>
13295 <description>Transmit FIFO Empty interrupt</description>
13302 <description>Fifo Underrun (TxfifoUndrn)</description>
13308 <description>No Tx FIFO Underrun interrupt</description>
13313 <description>TxFIFO Underrun interrupt</description>
13320 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
13326 <description>No BNA interrupt</description>
13331 <description>BNA interrupt</description>
13338 <description>Packet Drop Status (PktDrpSts)</description>
13344 <description>No interrupt</description>
13349 <description>Packet Drop Status interrupt</description>
13356 <description>NAK Interrupt (BbleErr)</description>
13362 <description>No interrupt</description>
13367 <description>BbleErr interrupt</description>
13374 <description>NAK Interrupt (NAKInterrupt)</description>
13380 <description>No NAK interrupt</description>
13385 <description>NAK Interrupt</description>
13392 <description>NYET Interrupt (NYETIntrpt)</description>
13398 <description>No NYET interrupt</description>
13403 <description>NYET Interrupt</description>
13412 <description>Device IN Endpoint Transfer Size Register</description>
13420 <description>Transfer Size (XferSize)</description>
13426 <description>Packet Count (PktCnt)</description>
13432 <description>MC</description>
13438 <description>1 packet</description>
13443 <description>2 packets</description>
13448 <description>3 packets</description>
13457 <description>Device IN Endpoint DMA Address Register</description>
13465 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
13473 <description>Device IN Endpoint Transmit FIFO Status Register</description>
13481 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
13490 <description>Device Control IN Endpoint Control Register</description>
13498 <description>Maximum Packet Size (MPS)</description>
13504 <description>USB Active Endpoint (USBActEP)</description>
13510 <description>Not Active</description>
13515 <description>USB Active Endpoint</description>
13528 <description>DATA0 or Even Frame</description>
13533 <description>DATA1 or Odd Frame</description>
13540 <description>NAK Status (NAKSts)</description>
13547 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
13552 … <description>The core is transmitting NAK handshakes on this endpoint</description>
13559 <description>Endpoint Type (EPType)</description>
13565 <description>Control</description>
13570 <description>Isochronous</description>
13575 <description>Bulk</description>
13580 <description>Interrupt</description>
13587 <description>STALL Handshake (Stall)</description>
13593 <description>STALL All non-active tokens</description>
13598 <description>STALL All Active Tokens</description>
13605 <description>TxFIFO Number (TxFNum)</description>
13611 <description>Tx FIFO 0</description>
13616 <description>Tx FIFO 1</description>
13621 <description>Tx FIFO 2</description>
13626 <description>Tx FIFO 3</description>
13631 <description>Tx FIFO 4</description>
13636 <description>Tx FIFO 5</description>
13641 <description>Tx FIFO 6</description>
13646 <description>Tx FIFO 7</description>
13651 <description>Tx FIFO 8</description>
13656 <description>Tx FIFO 9</description>
13661 <description>Tx FIFO 10</description>
13666 <description>Tx FIFO 11</description>
13671 <description>Tx FIFO 12</description>
13676 <description>Tx FIFO 13</description>
13681 <description>Tx FIFO 14</description>
13686 <description>Tx FIFO 15</description>
13693 <description>Clear NAK (CNAK)</description>
13700 <description>No Clear NAK</description>
13705 <description>Clear NAK</description>
13712 <description>Set NAK (SNAK)</description>
13719 <description>No Set NAK</description>
13724 <description>Set NAK</description>
13731 <description>Set DATA0 PID (SetD0PID)</description>
13738 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
13743 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
13750 <description>Set DATA1 PID (SetD1PID)</description>
13757 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
13762 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
13769 <description>Endpoint Disable (EPDis)</description>
13775 <description>No Action</description>
13780 <description>Disable Endpoint</description>
13787 <description>Endpoint Enable (EPEna)</description>
13793 <description>No Action</description>
13798 <description>Enable Endpoint</description>
13807 <description>Device IN Endpoint Interrupt Register</description>
13815 <description>Transfer Completed Interrupt (XferCompl)</description>
13821 <description>No Transfer Complete Interrupt</description>
13826 <description>Transfer Complete Interrupt</description>
13833 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
13839 <description>No Endpoint Disabled Interrupt</description>
13844 <description>Endpoint Disabled Interrupt</description>
13851 <description>AHB Error (AHBErr)</description>
13857 <description>No AHB Error Interrupt</description>
13862 <description>AHB Error interrupt</description>
13869 <description>Timeout Condition (TimeOUT)</description>
13875 <description>No Timeout interrupt</description>
13880 <description>Timeout interrupt</description>
13887 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
13893 <description>No IN Token Received interrupt</description>
13898 <description>IN Token Received Interrupt</description>
13905 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
13911 <description>No IN Token Received with EP Mismatch interrupt</description>
13916 <description>IN Token Received with EP Mismatch interrupt</description>
13923 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
13929 <description>No Endpoint NAK Effective interrupt</description>
13934 <description>IN Endpoint NAK Effective interrupt</description>
13941 <description>Transmit FIFO Empty (TxFEmp)</description>
13948 <description>No Transmit FIFO Empty interrupt</description>
13953 <description>Transmit FIFO Empty interrupt</description>
13960 <description>Fifo Underrun (TxfifoUndrn)</description>
13966 <description>No Tx FIFO Underrun interrupt</description>
13971 <description>TxFIFO Underrun interrupt</description>
13978 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
13984 <description>No BNA interrupt</description>
13989 <description>BNA interrupt</description>
13996 <description>Packet Drop Status (PktDrpSts)</description>
14002 <description>No interrupt</description>
14007 <description>Packet Drop Status interrupt</description>
14014 <description>NAK Interrupt (BbleErr)</description>
14020 <description>No interrupt</description>
14025 <description>BbleErr interrupt</description>
14032 <description>NAK Interrupt (NAKInterrupt)</description>
14038 <description>No NAK interrupt</description>
14043 <description>NAK Interrupt</description>
14050 <description>NYET Interrupt (NYETIntrpt)</description>
14056 <description>No NYET interrupt</description>
14061 <description>NYET Interrupt</description>
14070 <description>Device IN Endpoint Transfer Size Register</description>
14078 <description>Transfer Size (XferSize)</description>
14084 <description>Packet Count (PktCnt)</description>
14090 <description>MC</description>
14096 <description>1 packet</description>
14101 <description>2 packets</description>
14106 <description>3 packets</description>
14115 <description>Device IN Endpoint DMA Address Register</description>
14123 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
14131 <description>Device IN Endpoint Transmit FIFO Status Register</description>
14139 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
14148 <description>Device Control IN Endpoint Control Register</description>
14156 <description>Maximum Packet Size (MPS)</description>
14162 <description>USB Active Endpoint (USBActEP)</description>
14168 <description>Not Active</description>
14173 <description>USB Active Endpoint</description>
14186 <description>DATA0 or Even Frame</description>
14191 <description>DATA1 or Odd Frame</description>
14198 <description>NAK Status (NAKSts)</description>
14205 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
14210 … <description>The core is transmitting NAK handshakes on this endpoint</description>
14217 <description>Endpoint Type (EPType)</description>
14223 <description>Control</description>
14228 <description>Isochronous</description>
14233 <description>Bulk</description>
14238 <description>Interrupt</description>
14245 <description>STALL Handshake (Stall)</description>
14251 <description>STALL All non-active tokens</description>
14256 <description>STALL All Active Tokens</description>
14263 <description>TxFIFO Number (TxFNum)</description>
14269 <description>Tx FIFO 0</description>
14274 <description>Tx FIFO 1</description>
14279 <description>Tx FIFO 2</description>
14284 <description>Tx FIFO 3</description>
14289 <description>Tx FIFO 4</description>
14294 <description>Tx FIFO 5</description>
14299 <description>Tx FIFO 6</description>
14304 <description>Tx FIFO 7</description>
14309 <description>Tx FIFO 8</description>
14314 <description>Tx FIFO 9</description>
14319 <description>Tx FIFO 10</description>
14324 <description>Tx FIFO 11</description>
14329 <description>Tx FIFO 12</description>
14334 <description>Tx FIFO 13</description>
14339 <description>Tx FIFO 14</description>
14344 <description>Tx FIFO 15</description>
14351 <description>Clear NAK (CNAK)</description>
14358 <description>No Clear NAK</description>
14363 <description>Clear NAK</description>
14370 <description>Set NAK (SNAK)</description>
14377 <description>No Set NAK</description>
14382 <description>Set NAK</description>
14389 <description>Set DATA0 PID (SetD0PID)</description>
14396 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
14401 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
14408 <description>Set DATA1 PID (SetD1PID)</description>
14415 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
14420 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
14427 <description>Endpoint Disable (EPDis)</description>
14433 <description>No Action</description>
14438 <description>Disable Endpoint</description>
14445 <description>Endpoint Enable (EPEna)</description>
14451 <description>No Action</description>
14456 <description>Enable Endpoint</description>
14465 <description>Device IN Endpoint Interrupt Register</description>
14473 <description>Transfer Completed Interrupt (XferCompl)</description>
14479 <description>No Transfer Complete Interrupt</description>
14484 <description>Transfer Complete Interrupt</description>
14491 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
14497 <description>No Endpoint Disabled Interrupt</description>
14502 <description>Endpoint Disabled Interrupt</description>
14509 <description>AHB Error (AHBErr)</description>
14515 <description>No AHB Error Interrupt</description>
14520 <description>AHB Error interrupt</description>
14527 <description>Timeout Condition (TimeOUT)</description>
14533 <description>No Timeout interrupt</description>
14538 <description>Timeout interrupt</description>
14545 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
14551 <description>No IN Token Received interrupt</description>
14556 <description>IN Token Received Interrupt</description>
14563 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
14569 <description>No IN Token Received with EP Mismatch interrupt</description>
14574 <description>IN Token Received with EP Mismatch interrupt</description>
14581 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
14587 <description>No Endpoint NAK Effective interrupt</description>
14592 <description>IN Endpoint NAK Effective interrupt</description>
14599 <description>Transmit FIFO Empty (TxFEmp)</description>
14606 <description>No Transmit FIFO Empty interrupt</description>
14611 <description>Transmit FIFO Empty interrupt</description>
14618 <description>Fifo Underrun (TxfifoUndrn)</description>
14624 <description>No Tx FIFO Underrun interrupt</description>
14629 <description>TxFIFO Underrun interrupt</description>
14636 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
14642 <description>No BNA interrupt</description>
14647 <description>BNA interrupt</description>
14654 <description>Packet Drop Status (PktDrpSts)</description>
14660 <description>No interrupt</description>
14665 <description>Packet Drop Status interrupt</description>
14672 <description>NAK Interrupt (BbleErr)</description>
14678 <description>No interrupt</description>
14683 <description>BbleErr interrupt</description>
14690 <description>NAK Interrupt (NAKInterrupt)</description>
14696 <description>No NAK interrupt</description>
14701 <description>NAK Interrupt</description>
14708 <description>NYET Interrupt (NYETIntrpt)</description>
14714 <description>No NYET interrupt</description>
14719 <description>NYET Interrupt</description>
14728 <description>Device IN Endpoint Transfer Size Register</description>
14736 <description>Transfer Size (XferSize)</description>
14742 <description>Packet Count (PktCnt)</description>
14748 <description>MC</description>
14754 <description>1 packet</description>
14759 <description>2 packets</description>
14764 <description>3 packets</description>
14773 <description>Device IN Endpoint DMA Address Register</description>
14781 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
14789 <description>Device IN Endpoint Transmit FIFO Status Register</description>
14797 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
14806 <description>Device Control IN Endpoint Control Register</description>
14814 <description>Maximum Packet Size (MPS)</description>
14820 <description>USB Active Endpoint (USBActEP)</description>
14826 <description>Not Active</description>
14831 <description>USB Active Endpoint</description>
14844 <description>DATA0 or Even Frame</description>
14849 <description>DATA1 or Odd Frame</description>
14856 <description>NAK Status (NAKSts)</description>
14863 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
14868 … <description>The core is transmitting NAK handshakes on this endpoint</description>
14875 <description>Endpoint Type (EPType)</description>
14881 <description>Control</description>
14886 <description>Isochronous</description>
14891 <description>Bulk</description>
14896 <description>Interrupt</description>
14903 <description>STALL Handshake (Stall)</description>
14909 <description>STALL All non-active tokens</description>
14914 <description>STALL All Active Tokens</description>
14921 <description>TxFIFO Number (TxFNum)</description>
14927 <description>Tx FIFO 0</description>
14932 <description>Tx FIFO 1</description>
14937 <description>Tx FIFO 2</description>
14942 <description>Tx FIFO 3</description>
14947 <description>Tx FIFO 4</description>
14952 <description>Tx FIFO 5</description>
14957 <description>Tx FIFO 6</description>
14962 <description>Tx FIFO 7</description>
14967 <description>Tx FIFO 8</description>
14972 <description>Tx FIFO 9</description>
14977 <description>Tx FIFO 10</description>
14982 <description>Tx FIFO 11</description>
14987 <description>Tx FIFO 12</description>
14992 <description>Tx FIFO 13</description>
14997 <description>Tx FIFO 14</description>
15002 <description>Tx FIFO 15</description>
15009 <description>Clear NAK (CNAK)</description>
15016 <description>No Clear NAK</description>
15021 <description>Clear NAK</description>
15028 <description>Set NAK (SNAK)</description>
15035 <description>No Set NAK</description>
15040 <description>Set NAK</description>
15047 <description>Set DATA0 PID (SetD0PID)</description>
15054 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
15059 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
15066 <description>Set DATA1 PID (SetD1PID)</description>
15073 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
15078 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
15085 <description>Endpoint Disable (EPDis)</description>
15091 <description>No Action</description>
15096 <description>Disable Endpoint</description>
15103 <description>Endpoint Enable (EPEna)</description>
15109 <description>No Action</description>
15114 <description>Enable Endpoint</description>
15123 <description>Device IN Endpoint Interrupt Register</description>
15131 <description>Transfer Completed Interrupt (XferCompl)</description>
15137 <description>No Transfer Complete Interrupt</description>
15142 <description>Transfer Complete Interrupt</description>
15149 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
15155 <description>No Endpoint Disabled Interrupt</description>
15160 <description>Endpoint Disabled Interrupt</description>
15167 <description>AHB Error (AHBErr)</description>
15173 <description>No AHB Error Interrupt</description>
15178 <description>AHB Error interrupt</description>
15185 <description>Timeout Condition (TimeOUT)</description>
15191 <description>No Timeout interrupt</description>
15196 <description>Timeout interrupt</description>
15203 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
15209 <description>No IN Token Received interrupt</description>
15214 <description>IN Token Received Interrupt</description>
15221 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
15227 <description>No IN Token Received with EP Mismatch interrupt</description>
15232 <description>IN Token Received with EP Mismatch interrupt</description>
15239 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
15245 <description>No Endpoint NAK Effective interrupt</description>
15250 <description>IN Endpoint NAK Effective interrupt</description>
15257 <description>Transmit FIFO Empty (TxFEmp)</description>
15264 <description>No Transmit FIFO Empty interrupt</description>
15269 <description>Transmit FIFO Empty interrupt</description>
15276 <description>Fifo Underrun (TxfifoUndrn)</description>
15282 <description>No Tx FIFO Underrun interrupt</description>
15287 <description>TxFIFO Underrun interrupt</description>
15294 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
15300 <description>No BNA interrupt</description>
15305 <description>BNA interrupt</description>
15312 <description>Packet Drop Status (PktDrpSts)</description>
15318 <description>No interrupt</description>
15323 <description>Packet Drop Status interrupt</description>
15330 <description>NAK Interrupt (BbleErr)</description>
15336 <description>No interrupt</description>
15341 <description>BbleErr interrupt</description>
15348 <description>NAK Interrupt (NAKInterrupt)</description>
15354 <description>No NAK interrupt</description>
15359 <description>NAK Interrupt</description>
15366 <description>NYET Interrupt (NYETIntrpt)</description>
15372 <description>No NYET interrupt</description>
15377 <description>NYET Interrupt</description>
15386 <description>Device IN Endpoint Transfer Size Register</description>
15394 <description>Transfer Size (XferSize)</description>
15400 <description>Packet Count (PktCnt)</description>
15406 <description>MC</description>
15412 <description>1 packet</description>
15417 <description>2 packets</description>
15422 <description>3 packets</description>
15431 <description>Device IN Endpoint DMA Address Register</description>
15439 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
15447 <description>Device IN Endpoint Transmit FIFO Status Register</description>
15455 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
15464 <description>Device Control IN Endpoint Control Register</description>
15472 <description>Maximum Packet Size (MPS)</description>
15478 <description>USB Active Endpoint (USBActEP)</description>
15484 <description>Not Active</description>
15489 <description>USB Active Endpoint</description>
15502 <description>DATA0 or Even Frame</description>
15507 <description>DATA1 or Odd Frame</description>
15514 <description>NAK Status (NAKSts)</description>
15521 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
15526 … <description>The core is transmitting NAK handshakes on this endpoint</description>
15533 <description>Endpoint Type (EPType)</description>
15539 <description>Control</description>
15544 <description>Isochronous</description>
15549 <description>Bulk</description>
15554 <description>Interrupt</description>
15561 <description>STALL Handshake (Stall)</description>
15567 <description>STALL All non-active tokens</description>
15572 <description>STALL All Active Tokens</description>
15579 <description>TxFIFO Number (TxFNum)</description>
15585 <description>Tx FIFO 0</description>
15590 <description>Tx FIFO 1</description>
15595 <description>Tx FIFO 2</description>
15600 <description>Tx FIFO 3</description>
15605 <description>Tx FIFO 4</description>
15610 <description>Tx FIFO 5</description>
15615 <description>Tx FIFO 6</description>
15620 <description>Tx FIFO 7</description>
15625 <description>Tx FIFO 8</description>
15630 <description>Tx FIFO 9</description>
15635 <description>Tx FIFO 10</description>
15640 <description>Tx FIFO 11</description>
15645 <description>Tx FIFO 12</description>
15650 <description>Tx FIFO 13</description>
15655 <description>Tx FIFO 14</description>
15660 <description>Tx FIFO 15</description>
15667 <description>Clear NAK (CNAK)</description>
15674 <description>No Clear NAK</description>
15679 <description>Clear NAK</description>
15686 <description>Set NAK (SNAK)</description>
15693 <description>No Set NAK</description>
15698 <description>Set NAK</description>
15705 <description>Set DATA0 PID (SetD0PID)</description>
15712 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
15717 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
15724 <description>Set DATA1 PID (SetD1PID)</description>
15731 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
15736 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
15743 <description>Endpoint Disable (EPDis)</description>
15749 <description>No Action</description>
15754 <description>Disable Endpoint</description>
15761 <description>Endpoint Enable (EPEna)</description>
15767 <description>No Action</description>
15772 <description>Enable Endpoint</description>
15781 <description>Device IN Endpoint Interrupt Register</description>
15789 <description>Transfer Completed Interrupt (XferCompl)</description>
15795 <description>No Transfer Complete Interrupt</description>
15800 <description>Transfer Complete Interrupt</description>
15807 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
15813 <description>No Endpoint Disabled Interrupt</description>
15818 <description>Endpoint Disabled Interrupt</description>
15825 <description>AHB Error (AHBErr)</description>
15831 <description>No AHB Error Interrupt</description>
15836 <description>AHB Error interrupt</description>
15843 <description>Timeout Condition (TimeOUT)</description>
15849 <description>No Timeout interrupt</description>
15854 <description>Timeout interrupt</description>
15861 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
15867 <description>No IN Token Received interrupt</description>
15872 <description>IN Token Received Interrupt</description>
15879 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
15885 <description>No IN Token Received with EP Mismatch interrupt</description>
15890 <description>IN Token Received with EP Mismatch interrupt</description>
15897 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
15903 <description>No Endpoint NAK Effective interrupt</description>
15908 <description>IN Endpoint NAK Effective interrupt</description>
15915 <description>Transmit FIFO Empty (TxFEmp)</description>
15922 <description>No Transmit FIFO Empty interrupt</description>
15927 <description>Transmit FIFO Empty interrupt</description>
15934 <description>Fifo Underrun (TxfifoUndrn)</description>
15940 <description>No Tx FIFO Underrun interrupt</description>
15945 <description>TxFIFO Underrun interrupt</description>
15952 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
15958 <description>No BNA interrupt</description>
15963 <description>BNA interrupt</description>
15970 <description>Packet Drop Status (PktDrpSts)</description>
15976 <description>No interrupt</description>
15981 <description>Packet Drop Status interrupt</description>
15988 <description>NAK Interrupt (BbleErr)</description>
15994 <description>No interrupt</description>
15999 <description>BbleErr interrupt</description>
16006 <description>NAK Interrupt (NAKInterrupt)</description>
16012 <description>No NAK interrupt</description>
16017 <description>NAK Interrupt</description>
16024 <description>NYET Interrupt (NYETIntrpt)</description>
16030 <description>No NYET interrupt</description>
16035 <description>NYET Interrupt</description>
16044 <description>Device IN Endpoint Transfer Size Register</description>
16052 <description>Transfer Size (XferSize)</description>
16058 <description>Packet Count (PktCnt)</description>
16064 <description>MC</description>
16070 <description>1 packet</description>
16075 <description>2 packets</description>
16080 <description>3 packets</description>
16089 <description>Device IN Endpoint DMA Address Register</description>
16097 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
16105 <description>Device IN Endpoint Transmit FIFO Status Register</description>
16113 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
16122 <description>Device Control IN Endpoint Control Register</description>
16130 <description>Maximum Packet Size (MPS)</description>
16136 <description>USB Active Endpoint (USBActEP)</description>
16142 <description>Not Active</description>
16147 <description>USB Active Endpoint</description>
16160 <description>DATA0 or Even Frame</description>
16165 <description>DATA1 or Odd Frame</description>
16172 <description>NAK Status (NAKSts)</description>
16179 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
16184 … <description>The core is transmitting NAK handshakes on this endpoint</description>
16191 <description>Endpoint Type (EPType)</description>
16197 <description>Control</description>
16202 <description>Isochronous</description>
16207 <description>Bulk</description>
16212 <description>Interrupt</description>
16219 <description>STALL Handshake (Stall)</description>
16225 <description>STALL All non-active tokens</description>
16230 <description>STALL All Active Tokens</description>
16237 <description>TxFIFO Number (TxFNum)</description>
16243 <description>Tx FIFO 0</description>
16248 <description>Tx FIFO 1</description>
16253 <description>Tx FIFO 2</description>
16258 <description>Tx FIFO 3</description>
16263 <description>Tx FIFO 4</description>
16268 <description>Tx FIFO 5</description>
16273 <description>Tx FIFO 6</description>
16278 <description>Tx FIFO 7</description>
16283 <description>Tx FIFO 8</description>
16288 <description>Tx FIFO 9</description>
16293 <description>Tx FIFO 10</description>
16298 <description>Tx FIFO 11</description>
16303 <description>Tx FIFO 12</description>
16308 <description>Tx FIFO 13</description>
16313 <description>Tx FIFO 14</description>
16318 <description>Tx FIFO 15</description>
16325 <description>Clear NAK (CNAK)</description>
16332 <description>No Clear NAK</description>
16337 <description>Clear NAK</description>
16344 <description>Set NAK (SNAK)</description>
16351 <description>No Set NAK</description>
16356 <description>Set NAK</description>
16363 <description>Set DATA0 PID (SetD0PID)</description>
16370 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
16375 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
16382 <description>Set DATA1 PID (SetD1PID)</description>
16389 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
16394 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
16401 <description>Endpoint Disable (EPDis)</description>
16407 <description>No Action</description>
16412 <description>Disable Endpoint</description>
16419 <description>Endpoint Enable (EPEna)</description>
16425 <description>No Action</description>
16430 <description>Enable Endpoint</description>
16439 <description>Device IN Endpoint Interrupt Register</description>
16447 <description>Transfer Completed Interrupt (XferCompl)</description>
16453 <description>No Transfer Complete Interrupt</description>
16458 <description>Transfer Complete Interrupt</description>
16465 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
16471 <description>No Endpoint Disabled Interrupt</description>
16476 <description>Endpoint Disabled Interrupt</description>
16483 <description>AHB Error (AHBErr)</description>
16489 <description>No AHB Error Interrupt</description>
16494 <description>AHB Error interrupt</description>
16501 <description>Timeout Condition (TimeOUT)</description>
16507 <description>No Timeout interrupt</description>
16512 <description>Timeout interrupt</description>
16519 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
16525 <description>No IN Token Received interrupt</description>
16530 <description>IN Token Received Interrupt</description>
16537 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
16543 <description>No IN Token Received with EP Mismatch interrupt</description>
16548 <description>IN Token Received with EP Mismatch interrupt</description>
16555 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
16561 <description>No Endpoint NAK Effective interrupt</description>
16566 <description>IN Endpoint NAK Effective interrupt</description>
16573 <description>Transmit FIFO Empty (TxFEmp)</description>
16580 <description>No Transmit FIFO Empty interrupt</description>
16585 <description>Transmit FIFO Empty interrupt</description>
16592 <description>Fifo Underrun (TxfifoUndrn)</description>
16598 <description>No Tx FIFO Underrun interrupt</description>
16603 <description>TxFIFO Underrun interrupt</description>
16610 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
16616 <description>No BNA interrupt</description>
16621 <description>BNA interrupt</description>
16628 <description>Packet Drop Status (PktDrpSts)</description>
16634 <description>No interrupt</description>
16639 <description>Packet Drop Status interrupt</description>
16646 <description>NAK Interrupt (BbleErr)</description>
16652 <description>No interrupt</description>
16657 <description>BbleErr interrupt</description>
16664 <description>NAK Interrupt (NAKInterrupt)</description>
16670 <description>No NAK interrupt</description>
16675 <description>NAK Interrupt</description>
16682 <description>NYET Interrupt (NYETIntrpt)</description>
16688 <description>No NYET interrupt</description>
16693 <description>NYET Interrupt</description>
16702 <description>Device IN Endpoint Transfer Size Register</description>
16710 <description>Transfer Size (XferSize)</description>
16716 <description>Packet Count (PktCnt)</description>
16722 <description>MC</description>
16728 <description>1 packet</description>
16733 <description>2 packets</description>
16738 <description>3 packets</description>
16747 <description>Device IN Endpoint DMA Address Register</description>
16755 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
16763 <description>Device IN Endpoint Transmit FIFO Status Register</description>
16771 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
16780 <description>Device Control IN Endpoint Control Register</description>
16788 <description>Maximum Packet Size (MPS)</description>
16794 <description>USB Active Endpoint (USBActEP)</description>
16800 <description>Not Active</description>
16805 <description>USB Active Endpoint</description>
16818 <description>DATA0 or Even Frame</description>
16823 <description>DATA1 or Odd Frame</description>
16830 <description>NAK Status (NAKSts)</description>
16837 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
16842 … <description>The core is transmitting NAK handshakes on this endpoint</description>
16849 <description>Endpoint Type (EPType)</description>
16855 <description>Control</description>
16860 <description>Isochronous</description>
16865 <description>Bulk</description>
16870 <description>Interrupt</description>
16877 <description>STALL Handshake (Stall)</description>
16883 <description>STALL All non-active tokens</description>
16888 <description>STALL All Active Tokens</description>
16895 <description>TxFIFO Number (TxFNum)</description>
16901 <description>Tx FIFO 0</description>
16906 <description>Tx FIFO 1</description>
16911 <description>Tx FIFO 2</description>
16916 <description>Tx FIFO 3</description>
16921 <description>Tx FIFO 4</description>
16926 <description>Tx FIFO 5</description>
16931 <description>Tx FIFO 6</description>
16936 <description>Tx FIFO 7</description>
16941 <description>Tx FIFO 8</description>
16946 <description>Tx FIFO 9</description>
16951 <description>Tx FIFO 10</description>
16956 <description>Tx FIFO 11</description>
16961 <description>Tx FIFO 12</description>
16966 <description>Tx FIFO 13</description>
16971 <description>Tx FIFO 14</description>
16976 <description>Tx FIFO 15</description>
16983 <description>Clear NAK (CNAK)</description>
16990 <description>No Clear NAK</description>
16995 <description>Clear NAK</description>
17002 <description>Set NAK (SNAK)</description>
17009 <description>No Set NAK</description>
17014 <description>Set NAK</description>
17021 <description>Set DATA0 PID (SetD0PID)</description>
17028 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
17033 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
17040 <description>Set DATA1 PID (SetD1PID)</description>
17047 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
17052 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
17059 <description>Endpoint Disable (EPDis)</description>
17065 <description>No Action</description>
17070 <description>Disable Endpoint</description>
17077 <description>Endpoint Enable (EPEna)</description>
17083 <description>No Action</description>
17088 <description>Enable Endpoint</description>
17097 <description>Device IN Endpoint Interrupt Register</description>
17105 <description>Transfer Completed Interrupt (XferCompl)</description>
17111 <description>No Transfer Complete Interrupt</description>
17116 <description>Transfer Complete Interrupt</description>
17123 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
17129 <description>No Endpoint Disabled Interrupt</description>
17134 <description>Endpoint Disabled Interrupt</description>
17141 <description>AHB Error (AHBErr)</description>
17147 <description>No AHB Error Interrupt</description>
17152 <description>AHB Error interrupt</description>
17159 <description>Timeout Condition (TimeOUT)</description>
17165 <description>No Timeout interrupt</description>
17170 <description>Timeout interrupt</description>
17177 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
17183 <description>No IN Token Received interrupt</description>
17188 <description>IN Token Received Interrupt</description>
17195 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
17201 <description>No IN Token Received with EP Mismatch interrupt</description>
17206 <description>IN Token Received with EP Mismatch interrupt</description>
17213 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
17219 <description>No Endpoint NAK Effective interrupt</description>
17224 <description>IN Endpoint NAK Effective interrupt</description>
17231 <description>Transmit FIFO Empty (TxFEmp)</description>
17238 <description>No Transmit FIFO Empty interrupt</description>
17243 <description>Transmit FIFO Empty interrupt</description>
17250 <description>Fifo Underrun (TxfifoUndrn)</description>
17256 <description>No Tx FIFO Underrun interrupt</description>
17261 <description>TxFIFO Underrun interrupt</description>
17268 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
17274 <description>No BNA interrupt</description>
17279 <description>BNA interrupt</description>
17286 <description>Packet Drop Status (PktDrpSts)</description>
17292 <description>No interrupt</description>
17297 <description>Packet Drop Status interrupt</description>
17304 <description>NAK Interrupt (BbleErr)</description>
17310 <description>No interrupt</description>
17315 <description>BbleErr interrupt</description>
17322 <description>NAK Interrupt (NAKInterrupt)</description>
17328 <description>No NAK interrupt</description>
17333 <description>NAK Interrupt</description>
17340 <description>NYET Interrupt (NYETIntrpt)</description>
17346 <description>No NYET interrupt</description>
17351 <description>NYET Interrupt</description>
17360 <description>Device IN Endpoint Transfer Size Register</description>
17368 <description>Transfer Size (XferSize)</description>
17374 <description>Packet Count (PktCnt)</description>
17380 <description>MC</description>
17386 <description>1 packet</description>
17391 <description>2 packets</description>
17396 <description>3 packets</description>
17405 <description>Device IN Endpoint DMA Address Register</description>
17413 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
17421 <description>Device IN Endpoint Transmit FIFO Status Register</description>
17429 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
17438 <description>Device Control OUT Endpoint 0 Control Register</description>
17446 <description>Maximum Packet Size (MPS)</description>
17453 <description>64 bytes</description>
17458 <description>32 bytes</description>
17463 <description>16 bytes</description>
17468 <description>8 bytes</description>
17475 <description>USB Active Endpoint (USBActEP)</description>
17482 <description>USB Active Endpoint 0</description>
17489 <description>NAK Status (NAKSts)</description>
17496 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
17501 … <description>The core is transmitting NAK handshakes on this endpoint</description>
17508 <description>Endpoint Type (EPType)</description>
17515 <description>Endpoint Control 0</description>
17522 <description>STALL Handshake (Stall)</description>
17528 <description>No Stall</description>
17533 <description>Stall Handshake</description>
17540 <description>Clear NAK (CNAK)</description>
17547 <description>No action</description>
17552 <description>Clear NAK</description>
17559 <description>Set NAK (SNAK)</description>
17566 <description>No action</description>
17571 <description>Set NAK</description>
17578 <description>Endpoint Disable (EPDis)</description>
17585 <description>No Endpoint disable</description>
17592 <description>Endpoint Enable (EPEna)</description>
17598 <description>No action</description>
17603 <description>Enable Endpoint</description>
17612 <description>Device OUT Endpoint 0 Interrupt Register</description>
17620 <description>Transfer Completed Interrupt (XferCompl)</description>
17626 <description>No Transfer Complete Interrupt</description>
17631 <description>Transfer Complete Interrupt</description>
17638 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
17644 <description>No Endpoint Disabled Interrupt</description>
17649 <description>Endpoint Disabled Interrupt</description>
17656 <description>AHB Error (AHBErr)</description>
17662 <description>No AHB Error Interrupt</description>
17667 <description>AHB Error interrupt</description>
17674 <description>SETUP Phase Done (SetUp)</description>
17680 <description>No SETUP Phase Done</description>
17685 <description>SETUP Phase Done</description>
17692 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
17698 <description>No OUT Token Received When Endpoint Disabled</description>
17703 <description>OUT Token Received When Endpoint Disabled</description>
17710 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
17716 <description>No Status Phase Received for Control Write</description>
17721 <description>Status Phase Received for Control Write</description>
17728 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
17734 <description>No Back-to-Back SETUP Packets Received</description>
17739 <description>Back-to-Back SETUP Packets Received</description>
17746 <description>OUT Packet Error (OutPktErr)</description>
17752 <description>No OUT Packet Error</description>
17757 <description>OUT Packet Error</description>
17764 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
17770 <description>No BNA interrupt</description>
17775 <description>BNA interrupt</description>
17782 <description>Packet Drop Status (PktDrpSts)</description>
17788 <description>No interrupt</description>
17793 <description>Packet Drop Status interrupt</description>
17800 <description>NAK Interrupt (BbleErr)</description>
17806 <description>No BbleErr interrupt</description>
17811 <description>BbleErr interrupt</description>
17818 <description>NAK Interrupt (NAKInterrupt)</description>
17824 <description>No NAK interrupt</description>
17829 <description>NAK Interrupt</description>
17836 <description>NYET Interrupt (NYETIntrpt)</description>
17842 <description>No NYET interrupt</description>
17847 <description>NYET Interrupt</description>
17854 <description>Setup Packet Received</description>
17860 <description>No Setup packet received</description>
17865 <description>Setup packet received</description>
17874 <description>Device OUT Endpoint 0 Transfer Size Register</description>
17882 <description>Transfer Size (XferSize)</description>
17888 <description>Packet Count (PktCnt)</description>
17894 <description>SETUP Packet Count (SUPCnt)</description>
17900 <description>1 packet</description>
17905 <description>2 packets</description>
17910 <description>3 packets</description>
17919 <description>Device OUT Endpoint 0 DMA Address Register</description>
17927 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
17935 <description>Device Control OUT Endpoint Control Register</description>
17943 <description>Maximum Packet Size (MPS)</description>
17949 <description>USB Active Endpoint (USBActEP)</description>
17955 <description>Not Active</description>
17960 <description>USB Active Endpoint</description>
17967 <description>Endpoint Data PID (DPID)</description>
17974 <description>Endpoint Data PID not active</description>
17979 <description>Endpoint Data PID active</description>
17986 <description>NAK Status (NAKSts)</description>
17993 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
17998 … <description>The core is transmitting NAK handshakes on this endpoint</description>
18005 <description>Endpoint Type (EPType)</description>
18011 <description>Control</description>
18016 <description>Isochronous</description>
18021 <description>Bulk</description>
18026 <description>Interrupt</description>
18033 <description>STALL Handshake (Stall)</description>
18039 <description>STALL All non-active tokens</description>
18044 <description>STALL All Active Tokens</description>
18057 <description>No Clear NAK</description>
18062 <description>Clear NAK</description>
18069 <description>Set NAK (SNAK)</description>
18076 <description>No Set NAK</description>
18081 <description>Set NAK</description>
18088 <description>Set DATA0 PID (SetD0PID)</description>
18095 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
18100 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
18107 <description>Set DATA1 PID (SetD1PID)</description>
18114 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
18119 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
18126 <description>Endpoint Disable (EPDis)</description>
18132 <description>No Action</description>
18137 <description>Disable Endpoint</description>
18144 <description>Endpoint Enable (EPEna)</description>
18150 <description>No Action</description>
18155 <description>Enable Endpoint</description>
18164 <description>Device OUT Endpoint Interrupt Register</description>
18172 <description>Transfer Completed Interrupt (XferCompl)</description>
18178 <description>No Transfer Complete Interrupt</description>
18183 <description>Transfer Complete Interrupt</description>
18190 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
18196 <description>No Endpoint Disabled Interrupt</description>
18201 <description>Endpoint Disabled Interrupt</description>
18208 <description>AHB Error (AHBErr)</description>
18214 <description>No AHB Error Interrupt</description>
18219 <description>AHB Error interrupt</description>
18226 <description>SETUP Phase Done (SetUp)</description>
18232 <description>No SETUP Phase Done</description>
18237 <description>SETUP Phase Done</description>
18244 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
18250 <description>No OUT Token Received When Endpoint Disabled</description>
18255 <description>OUT Token Received When Endpoint Disabled</description>
18262 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
18268 <description>No Status Phase Received for Control Write</description>
18273 <description>Status Phase Received for Control Write</description>
18280 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
18286 <description>No Back-to-Back SETUP Packets Received</description>
18291 <description>Back-to-Back SETUP Packets Received</description>
18298 <description>OUT Packet Error (OutPktErr)</description>
18304 <description>No OUT Packet Error</description>
18309 <description>OUT Packet Error</description>
18316 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
18322 <description>No BNA interrupt</description>
18327 <description>BNA interrupt</description>
18334 <description>Packet Drop Status (PktDrpSts)</description>
18340 <description>No interrupt</description>
18345 <description>Packet Drop Status interrupt</description>
18352 <description>NAK Interrupt (BbleErr)</description>
18358 <description>No BbleErr interrupt</description>
18363 <description>BbleErr interrupt</description>
18370 <description>NAK Interrupt (NAKInterrupt)</description>
18376 <description>No NAK interrupt</description>
18381 <description>NAK Interrupt</description>
18388 <description>NYET Interrupt (NYETIntrpt)</description>
18394 <description>No NYET interrupt</description>
18399 <description>NYET Interrupt</description>
18406 <description>Setup Packet Received</description>
18412 <description>No Setup packet received</description>
18417 <description>Setup packet received</description>
18426 <description>Device OUT Endpoint Transfer Size Register</description>
18434 <description>Transfer Size (XferSize)</description>
18440 <description>Packet Count (PktCnt)</description>
18446 <description>RxDPID</description>
18453 <description>DATA0</description>
18458 <description>DATA2 or 1 packet</description>
18463 <description>DATA1 or 2 packets</description>
18468 <description>MDATA or 3 packets</description>
18477 <description>Device OUT Endpoint DMA Address Register</description>
18485 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
18493 <description>Device Control OUT Endpoint Control Register</description>
18501 <description>Maximum Packet Size (MPS)</description>
18507 <description>USB Active Endpoint (USBActEP)</description>
18513 <description>Not Active</description>
18518 <description>USB Active Endpoint</description>
18525 <description>Endpoint Data PID (DPID)</description>
18532 <description>Endpoint Data PID not active</description>
18537 <description>Endpoint Data PID active</description>
18544 <description>NAK Status (NAKSts)</description>
18551 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
18556 … <description>The core is transmitting NAK handshakes on this endpoint</description>
18563 <description>Endpoint Type (EPType)</description>
18569 <description>Control</description>
18574 <description>Isochronous</description>
18579 <description>Bulk</description>
18584 <description>Interrupt</description>
18591 <description>STALL Handshake (Stall)</description>
18597 <description>STALL All non-active tokens</description>
18602 <description>STALL All Active Tokens</description>
18615 <description>No Clear NAK</description>
18620 <description>Clear NAK</description>
18627 <description>Set NAK (SNAK)</description>
18634 <description>No Set NAK</description>
18639 <description>Set NAK</description>
18646 <description>Set DATA0 PID (SetD0PID)</description>
18653 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
18658 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
18665 <description>Set DATA1 PID (SetD1PID)</description>
18672 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
18677 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
18684 <description>Endpoint Disable (EPDis)</description>
18690 <description>No Action</description>
18695 <description>Disable Endpoint</description>
18702 <description>Endpoint Enable (EPEna)</description>
18708 <description>No Action</description>
18713 <description>Enable Endpoint</description>
18722 <description>Device OUT Endpoint Interrupt Register</description>
18730 <description>Transfer Completed Interrupt (XferCompl)</description>
18736 <description>No Transfer Complete Interrupt</description>
18741 <description>Transfer Complete Interrupt</description>
18748 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
18754 <description>No Endpoint Disabled Interrupt</description>
18759 <description>Endpoint Disabled Interrupt</description>
18766 <description>AHB Error (AHBErr)</description>
18772 <description>No AHB Error Interrupt</description>
18777 <description>AHB Error interrupt</description>
18784 <description>SETUP Phase Done (SetUp)</description>
18790 <description>No SETUP Phase Done</description>
18795 <description>SETUP Phase Done</description>
18802 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
18808 <description>No OUT Token Received When Endpoint Disabled</description>
18813 <description>OUT Token Received When Endpoint Disabled</description>
18820 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
18826 <description>No Status Phase Received for Control Write</description>
18831 <description>Status Phase Received for Control Write</description>
18838 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
18844 <description>No Back-to-Back SETUP Packets Received</description>
18849 <description>Back-to-Back SETUP Packets Received</description>
18856 <description>OUT Packet Error (OutPktErr)</description>
18862 <description>No OUT Packet Error</description>
18867 <description>OUT Packet Error</description>
18874 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
18880 <description>No BNA interrupt</description>
18885 <description>BNA interrupt</description>
18892 <description>Packet Drop Status (PktDrpSts)</description>
18898 <description>No interrupt</description>
18903 <description>Packet Drop Status interrupt</description>
18910 <description>NAK Interrupt (BbleErr)</description>
18916 <description>No BbleErr interrupt</description>
18921 <description>BbleErr interrupt</description>
18928 <description>NAK Interrupt (NAKInterrupt)</description>
18934 <description>No NAK interrupt</description>
18939 <description>NAK Interrupt</description>
18946 <description>NYET Interrupt (NYETIntrpt)</description>
18952 <description>No NYET interrupt</description>
18957 <description>NYET Interrupt</description>
18964 <description>Setup Packet Received</description>
18970 <description>No Setup packet received</description>
18975 <description>Setup packet received</description>
18984 <description>Device OUT Endpoint Transfer Size Register</description>
18992 <description>Transfer Size (XferSize)</description>
18998 <description>Packet Count (PktCnt)</description>
19004 <description>RxDPID</description>
19011 <description>DATA0</description>
19016 <description>DATA2 or 1 packet</description>
19021 <description>DATA1 or 2 packets</description>
19026 <description>MDATA or 3 packets</description>
19035 <description>Device OUT Endpoint DMA Address Register</description>
19043 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
19051 <description>Device Control OUT Endpoint Control Register</description>
19059 <description>Maximum Packet Size (MPS)</description>
19065 <description>USB Active Endpoint (USBActEP)</description>
19071 <description>Not Active</description>
19076 <description>USB Active Endpoint</description>
19083 <description>Endpoint Data PID (DPID)</description>
19090 <description>Endpoint Data PID not active</description>
19095 <description>Endpoint Data PID active</description>
19102 <description>NAK Status (NAKSts)</description>
19109 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
19114 … <description>The core is transmitting NAK handshakes on this endpoint</description>
19121 <description>Endpoint Type (EPType)</description>
19127 <description>Control</description>
19132 <description>Isochronous</description>
19137 <description>Bulk</description>
19142 <description>Interrupt</description>
19149 <description>STALL Handshake (Stall)</description>
19155 <description>STALL All non-active tokens</description>
19160 <description>STALL All Active Tokens</description>
19173 <description>No Clear NAK</description>
19178 <description>Clear NAK</description>
19185 <description>Set NAK (SNAK)</description>
19192 <description>No Set NAK</description>
19197 <description>Set NAK</description>
19204 <description>Set DATA0 PID (SetD0PID)</description>
19211 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
19216 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
19223 <description>Set DATA1 PID (SetD1PID)</description>
19230 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
19235 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
19242 <description>Endpoint Disable (EPDis)</description>
19248 <description>No Action</description>
19253 <description>Disable Endpoint</description>
19260 <description>Endpoint Enable (EPEna)</description>
19266 <description>No Action</description>
19271 <description>Enable Endpoint</description>
19280 <description>Device OUT Endpoint Interrupt Register</description>
19288 <description>Transfer Completed Interrupt (XferCompl)</description>
19294 <description>No Transfer Complete Interrupt</description>
19299 <description>Transfer Complete Interrupt</description>
19306 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
19312 <description>No Endpoint Disabled Interrupt</description>
19317 <description>Endpoint Disabled Interrupt</description>
19324 <description>AHB Error (AHBErr)</description>
19330 <description>No AHB Error Interrupt</description>
19335 <description>AHB Error interrupt</description>
19342 <description>SETUP Phase Done (SetUp)</description>
19348 <description>No SETUP Phase Done</description>
19353 <description>SETUP Phase Done</description>
19360 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
19366 <description>No OUT Token Received When Endpoint Disabled</description>
19371 <description>OUT Token Received When Endpoint Disabled</description>
19378 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
19384 <description>No Status Phase Received for Control Write</description>
19389 <description>Status Phase Received for Control Write</description>
19396 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
19402 <description>No Back-to-Back SETUP Packets Received</description>
19407 <description>Back-to-Back SETUP Packets Received</description>
19414 <description>OUT Packet Error (OutPktErr)</description>
19420 <description>No OUT Packet Error</description>
19425 <description>OUT Packet Error</description>
19432 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
19438 <description>No BNA interrupt</description>
19443 <description>BNA interrupt</description>
19450 <description>Packet Drop Status (PktDrpSts)</description>
19456 <description>No interrupt</description>
19461 <description>Packet Drop Status interrupt</description>
19468 <description>NAK Interrupt (BbleErr)</description>
19474 <description>No BbleErr interrupt</description>
19479 <description>BbleErr interrupt</description>
19486 <description>NAK Interrupt (NAKInterrupt)</description>
19492 <description>No NAK interrupt</description>
19497 <description>NAK Interrupt</description>
19504 <description>NYET Interrupt (NYETIntrpt)</description>
19510 <description>No NYET interrupt</description>
19515 <description>NYET Interrupt</description>
19522 <description>Setup Packet Received</description>
19528 <description>No Setup packet received</description>
19533 <description>Setup packet received</description>
19542 <description>Device OUT Endpoint Transfer Size Register</description>
19550 <description>Transfer Size (XferSize)</description>
19556 <description>Packet Count (PktCnt)</description>
19562 <description>RxDPID</description>
19569 <description>DATA0</description>
19574 <description>DATA2 or 1 packet</description>
19579 <description>DATA1 or 2 packets</description>
19584 <description>MDATA or 3 packets</description>
19593 <description>Device OUT Endpoint DMA Address Register</description>
19601 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
19609 <description>Device Control OUT Endpoint Control Register</description>
19617 <description>Maximum Packet Size (MPS)</description>
19623 <description>USB Active Endpoint (USBActEP)</description>
19629 <description>Not Active</description>
19634 <description>USB Active Endpoint</description>
19641 <description>Endpoint Data PID (DPID)</description>
19648 <description>Endpoint Data PID not active</description>
19653 <description>Endpoint Data PID active</description>
19660 <description>NAK Status (NAKSts)</description>
19667 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
19672 … <description>The core is transmitting NAK handshakes on this endpoint</description>
19679 <description>Endpoint Type (EPType)</description>
19685 <description>Control</description>
19690 <description>Isochronous</description>
19695 <description>Bulk</description>
19700 <description>Interrupt</description>
19707 <description>STALL Handshake (Stall)</description>
19713 <description>STALL All non-active tokens</description>
19718 <description>STALL All Active Tokens</description>
19731 <description>No Clear NAK</description>
19736 <description>Clear NAK</description>
19743 <description>Set NAK (SNAK)</description>
19750 <description>No Set NAK</description>
19755 <description>Set NAK</description>
19762 <description>Set DATA0 PID (SetD0PID)</description>
19769 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
19774 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
19781 <description>Set DATA1 PID (SetD1PID)</description>
19788 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
19793 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
19800 <description>Endpoint Disable (EPDis)</description>
19806 <description>No Action</description>
19811 <description>Disable Endpoint</description>
19818 <description>Endpoint Enable (EPEna)</description>
19824 <description>No Action</description>
19829 <description>Enable Endpoint</description>
19838 <description>Device OUT Endpoint Interrupt Register</description>
19846 <description>Transfer Completed Interrupt (XferCompl)</description>
19852 <description>No Transfer Complete Interrupt</description>
19857 <description>Transfer Complete Interrupt</description>
19864 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
19870 <description>No Endpoint Disabled Interrupt</description>
19875 <description>Endpoint Disabled Interrupt</description>
19882 <description>AHB Error (AHBErr)</description>
19888 <description>No AHB Error Interrupt</description>
19893 <description>AHB Error interrupt</description>
19900 <description>SETUP Phase Done (SetUp)</description>
19906 <description>No SETUP Phase Done</description>
19911 <description>SETUP Phase Done</description>
19918 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
19924 <description>No OUT Token Received When Endpoint Disabled</description>
19929 <description>OUT Token Received When Endpoint Disabled</description>
19936 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
19942 <description>No Status Phase Received for Control Write</description>
19947 <description>Status Phase Received for Control Write</description>
19954 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
19960 <description>No Back-to-Back SETUP Packets Received</description>
19965 <description>Back-to-Back SETUP Packets Received</description>
19972 <description>OUT Packet Error (OutPktErr)</description>
19978 <description>No OUT Packet Error</description>
19983 <description>OUT Packet Error</description>
19990 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
19996 <description>No BNA interrupt</description>
20001 <description>BNA interrupt</description>
20008 <description>Packet Drop Status (PktDrpSts)</description>
20014 <description>No interrupt</description>
20019 <description>Packet Drop Status interrupt</description>
20026 <description>NAK Interrupt (BbleErr)</description>
20032 <description>No BbleErr interrupt</description>
20037 <description>BbleErr interrupt</description>
20044 <description>NAK Interrupt (NAKInterrupt)</description>
20050 <description>No NAK interrupt</description>
20055 <description>NAK Interrupt</description>
20062 <description>NYET Interrupt (NYETIntrpt)</description>
20068 <description>No NYET interrupt</description>
20073 <description>NYET Interrupt</description>
20080 <description>Setup Packet Received</description>
20086 <description>No Setup packet received</description>
20091 <description>Setup packet received</description>
20100 <description>Device OUT Endpoint Transfer Size Register</description>
20108 <description>Transfer Size (XferSize)</description>
20114 <description>Packet Count (PktCnt)</description>
20120 <description>RxDPID</description>
20127 <description>DATA0</description>
20132 <description>DATA2 or 1 packet</description>
20137 <description>DATA1 or 2 packets</description>
20142 <description>MDATA or 3 packets</description>
20151 <description>Device OUT Endpoint DMA Address Register</description>
20159 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
20167 <description>Device Control OUT Endpoint Control Register</description>
20175 <description>Maximum Packet Size (MPS)</description>
20181 <description>USB Active Endpoint (USBActEP)</description>
20187 <description>Not Active</description>
20192 <description>USB Active Endpoint</description>
20199 <description>Endpoint Data PID (DPID)</description>
20206 <description>Endpoint Data PID not active</description>
20211 <description>Endpoint Data PID active</description>
20218 <description>NAK Status (NAKSts)</description>
20225 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
20230 … <description>The core is transmitting NAK handshakes on this endpoint</description>
20237 <description>Endpoint Type (EPType)</description>
20243 <description>Control</description>
20248 <description>Isochronous</description>
20253 <description>Bulk</description>
20258 <description>Interrupt</description>
20265 <description>STALL Handshake (Stall)</description>
20271 <description>STALL All non-active tokens</description>
20276 <description>STALL All Active Tokens</description>
20289 <description>No Clear NAK</description>
20294 <description>Clear NAK</description>
20301 <description>Set NAK (SNAK)</description>
20308 <description>No Set NAK</description>
20313 <description>Set NAK</description>
20320 <description>Set DATA0 PID (SetD0PID)</description>
20327 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
20332 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
20339 <description>Set DATA1 PID (SetD1PID)</description>
20346 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
20351 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
20358 <description>Endpoint Disable (EPDis)</description>
20364 <description>No Action</description>
20369 <description>Disable Endpoint</description>
20376 <description>Endpoint Enable (EPEna)</description>
20382 <description>No Action</description>
20387 <description>Enable Endpoint</description>
20396 <description>Device OUT Endpoint Interrupt Register</description>
20404 <description>Transfer Completed Interrupt (XferCompl)</description>
20410 <description>No Transfer Complete Interrupt</description>
20415 <description>Transfer Complete Interrupt</description>
20422 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
20428 <description>No Endpoint Disabled Interrupt</description>
20433 <description>Endpoint Disabled Interrupt</description>
20440 <description>AHB Error (AHBErr)</description>
20446 <description>No AHB Error Interrupt</description>
20451 <description>AHB Error interrupt</description>
20458 <description>SETUP Phase Done (SetUp)</description>
20464 <description>No SETUP Phase Done</description>
20469 <description>SETUP Phase Done</description>
20476 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
20482 <description>No OUT Token Received When Endpoint Disabled</description>
20487 <description>OUT Token Received When Endpoint Disabled</description>
20494 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
20500 <description>No Status Phase Received for Control Write</description>
20505 <description>Status Phase Received for Control Write</description>
20512 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
20518 <description>No Back-to-Back SETUP Packets Received</description>
20523 <description>Back-to-Back SETUP Packets Received</description>
20530 <description>OUT Packet Error (OutPktErr)</description>
20536 <description>No OUT Packet Error</description>
20541 <description>OUT Packet Error</description>
20548 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
20554 <description>No BNA interrupt</description>
20559 <description>BNA interrupt</description>
20566 <description>Packet Drop Status (PktDrpSts)</description>
20572 <description>No interrupt</description>
20577 <description>Packet Drop Status interrupt</description>
20584 <description>NAK Interrupt (BbleErr)</description>
20590 <description>No BbleErr interrupt</description>
20595 <description>BbleErr interrupt</description>
20602 <description>NAK Interrupt (NAKInterrupt)</description>
20608 <description>No NAK interrupt</description>
20613 <description>NAK Interrupt</description>
20620 <description>NYET Interrupt (NYETIntrpt)</description>
20626 <description>No NYET interrupt</description>
20631 <description>NYET Interrupt</description>
20638 <description>Setup Packet Received</description>
20644 <description>No Setup packet received</description>
20649 <description>Setup packet received</description>
20658 <description>Device OUT Endpoint Transfer Size Register</description>
20666 <description>Transfer Size (XferSize)</description>
20672 <description>Packet Count (PktCnt)</description>
20678 <description>RxDPID</description>
20685 <description>DATA0</description>
20690 <description>DATA2 or 1 packet</description>
20695 <description>DATA1 or 2 packets</description>
20700 <description>MDATA or 3 packets</description>
20709 <description>Device OUT Endpoint DMA Address Register</description>
20717 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
20725 <description>Device Control OUT Endpoint Control Register</description>
20733 <description>Maximum Packet Size (MPS)</description>
20739 <description>USB Active Endpoint (USBActEP)</description>
20745 <description>Not Active</description>
20750 <description>USB Active Endpoint</description>
20757 <description>Endpoint Data PID (DPID)</description>
20764 <description>Endpoint Data PID not active</description>
20769 <description>Endpoint Data PID active</description>
20776 <description>NAK Status (NAKSts)</description>
20783 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
20788 … <description>The core is transmitting NAK handshakes on this endpoint</description>
20795 <description>Endpoint Type (EPType)</description>
20801 <description>Control</description>
20806 <description>Isochronous</description>
20811 <description>Bulk</description>
20816 <description>Interrupt</description>
20823 <description>STALL Handshake (Stall)</description>
20829 <description>STALL All non-active tokens</description>
20834 <description>STALL All Active Tokens</description>
20847 <description>No Clear NAK</description>
20852 <description>Clear NAK</description>
20859 <description>Set NAK (SNAK)</description>
20866 <description>No Set NAK</description>
20871 <description>Set NAK</description>
20878 <description>Set DATA0 PID (SetD0PID)</description>
20885 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
20890 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
20897 <description>Set DATA1 PID (SetD1PID)</description>
20904 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
20909 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
20916 <description>Endpoint Disable (EPDis)</description>
20922 <description>No Action</description>
20927 <description>Disable Endpoint</description>
20934 <description>Endpoint Enable (EPEna)</description>
20940 <description>No Action</description>
20945 <description>Enable Endpoint</description>
20954 <description>Device OUT Endpoint Interrupt Register</description>
20962 <description>Transfer Completed Interrupt (XferCompl)</description>
20968 <description>No Transfer Complete Interrupt</description>
20973 <description>Transfer Complete Interrupt</description>
20980 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
20986 <description>No Endpoint Disabled Interrupt</description>
20991 <description>Endpoint Disabled Interrupt</description>
20998 <description>AHB Error (AHBErr)</description>
21004 <description>No AHB Error Interrupt</description>
21009 <description>AHB Error interrupt</description>
21016 <description>SETUP Phase Done (SetUp)</description>
21022 <description>No SETUP Phase Done</description>
21027 <description>SETUP Phase Done</description>
21034 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
21040 <description>No OUT Token Received When Endpoint Disabled</description>
21045 <description>OUT Token Received When Endpoint Disabled</description>
21052 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
21058 <description>No Status Phase Received for Control Write</description>
21063 <description>Status Phase Received for Control Write</description>
21070 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
21076 <description>No Back-to-Back SETUP Packets Received</description>
21081 <description>Back-to-Back SETUP Packets Received</description>
21088 <description>OUT Packet Error (OutPktErr)</description>
21094 <description>No OUT Packet Error</description>
21099 <description>OUT Packet Error</description>
21106 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
21112 <description>No BNA interrupt</description>
21117 <description>BNA interrupt</description>
21124 <description>Packet Drop Status (PktDrpSts)</description>
21130 <description>No interrupt</description>
21135 <description>Packet Drop Status interrupt</description>
21142 <description>NAK Interrupt (BbleErr)</description>
21148 <description>No BbleErr interrupt</description>
21153 <description>BbleErr interrupt</description>
21160 <description>NAK Interrupt (NAKInterrupt)</description>
21166 <description>No NAK interrupt</description>
21171 <description>NAK Interrupt</description>
21178 <description>NYET Interrupt (NYETIntrpt)</description>
21184 <description>No NYET interrupt</description>
21189 <description>NYET Interrupt</description>
21196 <description>Setup Packet Received</description>
21202 <description>No Setup packet received</description>
21207 <description>Setup packet received</description>
21216 <description>Device OUT Endpoint Transfer Size Register</description>
21224 <description>Transfer Size (XferSize)</description>
21230 <description>Packet Count (PktCnt)</description>
21236 <description>RxDPID</description>
21243 <description>DATA0</description>
21248 <description>DATA2 or 1 packet</description>
21253 <description>DATA1 or 2 packets</description>
21258 <description>MDATA or 3 packets</description>
21267 <description>Device OUT Endpoint DMA Address Register</description>
21275 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
21283 <description>Device Control OUT Endpoint Control Register</description>
21291 <description>Maximum Packet Size (MPS)</description>
21297 <description>USB Active Endpoint (USBActEP)</description>
21303 <description>Not Active</description>
21308 <description>USB Active Endpoint</description>
21315 <description>Endpoint Data PID (DPID)</description>
21322 <description>Endpoint Data PID not active</description>
21327 <description>Endpoint Data PID active</description>
21334 <description>NAK Status (NAKSts)</description>
21341 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
21346 … <description>The core is transmitting NAK handshakes on this endpoint</description>
21353 <description>Endpoint Type (EPType)</description>
21359 <description>Control</description>
21364 <description>Isochronous</description>
21369 <description>Bulk</description>
21374 <description>Interrupt</description>
21381 <description>STALL Handshake (Stall)</description>
21387 <description>STALL All non-active tokens</description>
21392 <description>STALL All Active Tokens</description>
21405 <description>No Clear NAK</description>
21410 <description>Clear NAK</description>
21417 <description>Set NAK (SNAK)</description>
21424 <description>No Set NAK</description>
21429 <description>Set NAK</description>
21436 <description>Set DATA0 PID (SetD0PID)</description>
21443 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
21448 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
21455 <description>Set DATA1 PID (SetD1PID)</description>
21462 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
21467 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
21474 <description>Endpoint Disable (EPDis)</description>
21480 <description>No Action</description>
21485 <description>Disable Endpoint</description>
21492 <description>Endpoint Enable (EPEna)</description>
21498 <description>No Action</description>
21503 <description>Enable Endpoint</description>
21512 <description>Device OUT Endpoint Interrupt Register</description>
21520 <description>Transfer Completed Interrupt (XferCompl)</description>
21526 <description>No Transfer Complete Interrupt</description>
21531 <description>Transfer Complete Interrupt</description>
21538 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
21544 <description>No Endpoint Disabled Interrupt</description>
21549 <description>Endpoint Disabled Interrupt</description>
21556 <description>AHB Error (AHBErr)</description>
21562 <description>No AHB Error Interrupt</description>
21567 <description>AHB Error interrupt</description>
21574 <description>SETUP Phase Done (SetUp)</description>
21580 <description>No SETUP Phase Done</description>
21585 <description>SETUP Phase Done</description>
21592 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
21598 <description>No OUT Token Received When Endpoint Disabled</description>
21603 <description>OUT Token Received When Endpoint Disabled</description>
21610 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
21616 <description>No Status Phase Received for Control Write</description>
21621 <description>Status Phase Received for Control Write</description>
21628 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
21634 <description>No Back-to-Back SETUP Packets Received</description>
21639 <description>Back-to-Back SETUP Packets Received</description>
21646 <description>OUT Packet Error (OutPktErr)</description>
21652 <description>No OUT Packet Error</description>
21657 <description>OUT Packet Error</description>
21664 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
21670 <description>No BNA interrupt</description>
21675 <description>BNA interrupt</description>
21682 <description>Packet Drop Status (PktDrpSts)</description>
21688 <description>No interrupt</description>
21693 <description>Packet Drop Status interrupt</description>
21700 <description>NAK Interrupt (BbleErr)</description>
21706 <description>No BbleErr interrupt</description>
21711 <description>BbleErr interrupt</description>
21718 <description>NAK Interrupt (NAKInterrupt)</description>
21724 <description>No NAK interrupt</description>
21729 <description>NAK Interrupt</description>
21736 <description>NYET Interrupt (NYETIntrpt)</description>
21742 <description>No NYET interrupt</description>
21747 <description>NYET Interrupt</description>
21754 <description>Setup Packet Received</description>
21760 <description>No Setup packet received</description>
21765 <description>Setup packet received</description>
21774 <description>Device OUT Endpoint Transfer Size Register</description>
21782 <description>Transfer Size (XferSize)</description>
21788 <description>Packet Count (PktCnt)</description>
21794 <description>RxDPID</description>
21801 <description>DATA0</description>
21806 <description>DATA2 or 1 packet</description>
21811 <description>DATA1 or 2 packets</description>
21816 <description>MDATA or 3 packets</description>
21825 <description>Device OUT Endpoint DMA Address Register</description>
21833 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
21841 <description>Device Control OUT Endpoint Control Register</description>
21849 <description>Maximum Packet Size (MPS)</description>
21855 <description>USB Active Endpoint (USBActEP)</description>
21861 <description>Not Active</description>
21866 <description>USB Active Endpoint</description>
21873 <description>Endpoint Data PID (DPID)</description>
21880 <description>Endpoint Data PID not active</description>
21885 <description>Endpoint Data PID active</description>
21892 <description>NAK Status (NAKSts)</description>
21899 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
21904 … <description>The core is transmitting NAK handshakes on this endpoint</description>
21911 <description>Endpoint Type (EPType)</description>
21917 <description>Control</description>
21922 <description>Isochronous</description>
21927 <description>Bulk</description>
21932 <description>Interrupt</description>
21939 <description>STALL Handshake (Stall)</description>
21945 <description>STALL All non-active tokens</description>
21950 <description>STALL All Active Tokens</description>
21963 <description>No Clear NAK</description>
21968 <description>Clear NAK</description>
21975 <description>Set NAK (SNAK)</description>
21982 <description>No Set NAK</description>
21987 <description>Set NAK</description>
21994 <description>Set DATA0 PID (SetD0PID)</description>
22001 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
22006 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
22013 <description>Set DATA1 PID (SetD1PID)</description>
22020 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
22025 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
22032 <description>Endpoint Disable (EPDis)</description>
22038 <description>No Action</description>
22043 <description>Disable Endpoint</description>
22050 <description>Endpoint Enable (EPEna)</description>
22056 <description>No Action</description>
22061 <description>Enable Endpoint</description>
22070 <description>Device OUT Endpoint Interrupt Register</description>
22078 <description>Transfer Completed Interrupt (XferCompl)</description>
22084 <description>No Transfer Complete Interrupt</description>
22089 <description>Transfer Complete Interrupt</description>
22096 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
22102 <description>No Endpoint Disabled Interrupt</description>
22107 <description>Endpoint Disabled Interrupt</description>
22114 <description>AHB Error (AHBErr)</description>
22120 <description>No AHB Error Interrupt</description>
22125 <description>AHB Error interrupt</description>
22132 <description>SETUP Phase Done (SetUp)</description>
22138 <description>No SETUP Phase Done</description>
22143 <description>SETUP Phase Done</description>
22150 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
22156 <description>No OUT Token Received When Endpoint Disabled</description>
22161 <description>OUT Token Received When Endpoint Disabled</description>
22168 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
22174 <description>No Status Phase Received for Control Write</description>
22179 <description>Status Phase Received for Control Write</description>
22186 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
22192 <description>No Back-to-Back SETUP Packets Received</description>
22197 <description>Back-to-Back SETUP Packets Received</description>
22204 <description>OUT Packet Error (OutPktErr)</description>
22210 <description>No OUT Packet Error</description>
22215 <description>OUT Packet Error</description>
22222 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
22228 <description>No BNA interrupt</description>
22233 <description>BNA interrupt</description>
22240 <description>Packet Drop Status (PktDrpSts)</description>
22246 <description>No interrupt</description>
22251 <description>Packet Drop Status interrupt</description>
22258 <description>NAK Interrupt (BbleErr)</description>
22264 <description>No BbleErr interrupt</description>
22269 <description>BbleErr interrupt</description>
22276 <description>NAK Interrupt (NAKInterrupt)</description>
22282 <description>No NAK interrupt</description>
22287 <description>NAK Interrupt</description>
22294 <description>NYET Interrupt (NYETIntrpt)</description>
22300 <description>No NYET interrupt</description>
22305 <description>NYET Interrupt</description>
22312 <description>Setup Packet Received</description>
22318 <description>No Setup packet received</description>
22323 <description>Setup packet received</description>
22332 <description>Device OUT Endpoint Transfer Size Register</description>
22340 <description>Transfer Size (XferSize)</description>
22346 <description>Packet Count (PktCnt)</description>
22352 <description>RxDPID</description>
22359 <description>DATA0</description>
22364 <description>DATA2 or 1 packet</description>
22369 <description>DATA1 or 2 packets</description>
22374 <description>MDATA or 3 packets</description>
22383 <description>Device OUT Endpoint DMA Address Register</description>
22391 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
22399 <description>Device Control OUT Endpoint Control Register</description>
22407 <description>Maximum Packet Size (MPS)</description>
22413 <description>USB Active Endpoint (USBActEP)</description>
22419 <description>Not Active</description>
22424 <description>USB Active Endpoint</description>
22431 <description>Endpoint Data PID (DPID)</description>
22438 <description>Endpoint Data PID not active</description>
22443 <description>Endpoint Data PID active</description>
22450 <description>NAK Status (NAKSts)</description>
22457 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
22462 … <description>The core is transmitting NAK handshakes on this endpoint</description>
22469 <description>Endpoint Type (EPType)</description>
22475 <description>Control</description>
22480 <description>Isochronous</description>
22485 <description>Bulk</description>
22490 <description>Interrupt</description>
22497 <description>STALL Handshake (Stall)</description>
22503 <description>STALL All non-active tokens</description>
22508 <description>STALL All Active Tokens</description>
22521 <description>No Clear NAK</description>
22526 <description>Clear NAK</description>
22533 <description>Set NAK (SNAK)</description>
22540 <description>No Set NAK</description>
22545 <description>Set NAK</description>
22552 <description>Set DATA0 PID (SetD0PID)</description>
22559 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
22564 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
22571 <description>Set DATA1 PID (SetD1PID)</description>
22578 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
22583 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
22590 <description>Endpoint Disable (EPDis)</description>
22596 <description>No Action</description>
22601 <description>Disable Endpoint</description>
22608 <description>Endpoint Enable (EPEna)</description>
22614 <description>No Action</description>
22619 <description>Enable Endpoint</description>
22628 <description>Device OUT Endpoint Interrupt Register</description>
22636 <description>Transfer Completed Interrupt (XferCompl)</description>
22642 <description>No Transfer Complete Interrupt</description>
22647 <description>Transfer Complete Interrupt</description>
22654 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
22660 <description>No Endpoint Disabled Interrupt</description>
22665 <description>Endpoint Disabled Interrupt</description>
22672 <description>AHB Error (AHBErr)</description>
22678 <description>No AHB Error Interrupt</description>
22683 <description>AHB Error interrupt</description>
22690 <description>SETUP Phase Done (SetUp)</description>
22696 <description>No SETUP Phase Done</description>
22701 <description>SETUP Phase Done</description>
22708 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
22714 <description>No OUT Token Received When Endpoint Disabled</description>
22719 <description>OUT Token Received When Endpoint Disabled</description>
22726 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
22732 <description>No Status Phase Received for Control Write</description>
22737 <description>Status Phase Received for Control Write</description>
22744 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
22750 <description>No Back-to-Back SETUP Packets Received</description>
22755 <description>Back-to-Back SETUP Packets Received</description>
22762 <description>OUT Packet Error (OutPktErr)</description>
22768 <description>No OUT Packet Error</description>
22773 <description>OUT Packet Error</description>
22780 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
22786 <description>No BNA interrupt</description>
22791 <description>BNA interrupt</description>
22798 <description>Packet Drop Status (PktDrpSts)</description>
22804 <description>No interrupt</description>
22809 <description>Packet Drop Status interrupt</description>
22816 <description>NAK Interrupt (BbleErr)</description>
22822 <description>No BbleErr interrupt</description>
22827 <description>BbleErr interrupt</description>
22834 <description>NAK Interrupt (NAKInterrupt)</description>
22840 <description>No NAK interrupt</description>
22845 <description>NAK Interrupt</description>
22852 <description>NYET Interrupt (NYETIntrpt)</description>
22858 <description>No NYET interrupt</description>
22863 <description>NYET Interrupt</description>
22870 <description>Setup Packet Received</description>
22876 <description>No Setup packet received</description>
22881 <description>Setup packet received</description>
22890 <description>Device OUT Endpoint Transfer Size Register</description>
22898 <description>Transfer Size (XferSize)</description>
22904 <description>Packet Count (PktCnt)</description>
22910 <description>RxDPID</description>
22917 <description>DATA0</description>
22922 <description>DATA2 or 1 packet</description>
22927 <description>DATA1 or 2 packets</description>
22932 <description>MDATA or 3 packets</description>
22941 <description>Device OUT Endpoint DMA Address Register</description>
22949 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
22957 <description>Power and Clock Gating Control Register</description>
22965 <description>Stop Pclk (StopPclk)</description>
22971 <description>Disable Stop Pclk</description>
22976 <description>Enable Stop Pclk</description>
22983 <description>Gate Hclk (GateHclk)</description>
22989 … <description>Clears this bit when the USB is resumed or a new session starts</description>
22994 …<description>Sets this bit to gate hclk to modules when the USB is suspended or the session is not…
23001 <description>Reset Power-Down Modules (RstPdwnModule)</description>
23007 <description>Power is turned on</description>
23012 <description>Power is turned off</description>
23019 <description>Enable Sleep Clock Gating</description>
23025 <description>The PHY clock is not gated in Sleep state</description>
23030 … <description>The Core internal clock gating is enabled in Sleep state</description>
23037 <description>PHY In Sleep</description>
23044 <description>Phy not in Sleep state</description>
23049 <description>Phy in Sleep state</description>
23056 <description>L1 Deep Sleep</description>
23063 <description>Non Deep Sleep</description>
23068 <description>Deep Sleep</description>
23075 <description>Restore Mode (RestoreMode)</description>
23081 …description>In Host mode,this bit indicates Host-initiated Resume and Reset. In Device mode, this …
23086 …description>In Host mode,this bit indicates Device-initiated Remote Wakeup. In Device mode, this b…
23093 <description>Essential Register Values Restored (EssRegRestored)</description>
23100 <description>Register values of essential registers are not restored</description>
23105 … <description>Register values of essential registers have been restored</description>
23112 <description>Restore Value (RestoreValue)</description>
23120 <description>Global STAR Fix Disable Register</description>
23128 …<description>Disable the STAR fix added for Device controller to go back to low power mode when Ho…
23134 …<description>Device controller goes back into SUSPENDED state when host ignores Remote Wakeup</des…
23139 …<description>Device controller waits indefinitely without entering SUSPENDED state when host ignor…
23146 …<description>Disable the STAR fix added for Device controller to detect lineK and move to RESUMING…
23152 <description>Device controller detects line K and resumes</description>
23157 <description>Device controller does not detect line K and resume</description>
23164 …description>Disable the STAR fix added for Device controller to reject DATA0 for the first Control…
23170 <description>Transaction Error reported when host sends DATA0 PID</description>
23175 … <description>Transaction Error not reported when host sends DATA0 PID</description>
23182 …<description>Disable the STAR fix added for Host controller to flag error for SSPLIT STALL/NYET</d…
23188 … <description>Transaction Error reported when device sends STALL/NYET for SSPLIT</description>
23193 … <description>Transaction Error not reported when device sends STALL/NYET for SSPLIT</description>
23200 …<description>Disable the STAR fix added for Host controller to accept DATA1 PID from device for IS…
23206 …<description>Transaction Error not reported when device sends DATA1 PID for ISOC Split</descriptio…
23211 … <description>Transaction Error reported when device sends DATA1 PID for ISOC Split</description>
23218 …<description>Disable the STAR fix added for Host controller to handle Faulty cable scenarios</desc…
23224 <description>Fix for handling faulty cable enabled</description>
23229 <description>Fix for handling faulty cable disabled</description>
23236 …<description>Disable the STAR fix added for Host controller LS mode IPG increment from 2 LS bit ti…
23242 <description>Host LS mode IPG is 3 LS bit times</description>
23247 <description>Host LS mode IPG is 2 LS bit times</description>
23254 …<description>Disable the STAR fix added for Device controller to transition to IDLE state during F…
23260 … <description>Device controller transitions to IDLE state during FS device disconnect</description>
23265 …<description>Device controller does not transition to IDLE state during FS device disconnect</desc…
23272 …<description>Disable the STAR fix added for Device controller to not start Remote Wakeup signallin…
23278 …<description>Device controller does not start remote wakeup signalling when host resume has alread…
23283 …<description>Device controller is allowed to start remote wakeup signalling when host resume has a…
23290 …<description>Disable the STAR fix added for Device controller to not hang when Remote Wakeup signa…
23296 …<description>Device controller does not hang when remote wakeup signalling clashes with host resum…
23301 …<description>Device controller hangs when remote wakeup signalling clashes with host resume during…
23308 …description>Disable the STAR fix added for Host controller to wait for IPG duration to send next t…
23314 <description>Host controller checks IPG after NAK/STALL for IN token</description>
23319 … <description>Host controller does not check IPG after NAK/STALL for IN token</description>
23326 …description>Disable the STAR fix added for Host controller to increase the gap between utmi_xcvrse…
23332 …<description>Host controller asserts utmi_txvalid at least 2 utmi_clk cycles after utmi_xcvrselect…
23337 …<description>Host controller can assert utmi_txvalid after 1 utmi_clk cycle of utmi_xcvrselect swi…
23344 …description>Disable the STAR fix added for Host controller to increase the preamble transceiver se…
23350 …description>Host controller waits for previous functional register update to complete before switc…
23355 …description>Host controller does not wait for the previous functional register update to complete …
23362 …description>Disable the STAR fix added for Host controller to report transaction error when DATA0 …
23368 …<description>Host controller reports transaction error when DATA0 PID is received for CTRL STATUS …
23373 …<description>Host controller retries the transfer when DATA0 PID is received for CTRL STATUS IN tr…
23380 …<description>Disable the correction to OpMode/XcvrSel/TermSel on UTMI Interface in Host mode.</des…
23386 …<description>Opmode, XcvrSel, TermSel are changed by the Host Controller after TxValid goes LOW (1…
23391 …description>Opmode, XcvrSel, TermSel are changed by the Host Controller without waiting for TxVali…
23398 …<description>Disable the STAR fix added for correcting Opmode and XcvrSel on UTMI Interface when r…
23404 …<description>Valid Combination of Opmode and XcvrSel is driven when reset is detected in suspend s…
23409 …<description>Invalid Combination of Opmode and XcvrSel is driven when reset is detected in suspend…
23416 …<description>Disable the STAR fix added for correcting Txvalid deassertion on UTMI Interface when …
23422 …<description>Txvalid is deasserted during soft disconnect after receiving Txready from the PHY</de…
23427 …<description>Txvalid is deasserted during soft disconnect without waiting for Txready from the PHY…
23434 …<description>Disable the STAR fix added for correcting Host behavior when port is disabled.</descr…
23440 <description>Txvalid is not asserted when port is disabled</description>
23445 <description>Txvalid can be asserted when port is disabled</description>
23456 <description>Unspecified</description>
23464 <description>Description collection: Data FIFO Access Register Map 0</description>
23473 <description>Unspecified</description>
23481 <description>Description collection: Data FIFO Direct Access Register Map</description>
23492 <description>I3CCORE 0</description>
23507 <description>Unspecified</description>
23513 <description>DWC_mipi_i3c control Register</description>
23521 <description>I3C Broadcast Address include</description>
23527 <description>Unspecified</description>
23532 <description>Unspecified</description>
23539 <description>I2C Slave Present</description>
23545 <description>Unspecified</description>
23550 <description>Unspecified</description>
23557 <description>Hot-Join ACK/NACK Control</description>
23563 <description>Unspecified</description>
23568 <description>Unspecified</description>
23575 <description>Idle Count Multiplier</description>
23581 <description>Unspecified</description>
23586 <description>Unspecified</description>
23591 <description>Unspecified</description>
23596 <description>Unspecified</description>
23603 <description>This field is used in Slave mode of operation.</description>
23609 <description>DMA Handshake Interface Enable</description>
23615 <description>The DMA handshake control has no significance.</description>
23620 … <description>Enables the DMA handshake control to interact with external DMA.</description>
23627 <description>DWC_mipi_i3c Abort</description>
23633 <description>DWC_mipi_i3c Resume</description>
23639 <description>Controls whether or not DWC_mipi_i3c is enabled.</description>
23645 <description>Disables the DWC_mipi_i3c controller</description>
23650 <description>Enables the DWC_mipi_i3c controller.</description>
23659 …<description>In the master mode of operation this Register is used to program the Device Dynamic A…
23667 <description>Device Static Address.</description>
23673 <description>Static Address Valid.</description>
23679 <description>Unspecified</description>
23684 <description>Unspecified</description>
23691 <description>Device Dynamic Address.</description>
23697 <description>Dynamic Address Valid</description>
23703 <description>Unspecified</description>
23708 <description>Unspecified</description>
23717 <description>Hardware Capability register</description>
23725 <description>Reflects the IC_DEVICE_ROLE Configurable Parameter.</description>
23732 <description>Master Only</description>
23737 <description>Programmable Master-Slave</description>
23742 <description>Secondary Master</description>
23747 <description>Slave Only</description>
23754 <description>Reflects the IC_SPEED_HDR_DDR Configurable Parameter.</description>
23761 <description>HDR-DDR not supported</description>
23766 <description>HDR-DDR supported</description>
23773 <description>Reflects the IC_SPEED_HDR_TS Configurable Parameter.</description>
23780 <description>HDR-TS not supported</description>
23785 <description>HDR-TS supported</description>
23792 <description>Reflects the IC_CLK_PERIOD Configurable Parameter</description>
23799 <description>Reflects the IC_HDR_TX_CLK_PERIOD Configurable Parameter.</description>
23806 <description>Reflects the IC_HAS_DMA Configurable Parameter.</description>
23813 <description>Reflects the IC_SLV_HJ Configurable Parameter.</description>
23820 <description>Reflects the IC_SLV_IBI Configurable Parameter.</description>
23829 <description>Command Queue Port.</description>
23837 <description>32 bit command</description>
23846 <description>Response Queue Port</description>
23854 <description>32 bit Response</description>
23863 <description>Receive Data Port Register</description>
23871 <description>Receive Data Port.</description>
23880 <description>Transmit Data Port Register</description>
23889 <description>Transmit Data Port</description>
23898 <description>In-Band Interrupt Queue Data Register</description>
23906 <description>In-Band Interrupt Data</description>
23915 <description>In-Band Interrupt Queue Status Register</description>
23924 <description>In-Band Interrupt data length.</description>
23931 <description>IBI Identifier.</description>
23938 … <description>The acknowledge bit of the IBI Received Status (IBISTS) bitfield.</description>
23945 <description>Responded with ACK</description>
23950 <description>Responded with NACK</description>
23959 <description>Queue Threshold Control Register</description>
23967 <description>Command Buffer Empty Threshold Value.</description>
23973 <description>Response Buffer Threshold Value.</description>
23979 <description>In-Band Interrupt Status Threshold Value.</description>
23987 <description>Data Buffer Threshold Control Register</description>
23995 <description>Transmit Buffer Threshold Value</description>
24001 <description>Unspecified</description>
24006 <description>Unspecified</description>
24011 <description>Unspecified</description>
24016 <description>Unspecified</description>
24021 <description>Unspecified</description>
24026 <description>Unspecified</description>
24033 <description>Receive Buffer Threshold Value</description>
24039 <description>Unspecified</description>
24044 <description>Unspecified</description>
24049 <description>Unspecified</description>
24054 <description>Unspecified</description>
24059 <description>Unspecified</description>
24064 <description>Unspecified</description>
24071 <description>Transfer Start Threshold Value</description>
24077 <description>Unspecified</description>
24082 <description>Unspecified</description>
24087 <description>Unspecified</description>
24092 <description>Unspecified</description>
24097 <description>Unspecified</description>
24102 <description>Unspecified</description>
24109 <description>Receive Start Threshold Value</description>
24115 <description>Unspecified</description>
24120 <description>Unspecified</description>
24125 <description>Unspecified</description>
24130 <description>Unspecified</description>
24135 <description>Unspecified</description>
24140 <description>Unspecified</description>
24149 …<description>This Register is used to control whether or not to intimate the application if an IBI…
24157 <description>Notify Rejected Hot-Join Control.</description>
24163 <description>Unspecified</description>
24168 <description>Unspecified</description>
24175 <description>Notify Rejected Master Request Control.</description>
24181 …description>Suppress passing the IBI Status to the IBI FIFO (hence not notifying the application) …
24186 …description>Writes IBI Status to the IBI FIFO (hence notifying the application) when a MR Request …
24193 <description>Notify Rejected Slave Interrupt Request Control.</description>
24199 …description>Suppress passing the IBI Status to the IBI FIFO (hence not notifying the application) …
24204 …description>Writes IBI Status to the IBI FIFO (hence notifying the application) when a Slave Inter…
24213 <description>IBI Master Request Rejection Control Register.</description>
24221 <description>In-band Master Request Reject.</description>
24227 <description>ACK Master Request.</description>
24232 … <description>NACK and send Directed DISEC CCC to disable the interrupting slave.</description>
24241 <description>IBI SIR Request Rejection Control</description>
24249 <description>In-band Slave Interrupt Request Reject</description>
24255 <description>ACK the SIR Request.</description>
24260 <description>NACK and send directed auto disable CCC.</description>
24269 …<description>This Register is used for general software reset and for individual buffer reset.</de…
24277 <description>Core Software Reset.</description>
24283 <description>Command Queue Software Reset</description>
24289 <description>Response Queue Software Reset</description>
24295 <description>Transmit Buffer Software Reset</description>
24301 <description>Receive Buffer Software Reset.</description>
24307 <description>IBI Queue Software Reset.</description>
24313 <description>Bus Reset type</description>
24319 <description>Exit Pattern.</description>
24324 <description>SCL_LOW_RESET Pattern.</description>
24331 <description>Bus Reset.</description>
24339 …<description>This register indicates the status/values of some events/controls that are relavant t…
24347 <description>Slave Interrupt Request Enable.</description>
24354 <description>Master Request Enable.</description>
24361 <description>Hot-Join Interrupt Enable</description>
24367 <description>Activity State Status.</description>
24374 <description>Unspecified</description>
24379 <description>Unspecified</description>
24384 <description>Unspecified</description>
24389 <description>Unspecified</description>
24396 <description>MRL Updated Status.</description>
24402 <description>MWL Updated Status.</description>
24410 <description>Interrupt Status Register</description>
24418 <description>Transmit Buffer Threshold Status</description>
24425 <description>Receive Buffer Threshold Status.</description>
24432 <description>IBI Buffer Threshold Status.</description>
24439 <description>Command Queue Ready.</description>
24446 <description>Response Queue Ready Status.</description>
24453 <description>Transfer Abort Status.</description>
24459 <description>CCC Table Updated Status.</description>
24465 <description>Dynamic Address Assigned Status.</description>
24471 <description>Transfer Error Status.</description>
24477 <description>Define Slave CCC Received Status.</description>
24483 <description>Read Request Received.</description>
24489 <description>IBI status is updated.</description>
24495 …<description>This interrupt is set when the role of the controller changes from being a Master to …
24501 <description>Bus Reset Pattern Generation Done Status.</description>
24509 <description>Interrupt Status Enable Register.</description>
24517 <description>Transmit Buffer Threshold Status Enable.</description>
24523 <description>Receive Buffer Threshold Status Enable</description>
24529 <description>IBI Buffer Threshold Status Enable.</description>
24535 <description>Command Queue Ready Status Enable</description>
24541 <description>Response Queue Ready Status Enable</description>
24547 <description>Transfer Abort Status Enable.</description>
24553 <description>CCC Table Updated Status Enable.</description>
24559 <description>Dynamic Address Assigned Status Enable</description>
24565 <description>Transfer Error Status Enable</description>
24571 <description>Define Slave CCC Received Status Enable</description>
24577 <description>Read Request Received Status Enable</description>
24583 <description>IBI Updated Status Enable</description>
24589 <description>Bus owner Updated Status Enable</description>
24595 <description>Bus Reset Pattern Generation Done Status Enable.</description>
24603 <description>Interrupt Signal Enable Register</description>
24611 <description>Transmit Buffer Threshold Signal Enable</description>
24617 <description>Receive Buffer Threshold Signal Enable</description>
24623 <description>IBI Buffer Threshold Signal Enable</description>
24629 <description>Command Queue Ready Signal Enable</description>
24635 <description>Response Queue Ready Signal Enable</description>
24641 <description>Transfer Abort Signal Enable</description>
24647 <description>CCC Table Updated Signal Enable</description>
24653 <description>Dynamic Address Assigned Signal Enable</description>
24659 <description>Transfer Error Signal Enable</description>
24665 <description>Define Slave CCC Received Signal Enable</description>
24671 <description>Read Request Received Signal Enable</description>
24677 <description>IBI Updated Signal Enable</description>
24683 <description>Bus owner Updated Signal Enable</description>
24689 <description>Bus Reset Pattern Generation Done Signal Enable.</description>
24697 <description>Interrupt Force Enable Register</description>
24705 <description>Transmit Buffer Threshold Force Enable</description>
24712 <description>Receive Buffer Threshold Force Enable</description>
24719 <description>IBI Buffer Threshold Force Enable</description>
24726 <description>Command Queue Ready Force Enable</description>
24733 <description>Response Queue Ready Force Enable</description>
24740 <description>Transfer Abort Force Enable</description>
24747 <description>CCC Table Updated Force Enable</description>
24754 <description>Dynamic Address Assigned Force Enable</description>
24761 <description>Transfer Error Force Enable</description>
24768 <description>Define Slave CCC Received Force Enable</description>
24775 <description>Read Request Received Force Enable</description>
24782 <description>IBI Updated Force Enable</description>
24789 <description>Bus owner Updated Force Enable</description>
24796 <description>Bus Reset Pattern Generation Done Force Enable.</description>
24805 <description>Queue Status Level Register.</description>
24813 <description>Command Queue Empty Locations.</description>
24820 <description>Response Buffer Level Value.</description>
24827 <description>IBI Buffer Level Value.</description>
24834 <description>IBI Buffer Status Count.</description>
24843 <description>Data Buffer Status Level Register.</description>
24851 <description>Transmit Buffer Empty Level Value.</description>
24858 <description>Receive Buffer Level Value.</description>
24867 …<description>The user can get status of the DWC_mipi_i3c Controller from this 32-bit read only reg…
24875 …<description>This bit is used to check the SCL line level to recover from errors and for debugging…
24882 …<description>This bit is used to check the SDA line level to recover from errors and for debugging…
24889 … <description>This Bit is used to check whether the Master is Current Master or not.</description>
24896 <description>Master is not Current Master</description>
24901 <description>Master is Current Master</description>
24908 <description>Transfer Type Status</description>
24915 …<description>Controller is in Idle state, waiting for commands from application or Slave initated …
24920 <description>Broadcast CCC Write Transfer.</description>
24925 <description>Directed CCC Write Transfer.</description>
24930 <description>Directed CCC Read Transfer.</description>
24935 <description>ENTDAA Address Assignment Transfer.</description>
24940 <description>SETDASA Address Assignment Transfer.</description>
24945 <description>Private I3C SDR Write Transfer.</description>
24950 <description>Private I3C SDR Read Transfer.</description>
24955 <description>Private I2C SDR Write Transfer.</description>
24960 <description>Private I2C SDR Read Transfer.</description>
24965 <description>Private HDR Ternary Symbol(TS) Write Transfer.</description>
24970 <description>Private HDR Ternary Symbol(TS) Read Transfer.</description>
24975 <description>Private HDR Double-Data Rate(DDR) Write Transfer.</description>
24980 <description>Private HDR Double-Data Rate(DDR) Read Transfer.</description>
24985 <description>Servicing In-Band Interrupt Transfer.</description>
24990 …<description>Halt state. Controller is in Halt State, waiting for the application to resume throug…
24997 <description>Current Master Transfer State Status.</description>
25004 …<description>Controller is Idle state, waiting for commands from application or Slave initated In-…
25009 <description>START Generation State.</description>
25014 <description>RESTART Generation State.</description>
25019 <description>STOP Genration State.</description>
25024 … <description>START Hold Generation for the Slave Initiated START State.</description>
25029 … <description>Broadcast Write Address Header(7h7E,W) Generation State.</description>
25034 … <description>Broadcast Read Address Header(7h7E,R) Generation State.</description>
25039 <description>Dynamic Address Assignment State.</description>
25044 <description>Slave Address Generation State.</description>
25049 <description>CCC Byte Generation State.</description>
25054 <description>HDR Command Generation State.</description>
25059 <description>Write Data Transfer State.</description>
25064 <description>Read Data Transfer State.</description>
25069 <description>In-Band Interrupt(SIR) Read Data State.</description>
25074 <description>In-Band Interrupt Auto-Disable State</description>
25079 <description>HDR-DDR CRC Data Generation/Receive State.</description>
25084 <description>Clock Extension State.</description>
25089 <description>Halt State.</description>
25096 …<description>This field reflects the Transaction-ID of the current executing command.</description>
25103 …<description>This field reflects whether the Master Controller is in Idle state or not.</descripti…
25110 <description>Unspecified</description>
25115 <description>Unspecified</description>
25124 …<description>The user can get status of the DWC_mipi_i3c Controller from this 32-bit read only reg…
25133 …<description>This bit is used to check the SCL line level to recover from errors and for debugging…
25140 …<description>This bit is used to check the SDA line level to recover from errors and for debugging…
25147 … <description>This Bit is used to check whether the Master is Current Master or not.</description>
25154 <description>Master is not Current Master</description>
25159 <description>Master is Current Master</description>
25166 <description>Transfer Type Status</description>
25173 <description>Controller is in Idle state.</description>
25178 <description>Hot-Join transfer state.</description>
25183 <description>IBI transfer state.</description>
25188 <description>Master write transfer ongoing.</description>
25193 <description>Read data prefetch state.</description>
25198 <description>Master read transfer ongoing.</description>
25203 … <description>Slave controller in Halt State waiting for resume from application.</description>
25210 <description>Current Master Transfer State Status.</description>
25217 …<description>This field reflects the Transaction-ID of the current executing command.</description>
25224 …<description>This field reflects whether the Master Controller is in Idle state or not.</descripti…
25231 <description>Unspecified</description>
25236 <description>Unspecified</description>
25245 <description>Device Operating Status Register.</description>
25253 <description>Pending Interrupt</description>
25260 <description>Protocol Error</description>
25267 <description>Activity Mode</description>
25274 <description>Underflow error</description>
25281 <description>Slave Busy</description>
25288 <description>Overflow Error</description>
25295 <description>Data not ready</description>
25302 <description>Buffer not available</description>
25309 <description>Frame Error</description>
25318 <description>Pointer for Device Address Table</description>
25326 <description>Start Address of Device Address Table.</description>
25333 <description>Depth of Device Address Table</description>
25342 <description>Pointer for Device Characteristics Table</description>
25350 <description>Start Address of Device Characteristics Table.</description>
25357 <description>Depth of Device Characteristics Table</description>
25364 <description>Current index of Device Characteristics Table.</description>
25372 <description>Pointer for Vendor Specific Registers.</description>
25380 <description>Start Address of Vendor specific registers.</description>
25389 <description>I3C MIPI Manufacturer ID Register.</description>
25397 <description>Specifies the Provisional ID Type Selector (PID[32]).</description>
25403 <description>Specifies the MIPI Manufacturer ID.</description>
25411 <description>I3C Normal Provisional ID Register.</description>
25419 … <description>Specifies the additional 12-bit ID of DWC_mipi_i3c device (PID[11:0]).</description>
25425 … <description>This field is used to program the instance ID of the Slave.</description>
25431 <description>Specifies the Part ID of DWC_mipi_i3c device (PID[31:16])</description>
25439 <description>I3C Slave Characteristic Register.</description>
25447 …<description>Max Data Speed Limitation field in Bus Characteristic Register (BCR[0]).</description>
25453 … <description>IBI Request Capable field in Bus Characteristic Register (BCR[1]).</description>
25460 … <description>IBI Payload field in Bus Characteristic Register (BCR[2]).</description>
25467 … <description>Offline Capable field in Bus Characteristic Register (BCR[3]).</description>
25474 … <description>Bridge Identifier field in Bus Characteristic Register (BCR[4]).</description>
25481 …<description>SDR Only or SDR and HDR Capable field in Bus Characteristic Register (BCR[5]).</descr…
25487 … <description>Device Role field in Bus Characteristic Register (BCR[7:6]).</description>
25493 <description>I3C Device Characteristic Value.</description>
25499 <description>I3C Device HDR Capability Register Value.</description>
25508 <description>I3C Max Write/Read Length Register.</description>
25516 <description>I3C Device Max Write Length</description>
25523 <description>I3C Device Max Read Length.</description>
25532 <description>MXDS Maximum Read Turnaround Time.</description>
25540 …<description>Specifies the maximum read turnaround time (in microseconds (us)) of DWC_mipi_i3c Sla…
25549 …<description>The values in this register are returned by the slave as GETACCMST CCC data.</descrip…
25557 …<description>Specifies the Maximum Sustained Data Rate for non-CCC messages sent by Master Device …
25563 <description>12.5MHz</description>
25568 <description>8MHZ</description>
25573 <description>6MHz</description>
25578 <description>4MHz</description>
25583 <description>2MHz</description>
25590 …<description>Specifies the Maximum Sustained Data Rate for non-CCC messages sent by DWC_mipi_i3c S…
25596 <description>12.5MHz</description>
25601 <description>8MHZ</description>
25606 <description>6MHz</description>
25611 <description>4MHz</description>
25616 <description>2MHz</description>
25623 …<description>Specifies the clock to data turnaround time (Tsco parameter) of DWC_mipi_i3c Slave de…
25629 <description>8ns</description>
25634 <description>9ns</description>
25639 <description>10ns</description>
25644 <description>11ns</description>
25649 <description>12ns</description>
25658 <description>This register is used in slave mode of operation.</description>
25666 <description>Slave Interrupt Request</description>
25672 <description>Slave Interrupt Request Control</description>
25678 <description>Send the Assigned Dynamic Address</description>
25685 <description>Master Request</description>
25691 <description>IBI Completion Status</description>
25698 <description>IBI accepted by the Master (ACK response received)</description>
25703 <description>IBI Not Attempted</description>
25712 <description>TSP/TSL Symbol Timing Register</description>
25720 <description>TSP/TSL Symbol Count Value.</description>
25728 <description>Device Control Extended register.</description>
25736 …<description>This bit is used to select the Device Operation Mode before the controller is enabled…
25742 <description>Unspecified</description>
25747 <description>Unspecified</description>
25754 …<description>In Slave mode of operation, this bit serves as a control to ACK/NACK GETACCMST CCC fr…
25760 <description>ACK GETACCMST CCC</description>
25765 <description>NACK GETACCMST CCC</description>
25774 <description>SCL I3C Open Drain Timing Register</description>
25782 <description>I3C Open Drain Low Count.</description>
25788 <description>I3C Open Drain High Count.</description>
25796 <description>SCL I3C Push Pull Timing Register</description>
25804 <description>I3C Push Pull Low Count.</description>
25810 <description>I3C Push Pull High Count.</description>
25818 <description>SCL I2C Fast Mode Timing Register</description>
25826 <description>I2C Fast Mode Low Count</description>
25832 <description>I2C Fast Mode High Count</description>
25840 <description>SCL I2C Fast Mode Plus Timing Register</description>
25848 <description>I2C Fast Mode Plus Low Count</description>
25854 <description>I2C Fast Mode Plus High Count</description>
25862 <description>SCL Extended Low Count Timing Register.</description>
25870 <description>I3C Extended Low Count Register 1</description>
25876 <description>I3C Extended Low Count Register 2</description>
25882 <description>I3C Extended Low Count Register 3</description>
25888 <description>I3C Extended Low Count Register 4</description>
25896 <description>SCL Termination Bit Low Count Timing Register</description>
25904 <description>I3C Read Termination Bit Low count.</description>
25910 <description>I3C HDR Ternary Skew Count.</description>
25918 <description>SDA Hold and Mode Switch Delay Timing Register</description>
25926 …<description>This field controls the hold time (in term of the core clock period) of the transmit …
25934 <description>Bus Free and Available Timing Register</description>
25942 … <description>This register field is used only in Master mode of operation</description>
25948 … <description>This register field is used only in Slave mode of operation</description>
25956 <description>Bus Idle Timing Register</description>
25964 <description>Bus Idle Count Value.</description>
25972 …<description>The SCL Low Master Extended Timeout register is used to define the duration of the SC…
25980 …<description>This count defines the number of core clock periods to count for generation of the SC…
25988 … <description>This register reflects the current release number of DWC_mipi_i3c</description>
25996 <description>Current release number</description>
26005 … <description>This register reflects the current release type of DWC_mipi_i3c.</description>
26013 <description>Current release type</description>
26022 …<description>This register reflects the configured size of the Data Buffer and Queues in DWC_mipi_…
26030 <description>Transmit Data Buffer Size</description>
26037 <description>2 DWORDS</description>
26042 <description>4 DWORDS</description>
26047 <description>8 DWORDS</description>
26052 <description>16 DWORDS</description>
26057 <description>32 DWORDS</description>
26062 <description>64 DWORDS</description>
26069 <description>Receive Data Buffer Size</description>
26076 <description>2 DWORDS</description>
26081 <description>4 DWORDS</description>
26086 <description>8 DWORDS</description>
26091 <description>16 DWORDS</description>
26096 <description>32 DWORDS</description>
26101 <description>64 DWORDS</description>
26108 <description>Command Queue Size</description>
26115 <description>2 DWORDS</description>
26120 <description>4 DWORDS</description>
26125 <description>8 DWORDS</description>
26130 <description>16 DWORDS</description>
26137 <description>Response Queue Size</description>
26144 <description>2 DWORDS</description>
26149 <description>4 DWORDS</description>
26154 <description>8 DWORDS</description>
26159 <description>16 DWORDS</description>
26166 <description>IBI Queue Size</description>
26173 <description>2 DWORDS</description>
26178 <description>4 DWORDS</description>
26183 <description>8 DWORDS</description>
26188 <description>16 DWORDS</description>
26199 <description>Unspecified</description>
26205 …<description>Description cluster: Device Characteristic Table Location-1 of Device [n]</descriptio…
26213 <description>The LSB 32-bit value of Provisional-ID</description>
26222 …<description>Description cluster: Device Characteristic Table Location-2 of Device [n]</descriptio…
26230 <description>The MSB 16-bit value of Provisional-ID</description>
26239 …<description>Description cluster: Device Characteristic Table Location-3 of Device [n]</descriptio…
26247 <description>Device Characteristic Value</description>
26254 <description>Bus Characteristic Value</description>
26263 …<description>Description cluster: Device Characteristic Table Location-4 of Device [n]</descriptio…
26271 <description>Device Dynamic Address assigned.</description>
26283 …<description>Description collection: Secondary Master Device Characteristic Table Location of Devi…
26291 <description>The Dynamic Addr of Device [n]</description>
26298 <description>The DCR TYPE of Device [n]</description>
26305 <description>The BCR TYPE of Device [n]</description>
26312 <description>The Static Addr of Device [n]</description>
26323 <description>Description collection: Device Address Table of Device [n]</description>
26331 <description>Device Static Address.</description>
26337 <description>Device Dynamic Address with parity.</description>
26343 …<description>This field is used to set the Device NACK Retry count for the particular device.</des…
26349 <description>Legacy I2C device or not.</description>
26358 <description>Unspecified</description>
26364 <description>Unspecified</description>
26370 … <description>This register contains the source address of the DMA transfer.</description>
26378 <description>Current Source Address of DMA transfer.</description>
26386 … <description>This register contains the destination address of the DMA transfer.</description>
26394 <description>Current Destination address of DMA transfer.</description>
26402 … <description>This register contains fields that control the DMA transfer.</description>
26410 <description>Interrupt Enable Bit.</description>
26416 <description>Unspecified</description>
26421 <description>Unspecified</description>
26428 <description>Destination Transfer Width.</description>
26434 <description>Unspecified</description>
26439 <description>Unspecified</description>
26444 <description>Unspecified</description>
26449 <description>Unspecified</description>
26454 <description>Unspecified</description>
26459 <description>Unspecified</description>
26464 <description>Unspecified</description>
26469 <description>Unspecified</description>
26476 <description>Reserved field - read-only</description>
26483 <description>Destination Address Increment.</description>
26489 <description>Unspecified</description>
26494 <description>Unspecified</description>
26499 <description>Unspecified</description>
26504 <description>Unspecified</description>
26511 <description>Source Address Increment.</description>
26517 <description>Unspecified</description>
26522 <description>Unspecified</description>
26527 <description>Unspecified</description>
26532 <description>Unspecified</description>
26539 <description>Destination Burst Transaction Length.</description>
26545 <description>Unspecified</description>
26550 <description>Unspecified</description>
26555 <description>Unspecified</description>
26560 <description>Unspecified</description>
26565 <description>Unspecified</description>
26570 <description>Unspecified</description>
26575 <description>Unspecified</description>
26580 <description>Unspecified</description>
26587 <description>Source Burst Transaction Length.</description>
26593 <description>Unspecified</description>
26598 <description>Unspecified</description>
26603 <description>Unspecified</description>
26608 <description>Unspecified</description>
26613 <description>Unspecified</description>
26618 <description>Unspecified</description>
26623 <description>Unspecified</description>
26628 <description>Unspecified</description>
26635 <description>Reserved field - read-only</description>
26642 <description>Destination scatter enable.</description>
26648 <description>Unspecified</description>
26653 <description>Unspecified</description>
26660 <description>Reserved field - read-only</description>
26667 <description>Transfer Type and Flow Control.</description>
26673 <description>Unspecified</description>
26678 <description>Unspecified</description>
26683 <description>Unspecified</description>
26688 <description>Unspecified</description>
26693 <description>Unspecified</description>
26698 <description>Unspecified</description>
26703 <description>Unspecified</description>
26708 <description>Unspecified</description>
26715 <description>Reserved field - read-only</description>
26722 <description>Reserved field - read-only</description>
26729 <description>Reserved field - read-only</description>
26736 <description>Reserved field - read-only</description>
26743 <description>Reserved field - read-only</description>
26752 … <description>This register contains fields that control the DMA transfer.</description>
26760 <description>Block Transfer Size.</description>
26766 <description>Reserved field - read-only</description>
26773 <description>Done bit.</description>
26779 <description>Unspecified</description>
26784 <description>Unspecified</description>
26793 … <description>This register contains fields that configure the DMA transfer.</description>
26801 <description>Reserved field - read-only</description>
26808 <description>Channel Priority.</description>
26814 <description>Unspecified</description>
26819 <description>Unspecified</description>
26824 <description>Unspecified</description>
26829 <description>Unspecified</description>
26834 <description>Unspecified</description>
26839 <description>Unspecified</description>
26844 <description>Unspecified</description>
26849 <description>Unspecified</description>
26856 <description>Channel Suspend.</description>
26862 <description>Unspecified</description>
26867 <description>Unspecified</description>
26874 <description>Channel FIFO status.</description>
26881 <description>Unspecified</description>
26886 <description>Unspecified</description>
26893 <description>Destination Software or Hardware Handshaking Select.</description>
26899 <description>Unspecified</description>
26904 <description>Unspecified</description>
26911 <description>Source Software or Hardware Handshaking Select.</description>
26917 <description>Unspecified</description>
26922 <description>Unspecified</description>
26929 <description>Reserved field - read-only</description>
26936 <description>Reserved field - read-only</description>
26943 <description>Reserved field - read-only</description>
26950 <description>Reserved field - read-only</description>
26957 <description>Destination Handshaking Interface Polarity.</description>
26963 <description>Unspecified</description>
26968 <description>Unspecified</description>
26975 <description>Source Handshaking Interface Polarity.</description>
26981 <description>Unspecified</description>
26986 <description>Unspecified</description>
26993 <description>Maximum AMBA Burst Length.</description>
26999 <description>Reserved field - read-only</description>
27006 <description>Reserved field- read-only</description>
27015 … <description>This register contains fields that configure the DMA transfer.</description>
27023 <description>Flow Control Mode.</description>
27029 <description>Unspecified</description>
27034 <description>Unspecified</description>
27041 <description>FIFO Mode Select.</description>
27047 <description>Unspecified</description>
27052 <description>Unspecified</description>
27059 … <description>Protection Control bits used to drive the AHB HPROT[3:1] bus.</description>
27065 <description>Reserved field- read-only</description>
27072 <description>Reserved field- read-only</description>
27079 <description>Source Hardware Interface.</description>
27085 <description>Reserved field - read-only</description>
27092 <description>Destination hardware interface.</description>
27098 <description>Reserved field - read-only</description>
27105 <description>Reserved field - read-only</description>
27114 <description>Destination Scatter register.</description>
27122 <description>Destination Scatter Interval.</description>
27128 <description>Destination Scatter Count.</description>
27137 <description>Unspecified</description>
27143 … <description>This register contains the source address of the DMA transfer.</description>
27151 <description>Current Source Address of DMA transfer.</description>
27159 … <description>This register contains the destination address of the DMA transfer.</description>
27167 <description>Current Destination address of DMA transfer.</description>
27175 … <description>This register contains fields that control the DMA transfer.</description>
27183 <description>Interrupt Enable Bit.</description>
27189 <description>Unspecified</description>
27194 <description>Unspecified</description>
27201 <description>Reserved field - read-only</description>
27208 <description>Source Transfer Width.</description>
27214 <description>Unspecified</description>
27219 <description>Unspecified</description>
27224 <description>Unspecified</description>
27229 <description>Unspecified</description>
27234 <description>Unspecified</description>
27239 <description>Unspecified</description>
27244 <description>Unspecified</description>
27249 <description>Unspecified</description>
27256 <description>Destination Address Increment.</description>
27262 <description>Unspecified</description>
27267 <description>Unspecified</description>
27272 <description>Unspecified</description>
27277 <description>Unspecified</description>
27284 <description>Source Address Increment.</description>
27290 <description>Unspecified</description>
27295 <description>Unspecified</description>
27300 <description>Unspecified</description>
27305 <description>Unspecified</description>
27312 <description>Destination Burst Transaction Length.</description>
27318 <description>Unspecified</description>
27323 <description>Unspecified</description>
27328 <description>Unspecified</description>
27333 <description>Unspecified</description>
27338 <description>Unspecified</description>
27343 <description>Unspecified</description>
27348 <description>Unspecified</description>
27353 <description>Unspecified</description>
27360 <description>Source Burst Transaction Length.</description>
27366 <description>Unspecified</description>
27371 <description>Unspecified</description>
27376 <description>Unspecified</description>
27381 <description>Unspecified</description>
27386 <description>Unspecified</description>
27391 <description>Unspecified</description>
27396 <description>Unspecified</description>
27401 <description>Unspecified</description>
27408 <description>Source gather enable.</description>
27414 <description>Unspecified</description>
27419 <description>Unspecified</description>
27426 <description>Reserved field - read-only</description>
27433 <description>Reserved field - read-only</description>
27440 <description>Transfer Type and Flow Control.</description>
27446 <description>Unspecified</description>
27451 <description>Unspecified</description>
27456 <description>Unspecified</description>
27461 <description>Unspecified</description>
27466 <description>Unspecified</description>
27471 <description>Unspecified</description>
27476 <description>Unspecified</description>
27481 <description>Unspecified</description>
27488 <description>Reserved field - read-only</description>
27495 <description>Reserved field - read-only</description>
27502 <description>Reserved field - read-only</description>
27509 <description>Reserved field - read-only</description>
27516 <description>Reserved field - read-only</description>
27525 … <description>This register contains fields that control the DMA transfer.</description>
27533 <description>Block Transfer Size.</description>
27539 <description>Reserved field - read-only</description>
27546 <description>Done bit.</description>
27552 <description>Unspecified</description>
27557 <description>Unspecified</description>
27566 … <description>This register contains fields that configure the DMA transfer.</description>
27574 <description>Reserved field - read-only</description>
27581 <description>Channel Priority.</description>
27587 <description>Unspecified</description>
27592 <description>Unspecified</description>
27597 <description>Unspecified</description>
27602 <description>Unspecified</description>
27607 <description>Unspecified</description>
27612 <description>Unspecified</description>
27617 <description>Unspecified</description>
27622 <description>Unspecified</description>
27629 <description>Channel Suspend.</description>
27635 <description>Unspecified</description>
27640 <description>Unspecified</description>
27647 <description>Channel FIFO status.</description>
27654 <description>Unspecified</description>
27659 <description>Unspecified</description>
27666 <description>Destination Software or Hardware Handshaking Select.</description>
27672 <description>Unspecified</description>
27677 <description>Unspecified</description>
27684 <description>Source Software or Hardware Handshaking Select.</description>
27690 <description>Unspecified</description>
27695 <description>Unspecified</description>
27702 <description>Reserved field - read-only</description>
27709 <description>Reserved field - read-only</description>
27716 <description>Reserved field - read-only</description>
27723 <description>Reserved field - read-only</description>
27730 <description>Destination Handshaking Interface Polarity.</description>
27736 <description>Unspecified</description>
27741 <description>Unspecified</description>
27748 <description>Source Handshaking Interface Polarity.</description>
27754 <description>Unspecified</description>
27759 <description>Unspecified</description>
27766 <description>Maximum AMBA Burst Length.</description>
27772 <description>Reserved field - read-only</description>
27779 <description>Reserved field- read-only</description>
27788 … <description>This register contains fields that configure the DMA transfer.</description>
27796 <description>Flow Control Mode.</description>
27802 <description>Unspecified</description>
27807 <description>Unspecified</description>
27814 <description>FIFO Mode Select.</description>
27820 <description>Unspecified</description>
27825 <description>Unspecified</description>
27832 … <description>Protection Control bits used to drive the AHB HPROT[3:1] bus.</description>
27838 <description>Reserved field- read-only</description>
27845 <description>Reserved field- read-only</description>
27852 <description>Source Hardware Interface.</description>
27858 <description>Reserved field - read-only</description>
27865 <description>Destination hardware interface.</description>
27873 <description>Source Gather register</description>
27881 <description>Source Gather Interval.</description>
27887 <description>Source Gather Count.</description>
27896 <description>Unspecified</description>
27902 …<description>Interrupt events are stored in this Raw Interrupt Status register before masking.</de…
27910 <description>Raw Status for IntTfr Interrupt</description>
27916 <description>Unspecified</description>
27921 <description>Unspecified</description>
27930 …<description>Interrupt events are stored in this Raw Interrupt Status register before masking.</de…
27938 <description>Raw Status for IntBlock Interrupt</description>
27944 <description>Unspecified</description>
27949 <description>Unspecified</description>
27958 …<description>Interrupt events are stored in this Raw Interrupt Status register before masking.</de…
27966 <description>Raw Status for IntSrcTran Interrupt</description>
27972 <description>Unspecified</description>
27977 <description>Unspecified</description>
27986 …<description>Interrupt events are stored in this Raw Interrupt Status register before masking.</de…
27994 <description>Raw Status for IntDstTran Interrupt</description>
28000 <description>Unspecified</description>
28005 <description>Unspecified</description>
28014 …<description>Interrupt events are stored in this Raw Interrupt Status register before masking.</de…
28022 <description>Raw Status for IntErr Interrupt</description>
28028 <description>Unspecified</description>
28033 <description>Unspecified</description>
28042 …<description>Channel DMA Transfer complete interrupt event from all channels is stored in this Int…
28050 <description>Status for IntTfr Interrupt</description>
28057 <description>Unspecified</description>
28062 <description>Unspecified</description>
28071 …<description>Channel Block complete interrupt event from all channels is stored in this Interrupt …
28079 <description>Status for IntBlock Interrupt</description>
28086 <description>Unspecified</description>
28091 <description>Unspecified</description>
28100 …description>Channel Source Transaction complete interrupt event from all channels is stored in thi…
28108 <description>Status for IntSrcTran Interrupt</description>
28115 <description>Unspecified</description>
28120 <description>Unspecified</description>
28129 …description>Channel destination transaction complete interrupt event from all channels is stored i…
28137 <description>Status for IntDstTran Interrupt</description>
28144 <description>Unspecified</description>
28149 <description>Unspecified</description>
28158 …<description>Channel Error interrupt event from all channels is stored in this Interrupt Status re…
28166 <description>Status for IntErr Interrupt</description>
28173 <description>Unspecified</description>
28178 <description>Unspecified</description>
28187 …<description>The contents of the Raw Status register RawTfr is masked with the contents of the Mas…
28195 <description>Mask for IntTfr Interrupt</description>
28201 <description>Unspecified</description>
28206 <description>Unspecified</description>
28213 <description>Reserved field - read-only</description>
28220 <description>Interrupt Mask Write Enable</description>
28227 <description>Unspecified</description>
28232 <description>Unspecified</description>
28241 …<description>The contents of the Raw Status register RawBlock is masked with the contents of the M…
28249 <description>Mask for IntBlock Interrupt</description>
28255 <description>Unspecified</description>
28260 <description>Unspecified</description>
28267 <description>Reserved field- read-only</description>
28274 <description>Interrupt Mask Write Enable</description>
28281 <description>Unspecified</description>
28286 <description>Unspecified</description>
28295 …<description>The contents of the Raw Status register RawSrcTran is masked with the contents of the…
28303 <description>Mask for IntSrcTran Interrupt</description>
28309 <description>Unspecified</description>
28314 <description>Unspecified</description>
28321 <description>Reserved field- read-only</description>
28328 <description>Interrupt Mask Write Enable</description>
28335 <description>Unspecified</description>
28340 <description>Unspecified</description>
28349 …<description>The contents of the Raw Status register RawDstTran is masked with the contents of the…
28357 <description>Mask for IntDstTran Interrupt</description>
28363 <description>Unspecified</description>
28368 <description>Unspecified</description>
28375 <description>Reserved field - read-only</description>
28382 <description>Interrupt Mask Write Enable</description>
28389 <description>Unspecified</description>
28394 <description>Unspecified</description>
28403 …<description>The contents of the Raw Status register RawErr is masked with the contents of the Mas…
28411 <description>Mask for IntErr Interrupt</description>
28417 <description>Unspecified</description>
28422 <description>Unspecified</description>
28429 <description>Reserved field- read-only</description>
28436 <description>Interrupt Mask Write Enable</description>
28443 <description>Unspecified</description>
28448 <description>Unspecified</description>
28457 …description>Each bit in the RawTfr and StatusTfr is cleared on the same cycle by writing a 1 to th…
28465 <description>Clear for IntTfr Interrupt</description>
28472 <description>Unspecified</description>
28477 <description>Unspecified</description>
28486 …description>Each bit in the RawBlock and StatusBlock is cleared on the same cycle by writing a 1 t…
28494 <description>Clear for IntBlock Interrupt</description>
28503 …description>Each bit in the RawSrcTran and StatusSrcTran is cleared on the same cycle by writing a…
28511 <description>Clear for IntSrcTran Interrupt</description>
28518 <description>Unspecified</description>
28523 <description>Unspecified</description>
28532 …description>Each bit in the RawDstTran and StatusDstTran is cleared on the same cycle by writing a…
28540 <description>Clear for IntDstTran Interrupt</description>
28547 <description>Unspecified</description>
28552 <description>Unspecified</description>
28561 …description>Each bit in the RawErr and StatusErr is cleared on the same cycle by writing a 1 to th…
28569 <description>Clear for IntErr Interrupt</description>
28576 <description>Unspecified</description>
28581 <description>Unspecified</description>
28590 …description>The contents of each of the five Status registers StatusTfr, StatusBlock, StatusSrcTr…
28598 <description>OR of the contents of StatusTfr register</description>
28605 <description>Unspecified</description>
28610 <description>Unspecified</description>
28617 <description>OR of the contents of StatusBlock register</description>
28624 <description>Unspecified</description>
28629 <description>Unspecified</description>
28636 <description>OR of the contents of StatusSrcTran</description>
28643 <description>Unspecified</description>
28648 <description>Unspecified</description>
28655 <description>OR of the contents of StatusDstTran</description>
28662 <description>Unspecified</description>
28667 <description>Unspecified</description>
28674 <description>OR of the contents of StatusErr</description>
28681 <description>Unspecified</description>
28686 <description>Unspecified</description>
28696 <description>Unspecified</description>
28702 <description>A bit is assigned for each channel in this register.</description>
28710 <description>Source Software Transaction Request</description>
28716 <description>Unspecified</description>
28721 <description>Unspecified</description>
28728 <description>Reserved field - read-only</description>
28735 <description>Source Software Transaction Request write enable</description>
28742 <description>Unspecified</description>
28747 <description>Unspecified</description>
28756 <description>A bit is assigned for each channel in this register.</description>
28764 <description>Destination Software Transaction Request</description>
28770 <description>Unspecified</description>
28775 <description>Unspecified</description>
28782 <description>Reserved field - read-only</description>
28789 <description>Destination Software Transaction Request write enable</description>
28796 <description>Unspecified</description>
28801 <description>Unspecified</description>
28810 <description>A bit is assigned for each channel in this register.</description>
28818 <description>Source Single Transaction Request</description>
28824 <description>Unspecified</description>
28829 <description>Unspecified</description>
28836 <description>Reserved field - read-only</description>
28843 <description>Source Single Transaction Request write enable</description>
28850 <description>Unspecified</description>
28855 <description>Unspecified</description>
28864 <description>A bit is assigned for each channel in this register.</description>
28872 <description>Destination Single Transaction Request</description>
28878 <description>Unspecified</description>
28883 <description>Unspecified</description>
28890 <description>Reserved field - read-only</description>
28897 <description>Destination Single Transaction Request write enable</description>
28904 <description>Unspecified</description>
28909 <description>Unspecified</description>
28918 <description>A bit is assigned for each channel in this register.</description>
28926 <description>Source Last Transaction Request register</description>
28932 <description>Unspecified</description>
28937 <description>Unspecified</description>
28944 <description>Reserved field- read-only</description>
28951 <description>Source Last Transaction Request write enable</description>
28958 <description>Unspecified</description>
28963 <description>Unspecified</description>
28972 <description>A bit is assigned for each channel in this register.</description>
28980 <description>Destination Last Transaction Request</description>
28986 <description>Unspecified</description>
28991 <description>Unspecified</description>
28998 <description>Reserved field - read-only</description>
29005 <description>Source Last Transaction Request write enable</description>
29012 <description>Unspecified</description>
29017 <description>Unspecified</description>
29027 <description>Unspecified</description>
29033 …<description>This register is used to enable the DW_ahb_dmac, which must be done before any channe…
29041 <description>DW_ahb_dmac Enable bit.</description>
29047 <description>Unspecified</description>
29052 <description>Unspecified</description>
29061 <description>This is the DW_ahb_dmac Channel Enable Register.</description>
29069 <description>Channel Enable.</description>
29075 <description>Unspecified</description>
29080 <description>Unspecified</description>
29087 <description>Reserved field - read-only</description>
29094 <description>Channel enable register</description>
29103 …description>This is the DW_ahb_dmac ID register, which is a read-only register that reads back the…
29111 <description>Hardcoded DW_ahb_dmac peripheral ID.</description>
29120 …description>This register is used to put the AHB slave interface into test mode, during which the …
29128 <description>DMA Test register</description>
29134 <description>Unspecified</description>
29139 <description>Unspecified</description>
29148 <description>This register holds the timeout value of Low Power Counter.</description>
29156 … <description>This field holds timeout value of low power counter register.</description>
29164 …description>DMA_COMP_PARAMS_6L is a constant read-only register that contains encoded information …
29172 …<description>The value of this register is derived from the DMAH_CH7_DTW coreConsultant parameter.…
29179 <description>Unspecified</description>
29184 <description>Unspecified</description>
29189 <description>Unspecified</description>
29194 <description>Unspecified</description>
29199 <description>Unspecified</description>
29204 <description>Unspecified</description>
29209 <description>Unspecified</description>
29216 …<description>The value of this register is derived from the DMAH_CH7_STW coreConsultant parameter.…
29223 <description>Unspecified</description>
29228 <description>Unspecified</description>
29233 <description>Unspecified</description>
29238 <description>Unspecified</description>
29243 <description>Unspecified</description>
29248 <description>Unspecified</description>
29253 <description>Unspecified</description>
29260 …<description>The value of this register is derived from the DMAH_CH7_STAT_DST coreConsultant param…
29267 <description>Unspecified</description>
29272 <description>Unspecified</description>
29279 …<description>The value of this register is derived from the DMAH_CH7_STAT_SRC coreConsultant param…
29286 <description>Unspecified</description>
29291 <description>Unspecified</description>
29298 …<description>The value of this register is derived from the DMAH_CH7_DST_SCA_EN coreConsultant par…
29305 <description>Unspecified</description>
29310 <description>Unspecified</description>
29317 …<description>The value of this register is derived from the DMAH_CH7_SRC_GAT_EN coreConsultant par…
29324 <description>Unspecified</description>
29329 <description>Unspecified</description>
29336 …<description>The value of this register is derived from the DMAH_CH7_LOCK_EN coreConsultant parame…
29343 <description>Unspecified</description>
29348 <description>Unspecified</description>
29355 …<description>The value of this register is derived from the DMAH_CH7_MULTI_BLK_EN coreConsultant p…
29362 <description>Unspecified</description>
29367 <description>Unspecified</description>
29374 …<description>The value of this register is derived from the DMAH_CH7_CTL_WB_EN coreConsultant para…
29381 <description>Unspecified</description>
29386 <description>Unspecified</description>
29393 …<description>The value of this register is derived from the DMAH_CH7_HC_LLP coreConsultant paramet…
29400 <description>Unspecified</description>
29405 <description>Unspecified</description>
29412 …<description>The value of this register is derived from the DMAH_CH7_FC coreConsultant parameter.<…
29419 <description>Unspecified</description>
29424 <description>Unspecified</description>
29429 <description>Unspecified</description>
29434 <description>Unspecified</description>
29441 …<description>The value of this register is derived from the DMAH_CH7_MULT_SIZE coreConsultant para…
29448 <description>Unspecified</description>
29453 <description>Unspecified</description>
29458 <description>Unspecified</description>
29463 <description>Unspecified</description>
29468 <description>Unspecified</description>
29473 <description>Unspecified</description>
29478 <description>Unspecified</description>
29485 …<description>The value of this register is derived from the DMAH_CH7_DMS coreConsultant parameter.…
29492 <description>Unspecified</description>
29497 <description>Unspecified</description>
29502 <description>Unspecified</description>
29507 <description>Unspecified</description>
29512 <description>Unspecified</description>
29519 …<description>The value of this register is derived from the DMAH_CH7_LMS coreConsultant parameter.…
29526 <description>Unspecified</description>
29531 <description>Unspecified</description>
29536 <description>Unspecified</description>
29541 <description>Unspecified</description>
29546 <description>Unspecified</description>
29553 …<description>The value of this register is derived from the DMAH_CH7_SMS coreConsultant parameter.…
29560 <description>Unspecified</description>
29565 <description>Unspecified</description>
29570 <description>Unspecified</description>
29575 <description>Unspecified</description>
29580 <description>Unspecified</description>
29587 …<description>The value of this register is derived from the DMAH_CH7_FIFO_DEPTH coreConsultant par…
29594 <description>Unspecified</description>
29599 <description>Unspecified</description>
29604 <description>Unspecified</description>
29609 <description>Unspecified</description>
29614 <description>Unspecified</description>
29619 <description>Unspecified</description>
29628 …description>DMA_COMP_PARAMS_5 is a constant read-only register that contains encoded information a…
29636 …<description>The value of this register is derived from the DMAH_CH6_DTW coreConsultant parameter.…
29643 <description>Unspecified</description>
29648 <description>Unspecified</description>
29653 <description>Unspecified</description>
29658 <description>Unspecified</description>
29663 <description>Unspecified</description>
29668 <description>Unspecified</description>
29673 <description>Unspecified</description>
29680 …<description>The value of this register is derived from the DMAH_CH6_STW coreConsultant parameter.…
29687 <description>Unspecified</description>
29692 <description>Unspecified</description>
29697 <description>Unspecified</description>
29702 <description>Unspecified</description>
29707 <description>Unspecified</description>
29712 <description>Unspecified</description>
29717 <description>Unspecified</description>
29724 …<description>The value of this register is derived from the DMAH_CH6_STAT_DST coreConsultant param…
29731 <description>Unspecified</description>
29736 <description>Unspecified</description>
29743 …<description>The value of this register is derived from the DMAH_CH6_STAT_SRC coreConsultant param…
29750 <description>Unspecified</description>
29755 <description>Unspecified</description>
29762 …<description>The value of this register is derived from the DMAH_CH6_DST_SCA_EN coreConsultant par…
29769 <description>Unspecified</description>
29774 <description>Unspecified</description>
29781 …<description>The value of this register is derived from the CH6_SRC_GAT_EN coreConsultant paramete…
29788 <description>Unspecified</description>
29793 <description>Unspecified</description>
29800 …<description>The value of this register is derived from the DMAH_CH6_LOCK_EN coreConsultant parame…
29807 <description>Unspecified</description>
29812 <description>Unspecified</description>
29819 …<description>The value of this register is derived from the DMAH_CH6_MULTI_BLK_EN coreConsultant p…
29826 <description>Unspecified</description>
29831 <description>Unspecified</description>
29838 …<description>The value of this register is derived from the DMAH_CH6_CTL_WB_EN coreConsultant para…
29845 <description>Unspecified</description>
29850 <description>Unspecified</description>
29857 …<description>The value of this register is derived from the DMAH_CH6_HC_LLP coreConsultant paramet…
29864 <description>Unspecified</description>
29869 <description>Unspecified</description>
29876 …<description>The value of this register is derived from the DMAH_CH6_FC coreConsultant parameter.<…
29883 <description>Unspecified</description>
29888 <description>Unspecified</description>
29893 <description>Unspecified</description>
29898 <description>Unspecified</description>
29905 …<description>The value of this register is derived from the DMAH_CH6_MULT_SIZE coreConsultant para…
29912 <description>Unspecified</description>
29917 <description>Unspecified</description>
29922 <description>Unspecified</description>
29927 <description>Unspecified</description>
29932 <description>Unspecified</description>
29937 <description>Unspecified</description>
29942 <description>Unspecified</description>
29949 …<description>The value of this register is derived from the DMAH_CH6_DMS coreConsultant parameter.…
29956 <description>Unspecified</description>
29961 <description>Unspecified</description>
29966 <description>Unspecified</description>
29971 <description>Unspecified</description>
29976 <description>Unspecified</description>
29983 …<description>The value of this register is derived from the DMAH_CH6_LMS coreConsultant parameter.…
29990 <description>Unspecified</description>
29995 <description>Unspecified</description>
30000 <description>Unspecified</description>
30005 <description>Unspecified</description>
30010 <description>Unspecified</description>
30017 …<description>The value of this register is derived from the DMAH_CH6_SMS coreConsultant parameter.…
30024 <description>Unspecified</description>
30029 <description>Unspecified</description>
30034 <description>Unspecified</description>
30039 <description>Unspecified</description>
30044 <description>Unspecified</description>
30051 …<description>The value of this register is derived from the DMAH_CH6_FIFO_DEPTH coreConsultant par…
30058 <description>Unspecified</description>
30063 <description>Unspecified</description>
30068 <description>Unspecified</description>
30073 <description>Unspecified</description>
30078 <description>Unspecified</description>
30083 <description>Unspecified</description>
30092 …description>DMA_COMP_PARAMS_5 is a constant read-only register that contains encoded information a…
30100 …<description>The value of this register is derived from the DMAH_CH5_DTW coreConsultant parameter.…
30107 <description>Unspecified</description>
30112 <description>Unspecified</description>
30117 <description>Unspecified</description>
30122 <description>Unspecified</description>
30127 <description>Unspecified</description>
30132 <description>Unspecified</description>
30137 <description>Unspecified</description>
30144 …<description>The value of this register is derived from the DMAH_CH5_STW coreConsultant parameter.…
30151 <description>Unspecified</description>
30156 <description>Unspecified</description>
30161 <description>Unspecified</description>
30166 <description>Unspecified</description>
30171 <description>Unspecified</description>
30176 <description>Unspecified</description>
30181 <description>Unspecified</description>
30188 …<description>The value of this register is derived from the DMAH_CH5_STAT_DST coreConsultant param…
30195 <description>Unspecified</description>
30200 <description>Unspecified</description>
30207 …<description>The value of this register is derived from the DMAH_CH5_STAT_SRC coreConsultant param…
30214 <description>Unspecified</description>
30219 <description>Unspecified</description>
30226 …<description>The value of this register is derived from the DMAH_CH5_DST_SCA_EN coreConsultant par…
30233 <description>Unspecified</description>
30238 <description>Unspecified</description>
30245 …<description>The value of this register is derived from the DMAH_CH5_SRC_GAT_EN coreConsultant par…
30252 <description>Unspecified</description>
30257 <description>Unspecified</description>
30264 …<description>The value of this register is derived from the DMAH_CH5_LOCK_EN coreConsultant parame…
30271 <description>Unspecified</description>
30276 <description>Unspecified</description>
30283 …<description>The value of this register is derived from the DMAH_CH5_MULTI_BLK_EN coreConsultant p…
30290 <description>Unspecified</description>
30295 <description>Unspecified</description>
30302 …<description>The value of this register is derived from the DMAH_CH5_CTL_WB_EN coreConsultant para…
30309 <description>Unspecified</description>
30314 <description>Unspecified</description>
30321 …<description>The value of this register is derived from the DMAH_CH5_HC_LLP coreConsultant paramet…
30328 <description>Unspecified</description>
30333 <description>Unspecified</description>
30340 …<description>The value of this register is derived from the DMAH_CH5_FC coreConsultant parameter.<…
30347 <description>Unspecified</description>
30352 <description>Unspecified</description>
30357 <description>Unspecified</description>
30362 <description>Unspecified</description>
30369 …<description>The value of this register is derived from the DMAH_CH5_MULT_SIZE coreConsultant para…
30376 <description>Unspecified</description>
30381 <description>Unspecified</description>
30386 <description>Unspecified</description>
30391 <description>Unspecified</description>
30396 <description>Unspecified</description>
30401 <description>Unspecified</description>
30406 <description>Unspecified</description>
30413 …<description>The value of this register is derived from the DMAH_CH5_DMS coreConsultant parameter.…
30420 <description>Unspecified</description>
30425 <description>Unspecified</description>
30430 <description>Unspecified</description>
30435 <description>Unspecified</description>
30440 <description>Unspecified</description>
30447 …<description>The value of this register is derived from the DMAH_CH5_LMS coreConsultant parameter.…
30454 <description>Unspecified</description>
30459 <description>Unspecified</description>
30464 <description>Unspecified</description>
30469 <description>Unspecified</description>
30474 <description>Unspecified</description>
30481 …<description>The value of this register is derived from the DMAH_CH5_SMS coreConsultant parameter.…
30488 <description>Unspecified</description>
30493 <description>Unspecified</description>
30498 <description>Unspecified</description>
30503 <description>Unspecified</description>
30508 <description>Unspecified</description>
30515 …<description>The value of this register is derived from the DMAH_CH5_FIFO_DEPTH coreConsultant par…
30522 <description>Unspecified</description>
30527 <description>Unspecified</description>
30532 <description>Unspecified</description>
30537 <description>Unspecified</description>
30542 <description>Unspecified</description>
30547 <description>Unspecified</description>
30556 …description>DMA_COMP_PARAMS_4 is a constant read-only register that contains encoded information a…
30564 …<description>The value of this register is derived from the DMAH_CH4_DTW coreConsultant parameter.…
30571 <description>Unspecified</description>
30576 <description>Unspecified</description>
30581 <description>Unspecified</description>
30586 <description>Unspecified</description>
30591 <description>Unspecified</description>
30596 <description>Unspecified</description>
30601 <description>Unspecified</description>
30608 …<description>The value of this register is derived from the DMAH_CH4_STW coreConsultant parameter.…
30615 <description>Unspecified</description>
30620 <description>Unspecified</description>
30625 <description>Unspecified</description>
30630 <description>Unspecified</description>
30635 <description>Unspecified</description>
30640 <description>Unspecified</description>
30645 <description>Unspecified</description>
30652 …<description>The value of this register is derived from the DMAH_CH4_STAT_DST coreConsultant param…
30659 <description>Unspecified</description>
30664 <description>Unspecified</description>
30671 …<description>The value of this register is derived from the DMAH_CH4_STAT_SRC coreConsultant param…
30678 <description>Unspecified</description>
30683 <description>Unspecified</description>
30690 …<description>The value of this register is derived from the DMAH_CH4_DST_SCA_EN coreConsultant par…
30697 <description>Unspecified</description>
30702 <description>Unspecified</description>
30709 …<description>The value of this register is derived from the DMAH_CH4_SRC_GAT_EN coreConsultant par…
30716 <description>Unspecified</description>
30721 <description>Unspecified</description>
30728 …<description>The value of this register is derived from the DMAH_CH4_LOCK_EN coreConsultant parame…
30735 <description>Unspecified</description>
30740 <description>Unspecified</description>
30747 …<description>The value of this register is derived from the DMAH_CH4_MULTI_BLK_EN coreConsultant p…
30754 <description>Unspecified</description>
30759 <description>Unspecified</description>
30766 …<description>The value of this register is derived from the DMAH_CH4_CTL_WB_EN coreConsultant para…
30773 <description>Unspecified</description>
30778 <description>Unspecified</description>
30785 …<description>The value of this register is derived from the DMAH_CH4_HC_LLP coreConsultant paramet…
30792 <description>Unspecified</description>
30797 <description>Unspecified</description>
30804 …<description>The value of this register is derived from the DMAH_CH4_FC coreConsultant parameter.<…
30811 <description>Unspecified</description>
30816 <description>Unspecified</description>
30821 <description>Unspecified</description>
30826 <description>Unspecified</description>
30833 …<description>The value of this register is derived from the DMAH_CH4_MULT_SIZE coreConsultant para…
30840 <description>Unspecified</description>
30845 <description>Unspecified</description>
30850 <description>Unspecified</description>
30855 <description>Unspecified</description>
30860 <description>Unspecified</description>
30865 <description>Unspecified</description>
30870 <description>Unspecified</description>
30877 …<description>The value of this register is derived from the DMAH_CH4_DMS coreConsultant parameter.…
30884 <description>Unspecified</description>
30889 <description>Unspecified</description>
30894 <description>Unspecified</description>
30899 <description>Unspecified</description>
30904 <description>Unspecified</description>
30911 …<description>The value of this register is derived from the DMAH_CH4_LMS coreConsultant parameter.…
30918 <description>Unspecified</description>
30923 <description>Unspecified</description>
30928 <description>Unspecified</description>
30933 <description>Unspecified</description>
30938 <description>Unspecified</description>
30945 …<description>The value of this register is derived from the DMAH_CH4_SMS coreConsultant parameter.…
30952 <description>Unspecified</description>
30957 <description>Unspecified</description>
30962 <description>Unspecified</description>
30967 <description>Unspecified</description>
30972 <description>Unspecified</description>
30979 …<description>The value of this register is derived from the DMAH_CH4_FIFO_DEPTH coreConsultant par…
30986 <description>Unspecified</description>
30991 <description>Unspecified</description>
30996 <description>Unspecified</description>
31001 <description>Unspecified</description>
31006 <description>Unspecified</description>
31011 <description>Unspecified</description>
31020 …description>DMA_COMP_PARAMS_4 is a constant read-only register that contains encoded information a…
31028 …<description>The value of this register is derived from the DMAH_CH3_DTW coreConsultant parameter.…
31035 <description>Unspecified</description>
31040 <description>Unspecified</description>
31045 <description>Unspecified</description>
31050 <description>Unspecified</description>
31055 <description>Unspecified</description>
31060 <description>Unspecified</description>
31065 <description>Unspecified</description>
31072 …<description>The value of this register is derived from the DMAH_CH3_STW coreConsultant parameter.…
31079 <description>Unspecified</description>
31084 <description>Unspecified</description>
31089 <description>Unspecified</description>
31094 <description>Unspecified</description>
31099 <description>Unspecified</description>
31104 <description>Unspecified</description>
31109 <description>Unspecified</description>
31116 …<description>The value of this register is derived from the DMAH_CH3_STAT_DST coreConsultant param…
31123 <description>Unspecified</description>
31128 <description>Unspecified</description>
31135 …<description>The value of this register is derived from the DMAH_CH3_STAT_SRC coreConsultant param…
31142 <description>Unspecified</description>
31147 <description>Unspecified</description>
31154 …<description>The value of this register is derived from the DMAH_CH3_DST_SCA_EN coreConsultant par…
31161 <description>Unspecified</description>
31166 <description>Unspecified</description>
31173 …<description>The value of this register is derived from the DMAH_CH3_SRC_GAT_EN coreConsultant par…
31180 <description>Unspecified</description>
31185 <description>Unspecified</description>
31192 …<description>The value of this register is derived from the DMAH_CH3_LOCK_EN coreConsultant parame…
31199 <description>Unspecified</description>
31204 <description>Unspecified</description>
31211 …<description>The value of this register is derived from the DMAH_CH3_MULTI_BLK_EN coreConsultant p…
31218 <description>Unspecified</description>
31223 <description>Unspecified</description>
31230 …<description>The value of this register is derived from the DMAH_CH3_CTL_WB_EN coreConsultant para…
31237 <description>Unspecified</description>
31242 <description>Unspecified</description>
31249 …<description>The value of this register is derived from the DMAH_CH3_HC_LLP coreConsultant paramet…
31256 <description>Unspecified</description>
31261 <description>Unspecified</description>
31268 …<description>The value of this register is derived from the DMAH_CH3_FC coreConsultant parameter.<…
31275 <description>Unspecified</description>
31280 <description>Unspecified</description>
31285 <description>Unspecified</description>
31290 <description>Unspecified</description>
31297 …<description>The value of this register is derived from the DMAH_CH3_MULT_SIZE coreConsultant para…
31304 <description>Unspecified</description>
31309 <description>Unspecified</description>
31314 <description>Unspecified</description>
31319 <description>Unspecified</description>
31324 <description>Unspecified</description>
31329 <description>Unspecified</description>
31334 <description>Unspecified</description>
31341 …<description>The value of this register is derived from the DMAH_CH3_DMS coreConsultant parameter.…
31348 <description>Unspecified</description>
31353 <description>Unspecified</description>
31358 <description>Unspecified</description>
31363 <description>Unspecified</description>
31368 <description>Unspecified</description>
31375 …<description>The value of this register is derived from the DMAH_CH3_LMS coreConsultant parameter.…
31382 <description>Unspecified</description>
31387 <description>Unspecified</description>
31392 <description>Unspecified</description>
31397 <description>Unspecified</description>
31402 <description>Unspecified</description>
31409 …<description>The value of this register is derived from the DMAH_CH3_SMS coreConsultant parameter.…
31416 <description>Unspecified</description>
31421 <description>Unspecified</description>
31426 <description>Unspecified</description>
31431 <description>Unspecified</description>
31436 <description>Unspecified</description>
31443 …<description>The value of this register is derived from the DMAH_CH3_FIFO_DEPTH coreConsultant par…
31450 <description>Unspecified</description>
31455 <description>Unspecified</description>
31460 <description>Unspecified</description>
31465 <description>Unspecified</description>
31470 <description>Unspecified</description>
31475 <description>Unspecified</description>
31484 …description>DMA_COMP_PARAMS_3 is a constant read-only register that contains encoded information a…
31492 …<description>The value of this register is derived from the DMAH_CH2_DTW coreConsultant parameter.…
31499 <description>Unspecified</description>
31504 <description>Unspecified</description>
31509 <description>Unspecified</description>
31514 <description>Unspecified</description>
31519 <description>Unspecified</description>
31524 <description>Unspecified</description>
31529 <description>Unspecified</description>
31536 …<description>The value of this register is derived from the DMAH_CH2_STW coreConsultant parameter.…
31543 <description>Unspecified</description>
31548 <description>Unspecified</description>
31553 <description>Unspecified</description>
31558 <description>Unspecified</description>
31563 <description>Unspecified</description>
31568 <description>Unspecified</description>
31573 <description>Unspecified</description>
31580 …<description>The value of this register is derived from the DMAH_CH2_STAT_DST coreConsultant param…
31587 <description>Unspecified</description>
31592 <description>Unspecified</description>
31599 …<description>The value of this register is derived from the DMAH_CH2_STAT_SRC coreConsultant param…
31606 <description>Unspecified</description>
31611 <description>Unspecified</description>
31618 …<description>The value of this register is derived from the DMAH_CH2_DST_SCA_EN coreConsultant par…
31625 <description>Unspecified</description>
31630 <description>Unspecified</description>
31637 …<description>The value of this register is derived from the DMAH_CH2_SRC_GAT_EN coreConsultant par…
31644 <description>Unspecified</description>
31649 <description>Unspecified</description>
31656 …<description>The value of this register is derived from the DMAH_CH2_LOCK_EN coreConsultant parame…
31663 <description>Unspecified</description>
31668 <description>Unspecified</description>
31675 …<description>The value of this register is derived from the DMAH_CH2_MULTI_BLK_EN coreConsultant p…
31682 <description>Unspecified</description>
31687 <description>Unspecified</description>
31694 …<description>The value of this register is derived from the DMAH_CH2_CTL_WB_EN coreConsultant para…
31701 <description>Unspecified</description>
31706 <description>Unspecified</description>
31713 …<description>The value of this register is derived from the DMAH_CH2_HC_LLP coreConsultant paramet…
31720 <description>Unspecified</description>
31725 <description>Unspecified</description>
31732 …<description>The value of this register is derived from the DMAH_CH2_FC coreConsultant parameter.<…
31739 <description>Unspecified</description>
31744 <description>Unspecified</description>
31749 <description>Unspecified</description>
31754 <description>Unspecified</description>
31761 …<description>The value of this register is derived from the DMAH_CH2_MULT_SIZE coreConsultant para…
31768 <description>Unspecified</description>
31773 <description>Unspecified</description>
31778 <description>Unspecified</description>
31783 <description>Unspecified</description>
31788 <description>Unspecified</description>
31793 <description>Unspecified</description>
31798 <description>Unspecified</description>
31805 …<description>The value of this register is derived from the DMAH_CH2_DMS coreConsultant parameter.…
31812 <description>Unspecified</description>
31817 <description>Unspecified</description>
31822 <description>Unspecified</description>
31827 <description>Unspecified</description>
31832 <description>Unspecified</description>
31839 …<description>The value of this register is derived from the DMAH_CH2_LMS coreConsultant parameter.…
31846 <description>Unspecified</description>
31851 <description>Unspecified</description>
31856 <description>Unspecified</description>
31861 <description>Unspecified</description>
31866 <description>Unspecified</description>
31873 …<description>The value of this register is derived from the DMAH_CH2_SMS coreConsultant parameter.…
31880 <description>Unspecified</description>
31885 <description>Unspecified</description>
31890 <description>Unspecified</description>
31895 <description>Unspecified</description>
31900 <description>Unspecified</description>
31907 …<description>The value of this register is derived from the DMAH_CH2_FIFO_DEPTH coreConsultant par…
31914 <description>Unspecified</description>
31919 <description>Unspecified</description>
31924 <description>Unspecified</description>
31929 <description>Unspecified</description>
31934 <description>Unspecified</description>
31939 <description>Unspecified</description>
31948 …description>DMA_COMP_PARAMS_3 is a constant read-only register that contains encoded information a…
31956 …<description>The value of this register is derived from the DMAH_CH1_DTW coreConsultant parameter.…
31963 <description>Unspecified</description>
31968 <description>Unspecified</description>
31973 <description>Unspecified</description>
31978 <description>Unspecified</description>
31983 <description>Unspecified</description>
31988 <description>Unspecified</description>
31993 <description>Unspecified</description>
32000 …<description>The value of this register is derived from the DMAH_CH1_STW coreConsultant parameter.…
32007 <description>Unspecified</description>
32012 <description>Unspecified</description>
32017 <description>Unspecified</description>
32022 <description>Unspecified</description>
32027 <description>Unspecified</description>
32032 <description>Unspecified</description>
32037 <description>Unspecified</description>
32044 …<description>The value of this register is derived from the DMAH_CH1_STAT_DST coreConsultant param…
32051 <description>Unspecified</description>
32056 <description>Unspecified</description>
32063 …<description>The value of this register is derived from the DMAH_CH1_STAT_SRC coreConsultant param…
32070 <description>Unspecified</description>
32075 <description>Unspecified</description>
32082 …<description>The value of this register is derived from the DMAH_CH1_DST_SCA_EN coreConsultant par…
32089 <description>Unspecified</description>
32094 <description>Unspecified</description>
32101 …<description>The value of this register is derived from the DMAH_CH1_SRC_GAT_EN coreConsultant par…
32108 <description>Unspecified</description>
32113 <description>Unspecified</description>
32120 …<description>The value of this register is derived from the DMAH_CH1_LOCK_EN coreConsultant parame…
32127 <description>Unspecified</description>
32132 <description>Unspecified</description>
32139 …<description>The value of this register is derived from the DMAH_CH1_MULTI_BLK_EN coreConsultant p…
32146 <description>Unspecified</description>
32151 <description>Unspecified</description>
32158 …<description>The value of this register is derived from the DMAH_CH1_CTL_WB_EN coreConsultant para…
32165 <description>Unspecified</description>
32170 <description>Unspecified</description>
32177 …<description>The value of this register is derived from the DMAH_CH1_HC_LLP coreConsultant paramet…
32184 <description>Unspecified</description>
32189 <description>Unspecified</description>
32196 …<description>The value of this register is derived from the DMAH_CH1_FC coreConsultant parameter.<…
32203 <description>Unspecified</description>
32208 <description>Unspecified</description>
32213 <description>Unspecified</description>
32218 <description>Unspecified</description>
32225 …<description>The value of this register is derived from the DMAH_CH1_MULT_SIZE coreConsultant para…
32232 <description>Unspecified</description>
32237 <description>Unspecified</description>
32242 <description>Unspecified</description>
32247 <description>Unspecified</description>
32252 <description>Unspecified</description>
32257 <description>Unspecified</description>
32262 <description>Unspecified</description>
32269 …<description>The value of this register is derived from the DMAH_CH1_DMS coreConsultant parameter.…
32276 <description>Unspecified</description>
32281 <description>Unspecified</description>
32286 <description>Unspecified</description>
32291 <description>Unspecified</description>
32296 <description>Unspecified</description>
32303 …<description>The value of this register is derived from the DMAH_CH1_LMS coreConsultant parameter.…
32310 <description>Unspecified</description>
32315 <description>Unspecified</description>
32320 <description>Unspecified</description>
32325 <description>Unspecified</description>
32330 <description>Unspecified</description>
32337 …<description>The value of this register is derived from the DMAH_CH1_SMS coreConsultant parameter.…
32344 <description>Unspecified</description>
32349 <description>Unspecified</description>
32354 <description>Unspecified</description>
32359 <description>Unspecified</description>
32364 <description>Unspecified</description>
32371 …<description>The value of this register is derived from the DMAH_CH1_FIFO_DEPTH coreConsultant par…
32378 <description>Unspecified</description>
32383 <description>Unspecified</description>
32388 <description>Unspecified</description>
32393 <description>Unspecified</description>
32398 <description>Unspecified</description>
32403 <description>Unspecified</description>
32412 …<description>DMA_COMP_PARAMS_2 is a constant read-only register that contains encoded information …
32420 …<description>The value of this register is derived from the DMAH_CH0_DTW coreConsultant parameter.…
32427 <description>Unspecified</description>
32432 <description>Unspecified</description>
32437 <description>Unspecified</description>
32442 <description>Unspecified</description>
32447 <description>Unspecified</description>
32452 <description>Unspecified</description>
32457 <description>Unspecified</description>
32464 …<description>The value of this register is derived from the DMAH_CH0_STW coreConsultant parameter.…
32471 <description>Unspecified</description>
32476 <description>Unspecified</description>
32481 <description>Unspecified</description>
32486 <description>Unspecified</description>
32491 <description>Unspecified</description>
32496 <description>Unspecified</description>
32501 <description>Unspecified</description>
32508 …<description>The value of this register is derived from the DMAH_CH0_STAT_DST coreConsultant param…
32515 <description>Unspecified</description>
32520 <description>Unspecified</description>
32527 …<description>The value of this register is derived from the DMAH_CH0_STAT_SRC coreConsultant param…
32534 <description>Unspecified</description>
32539 <description>Unspecified</description>
32546 …<description>The value of this register is derived from the DMAH_CH0_DST_SCA_EN coreConsultant par…
32553 <description>Unspecified</description>
32558 <description>Unspecified</description>
32565 …<description>The value of this register is derived from the DMAH_CH0_SRC_GAT_EN coreConsultant par…
32572 <description>Unspecified</description>
32577 <description>Unspecified</description>
32584 …<description>The value of this register is derived from the DMAH_CH0_LOCK_EN coreConsultant parame…
32591 <description>Unspecified</description>
32596 <description>Unspecified</description>
32603 …<description>The value of this register is derived from the DMAH_CH0_MULTI_BLK_EN coreConsultant p…
32610 <description>Unspecified</description>
32615 <description>Unspecified</description>
32622 …<description>The value of this register is derived from the DMAH_CH0_CTL_WB_EN coreConsultant para…
32629 <description>Unspecified</description>
32634 <description>Unspecified</description>
32641 …<description>The value of this register is derived from the DMAH_CH0_HC_LLP coreConsultant paramet…
32648 <description>Unspecified</description>
32653 <description>Unspecified</description>
32660 …<description>The value of this register is derived from the DMAH_CH0_FC coreConsultant parameter.<…
32667 <description>Unspecified</description>
32672 <description>Unspecified</description>
32677 <description>Unspecified</description>
32682 <description>Unspecified</description>
32689 …<description>The value of this register is derived from the DMAH_CH0_MULT_SIZE coreConsultant para…
32696 <description>Unspecified</description>
32701 <description>Unspecified</description>
32706 <description>Unspecified</description>
32711 <description>Unspecified</description>
32716 <description>Unspecified</description>
32721 <description>Unspecified</description>
32726 <description>Unspecified</description>
32733 …<description>The value of this register is derived from the DMAH_CH0_DMS coreConsultant parameter.…
32740 <description>Unspecified</description>
32745 <description>Unspecified</description>
32750 <description>Unspecified</description>
32755 <description>Unspecified</description>
32760 <description>Unspecified</description>
32767 …<description>The value of this register is derived from the DMAH_CH0_LMS coreConsultant parameter.…
32774 <description>Unspecified</description>
32779 <description>Unspecified</description>
32784 <description>Unspecified</description>
32789 <description>Unspecified</description>
32794 <description>Unspecified</description>
32801 …<description>The value of this register is derived from the DMAH_CH0_SMS coreConsultant parameter.…
32808 <description>Unspecified</description>
32813 <description>Unspecified</description>
32818 <description>Unspecified</description>
32823 <description>Unspecified</description>
32828 <description>Unspecified</description>
32835 …<description>The value of this register is derived from the DMAH_CH0_FIFO_DEPTH coreConsultant par…
32842 <description>Unspecified</description>
32847 <description>Unspecified</description>
32852 <description>Unspecified</description>
32857 <description>Unspecified</description>
32862 <description>Unspecified</description>
32867 <description>Unspecified</description>
32876 …<description>DMA_COMP_PARAMS_2 is a constant read-only register that contains encoded information …
32884 …<description>The values of these bit fields are derived from the DMAH_CH0_MULTI_BLK_TYPE coreConsu…
32891 <description>Unspecified</description>
32896 <description>Unspecified</description>
32901 <description>Unspecified</description>
32906 <description>Unspecified</description>
32911 <description>Unspecified</description>
32916 <description>Unspecified</description>
32921 <description>Unspecified</description>
32926 <description>Unspecified</description>
32931 <description>Unspecified</description>
32938 …<description>The values of these bit fields are derived from the DMAH_CH1_MULTI_BLK_TYPE coreConsu…
32945 <description>Unspecified</description>
32950 <description>Unspecified</description>
32955 <description>Unspecified</description>
32960 <description>Unspecified</description>
32965 <description>Unspecified</description>
32970 <description>Unspecified</description>
32975 <description>Unspecified</description>
32980 <description>Unspecified</description>
32985 <description>Unspecified</description>
32992 …<description>The values of these bit fields are derived from the DMAH_CH2_MULTI_BLK_TYPE coreConsu…
32999 <description>Unspecified</description>
33004 <description>Unspecified</description>
33009 <description>Unspecified</description>
33014 <description>Unspecified</description>
33019 <description>Unspecified</description>
33024 <description>Unspecified</description>
33029 <description>Unspecified</description>
33034 <description>Unspecified</description>
33039 <description>Unspecified</description>
33046 …<description>The values of these bit fields are derived from the DMAH_CH3_MULTI_BLK_TYPE coreConsu…
33053 <description>Unspecified</description>
33058 <description>Unspecified</description>
33063 <description>Unspecified</description>
33068 <description>Unspecified</description>
33073 <description>Unspecified</description>
33078 <description>Unspecified</description>
33083 <description>Unspecified</description>
33088 <description>Unspecified</description>
33093 <description>Unspecified</description>
33100 …<description>The values of these bit fields are derived from the DMAH_CH4_MULTI_BLK_TYPE coreConsu…
33107 <description>Unspecified</description>
33112 <description>Unspecified</description>
33117 <description>Unspecified</description>
33122 <description>Unspecified</description>
33127 <description>Unspecified</description>
33132 <description>Unspecified</description>
33137 <description>Unspecified</description>
33142 <description>Unspecified</description>
33147 <description>Unspecified</description>
33154 …<description>The values of these bit fields are derived from the DMAH_CH5_MULTI_BLK_TYPE coreConsu…
33161 <description>Unspecified</description>
33166 <description>Unspecified</description>
33171 <description>Unspecified</description>
33176 <description>Unspecified</description>
33181 <description>Unspecified</description>
33186 <description>Unspecified</description>
33191 <description>Unspecified</description>
33196 <description>Unspecified</description>
33201 <description>Unspecified</description>
33208 …<description>The values of these bit fields are derived from the DMAH_CH6_MULTI_BLK_TYPE coreConsu…
33215 <description>Unspecified</description>
33220 <description>Unspecified</description>
33225 <description>Unspecified</description>
33230 <description>Unspecified</description>
33235 <description>Unspecified</description>
33240 <description>Unspecified</description>
33245 <description>Unspecified</description>
33250 <description>Unspecified</description>
33255 <description>Unspecified</description>
33262 …<description>The values of these bit fields are derived from the DMAH_CH7_MULTI_BLK_TYPE coreConsu…
33269 <description>Unspecified</description>
33274 <description>Unspecified</description>
33279 <description>Unspecified</description>
33284 <description>Unspecified</description>
33289 <description>Unspecified</description>
33294 <description>Unspecified</description>
33299 <description>Unspecified</description>
33304 <description>Unspecified</description>
33309 <description>Unspecified</description>
33318 …<description>DMA_COMP_PARAMS_1 is a constant read-only register that contains encoded information …
33326 …<description>The values of these bit fields are derived from the DMAH_CH0_MAX_BLK_SIZE coreConsult…
33333 <description>Unspecified</description>
33338 <description>Unspecified</description>
33343 <description>Unspecified</description>
33348 <description>Unspecified</description>
33353 <description>Unspecified</description>
33358 <description>Unspecified</description>
33363 <description>Unspecified</description>
33368 <description>Unspecified</description>
33373 <description>Unspecified</description>
33378 <description>Unspecified</description>
33383 <description>Unspecified</description>
33390 …<description>The values of these bit fields are derived from the DMAH_CH1_MAX_BLK_SIZE coreConsult…
33397 <description>Unspecified</description>
33402 <description>Unspecified</description>
33407 <description>Unspecified</description>
33412 <description>Unspecified</description>
33417 <description>Unspecified</description>
33422 <description>Unspecified</description>
33427 <description>Unspecified</description>
33432 <description>Unspecified</description>
33437 <description>Unspecified</description>
33442 <description>Unspecified</description>
33447 <description>Unspecified</description>
33454 …<description>The values of these bit fields are derived from the DMAH_CH2_MAX_BLK_SIZE coreConsult…
33461 <description>Unspecified</description>
33466 <description>Unspecified</description>
33471 <description>Unspecified</description>
33476 <description>Unspecified</description>
33481 <description>Unspecified</description>
33486 <description>Unspecified</description>
33491 <description>Unspecified</description>
33496 <description>Unspecified</description>
33501 <description>Unspecified</description>
33506 <description>Unspecified</description>
33511 <description>Unspecified</description>
33518 …<description>The values of these bit fields are derived from the DMAH_CH3_MAX_BLK_SIZE coreConsult…
33525 <description>Unspecified</description>
33530 <description>Unspecified</description>
33535 <description>Unspecified</description>
33540 <description>Unspecified</description>
33545 <description>Unspecified</description>
33550 <description>Unspecified</description>
33555 <description>Unspecified</description>
33560 <description>Unspecified</description>
33565 <description>Unspecified</description>
33570 <description>Unspecified</description>
33575 <description>Unspecified</description>
33582 …<description>The values of these bit fields are derived from the DMAH_CH4_MAX_BLK_SIZE coreConsult…
33589 <description>Unspecified</description>
33594 <description>Unspecified</description>
33599 <description>Unspecified</description>
33604 <description>Unspecified</description>
33609 <description>Unspecified</description>
33614 <description>Unspecified</description>
33619 <description>Unspecified</description>
33624 <description>Unspecified</description>
33629 <description>Unspecified</description>
33634 <description>Unspecified</description>
33639 <description>Unspecified</description>
33646 …<description>The values of these bit fields are derived from the DMAH_CH5_MAX_BLK_SIZE coreConsult…
33653 <description>Unspecified</description>
33658 <description>Unspecified</description>
33663 <description>Unspecified</description>
33668 <description>Unspecified</description>
33673 <description>Unspecified</description>
33678 <description>Unspecified</description>
33683 <description>Unspecified</description>
33688 <description>Unspecified</description>
33693 <description>Unspecified</description>
33698 <description>Unspecified</description>
33703 <description>Unspecified</description>
33710 …<description>The values of these bit fields are derived from the DMAH_CH6_MAX_BLK_SIZE coreConsult…
33717 <description>Unspecified</description>
33722 <description>Unspecified</description>
33727 <description>Unspecified</description>
33732 <description>Unspecified</description>
33737 <description>Unspecified</description>
33742 <description>Unspecified</description>
33747 <description>Unspecified</description>
33752 <description>Unspecified</description>
33757 <description>Unspecified</description>
33762 <description>Unspecified</description>
33767 <description>Unspecified</description>
33774 …<description>The values of these bit fields are derived from the DMAH_CH7_MAX_BLK_SIZE coreConsult…
33781 <description>Unspecified</description>
33786 <description>Unspecified</description>
33791 <description>Unspecified</description>
33796 <description>Unspecified</description>
33801 <description>Unspecified</description>
33806 <description>Unspecified</description>
33811 <description>Unspecified</description>
33816 <description>Unspecified</description>
33821 <description>Unspecified</description>
33826 <description>Unspecified</description>
33831 <description>Unspecified</description>
33840 …<description>DMA_COMP_PARAMS_1 is a constant read-only register that contains encoded information …
33848 …<description>The value of this register is derived from the DMAH_BIG_ENDIAN coreConsultant paramet…
33855 <description>Unspecified</description>
33860 <description>Unspecified</description>
33867 …<description>The value of this register is derived from the DMAH_INTR_IO coreConsultant parameter.…
33874 <description>Unspecified</description>
33879 <description>Unspecified</description>
33884 <description>Unspecified</description>
33891 …<description>The value of this register is derived from the DMAH_MABRST coreConsultant parameter.<…
33898 <description>Unspecified</description>
33903 <description>Unspecified</description>
33910 <description>Reserved field- read-only</description>
33917 …<description>The value of this register is derived from the DMAH_NUM_CHANNELS coreConsultant param…
33924 <description>Unspecified</description>
33929 <description>Unspecified</description>
33934 <description>Unspecified</description>
33939 <description>Unspecified</description>
33944 <description>Unspecified</description>
33949 <description>Unspecified</description>
33954 <description>Unspecified</description>
33959 <description>Unspecified</description>
33966 …<description>The value of this register is derived from the DMAH_NUM_MASTER_INT coreConsultant par…
33973 <description>Unspecified</description>
33978 <description>Unspecified</description>
33983 <description>Unspecified</description>
33988 <description>Unspecified</description>
33995 …<description>The value of this register is derived from the DMAH_S_HDATA_WIDTH coreConsultant para…
34002 <description>Unspecified</description>
34007 <description>Unspecified</description>
34012 <description>Unspecified</description>
34017 <description>Unspecified</description>
34024 …<description>The value of this register is derived from the DMAH_M4_HDATA_WIDTH coreConsultant par…
34031 <description>Unspecified</description>
34036 <description>Unspecified</description>
34041 <description>Unspecified</description>
34046 <description>Unspecified</description>
34053 …<description>The value of this register is derived from the DMAH_M3_HDATA_WIDTH coreConsultant par…
34060 <description>Unspecified</description>
34065 <description>Unspecified</description>
34070 <description>Unspecified</description>
34075 <description>Unspecified</description>
34082 …<description>The value of this register is derived from the DMAH_M2_HDATA_WIDTH coreConsultant par…
34089 <description>Unspecified</description>
34094 <description>Unspecified</description>
34099 <description>Unspecified</description>
34104 <description>Unspecified</description>
34111 …<description>The value of this register is derived from the DMAH_M1_HDATA_WIDTH coreConsultant par…
34118 <description>Unspecified</description>
34123 <description>Unspecified</description>
34128 <description>Unspecified</description>
34133 <description>Unspecified</description>
34140 …<description>The value of this register is derived from the DMAH_NUM_HS_INT coreConsultant paramet…
34147 <description>Unspecified</description>
34152 <description>Unspecified</description>
34157 <description>Unspecified</description>
34162 <description>Unspecified</description>
34167 <description>Unspecified</description>
34172 <description>Unspecified</description>
34177 <description>Unspecified</description>
34182 <description>Unspecified</description>
34187 <description>Unspecified</description>
34192 <description>Unspecified</description>
34197 <description>Unspecified</description>
34202 <description>Unspecified</description>
34207 <description>Unspecified</description>
34212 <description>Unspecified</description>
34217 <description>Unspecified</description>
34222 <description>Unspecified</description>
34227 <description>Unspecified</description>
34234 …<description>The value of this register is derived from the DMAH_ADD_ENCODED_PARAMS coreConsultant…
34241 <description>Unspecified</description>
34246 <description>Unspecified</description>
34253 …<description>The value of this register is derived from the DMAH_STATIC_ENDIAN_SELECT coreConsulta…
34262 …<description>This is the DW_ahb_dmac Component Version register, which is a read-only register tha…
34270 <description>DMA Component Type Number = `h44571110.</description>
34279 …description>This is the DW_ahb_dmac Component Version register, which is a read-only register that…
34287 <description>DMA Component Version.</description>
34300 <description>I3CCORE 1</description>
34307 <description>DMU 0</description>
34322 <description>DMU Core Release</description>
34330 <description>Core Release</description>
34336 <description>Step of Core Release</description>
34342 <description>Sub-step of Core Release</description>
34348 <description>Time Stamp Year</description>
34354 <description>Time Stamp Month</description>
34360 <description>Time Stamp Day</description>
34368 <description>DMU Internals</description>
34376 <description>TX Service Request line of DMU</description>
34382 <description>No TX DMA service requested</description>
34387 <description>TX DMA Service requested</description>
34394 <description>RX0 Service Request line of DMU</description>
34400 <description>No RX0 DMA service requested</description>
34405 <description>RX0 DMA Service requested</description>
34412 <description>RX1 Service Request line of DMU</description>
34418 <description>No RX1 DMA service requested</description>
34423 <description>RX1 DMA Service requested</description>
34430 <description>TX Event Service Request line of DMU</description>
34436 <description>No TX Event DMA service requested</description>
34441 <description>TX Event DMA Service requested</description>
34448 <description>TX FIFO/Queue Put Index Previous</description>
34454 <description>DMU is enabled</description>
34460 <description>DMU is disabled</description>
34465 <description>DMU is enabled and can process DMA data</description>
34472 <description>Detect Element Handler State</description>
34478 <description>Detect DMU Element Service</description>
34484 … <description>Queueing of DMU Element does not activate interrupt flag</description>
34489 …<description>Queueing of DMU Element will activate interrupt flag when DMUI.EHS = DMUI.DEHS</descr…
34496 <description>Detect DMU Element Service</description>
34502 … <description>Queueing of DMU Element does not activate interrupt flag</description>
34507 …<description>Queueing of DMU Element will activate interrupt flag when DMUI.EHS = DMUI.DEHS</descr…
34514 <description>Detect DMU Element Service</description>
34520 … <description>Queueing of DMU Element does not activate interrupt flag</description>
34525 …<description>Queueing of DMU Element will activate interrupt flag when DMUI.EHS = DMUI.DEHS</descr…
34532 <description>Detect DMU Element Service</description>
34538 … <description>Queueing of DMU Element does not activate interrupt flag</description>
34543 …<description>Queueing of DMU Element will activate interrupt flag when DMUI.EHS = DMUI.DEHS</descr…
34550 <description>Element Handler State</description>
34556 <description>wait for bit MCAN:CCCR.CCE getting zero</description>
34561 <description>wait for Start Address</description>
34566 <description>wait for Trigger Address</description>
34571 <description>wait for transfer of Element word</description>
34576 <description>acknowledge to MCAN</description>
34581 <description>exception recovery</description>
34588 <description>Actual DMU Element Service</description>
34594 <description>DMU Virtual Buffer is currently not served</description>
34599 <description>DMU Virtual Buffer is currently served</description>
34606 <description>Actual DMU Element Service</description>
34612 <description>DMU Virtual Buffer is currently not served</description>
34617 <description>DMU Virtual Buffer is currently served</description>
34624 <description>Actual DMU Element Service</description>
34630 <description>DMU Virtual Buffer is currently not served</description>
34635 <description>DMU Virtual Buffer is currently served</description>
34642 <description>Actual DMU Element Service</description>
34648 <description>DMU Virtual Buffer is currently not served</description>
34653 <description>DMU Virtual Buffer is currently served</description>
34662 <description>DMU Queueing Counter</description>
34670 <description>TX Element Enqueueing Counter</description>
34676 <description>RX0 Element Dequeueing Counter</description>
34682 <description>RX1 Element Dequeueing Counter</description>
34688 <description>TX Event Element Dequeueing Counter</description>
34696 <description>DMU Interrupt Register</description>
34704 <description>TX Element Not Start Address</description>
34710 <description>Write '1' to clear interrupt flag</description>
34715 <description>No illegal write access</description>
34720 …<description>Write to TX Element begins without using start address, exception recovery started.</…
34727 <description>TX Element Illegal Enqueueing</description>
34733 <description>Write '1' to clear interrupt flag</description>
34738 <description>No illegal enqueueing</description>
34743 …<description>Start of enqueueing without request detected, exception recovery started.</descriptio…
34750 <description>TX Element Illegal Access Sequence</description>
34756 <description>Write '1' to clear interrupt flag</description>
34761 <description>No illegal addressing sequence detected</description>
34766 …<description>Accesses are not strictly linear to ascending and consecutive addresses, exception re…
34773 <description>TX Element Illegal DLC</description>
34779 <description>Write '1' to clear interrupt flag</description>
34784 <description>No illegal DLC detected</description>
34789 … <description>DLC exceeds Tx Buffer element size of MCAN, exception recovery started.</description>
34796 <description>TX Element Write After Trigger Address</description>
34802 <description>Write '1' to clear interrupt flag</description>
34807 <description>No write after Trigger Address</description>
34812 <description>Write after Trigger address detected</description>
34819 <description>TX Element Illegal Read</description>
34825 <description>Write '1' to clear interrupt flag</description>
34830 <description>No read access</description>
34835 …<description>Illegal read access to DMU TX Element section detected, exception recovery started.</…
34842 …<description>A successful enqueueing of a Tx message with the DMU TX Element section sets this fla…
34848 <description>Write '1' to clear interrupt flag</description>
34853 <description>No Tx message enqueued</description>
34858 <description>Tx message successfully enqueued</description>
34865 <description>RX0 Element Not Start Address</description>
34871 <description>Write '1' to clear interrupt flag</description>
34876 <description>No illegal read access</description>
34881 …<description>Read from RX0 Element begins without using start address, exception recovery started.…
34888 <description>RX0 Element Illegal Dequeueing</description>
34894 <description>Write '1' to clear interrupt flag</description>
34899 <description>No illegal dequeueing</description>
34904 …<description>Start of dequeueing without request detected, exception recovery started,</descriptio…
34911 <description>RX0 Element Illegal Access Sequence</description>
34917 <description>Write '1' to clear interrupt flag</description>
34922 <description>No illegal addressing sequence detected</description>
34927 …<description>Accesses are not strictly linear to ascending and consecutive addresses, exception re…
34934 <description>RX0 Element Illegal Write</description>
34940 <description>Write '1' to clear interrupt flag</description>
34945 <description>No write access detected</description>
34950 …<description>Illegal write access to DMU RX0 Element detected, exception recovery started.</descri…
34957 <description>RX0 Element Dequeued</description>
34963 <description>Write '1' to clear interrupt flag</description>
34968 <description>No Rx message dequeued</description>
34973 <description>Rx message successfully dequeued</description>
34980 <description>RX0 Element Illegal Overwrite by timestamp</description>
34986 <description>Write '1' to clear interrupt flag</description>
34991 <description>No illegal overwrite detected</description>
34996 … <description>DMU has internally overwritten the last element word of a SYNC message</description>
35003 <description>Bus Error Uncorrected</description>
35009 <description>Write '1' to clear interrupt flag</description>
35014 … <description>No read slave error detected when reading from Message RAM</description>
35019 <description>Read slave error detected</description>
35026 <description>RX1 Element Not Start Address</description>
35032 <description>Write '1' to clear interrupt flag</description>
35037 <description>No illegal read access</description>
35042 …<description>Read from RX1 Element begins without using start address, exception recovery started.…
35049 <description>RX1 Element Illegal Dequeueing</description>
35055 <description>Write '1' to clear interrupt flag</description>
35060 <description>No illegal dequeueing</description>
35065 …<description>Start of dequeueing without request detected, exception recovery started,</descriptio…
35072 <description>RX0 Element Illegal Access Sequence</description>
35078 <description>Write '1' to clear interrupt flag</description>
35083 <description>No illegal addressing sequence detected</description>
35088 …<description>Accesses are not strictly linear to ascending and consecutive addresses, exception re…
35095 <description>RX1 Element Illegal Write</description>
35101 <description>Write '1' to clear interrupt flag</description>
35106 <description>No write access detected</description>
35111 …<description>Illegal write access to DMU RX1 Element detected, exception recovery started.</descri…
35118 <description>RX0 Element Dequeued</description>
35124 <description>Write '1' to clear interrupt flag</description>
35129 <description>No Rx message dequeued</description>
35134 <description>Rx message successfully dequeued</description>
35141 <description>RX1 Element Illegal Overwrite by timestamp</description>
35147 <description>Write '1' to clear interrupt flag</description>
35152 <description>No illegal overwrite detected</description>
35157 … <description>DMU has internally overwritten the last element word of a SYNC message</description>
35164 <description>TX Event Element Not Start Address</description>
35170 <description>Write '1' to clear interrupt flag</description>
35175 <description>No illegal read access</description>
35180 …<description>Read from TX Event Element begins without using start address, exception recovery sta…
35187 <description>TX Event Element Illegal Dequeueing</description>
35193 <description>Write '1' to clear interrupt flag</description>
35198 <description>No illegal dequeueing</description>
35203 …<description>Start of dequeueing without request detected, exception recovery started.</descriptio…
35210 <description>TX Event Element Illegal Access Sequence</description>
35216 <description>Write '1' to clear interrupt flag</description>
35221 <description>No illegal addressing sequence detected</description>
35226 …<description>Accesses are not strictly linear to ascending and consecutive addresses, exception re…
35233 <description>TX Event Element Illegal Write</description>
35239 <description>Write '1' to clear interrupt flag</description>
35244 <description>No write access detected</description>
35249 …<description>Illegal write access to DMU TX Event Element detected, exception recovery started.</d…
35256 <description>TX Event Element Dequeued</description>
35262 <description>Write '1' to clear interrupt flag</description>
35267 <description>No TX Event Element dequeued</description>
35272 <description>TX Event Element successfully dequeued</description>
35279 <description>Debug Trigger</description>
35285 <description>Write '1' to clear interrupt flag</description>
35290 <description>Debug point not reached</description>
35295 <description>Debug point reached</description>
35302 <description>Illegal Access while in Configuration mode</description>
35308 <description>Write '1' to clear interrupt flag</description>
35313 <description>No Illegal Access while CCE mode</description>
35318 <description>Illegal Access while CCE mode</description>
35327 <description>DMU Interrupt Enable</description>
35335 <description>TX Element Not Start Address Enable</description>
35341 <description>Flag does not activate the interrupt line DMU</description>
35346 <description>the interrupt line DMU will be activated</description>
35355 <description>DMU Configuration</description>
35363 <description>Transfer Timestamp</description>
35369 <description>No timestamp will be transferred via DMU Virtual Buffer</description>
35374 …<description>Timestamp of message will be transferred from TSU via DMU Virtual Buffer</description>
35385 <description>MCAN 0</description>
35401 <description>Endian Register</description>
35409 <description>Endianness Test Value</description>
35417 <description>Data Bit Timing and Prescaler Register</description>
35425 <description>Data (Re)Synchronization Jump Width</description>
35431 <description>Data time segment after sample point</description>
35437 <description>Data time segment before sample point</description>
35443 <description>Data Bit Rate Prescaler</description>
35449 <description>Transmitter Delay Compensation</description>
35455 <description>Unspecified</description>
35460 <description>Unspecified</description>
35469 <description>Test Register</description>
35477 <description>Loop Back Mode</description>
35483 <description>Loop Back Mode is disabled</description>
35488 <description>Loop Back Mode is enabled</description>
35495 <description>Control of Transmit Pin</description>
35501 … <description>controlled by the CAN Core, updated at the end of the CAN bit time</description>
35506 <description>Sample Point can be monitored at pin m_can_tx</description>
35511 <description>Dominant (0) level at pin m_can_tx</description>
35516 <description>Recessive (1) at pin m_can_tx</description>
35523 <description>Receive Pin</description>
35529 <description>The CAN bus is dominant (m_can_rx = 0)</description>
35534 <description>The CAN bus is recessive (m_can_rx = '1')</description>
35541 <description>Tx Buffer Number Prepared</description>
35547 <description>Prepared Valid</description>
35553 <description>Value of TXBNP not valid</description>
35558 <description>Value of TXBNP valid</description>
35565 <description>Tx Buffer Number Started</description>
35571 <description>Started Valid</description>
35577 <description>Value of TXBNP not valid</description>
35582 <description>Value of TXBNP valid</description>
35591 <description>RAM Watchdog</description>
35599 …<description>Start value of the Message RAM Watchdog Counter. With the reset value of '00' the cou…
35600 disabled.</description>
35606 <description>Actual Message RAM Watchdog Counter Value.</description>
35614 <description>CC Control Register</description>
35622 <description>Initialization</description>
35628 <description>Normal Operation</description>
35633 <description>Initialization is started</description>
35640 <description>Configuration Change Enable</description>
35646 … <description>The CPU has no write access to the protected configuration registers</description>
35651 …<description>The CPU has write access to the protected configuration registers (while CCCR.INIT = …
35658 <description>Restricted Operation Mode</description>
35664 <description>Normal CAN operation</description>
35669 <description>Restricted Operation Mode active</description>
35676 <description>Clock Stop Acknowledge</description>
35682 <description>No clock stop acknowledged</description>
35687 … <description>MCAN may be set in power down by stopping m_can_hclk and m_can_cclk</description>
35694 <description>Clock Stop Request</description>
35700 <description>No clock stop is requested</description>
35705 <description>Clock stop requested.</description>
35712 <description>Bus Monitoring Mode</description>
35718 <description>Bus Monitoring Mode is disabled</description>
35723 <description>Bus Monitoring Mode is enabled</description>
35730 <description>Disable Automatic Retransmission</description>
35736 …<description>Automatic retransmission of messages not transmitted successfully enabled</descriptio…
35741 <description>Automatic retransmission disabled</description>
35748 <description>Test Mode Enable</description>
35754 <description>Normal operation, register TEST holds reset values</description>
35759 <description>Test Mode, write access to register TEST enabled</description>
35766 <description>FD Operation Enable</description>
35772 <description>FD operation disabled</description>
35777 <description>FD operation enabled</description>
35784 <description>Bit Rate Switch Enable</description>
35790 <description>Bit rate switching for transmissions disabled</description>
35795 <description>Bit rate switching for transmissions enabled</description>
35802 <description>Wide Message Marker</description>
35808 <description>8-bit Message Marker used</description>
35813 …<description>16-bit Message Marker used, replacing 16-bit timestamps in Tx Event FIFO</description>
35820 <description>Protocol Exception Handling Disable</description>
35826 <description>Protocol exception handling enabled</description>
35831 <description>Protocol exception handling disabled</description>
35838 <description>Edge Filtering during Bus Integration</description>
35844 <description>Edge filtering disabled</description>
35849 …<description>Two consecutive dominant tq required to detect an edge for hard synchronization</desc…
35856 <description>Transmit Pause</description>
35862 <description>Transmit pause disabled</description>
35867 <description>Transmit pause enabled</description>
35874 <description>Non ISO Operation</description>
35880 <description>CAN FD frame format according to ISO 11898-1:2015</description>
35885 … <description>CAN FD frame format according to Bosch CAN FD Specification V1.0</description>
35894 <description>Nominal Bit Timing and Prescaler Register</description>
35902 <description>Nominal Time segment after sample point</description>
35908 <description>Nominal Time segment before sample point</description>
35914 <description>Nominal Bit Rate Prescaler</description>
35920 <description>Nominal (Re)Synchronization Jump Width</description>
35928 <description>Timestamp Counter Configuration</description>
35936 <description>Timestamp Select</description>
35942 <description>Timestamp counter value always 0x0000</description>
35947 <description>Timestamp counter value incremented according to TCP</description>
35952 <description>External timestamp counter value used</description>
35957 <description>Same as Zero</description>
35964 <description>Timestamp Counter Prescaler</description>
35972 <description>Timestamp Counter Value</description>
35980 <description>Timestamp Counter</description>
35988 <description>Timeout Counter Configuration</description>
35996 <description>Enable Timeout Counter</description>
36002 <description>Timeout Counter disabled</description>
36007 <description>Timeout Counter enabled</description>
36014 <description>Timeout Select</description>
36020 <description>Continuous operation</description>
36025 <description>Timeout controlled by Tx Event FIFO</description>
36030 <description>Timeout controlled by Rx FIFO 0</description>
36035 <description>Timeout controlled by Rx FIFO 1</description>
36042 <description>Timeout Period</description>
36050 <description>Timeout Counter Value</description>
36058 <description>Timeout Counter</description>
36066 <description>Error Counter Register</description>
36074 <description>Transmit Error Counter</description>
36080 <description>Receive Error Counter</description>
36086 <description>Receive Error Passive</description>
36092 … <description>The Receive Error Counter is below the error passive level of 128</description>
36097 … <description>The Receive Error Counter has reached the error passive level of 128</description>
36104 <description>CAN Error Logging</description>
36112 <description>Protocol Status Register</description>
36120 <description>Last Error Code</description>
36126 …<description>No error occurred since LEC has been reset by successful reception or transmission.</…
36131 … <description>More than 5 equal bits in a sequence have occurred in a part of a received message
36132 where this is not allowed.</description>
36137 … <description>A fixed format part of a received frame has the wrong format.</description>
36142 …<description>The message transmitted by the MCAN was not acknowledged by another node.</descriptio…
36147 … <description>During the transmission of a message (with the exception of the arbitration field),
36149 value was dominant.</description>
36154 … <description>During the transmission of a message (or acknowledge bit, or active error flag, or
36159 dominant or continuously disturbed).</description>
36164 … <description>The CRC check sum of a received message was incorrect. The CRC of an incoming
36165 message does not match with the CRC calculated from the received data.</description>
36170 … <description>Any read access to the Protocol Status Register re-initializes the LEC to '7'.
36172 access to the Protocol Status Register.</description>
36179 <description>Activity</description>
36185 <description>Node is synchronizing on CAN communication</description>
36190 <description>Node is neither receiver nor tr ansmitter</description>
36195 <description>Node is operating as receiver</description>
36200 <description>Node is operating as transmitter</description>
36207 <description>Error Passive</description>
36213 …<description>The MCAN is in the Error_Active state. It normally takes part in bus communication and
36214 sends an active error flag when an error has been detected</description>
36219 <description>The MCAN is in the Error_Passive state</description>
36226 <description>Warning Status</description>
36232 … <description>Both error counters are below the Error_Warning limit of 96</description>
36237 … <description>At least one of error counter has reached the Error_Warning limit of 96</description>
36244 <description>Bus_Off Status</description>
36250 <description>The MCAN is not Bus_Off</description>
36255 <description>The MCAN is in Bus_Off state</description>
36262 <description>Data Phase Last Error Code</description>
36268 <description>ESI flag of last received CAN FD Message</description>
36274 … <description>Last received CAN FD message did not ha ve its ESI flag set</description>
36279 <description>Last received CAN FD message had its ESI flag set</description>
36286 <description>BRS flag of last received CAN FD Message</description>
36292 … <description>Last received CAN FD message did not ha ve its BRS flag set</description>
36297 <description>Last received CAN FD message had its BRS flag set</description>
36304 <description>Received a CAN FD Message</description>
36310 …<description>Since this bit was reset by the CPU, no CAN FD message has been received</description>
36315 … <description>Message in CAN FD format with FDF flag set has been received</description>
36322 <description>Protocol Exception Event</description>
36328 … <description>No protocol exception event occurred since last read access</description>
36333 <description>Protocol exception event occurred</description>
36340 <description>Transmitter Delay Compensation Value</description>
36348 <description>Transmitter Delay Compensation Register</description>
36356 <description>Transmitter Delay Compensation Filter Window Length</description>
36362 <description>Transmitter Delay Compensation SSP Offset</description>
36370 <description>Interrupt Register</description>
36378 <description>Rx FIFO 0 New Message</description>
36384 <description>Write '1' to clear interrupt flag</description>
36389 <description>No new message written to Rx FIFO 0</description>
36394 <description>New message written to Rx FIFO 0</description>
36401 <description>Rx FIFO 0 Watermark Reached</description>
36407 <description>Write '1' to clear interrupt flag</description>
36412 <description>Rx FIFO 0 fill level below watermark</description>
36417 <description>Rx FIFO 0 fill level reached watermark</description>
36424 <description>Rx FIFO 0 Full</description>
36430 <description>Write '1' to clear interrupt flag</description>
36435 <description>Rx FIFO 0 not full</description>
36440 <description>Rx FIFO 0 full</description>
36447 <description>Rx FIFO 0 Message Lost</description>
36453 <description>Write '1' to clear interrupt flag</description>
36458 <description>No Rx FIFO 0 message lost</description>
36463 …<description>Rx FIFO 0 message lost, also set after write attempt to Rx FIFO 0 of size zero</descr…
36470 <description>Rx FIFO 1 New Message</description>
36476 <description>Write '1' to clear interrupt flag</description>
36481 <description>No new message written to Rx FIFO 1</description>
36486 <description>New message written to Rx FIFO 1</description>
36493 <description>Rx FIFO 1 Watermark Reached</description>
36499 <description>Write '1' to clear interrupt flag</description>
36504 <description>Rx FIFO 1 fill level below watermark</description>
36509 <description>Rx FIFO 1 fill level reached watermark</description>
36516 <description>Rx FIFO 1 Full</description>
36522 <description>Write '1' to clear interrupt flag</description>
36527 <description>Rx FIFO 1 not full</description>
36532 <description>Rx FIFO 1 full</description>
36539 <description>Rx FIFO 1 Message Lost</description>
36545 <description>Write '1' to clear interrupt flag</description>
36550 <description>No Rx FIFO 1 message lost</description>
36555 …<description>Rx FIFO 1 message lost, also set after write attempt to Rx FIFO 1 of size zero</descr…
36562 <description>High Priority Message</description>
36568 <description>Write '1' to clear interrupt flag</description>
36573 <description>No high priority message received</description>
36578 <description>High priority message received</description>
36585 <description>Transmission Completed</description>
36591 <description>Write '1' to clear interrupt flag</description>
36596 <description>No transmission completed</description>
36601 <description>Transmission completed</description>
36608 <description>Transmission Cancellation Finished</description>
36614 <description>Write '1' to clear interrupt flag</description>
36619 <description>No transmission cancellation finished</description>
36624 <description>Transmission cancellation finished</description>
36631 <description>Tx FIFO Empty</description>
36637 <description>Write '1' to clear interrupt flag</description>
36642 <description>Tx FIFO non-empty</description>
36647 <description>Tx FIFO empty</description>
36654 <description>Tx Event FIFO New Entry</description>
36660 <description>Write '1' to clear interrupt flag</description>
36665 <description>Tx Event FIFO unchanged</description>
36670 <description>Tx Handler wrote Tx Event FIFO element</description>
36677 <description>Tx Event FIFO Watermark Reached</description>
36683 <description>Write '1' to clear interrupt flag</description>
36688 <description>Tx Event FIFO fill level below watermark</description>
36693 <description>Tx Event FIFO fill level reached watermark</description>
36700 <description>Tx Event FIFO Full</description>
36706 <description>Write '1' to clear interrupt flag</description>
36711 <description>Tx Event FIFO not full</description>
36716 <description>Tx Event FIFO full</description>
36723 <description>Tx Event FIFO Element Lost</description>
36729 <description>Write '1' to clear interrupt flag</description>
36734 <description>No Tx Event FIFO element lost</description>
36739 …<description>Tx Event FIFO element lost, also set after wr ite attempt to Tx Event FIFO of siz e z…
36746 <description>Timestamp Wraparound</description>
36752 <description>Write '1' to clear interrupt flag</description>
36757 <description>No timestamp counter wrap-around</description>
36762 <description>Timestamp counter wrapped around</description>
36769 <description>Message RAM Access Failure</description>
36775 <description>Write '1' to clear interrupt flag</description>
36780 <description>No Message RAM access failure occurred</description>
36785 <description>Message RAM access failure occurred</description>
36792 <description>Timeout Occurred</description>
36798 <description>Write '1' to clear interrupt flag</description>
36803 <description>No timeout</description>
36808 <description>Timeout reached</description>
36815 <description>Message stored to Dedicated Rx Buffer</description>
36821 <description>Write '1' to clear interrupt flag</description>
36826 <description>No Rx Buffer updated</description>
36831 <description>At least one received message stored into an Rx Buff er</description>
36838 <description>Bus Error Uncorrected</description>
36844 <description>Write '1' to clear interrupt flag</description>
36849 … <description>No read slave error detected when reading from Message RAM</description>
36854 <description>Read slave error detected</description>
36861 <description>Error Logging Overflow</description>
36867 <description>Write '1' to clear interrupt flag</description>
36872 <description>CAN Error Logging Counter did not overflow</description>
36877 <description>Overflow of CAN Error Logging Counter occurred</description>
36884 <description>Error Passive</description>
36890 <description>Write '1' to clear interrupt flag</description>
36895 <description>Error_Passive status unchanged</description>
36900 <description>Error_Passive status changed</description>
36907 <description>Warning Status</description>
36913 <description>Write '1' to clear interrupt flag</description>
36918 <description>Error_Warning status unchanged</description>
36923 <description>Error_Warning status changed</description>
36930 <description>Bus_Off Status</description>
36936 <description>Write '1' to clear interrupt flag</description>
36941 <description>Bus_Off status unchanged</description>
36946 <description>Bus_Off status changed</description>
36953 <description>Watchdog Interrupt</description>
36959 <description>Write '1' to clear interrupt flag</description>
36964 <description>No Message RAM Watchdog event occurred</description>
36969 <description>Message RAM Watchdog event due to missing READY</description>
36976 … <description>Protocol Error in Arbitration Phase (Nominal Bit Time is used)</description>
36982 <description>Write '1' to clear interrupt flag</description>
36987 <description>No protocol error in arbitration phase</description>
36992 … <description>Protocol error in arbitration phase detected (PSR.LEC ≠ 0,7)</description>
36999 <description>Protocol Error in Data Phase (Data Bit Time is used)</description>
37005 <description>Write '1' to clear interrupt flag</description>
37010 <description>No protocol error in data phase</description>
37015 <description>Protocol error in data phase detected (PSR.DLEC ≠ 0,7)</description>
37022 <description>Access to Reserved Address</description>
37028 <description>Write '1' to clear interrupt flag</description>
37033 <description>No access to reserved address occurred</description>
37038 <description>Access to reserved address occurred</description>
37047 <description>Interrupt Enable</description>
37055 <description>Rx FIFO 0 New Message Interrupt Enable</description>
37061 <description>Interrupt disabled.</description>
37066 <description>Interrupt enabled.</description>
37073 <description>Rx FIFO 0 Watermark Reached Interrupt Enable</description>
37079 <description>Interrupt disabled.</description>
37084 <description>Interrupt enabled.</description>
37091 <description>Rx FIFO 0 Full Interrupt Enable</description>
37097 <description>Interrupt disabled.</description>
37102 <description>Interrupt enabled.</description>
37109 <description>Rx FIFO 0 Message Lost Interrupt Enable</description>
37115 <description>Interrupt disabled.</description>
37120 <description>Interrupt enabled.</description>
37127 <description>Rx FIFO 1 New Message Interrupt Enable</description>
37133 <description>Interrupt disabled.</description>
37138 <description>Interrupt enabled.</description>
37145 <description>Rx FIFO 1 Watermark Reached Interrupt Enable</description>
37151 <description>Interrupt disabled.</description>
37156 <description>Interrupt enabled.</description>
37163 <description>Rx FIFO 1 Full Interrupt Enable</description>
37169 <description>Interrupt disabled.</description>
37174 <description>Interrupt enabled.</description>
37181 <description>Rx FIFO 1 Message Lost Interrupt Enable</description>
37187 <description>Interrupt disabled.</description>
37192 <description>Interrupt enabled.</description>
37199 <description>High Priority Message Interrupt Enable</description>
37205 <description>Interrupt disabled.</description>
37210 <description>Interrupt enabled.</description>
37217 <description>Transmission Completed Interrupt Enable</description>
37223 <description>Interrupt disabled.</description>
37228 <description>Interrupt enabled.</description>
37235 <description>Transmission Cancellation Finished Interrupt Enable</description>
37241 <description>Interrupt disabled.</description>
37246 <description>Interrupt enabled.</description>
37253 <description>Tx FIFO Empty Interrupt Enable</description>
37259 <description>Interrupt disabled.</description>
37264 <description>Interrupt enabled.</description>
37271 <description>Tx Event FIFO New Entry Interrupt Enable</description>
37277 <description>Interrupt disabled.</description>
37282 <description>Interrupt enabled.</description>
37289 <description>Tx Event FIFO Watermark Reached Interrupt Enable</description>
37295 <description>Interrupt disabled.</description>
37300 <description>Interrupt enabled.</description>
37307 <description>Tx Event FIFO Full Interrupt Enable</description>
37313 <description>Interrupt disabled.</description>
37318 <description>Interrupt enabled.</description>
37325 <description>Tx Event FIFO Event Lost Interrupt Enable</description>
37331 <description>Interrupt disabled.</description>
37336 <description>Interrupt enabled.</description>
37343 <description>Timestamp Wraparound Interrupt Enable</description>
37349 <description>Interrupt disabled.</description>
37354 <description>Interrupt enabled.</description>
37361 <description>Message RAM Access Failure Interrupt Enable</description>
37367 <description>Interrupt disabled.</description>
37372 <description>Interrupt enabled.</description>
37379 <description>Timeout Occurred Interrupt Enable</description>
37385 <description>Interrupt disabled.</description>
37390 <description>Interrupt enabled.</description>
37397 <description>Message stored to Dedicated Rx Buffer Interrupt Enable</description>
37403 <description>Interrupt disabled.</description>
37408 <description>Interrupt enabled.</description>
37415 <description>Bus Error Uncorrected Interrupt Enable</description>
37421 <description>Interrupt disabled.</description>
37426 <description>Interrupt enabled.</description>
37433 <description>Error Logging Overflow Interrupt Enable</description>
37439 <description>Interrupt disabled.</description>
37444 <description>Interrupt enabled.</description>
37451 <description>Error Passive Interrupt Enable</description>
37457 <description>Interrupt disabled.</description>
37462 <description>Interrupt enabled.</description>
37469 <description>Warning Status Interrupt Enable</description>
37475 <description>Interrupt disabled.</description>
37480 <description>Interrupt enabled.</description>
37487 <description>Bus_Off Status Interrupt Enable</description>
37493 <description>Interrupt disabled.</description>
37498 <description>Interrupt enabled.</description>
37505 <description>Watchdog Interrupt Enable</description>
37511 <description>Interrupt disabled.</description>
37516 <description>Interrupt enabled.</description>
37523 <description>Protocol Error in Arbitration Phase Enable</description>
37529 <description>Interrupt disabled.</description>
37534 <description>Interrupt enabled.</description>
37541 <description>Protocol Error in Data Phase Enable</description>
37547 <description>Interrupt disabled.</description>
37552 <description>Interrupt enabled.</description>
37559 <description>Access to Reserved Address Enable</description>
37565 <description>Interrupt disabled.</description>
37570 <description>Interrupt enabled.</description>
37579 <description>Interrupt Line Select</description>
37587 <description>Rx FIFO 0 New Message Interrupt Line</description>
37593 <description>Interrupt assigned to interrupt line CORE0.</description>
37598 <description>Interrupt assigned to interrupt line CORE1.</description>
37605 <description>Rx FIFO 0 Watermark Reached Interrupt Line</description>
37611 <description>Interrupt assigned to interrupt line CORE0.</description>
37616 <description>Interrupt assigned to interrupt line CORE1.</description>
37623 <description>Rx FIFO 0 Full Interrupt Line</description>
37629 <description>Interrupt assigned to interrupt line CORE0.</description>
37634 <description>Interrupt assigned to interrupt line CORE1.</description>
37641 <description>Rx FIFO 0 Message Lost Interrupt Line</description>
37647 <description>Interrupt assigned to interrupt line CORE0.</description>
37652 <description>Interrupt assigned to interrupt line CORE1.</description>
37659 <description>Rx FIFO 1 New Message Interrupt Line</description>
37665 <description>Interrupt assigned to interrupt line CORE0.</description>
37670 <description>Interrupt assigned to interrupt line CORE1.</description>
37677 <description>Rx FIFO 1 Watermark Reached Interrupt Line</description>
37683 <description>Interrupt assigned to interrupt line CORE0.</description>
37688 <description>Interrupt assigned to interrupt line CORE1.</description>
37695 <description>Rx FIFO 1 Full Interrupt Line</description>
37701 <description>Interrupt assigned to interrupt line CORE0.</description>
37706 <description>Interrupt assigned to interrupt line CORE1.</description>
37713 <description>Rx FIFO 1 Message Lost Interrupt Line</description>
37719 <description>Interrupt assigned to interrupt line CORE0.</description>
37724 <description>Interrupt assigned to interrupt line CORE1.</description>
37731 <description>High Priority Message Interrupt Line</description>
37737 <description>Interrupt assigned to interrupt line CORE0.</description>
37742 <description>Interrupt assigned to interrupt line CORE1.</description>
37749 <description>Transmission Completed Interrupt Line</description>
37755 <description>Interrupt assigned to interrupt line CORE0.</description>
37760 <description>Interrupt assigned to interrupt line CORE1.</description>
37767 <description>Transmission Cancellation Finished Interrupt Line</description>
37773 <description>Interrupt assigned to interrupt line CORE0.</description>
37778 <description>Interrupt assigned to interrupt line CORE1.</description>
37785 <description>Tx FIFO Empty Interrupt Line</description>
37791 <description>Interrupt assigned to interrupt line CORE0.</description>
37796 <description>Interrupt assigned to interrupt line CORE1.</description>
37803 <description>Tx Event FIFO New Entry Interrupt Line</description>
37809 <description>Interrupt assigned to interrupt line CORE0.</description>
37814 <description>Interrupt assigned to interrupt line CORE1.</description>
37821 <description>Tx Event FIFO Watermark Reached Interrupt Line</description>
37827 <description>Interrupt assigned to interrupt line CORE0.</description>
37832 <description>Interrupt assigned to interrupt line CORE1.</description>
37839 <description>Tx Event FIFO Full Interrupt Line</description>
37845 <description>Interrupt assigned to interrupt line CORE0.</description>
37850 <description>Interrupt assigned to interrupt line CORE1.</description>
37857 <description>Tx Event FIFO Event Lost Interrupt Line</description>
37863 <description>Interrupt assigned to interrupt line CORE0.</description>
37868 <description>Interrupt assigned to interrupt line CORE1.</description>
37875 <description>Timestamp Wraparound Interrupt Line</description>
37881 <description>Interrupt assigned to interrupt line CORE0.</description>
37886 <description>Interrupt assigned to interrupt line CORE1.</description>
37893 <description>Message RAM Access Failure Interrupt Line</description>
37899 <description>Interrupt assigned to interrupt line CORE0.</description>
37904 <description>Interrupt assigned to interrupt line CORE1.</description>
37911 <description>Timeout Occurred Interrupt Line</description>
37917 <description>Interrupt assigned to interrupt line CORE0.</description>
37922 <description>Interrupt assigned to interrupt line CORE1.</description>
37929 <description>Message stored to Dedicated Rx Buffer Interrupt Line</description>
37935 <description>Interrupt assigned to interrupt line CORE0.</description>
37940 <description>Interrupt assigned to interrupt line CORE1.</description>
37947 <description>Bus Error Uncorrected Interrupt Line</description>
37953 <description>Interrupt assigned to interrupt line CORE0.</description>
37958 <description>Interrupt assigned to interrupt line CORE1.</description>
37965 <description>Error Logging Overflow Interrupt Line</description>
37971 <description>Interrupt assigned to interrupt line CORE0.</description>
37976 <description>Interrupt assigned to interrupt line CORE1.</description>
37983 <description>Error Passive Interrupt Line</description>
37989 <description>Interrupt assigned to interrupt line CORE0.</description>
37994 <description>Interrupt assigned to interrupt line CORE1.</description>
38001 <description>Warning Status Interrupt Line</description>
38007 <description>Interrupt assigned to interrupt line CORE0.</description>
38012 <description>Interrupt assigned to interrupt line CORE1.</description>
38019 <description>Bus_Off Status Interrupt Line</description>
38025 <description>Interrupt assigned to interrupt line CORE0.</description>
38030 <description>Interrupt assigned to interrupt line CORE1.</description>
38037 <description>Watchdog Interrupt Line</description>
38043 <description>Interrupt assigned to interrupt line CORE0.</description>
38048 <description>Interrupt assigned to interrupt line CORE1.</description>
38055 <description>Protocol Error in Arbitration Phase Line</description>
38061 <description>Interrupt assigned to interrupt line CORE0.</description>
38066 <description>Interrupt assigned to interrupt line CORE1.</description>
38073 <description>Protocol Error in Data Phase Line</description>
38079 <description>Interrupt assigned to interrupt line CORE0.</description>
38084 <description>Interrupt assigned to interrupt line CORE1.</description>
38091 <description>Access to Reserved Address Line</description>
38097 <description>Interrupt assigned to interrupt line CORE0.</description>
38102 <description>Interrupt assigned to interrupt line CORE1.</description>
38111 <description>Interrupt Line Enable</description>
38119 <description>Enable Interrupt Line 0</description>
38125 <description>Interrupt line CORE0 disabled.</description>
38130 <description>Interrupt line CORE0 enabled.</description>
38137 <description>Enable Interrupt Line 1</description>
38143 <description>Interrupt line CORE1 disabled.</description>
38148 <description>Interrupt line CORE1 enabled.</description>
38157 <description>Global Filter Configuration</description>
38165 <description>Reject Remote Frames Extended</description>
38171 <description>Filter remote frames with 29-bit extended IDs.</description>
38176 <description>Reject all remote frames with 29-bit extended IDs.</description>
38183 <description>Reject Remote Frames Standard</description>
38189 <description>Filter remote frames with 11-bit standard IDs.</description>
38194 <description>Reject all remote frames with 11-bit standard IDs.</description>
38201 <description>Accept Non-matching Frames Extended</description>
38207 <description>Accept in Rx FIFO 0.</description>
38212 <description>Accept in Rx FIFO 1.</description>
38217 <description>Reject in both Rx FIFOs.</description>
38222 <description>Reject in both Rx FIFOs.</description>
38234 <description>Accept in Rx FIFO 0.</description>
38239 <description>Accept in Rx FIFO 1.</description>
38244 <description>Reject in both Rx FIFOs.</description>
38249 <description>Reject in both Rx FIFOs.</description>
38258 <description>Standard ID Filter Configuration</description>
38266 <description>Filter List Standard Start Address</description>
38272 <description>List Size Standard</description>
38280 <description>Extended ID Filter Configuration</description>
38288 <description>Filter List Extended Start Address</description>
38294 <description>List Size Extended</description>
38302 <description>Extended ID AND Mask</description>
38310 <description>Extended ID Mask</description>
38318 <description>High Priority Message Status</description>
38326 <description>Buffer Index</description>
38332 <description>Message Storage Indicator</description>
38338 <description>No FIFO selected.</description>
38343 <description>FIFO message lost.</description>
38348 <description>Message stored in FIFO 0.</description>
38353 <description>Message stored in FIFO 1.</description>
38360 <description>Filter Index</description>
38366 <description>Filter List</description>
38372 <description>Standard Filter List.</description>
38377 <description>Extended Filter List.</description>
38386 <description>New Data 1</description>
38394 <description>New Data</description>
38400 <description>Rx Buffer not updated.</description>
38405 <description>Rx Buffer updated from new message.</description>
38414 <description>New Data 2</description>
38422 <description>New Data</description>
38428 <description>Rx Buffer not updated.</description>
38433 <description>Rx Buffer updated from new message.</description>
38442 <description>Rx FIFO 0 Configuration</description>
38450 <description>Rx FIFO 0 Start Address</description>
38456 <description>Rx FIFO 0 Size</description>
38462 <description>Rx FIFO 0 Watermark</description>
38468 <description>FIFO 0 Operation Mode</description>
38474 <description>FIFO 0 blocking mode.</description>
38479 <description>FIFO 0 overwrite mode.</description>
38488 <description>Rx FIFO 0 Status</description>
38496 <description>Rx FIFO 0 Fill Leve</description>
38502 <description>Rx FIFO 0 Get Index</description>
38508 <description>Rx FIFO 0 Put Index</description>
38514 <description>Rx FIFO 0 Full</description>
38520 <description>Rx FIFO 0 not full.</description>
38525 <description>Rx FIFO 0 full.</description>
38532 <description>Rx FIFO 0 Message Lost</description>
38538 <description>No Rx FIFO 0 message lost.</description>
38543 …<description>Rx FIFO 0 message lost, also set after write attempt to Rx FIFO 0 of size zero.</desc…
38552 <description>Rx FIFO 0 Acknowledge</description>
38560 <description>Rx FIFO 0 Acknowledge Index</description>
38568 <description>Rx Buffer Configuration</description>
38576 <description>Rx Buffer Start Address</description>
38584 <description>Rx FIFO 1 Configuration</description>
38592 <description>Rx FIFO 1 Start Address</description>
38598 <description>Rx FIFO 1 Size</description>
38604 <description>Rx FIFO 1 Watermark</description>
38610 <description>FIFO 1 Operation Mode</description>
38616 <description>FIFO 1 blocking mode</description>
38621 <description>FIFO 1 overwrite mode</description>
38630 <description>Rx FIFO 1 Status</description>
38638 <description>Rx FIFO 1 Fill Level</description>
38644 <description>Rx FIFO 1 Get Index</description>
38650 <description>Rx FIFO 1 Put Index</description>
38656 <description>Rx FIFO 1 Full</description>
38662 <description>Rx FIFO 1 not full</description>
38667 <description>Rx FIFO 1 full</description>
38674 <description>Rx FIFO 1 Message Lost</description>
38680 <description>No Rx FIFO 1 message lost</description>
38685 …<description>Rx FIFO 1 message lost, also set after write attempt to Rx FIFO 1 of size zero</descr…
38692 <description>Debug Message Status</description>
38698 …<description>Idle state, wait for reception of debug messages, DMA request is cleared</description>
38703 <description>Debug message A received</description>
38708 <description>Debug messages A, B received</description>
38713 <description>Debug messages A, B, C received, DMA request is set</description>
38722 <description>Rx FIFO 1 Acknowledge</description>
38730 <description>Rx FIFO 1 Acknowledge Index</description>
38738 <description>Rx Buffer / FIFO Element Size Configuration</description>
38746 <description>Rx FIFO 0 Data Field Size</description>
38752 <description>8 byte data field</description>
38757 <description>12 byte data field</description>
38762 <description>16 byte data field</description>
38767 <description>20 byte data field</description>
38772 <description>24 byte data field</description>
38777 <description>32 byte data field</description>
38782 <description>48 byte data field</description>
38787 <description>64 byte data field</description>
38794 <description>Rx FIFO 1 Data Field Size</description>
38800 <description>8 byte data field</description>
38805 <description>12 byte data field</description>
38810 <description>16 byte data field</description>
38815 <description>20 byte data field</description>
38820 <description>24 byte data field</description>
38825 <description>32 byte data field</description>
38830 <description>48 byte data field</description>
38835 <description>64 byte data field</description>
38842 <description>Rx Buffer Data Field Size</description>
38848 <description>8 byte data field</description>
38853 <description>12 byte data field</description>
38858 <description>16 byte data field</description>
38863 <description>20 byte data field</description>
38868 <description>24 byte data field</description>
38873 <description>32 byte data field</description>
38878 <description>48 byte data field</description>
38883 <description>64 byte data field</description>
38892 <description>Tx Buffer Configuration</description>
38900 <description>Tx Buffers Start Address</description>
38906 <description>Number of Dedicated Transmit Buffers</description>
38912 <description>Transmit FIFO/Queue Size</description>
38918 <description>Tx FIFO/Queue Mode</description>
38924 <description>Tx FIFO operation</description>
38929 <description>Tx Queue operation</description>
38938 <description>Tx FIFO/Queue Status</description>
38946 <description>Tx FIFO Free Level</description>
38952 <description>Tx FIFO Get Index</description>
38958 <description>Tx FIFO/Queue Put Index</description>
38964 <description>Tx FIFO/Queue Full</description>
38970 <description>Tx FIFO/Queue not full</description>
38975 <description>Tx FIFO/Queue full</description>
38984 <description>Tx Buffer Element Size Configuration</description>
38992 <description>Tx Buffer Data Field Size</description>
38998 <description>8 byte data field</description>
39003 <description>12 byte data field</description>
39008 <description>16 byte data field</description>
39013 <description>20 byte data field</description>
39018 <description>24 byte data field</description>
39023 <description>32 byte data field</description>
39028 <description>48 byte data field</description>
39033 <description>64 byte data field</description>
39042 <description>Tx Buffer Request Pending</description>
39050 <description>Transmission Request Pending</description>
39056 <description>No transmission request pending</description>
39061 <description>Transmission request pending</description>
39070 <description>Tx Buffer Add Request</description>
39078 <description>Add Request</description>
39084 <description>No transmission request added</description>
39089 <description>Transmission requested added</description>
39098 <description>Tx Buffer Cancellation Request</description>
39106 <description>Cancellation Request</description>
39112 <description>No cancellation pending</description>
39117 <description>Cancellation pending</description>
39126 <description>Tx Buffer Transmission Occurred</description>
39134 <description>Transmission Occurred</description>
39140 <description>No transmission occurred</description>
39145 <description>Transmission occurred</description>
39154 <description>Tx Buffer Cancellation Finished</description>
39162 <description>Cancellation Finished</description>
39168 <description>No transmit buffer cancellation</description>
39173 <description>Transmit buffer cancellation finished</description>
39182 <description>Tx Buffer Transmission Interrupt Enable</description>
39190 <description>Transmission Interrupt Enable</description>
39196 <description>Transmission interrupt disabled</description>
39201 <description>Transmission interrupt enable</description>
39210 <description>Tx Buffer Cancellation Finished Interrupt Enable</description>
39218 <description>Cancellation Finished Interrupt Enable</description>
39224 <description>Cancellation finished interrupt disabled</description>
39229 <description>Cancellation finished interrupt enabled</description>
39238 <description>Tx Event FIFO Configuration</description>
39246 <description>Event FIFO Start Address</description>
39252 <description>Event FIFO Size</description>
39258 <description>Event FIFO Watermark</description>
39266 <description>Tx Event FIFO Status</description>
39274 <description>Event FIFO Fill Level</description>
39280 <description>Event FIFO Get Index</description>
39286 <description>Event FIFO Put Index</description>
39292 <description>Event FIFO Full</description>
39298 <description>Tx Event FIFO not full</description>
39303 <description>Tx Event FIFO full</description>
39310 <description>Tx Event FIFO Element Lost</description>
39316 <description>No Tx Event FIFO element lost</description>
39321 …<description>Tx Event FIFO element lost, also set after wr ite attempt to Tx Event FIFO of siz e z…
39330 <description>Tx Event FIFO Acknowledge</description>
39338 <description>Event FIFO Acknowledge Index</description>
39348 <description>DMU 1</description>
39355 <description>MCAN 1</description>
39363 <description>System Trace Macrocell data buffer</description>
39380 <description>Unspecified</description>
39388 …description>Description collection: STM extended stimulus port data buffer area for domain n. NonS…
39401 <description>TDDCONF</description>
39415 <description>System power-up request</description>
39423 <description>Activate power-up request</description>
39429 <description>Power-up request not active</description>
39434 <description>Power-up request active</description>
39443 <description>Debug power-up request</description>
39451 <description>Activate power-up request</description>
39457 <description>Power-up request not active</description>
39462 <description>Power-up request active</description>
39471 <description>Trace port trace clock speed</description>
39479 <description>Trace clock speed</description>
39485 <description>Speed 100MHz</description>
39490 <description>Speed 50MHz</description>
39495 <description>Speed 25MHz</description>
39500 <description>Speed 12.5MHz</description>
39509 …<description>Combined effective system status of both SWJ-DP and TDDCONF registers originated powe…
39517 <description>System powerup request status</description>
39523 <description>Power not requested</description>
39528 <description>Power requested</description>
39535 <description>Debug domain powerup request status</description>
39541 <description>Power not requested</description>
39546 <description>Power requested</description>
39557 <description>System Trace Macrocell</description>
39571 <description>Controls the DMA transfer request mechanism.</description>
39579 …<description>Determines the sensitivity of the DMA request to the current buffer level in the STM<…
39585 <description>Buffer is &lt;25 percent full.</description>
39590 <description>Buffer is &lt;50 percent full.</description>
39595 <description>Buffer is &lt;75 percent full.</description>
39600 <description>Buffer is &lt;100 percent full.</description>
39609 …<description>Indicates the STPv2 master number of hardware event trace. This number is the master …
39617 …<description>The STPv2 master number that hardware event traces should be associated with.</descri…
39625 <description>Indicates the features of the STM.</description>
39633 <description>STMHETER support</description>
39639 <description>The feature is not implemented.</description>
39644 <description>The feature is implemented.</description>
39651 <description>Hardware event error detection support</description>
39657 <description>The feature is not implemented.</description>
39662 <description>The feature is implemented.</description>
39669 <description>STMHEMASTR support</description>
39675 <description>The feature is not implemented.</description>
39680 <description>The feature is implemented.</description>
39687 <description>The number of hardware events supported by the STM</description>
39695 <description>Indicates the features of hardware event tracing in the STM.</description>
39703 <description>The CLASS field identifies the programmers model</description>
39709 <description>Hardware Event Control programmers model</description>
39716 … <description>The CLASSREV field identifies the revision of the programmers model</description>
39722 …<description>The VENDSPEC field identifies any vendor specific modifications or mappings</descript…
39730 <description>Controls the STM settings.</description>
39738 <description>Global STM enable</description>
39744 <description>The STM is disabled.</description>
39749 <description>The STM is enabled.</description>
39756 <description>Enable or disable timestamp bundling.</description>
39762 …description>Time stamps are disabled. Requests for timestamp generation are ignored, and stimulus …
39767 …<description>Time stamps are enabled. If stimulus writes select timestamping, a timestamp is outpu…
39774 <description>STMSYNCR is implemented so this value is Read As One.</description>
39780 <description>The STM Sync feature is disabled.</description>
39785 <description>The STM Sync feature is enabled.</description>
39792 <description>Compression Enable for Stimulus Ports.</description>
39798 …<description>Compression disabled, data transfers are transmitted at the size of the transaction.<…
39803 … <description>Compression enabled, data transfers are compressed to save bandwidth.</description>
39810 …<description>ATB Trace ID. Setting this value to all zeroes might result in Unpredictable tracing.…
39816 <description>STM is busy, for example the STM trace FIFO is not empty.</description>
39822 <description>STM is not busy.</description>
39827 <description>STM is busy.</description>
39836 <description>Used for implementation defined STM controls.</description>
39844 <description>FIFO Auto-flush.</description>
39850 <description>Auto-flush is disabled.</description>
39855 …<description>Auto-flush is enabled. The STM automatically drains all data it has even if the ATB i…
39862 <description>Is ASYNC priority higher than trace?</description>
39868 <description>ASYNC priority is always lower than trace.</description>
39873 … <description>ASYNC priority escalates on second synchronization request.</description>
39880 <description>Controls arbitration between AXI and HW during flush.</description>
39886 …<description>Priority inversion, when AXI flush is finished, HW gets priority until HW flush is do…
39891 … <description>Priority inversion disabled, AXI always has priority over HW.</description>
39898 … <description>Provides override control for architectural clock gate enable.</description>
39904 … <description>No override, clock gate is controlled by the state of STM.</description>
39909 <description>Override, clock is enabled.</description>
39916 <description>Provides override control for the AFREADY output</description>
39922 <description>No override, AFREADY is controlled by the state of STM.</description>
39927 <description>Override, AFREADY is driven HIGH.</description>
39936 <description>Indicates the features of the STM.</description>
39944 <description>Indicates the implemented STM protocol.</description>
39950 <description>STM implements the STPV2 protocol.</description>
39957 <description>Timestamp support.</description>
39963 <description>Absolute timestamps implemented.</description>
39970 <description>Timestamp frequency indication configuration.</description>
39976 <description>STMTSFREQR is read-only.</description>
39981 <description>STMTSFREQR is read-write.</description>
39988 <description>Timestamp force configuration.</description>
39994 <description>STMTSSTIMR bit 0 is read-only.</description>
39999 <description>STMTSSTIMR bit 0 is read-write.</description>
40006 <description>Trace bus support.</description>
40012 <description>Trigger control support.</description>
40018 <description>Timestamp prescale support</description>
40024 <description>Timestamp prescale is not implemented.</description>
40029 <description>Timestamp prescale is implemented.</description>
40036 <description>STMTCSR.HWTEN support</description>
40042 <description>STMTCSR.HWTEN is not implemented</description>
40049 <description>STMTCSR.SYNCEN support</description>
40055 <description>STMTCSR.SYNCEN implemented but always reads as b1</description>
40062 <description>STMTCSR.SWOEN support</description>
40068 <description>STMTCSR.SWOEN not implemented</description>
40077 <description>Indicates the features of the STM.</description>
40085 <description>STMSPTER support.</description>
40091 <description>STMSPTER is implemented.</description>
40098 <description>STMSPER presence.</description>
40104 <description>STMSPER is implemented.</description>
40109 <description>STMSPER is not implemented.</description>
40116 <description>Data compression on stimulus ports support.</description>
40122 …<description>Data compression support is programmable. STMTCSR.COMPEN is implemented.</description>
40129 <description>Timestamp force configuration.</description>
40135 <description>STMSPOVERRIDER and STMSPMOVERRIDER is not implemented.</description>
40140 <description>STMSPOVERRIDER and STMSPMOVERRIDER is implemented.</description>
40147 <description>STMPRIVMASKR support.</description>
40153 <description>STMPRIVMASKR is not implemented.</description>
40160 <description>Stimulus port transaction type support.</description>
40166 … <description>Both invariant timing and guaranteed transactions are supported.</description>
40173 <description>Fundamental data size.</description>
40179 <description>32-bit data.</description>
40186 <description>Stimulus port type support</description>
40192 <description>Only extended stimulus ports are implemented.</description>
40201 <description>Indicates the features of the STM.</description>
40209 <description>The number of stimulus ports masters implemented, minus 1.</description>
40215 <description>Example: 128 masters implemented.</description>
40224 <description>Integration Test for Cross-Trigger Outputs Register.</description>
40232 … <description>Sets the value of the TRIGOUTSPTE output in integration mode.</description>
40238 <description>Drive logic 0 on output.</description>
40243 <description>Drive logic 1 on output.</description>
40250 <description>Sets the value of the TRIGOUTSW output in integration mode.</description>
40256 <description>Drive logic 0 on output.</description>
40261 <description>Drive logic 1 on output.</description>
40268 … <description>Sets the value of the TRIGOUTHETE output in integration mode.</description>
40274 <description>Drive logic 0 on output.</description>
40279 <description>Drive logic 1 on output.</description>
40286 <description>Sets the value of the ASYNCOUT output in integration mode.</description>
40292 <description>Drive logic 0 on output.</description>
40297 <description>Drive logic 1 on output.</description>
40306 <description>Controls the value of the ATDATAM output in integration mode.</description>
40314 <description>Sets the value of the ATDATAM[0].</description>
40320 <description>Drive logic 0 on output.</description>
40325 <description>Drive logic 1 on output.</description>
40332 <description>Sets the value of the ATDATAM[7] output.</description>
40338 <description>Drive logic 0 on output.</description>
40343 <description>Drive logic 1 on output.</description>
40350 <description>Sets the value of the ATDATAM[15].</description>
40356 <description>Drive logic 0 on output.</description>
40361 <description>Drive logic 1 on output.</description>
40368 <description>Sets the value of the ATDATAM[23].</description>
40374 <description>Drive logic 0 on output.</description>
40379 <description>Drive logic 1 on output.</description>
40386 <description>Sets the value of the ATDATAM[31].</description>
40392 <description>Drive logic 0 on output.</description>
40397 <description>Drive logic 1 on output.</description>
40406 <description>Controls the value of the ATDATAM output in integration mode.</description>
40414 <description>Reads the value of the ATREADYM input.</description>
40420 <description>Pin is at logic 0.</description>
40425 <description>Pin is at logic 1.</description>
40432 <description>Reads the value of the AFVALIDM input.</description>
40438 <description>Pin is at logic 0.</description>
40443 <description>Pin is at logic 1.</description>
40452 <description>Controls the value of the ATIDM output in integration mode.</description>
40460 <description>Sets the value of pin 0 of the ATIDM output.</description>
40466 <description>Pin is at logic 0.</description>
40471 <description>Pin is at logic 1.</description>
40478 <description>Sets the value of pin 1 of the ATIDM output.</description>
40484 <description>Pin is at logic 0.</description>
40489 <description>Pin is at logic 1.</description>
40496 <description>Sets the value of pin 2 of the ATIDM output.</description>
40502 <description>Pin is at logic 0.</description>
40507 <description>Pin is at logic 1.</description>
40514 <description>Sets the value of pin 3 of the ATIDM output.</description>
40520 <description>Pin is at logic 0.</description>
40525 <description>Pin is at logic 1.</description>
40532 <description>Sets the value of pin 4 of the ATIDM output.</description>
40538 <description>Pin is at logic 0.</description>
40543 <description>Pin is at logic 1.</description>
40550 <description>Sets the value of pin 5 of the ATIDM output.</description>
40556 <description>Pin is at logic 0.</description>
40561 <description>Pin is at logic 1.</description>
40568 <description>Sets the value of pin 6 of the ATIDM output.</description>
40574 <description>Pin is at logic 0.</description>
40579 <description>Pin is at logic 1.</description>
40588 …<description>Controls the value of the ATVALIDM, AFREADYM, and ATBYTESM outputs in integration mod…
40596 <description>Sets the value of the ATVALIDM output.</description>
40602 <description>Pin is at logic 0.</description>
40607 <description>Pin is at logic 1.</description>
40614 <description>Sets the value of the AFREADYM_W output.</description>
40620 <description>Pin is at logic 0.</description>
40625 <description>Pin is at logic 1.</description>
40632 <description>Sets the value of pin 0 of the ATBYTESM output.</description>
40638 <description>Pin is at logic 0.</description>
40643 <description>Pin is at logic 1.</description>
40650 <description>Sets the value of pin 1 of the ATBYTESM output.</description>
40656 <description>Pin is at logic 0.</description>
40661 <description>Pin is at logic 1.</description>
40670 <description>Used to enable topology detection.
40672 …he component can be directly controlled for integration testing and topology solving.</description>
40680 …description>Enables the component to switch from functional mode to integration mode and back. If …
40686 <description>Integration mode is disabled.</description>
40691 <description>Integration mode is Enabled.</description>
40700 <description>This is used to enable write access to device registers.</description>
40708 …<description>A write of 0xC5ACCE55 enables further write access to this device. Any other write re…
40714 <description>Unlock register interface.</description>
40723 …<description>This indicates the status of the lock control mechanism. This lock prevents accidenta…
40727 … For most components this covers all registers except for the Lock Access Register.</description>
40735 … <description>Indicates that a lock control mechanism exists for this device.</description>
40741 …<description>No lock control mechanism exists, writes to the Lock Access Register are ignored.</de…
40746 <description>Lock control mechanism is present.</description>
40753 <description>Returns the current status of the Lock.</description>
40759 <description>Write access is allowed to this device.</description>
40764 …<description>Write access to the component is blocked. All writes to control registers are ignored…
40771 …<description>Indicates if the Lock Access Register is implemented as 8-bit or 32-bit.</description>
40777 … <description>This component implements a 32-bit Lock Access Register.</description>
40782 … <description>This component implements an 8-bit Lock Access Register.</description>
40791 <description>Indicates the current level of tracing permitted by the system</description>
40799 <description>Non-secure Invasive Debug</description>
40805 <description>The feature is not implemented.</description>
40810 <description>The feature is implemented.</description>
40817 <description>Non-secure Non-Invasive Debug</description>
40823 <description>The feature is not implemented.</description>
40828 <description>The feature is implemented.</description>
40835 <description>Secure Invasive Debug</description>
40841 <description>The feature is not implemented.</description>
40846 <description>The feature is implemented.</description>
40853 <description>Secure Non-Invasive Debug</description>
40859 <description>The feature is not implemented.</description>
40864 <description>The feature is implemented.</description>
40873 <description>Indicates the capabilities of the STM.</description>
40881 … <description>This value indicates the number of stimulus ports implemented.</description>
40887 <description>Maximum 65,536 stimulus ports can be implemented.</description>
40896 <description>Controls the single-shot comparator.</description>
40904 <description>The main type of the component</description>
40910 <description>Peripheral is a trace source.</description>
40917 <description>The sub-type of the component</description>
40923 <description>Peripheral is a stimulus trace source.</description>
40932 <description>Coresight peripheral identification registers.</description>
40940 <description>Coresight peripheral identification registers.</description>
40948 <description>Coresight peripheral identification registers.</description>
40956 <description>Coresight peripheral identification registers.</description>
40964 <description>Coresight peripheral identification registers.</description>
40972 <description>Coresight component identification registers.</description>
40980 <description>Coresight component identification registers.</description>
40988 <description>Coresight component identification registers.</description>
40996 <description>Coresight component identification registers.</description>
41006 <description>Trace Port Interface Unit</description>
41020 …<description>Each bit location is a single port size that is supported on the device.</description>
41028 <description>Indicates whether the TPIU supports port size of 1-bit.</description>
41034 <description>Port size 1 is not supported.</description>
41039 <description>Port size 1 is supported.</description>
41046 <description>Indicates whether the TPIU supports port size of 2-bit.</description>
41052 <description>Port size 2 is not supported.</description>
41057 <description>Port size 2 is supported.</description>
41064 <description>Indicates whether the TPIU supports port size of 3-bit.</description>
41070 <description>Port size 3 is not supported.</description>
41075 <description>Port size 3 is supported.</description>
41082 <description>Indicates whether the TPIU supports port size of 4-bit.</description>
41088 <description>Port size 4 is not supported.</description>
41093 <description>Port size 4 is supported.</description>
41100 <description>Indicates whether the TPIU supports port size of 5-bit.</description>
41106 <description>Port size 5 is not supported.</description>
41111 <description>Port size 5 is supported.</description>
41118 <description>Indicates whether the TPIU supports port size of 6-bit.</description>
41124 <description>Port size 6 is not supported.</description>
41129 <description>Port size 6 is supported.</description>
41136 <description>Indicates whether the TPIU supports port size of 7-bit.</description>
41142 <description>Port size 7 is not supported.</description>
41147 <description>Port size 7 is supported.</description>
41154 <description>Indicates whether the TPIU supports port size of 8-bit.</description>
41160 <description>Port size 8 is not supported.</description>
41165 <description>Port size 8 is supported.</description>
41172 <description>Indicates whether the TPIU supports port size of 9-bit.</description>
41178 <description>Port size 9 is not supported.</description>
41183 <description>Port size 9 is supported.</description>
41190 <description>Indicates whether the TPIU supports port size of 10-bit.</description>
41196 <description>Port size 10 is not supported.</description>
41201 <description>Port size 10 is supported.</description>
41208 <description>Indicates whether the TPIU supports port size of 11-bit.</description>
41214 <description>Port size 11 is not supported.</description>
41219 <description>Port size 11 is supported.</description>
41226 <description>Indicates whether the TPIU supports port size of 12-bit.</description>
41232 <description>Port size 12 is not supported.</description>
41237 <description>Port size 12 is supported.</description>
41244 <description>Indicates whether the TPIU supports port size of 13-bit.</description>
41250 <description>Port size 13 is not supported.</description>
41255 <description>Port size 13 is supported.</description>
41262 <description>Indicates whether the TPIU supports port size of 14-bit.</description>
41268 <description>Port size 14 is not supported.</description>
41273 <description>Port size 14 is supported.</description>
41280 <description>Indicates whether the TPIU supports port size of 15-bit.</description>
41286 <description>Port size 15 is not supported.</description>
41291 <description>Port size 15 is supported.</description>
41298 <description>Indicates whether the TPIU supports port size of 16-bit.</description>
41304 <description>Port size 16 is not supported.</description>
41309 <description>Port size 16 is supported.</description>
41316 <description>Indicates whether the TPIU supports port size of 17-bit.</description>
41322 <description>Port size 17 is not supported.</description>
41327 <description>Port size 17 is supported.</description>
41334 <description>Indicates whether the TPIU supports port size of 18-bit.</description>
41340 <description>Port size 18 is not supported.</description>
41345 <description>Port size 18 is supported.</description>
41352 <description>Indicates whether the TPIU supports port size of 19-bit.</description>
41358 <description>Port size 19 is not supported.</description>
41363 <description>Port size 19 is supported.</description>
41370 <description>Indicates whether the TPIU supports port size of 20-bit.</description>
41376 <description>Port size 20 is not supported.</description>
41381 <description>Port size 20 is supported.</description>
41388 <description>Indicates whether the TPIU supports port size of 21-bit.</description>
41394 <description>Port size 21 is not supported.</description>
41399 <description>Port size 21 is supported.</description>
41406 <description>Indicates whether the TPIU supports port size of 22-bit.</description>
41412 <description>Port size 22 is not supported.</description>
41417 <description>Port size 22 is supported.</description>
41424 <description>Indicates whether the TPIU supports port size of 23-bit.</description>
41430 <description>Port size 23 is not supported.</description>
41435 <description>Port size 23 is supported.</description>
41442 <description>Indicates whether the TPIU supports port size of 24-bit.</description>
41448 <description>Port size 24 is not supported.</description>
41453 <description>Port size 24 is supported.</description>
41460 <description>Indicates whether the TPIU supports port size of 25-bit.</description>
41466 <description>Port size 25 is not supported.</description>
41471 <description>Port size 25 is supported.</description>
41478 <description>Indicates whether the TPIU supports port size of 26-bit.</description>
41484 <description>Port size 26 is not supported.</description>
41489 <description>Port size 26 is supported.</description>
41496 <description>Indicates whether the TPIU supports port size of 27-bit.</description>
41502 <description>Port size 27 is not supported.</description>
41507 <description>Port size 27 is supported.</description>
41514 <description>Indicates whether the TPIU supports port size of 28-bit.</description>
41520 <description>Port size 28 is not supported.</description>
41525 <description>Port size 28 is supported.</description>
41532 <description>Indicates whether the TPIU supports port size of 29-bit.</description>
41538 <description>Port size 29 is not supported.</description>
41543 <description>Port size 29 is supported.</description>
41550 <description>Indicates whether the TPIU supports port size of 30-bit.</description>
41556 <description>Port size 30 is not supported.</description>
41561 <description>Port size 30 is supported.</description>
41568 <description>Indicates whether the TPIU supports port size of 31-bit.</description>
41574 <description>Port size 31 is not supported.</description>
41579 <description>Port size 31 is supported.</description>
41586 <description>Indicates whether the TPIU supports port size of 32-bit.</description>
41592 <description>Port size 32 is not supported.</description>
41597 <description>Port size 32 is supported.</description>
41606 …<description>Each bit location is a single port size. One bit can be set, and indicates the curren…
41614 <description>Indicates which port size is currently selected.</description>
41620 <description>Port size 1 is not selected.</description>
41625 <description>Port size 1 is selected.</description>
41632 <description>Indicates which port size is currently selected.</description>
41638 <description>Port size 2 is not selected.</description>
41643 <description>Port size 2 is selected.</description>
41650 <description>Indicates which port size is currently selected.</description>
41656 <description>Port size 3 is not selected.</description>
41661 <description>Port size 3 is selected.</description>
41668 <description>Indicates which port size is currently selected.</description>
41674 <description>Port size 4 is not selected.</description>
41679 <description>Port size 4 is selected.</description>
41686 <description>Indicates which port size is currently selected.</description>
41692 <description>Port size 5 is not selected.</description>
41697 <description>Port size 5 is selected.</description>
41704 <description>Indicates which port size is currently selected.</description>
41710 <description>Port size 6 is not selected.</description>
41715 <description>Port size 6 is selected.</description>
41722 <description>Indicates which port size is currently selected.</description>
41728 <description>Port size 7 is not selected.</description>
41733 <description>Port size 7 is selected.</description>
41740 <description>Indicates which port size is currently selected.</description>
41746 <description>Port size 8 is not selected.</description>
41751 <description>Port size 8 is selected.</description>
41758 <description>Indicates which port size is currently selected.</description>
41764 <description>Port size 9 is not selected.</description>
41769 <description>Port size 9 is selected.</description>
41776 <description>Indicates which port size is currently selected.</description>
41782 <description>Port size 10 is not selected.</description>
41787 <description>Port size 10 is selected.</description>
41794 <description>Indicates which port size is currently selected.</description>
41800 <description>Port size 11 is not selected.</description>
41805 <description>Port size 11 is selected.</description>
41812 <description>Indicates which port size is currently selected.</description>
41818 <description>Port size 12 is not selected.</description>
41823 <description>Port size 12 is selected.</description>
41830 <description>Indicates which port size is currently selected.</description>
41836 <description>Port size 13 is not selected.</description>
41841 <description>Port size 13 is selected.</description>
41848 <description>Indicates which port size is currently selected.</description>
41854 <description>Port size 14 is not selected.</description>
41859 <description>Port size 14 is selected.</description>
41866 <description>Indicates which port size is currently selected.</description>
41872 <description>Port size 15 is not selected.</description>
41877 <description>Port size 15 is selected.</description>
41884 <description>Indicates which port size is currently selected.</description>
41890 <description>Port size 16 is not selected.</description>
41895 <description>Port size 16 is selected.</description>
41902 <description>Indicates which port size is currently selected.</description>
41908 <description>Port size 17 is not selected.</description>
41913 <description>Port size 17 is selected.</description>
41920 <description>Indicates which port size is currently selected.</description>
41926 <description>Port size 18 is not selected.</description>
41931 <description>Port size 18 is selected.</description>
41938 <description>Indicates which port size is currently selected.</description>
41944 <description>Port size 19 is not selected.</description>
41949 <description>Port size 19 is selected.</description>
41956 <description>Indicates which port size is currently selected.</description>
41962 <description>Port size 20 is not selected.</description>
41967 <description>Port size 20 is selected.</description>
41974 <description>Indicates which port size is currently selected.</description>
41980 <description>Port size 21 is not selected.</description>
41985 <description>Port size 21 is selected.</description>
41992 <description>Indicates which port size is currently selected.</description>
41998 <description>Port size 22 is not selected.</description>
42003 <description>Port size 22 is selected.</description>
42010 <description>Indicates which port size is currently selected.</description>
42016 <description>Port size 23 is not selected.</description>
42021 <description>Port size 23 is selected.</description>
42028 <description>Indicates which port size is currently selected.</description>
42034 <description>Port size 24 is not selected.</description>
42039 <description>Port size 24 is selected.</description>
42046 <description>Indicates which port size is currently selected.</description>
42052 <description>Port size 25 is not selected.</description>
42057 <description>Port size 25 is selected.</description>
42064 <description>Indicates which port size is currently selected.</description>
42070 <description>Port size 26 is not selected.</description>
42075 <description>Port size 26 is selected.</description>
42082 <description>Indicates which port size is currently selected.</description>
42088 <description>Port size 27 is not selected.</description>
42093 <description>Port size 27 is selected.</description>
42100 <description>Indicates which port size is currently selected.</description>
42106 <description>Port size 28 is not selected.</description>
42111 <description>Port size 28 is selected.</description>
42118 <description>Indicates which port size is currently selected.</description>
42124 <description>Port size 29 is not selected.</description>
42129 <description>Port size 29 is selected.</description>
42136 <description>Indicates which port size is currently selected.</description>
42142 <description>Port size 30 is not selected.</description>
42147 <description>Port size 30 is selected.</description>
42154 <description>Indicates which port size is currently selected.</description>
42160 <description>Port size 31 is not selected.</description>
42165 <description>Port size 31 is selected.</description>
42172 <description>Indicates which port size is currently selected.</description>
42178 <description>Port size 32 is not selected.</description>
42183 <description>Port size 32 is selected.</description>
42192 …description>The Supported_trigger_modes register indicates the implemented trigger counter multipl…
42200 …<description>Indicates whether multiplying the trigger counter by 2^(0+1) is supported.</descripti…
42206 … <description>Multiplying the trigger counter by 2^(0+1) is supported.</description>
42211 … <description>Multiplying the trigger counter by 2^(0+1) is supported.</description>
42218 …<description>Indicates whether multiplying the trigger counter by 2^(1+1) is supported.</descripti…
42224 … <description>Multiplying the trigger counter by 2^(1+1) is supported.</description>
42229 … <description>Multiplying the trigger counter by 2^(1+1) is supported.</description>
42236 …<description>Indicates whether multiplying the trigger counter by 2^(2+1) is supported.</descripti…
42242 … <description>Multiplying the trigger counter by 2^(2+1) is supported.</description>
42247 … <description>Multiplying the trigger counter by 2^(2+1) is supported.</description>
42254 …<description>Indicates whether multiplying the trigger counter by 2^(3+1) is supported.</descripti…
42260 … <description>Multiplying the trigger counter by 2^(3+1) is supported.</description>
42265 … <description>Multiplying the trigger counter by 2^(3+1) is supported.</description>
42272 …<description>Indicates whether multiplying the trigger counter by 2^(4+1) is supported.</descripti…
42278 … <description>Multiplying the trigger counter by 2^(4+1) is supported.</description>
42283 … <description>Multiplying the trigger counter by 2^(4+1) is supported.</description>
42290 … <description>Indicates whether an 8-bit wide counter register is implemented.</description>
42296 <description>An 8-bit wide counter register is implemented.</description>
42301 <description>An 8-bit wide counter register is implemented.</description>
42308 <description>A trigger has occurred and the counter has reached 0.</description>
42314 <description>Trigger has not occurred.</description>
42319 <description>Trigger has occurred.</description>
42326 <description>A trigger has occurred but the counter is not at 0.</description>
42332 … <description>Either a trigger has not occurred or the counter is at 0.</description>
42337 <description>A trigger has occurred but the counter is not at 0.</description>
42346 …description>The Trigger_counter_value register enables delaying the indication of triggers to any …
42354 …<description>8-bit counter value for the number of words to be output from the formatter before a …
42362 …<description>The Trigger_multiplier register contains the selectors for the trigger counter multip…
42370 <description>Multiply the Trigger Counter by 2^n.</description>
42376 <description>Multiplier disabled.</description>
42381 <description>Multiplier enabled.</description>
42388 <description>Multiply the Trigger Counter by 2^n.</description>
42394 <description>Multiplier disabled.</description>
42399 <description>Multiplier enabled.</description>
42406 <description>Multiply the Trigger Counter by 2^n.</description>
42412 <description>Multiplier disabled.</description>
42417 <description>Multiplier enabled.</description>
42424 <description>Multiply the Trigger Counter by 2^n.</description>
42430 <description>Multiplier disabled.</description>
42435 <description>Multiplier enabled.</description>
42442 <description>Multiply the Trigger Counter by 2^n.</description>
42448 <description>Multiplier disabled.</description>
42453 <description>Multiplier enabled.</description>
42462 …description>The Supported_test_pattern_modes register provides a set of known bit sequences or pat…
42470 …<description>Indicates whether the walking 1s pattern is supported as output over the trace port.<…
42476 <description>Test pattern is not supported.</description>
42481 <description>Test pattern is supported.</description>
42488 …<description>Indicates whether the walking 0s pattern is supported as output over the trace port.<…
42494 <description>Test pattern is not supported.</description>
42499 <description>Test pattern is supported.</description>
42506 …<description>Indicates whether the AA/55 pattern is supported as output over the trace port.</desc…
42512 <description>Test pattern is not supported.</description>
42517 <description>Test pattern is supported.</description>
42524 …<description>Indicates whether the FF/00 pattern is supported as output over the trace port.</desc…
42530 <description>Test pattern is not supported.</description>
42535 <description>Test pattern is supported.</description>
42542 <description>Indicates whether timed mode is supported.</description>
42548 <description>Mode is not supported.</description>
42553 <description>Mode is supported.</description>
42560 <description>Indicates whether continuous mode is supported.</description>
42566 <description>Mode is not supported.</description>
42571 <description>Mode is supported.</description>
42580 …<description>Current_test_pattern_mode indicates the current test pattern or mode selected.</descr…
42588 …<description>Indicates whether the walking 1s pattern is supported as output over the trace port.<…
42594 <description>Test pattern is disabled.</description>
42599 <description>Test pattern is enabled.</description>
42606 …<description>Indicates whether the walking 0s pattern is supported as output over the trace port.<…
42612 <description>Test pattern is disabled.</description>
42617 <description>Test pattern is enabled.</description>
42624 …<description>Indicates whether the AA/55 pattern is supported as output over the trace port.</desc…
42630 <description>Test pattern is disabled.</description>
42635 <description>Test pattern is enabled.</description>
42642 …<description>Indicates whether the FF/00 pattern is supported as output over the trace port.</desc…
42648 <description>Test pattern is disabled.</description>
42653 <description>Test pattern is enabled.</description>
42660 <description>Indicates whether timed mode is supported.</description>
42666 <description>Mode is disabled.</description>
42671 <description>Mode is enabled.</description>
42678 <description>Indicates whether continuous mode is supported.</description>
42684 <description>Mode is disabled.</description>
42689 <description>Mode is enabled.</description>
42698 …description>The TPRCR register is an 8-bit counter start value that is decremented. A write sets t…
42706 …description>8-bit counter value to indicate the number of traceclkin cycles for which a pattern ru…
42714 …<description>The FFSR register indicates the current status of the formatter and flush features av…
42722 <description>Flush in progress.</description>
42728 <description>A flush is not in progress.</description>
42733 <description>A flush is in progress.</description>
42740 …description>The formatter has received a stop request signal and all trace data and post-amble is …
42746 <description>Formatter has not stopped.</description>
42751 <description>Formatter has stopped.</description>
42758 <description>Indicates whether the TRACECTL pin is available for use.</description>
42764 <description>TRACECTL pin is not present.</description>
42769 <description>TRACECTL pin is present.</description>
42778 …<description>The FFCR register controls the generation of stop, trigger, and flush events.</descri…
42786 …<description>Do not embed triggers into the formatted stream. Trace disable cycles and triggers ar…
42792 <description>The formatting feature is disabled.</description>
42797 <description>The formatting feature is enabled.</description>
42804 …<description>Is embedded in trigger packets and indicates that no cycle is using sync packets.</de…
42810 <description>The formatting feature is disabled.</description>
42815 <description>The formatting feature is enabled.</description>
42822 <description>Enables the use of the flushin connection.</description>
42828 <description>The formatting feature is disabled.</description>
42833 <description>The formatting feature is enabled.</description>
42840 …<description>Initiates a manual flush of data in the system when a trigger event occurs.</descript…
42846 <description>The formatting feature is disabled.</description>
42851 <description>The formatting feature is enabled.</description>
42858 … <description>Generates a flush. This bit is set to 0 when this flush is serviced.</description>
42864 <description>The formatting feature is disabled.</description>
42869 <description>The formatting feature is enabled.</description>
42876 … <description>Generates a flush. This bit is set to 1 when this flush is serviced.</description>
42882 <description>The formatting feature is disabled.</description>
42887 <description>The formatting feature is enabled.</description>
42894 <description>Indicates a trigger when trigin is asserted.</description>
42900 <description>The formatting feature is disabled.</description>
42905 <description>The formatting feature is enabled.</description>
42912 <description>Indicates a trigger on a trigger event.</description>
42918 <description>The formatting feature is disabled.</description>
42923 <description>The formatting feature is enabled.</description>
42930 … <description>Indicates a trigger when flush completion on afreadys is returned.</description>
42936 <description>The formatting feature is disabled.</description>
42941 <description>The formatting feature is enabled.</description>
42948 <description>Forces the FIFO to drain off any part-completed packets.</description>
42954 <description>The formatting feature is disabled.</description>
42959 <description>The formatting feature is enabled.</description>
42966 …<description>Stops the formatter after a trigger event is observed. Reset to disabled or 0.</descr…
42972 <description>The formatting feature is disabled.</description>
42977 <description>The formatting feature is enabled.</description>
42986 …description>The FSCR register enables the frequency of synchronization information to be optimized…
42994 …<description>12-bit counter reload value. Indicates the number of complete frames between full syn…
43002 …description>Two ports can be used as a control and feedback mechanism for any serializers, pin sha…
43010 <description>EXTCTL inputs.</description>
43016 <description>Input EXTCTL0 is low.</description>
43021 <description>Input EXTCTL0 is high.</description>
43028 <description>EXTCTL inputs.</description>
43034 <description>Input EXTCTL1 is low.</description>
43039 <description>Input EXTCTL1 is high.</description>
43046 <description>EXTCTL inputs.</description>
43052 <description>Input EXTCTL2 is low.</description>
43057 <description>Input EXTCTL2 is high.</description>
43064 <description>EXTCTL inputs.</description>
43070 <description>Input EXTCTL3 is low.</description>
43075 <description>Input EXTCTL3 is high.</description>
43082 <description>EXTCTL inputs.</description>
43088 <description>Input EXTCTL4 is low.</description>
43093 <description>Input EXTCTL4 is high.</description>
43100 <description>EXTCTL inputs.</description>
43106 <description>Input EXTCTL5 is low.</description>
43111 <description>Input EXTCTL5 is high.</description>
43118 <description>EXTCTL inputs.</description>
43124 <description>Input EXTCTL6 is low.</description>
43129 <description>Input EXTCTL6 is high.</description>
43136 <description>EXTCTL inputs.</description>
43142 <description>Input EXTCTL7 is low.</description>
43147 <description>Input EXTCTL7 is high.</description>
43156 …description>Two ports can be used as a control and feedback mechanism for any serializers, pin sha…
43164 <description>EXTCTL outputs.</description>
43170 <description>Output EXTCTL0 is low.</description>
43175 <description>Output EXTCTL0 is high.</description>
43182 <description>EXTCTL outputs.</description>
43188 <description>Output EXTCTL1 is low.</description>
43193 <description>Output EXTCTL1 is high.</description>
43200 <description>EXTCTL outputs.</description>
43206 <description>Output EXTCTL2 is low.</description>
43211 <description>Output EXTCTL2 is high.</description>
43218 <description>EXTCTL outputs.</description>
43224 <description>Output EXTCTL3 is low.</description>
43229 <description>Output EXTCTL3 is high.</description>
43236 <description>EXTCTL outputs.</description>
43242 <description>Output EXTCTL4 is low.</description>
43247 <description>Output EXTCTL4 is high.</description>
43254 <description>EXTCTL outputs.</description>
43260 <description>Output EXTCTL5 is low.</description>
43265 <description>Output EXTCTL5 is high.</description>
43272 <description>EXTCTL outputs.</description>
43278 <description>Output EXTCTL6 is low.</description>
43283 <description>Output EXTCTL6 is high.</description>
43290 <description>EXTCTL outputs.</description>
43296 <description>Output EXTCTL7 is low.</description>
43301 <description>Output EXTCTL7 is high.</description>
43310 …<description>The ITTRFLINACK register enables control of the triginack and flushinack outputs from…
43318 <description>Sets the value of triginack.</description>
43324 <description>Pin is logic 0.</description>
43329 <description>Pin is logic 1.</description>
43336 <description>Sets the value of flushinack.</description>
43342 <description>Pin is logic 0.</description>
43347 <description>Pin is logic 1.</description>
43356 …<description>The ITTRFLIN register contains the values of the flushin and trigin inputs to the TPI…
43364 <description>Reads the value of trigin.</description>
43370 <description>Pin is logic 0.</description>
43375 <description>Pin is logic 1.</description>
43382 <description>Reads the value of flushin.</description>
43388 <description>Pin is logic 0.</description>
43393 <description>Pin is logic 1.</description>
43402 …<description>The ITATBDATA0 register contains the value of the atdatas inputs to the TPIU. The val…
43410 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
43416 <description>Pin is logic 0.</description>
43421 <description>Pin is logic 1.</description>
43428 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
43434 <description>Pin is logic 0.</description>
43439 <description>Pin is logic 1.</description>
43446 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
43452 <description>Pin is logic 0.</description>
43457 <description>Pin is logic 1.</description>
43464 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
43470 <description>Pin is logic 0.</description>
43475 <description>Pin is logic 1.</description>
43482 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
43488 <description>Pin is logic 0.</description>
43493 <description>Pin is logic 1.</description>
43502 … <description>Enables control of the atreadys and afvalids outputs of the TPIU.</description>
43510 <description>Sets the value of afvalid.</description>
43516 <description>Pin is logic 0.</description>
43521 <description>Pin is logic 1.</description>
43528 <description>Sets the value of atready.</description>
43534 <description>Pin is logic 0.</description>
43539 <description>Pin is logic 1.</description>
43548 …<description>The ITATBCTR1 register contains the value of the atids input to the TPIU. This is onl…
43556 <description>Reads the value of atids.</description>
43562 <description>Pin is logic 0.</description>
43567 <description>Pin is logic 1.</description>
43576 …<description>The ITATBCTR0 register captures the values of the atvalids, afreadys, and atbytess in…
43577 …ctly in a system, the value of atbytess is only valid when atvalids, bit[0], is HIGH.</description>
43585 <description>Reads the value of atvalids.</description>
43591 <description>Pin is logic 0.</description>
43596 <description>Pin is logic 1.</description>
43603 <description>Reads the value of afreadys.</description>
43609 <description>Pin is logic 0.</description>
43614 <description>Pin is logic 1.</description>
43621 <description>Reads the value of atbytess.</description>
43627 <description>Pin is logic 0.</description>
43632 <description>Pin is logic 1.</description>
43641 <description>Used to enable topology detection.
43643 …he component can be directly controlled for integration testing and topology solving.</description>
43651 …description>Enables the component to switch from functional mode to integration mode and back. If …
43657 <description>Integration mode is disabled.</description>
43662 <description>Integration mode is Enabled.</description>
43671 …<description>Software can use the claim tag to coordinate application and debugger access to trace…
43672 …ster sets bits in the claim tag, and determines the number of claim bits implemented.</description>
43680 <description>Set claim bit 0 and check if bit is implemented or not.</description>
43687 <description>Claim bit 0 is not implemented.</description>
43692 <description>Claim bit 0 is implemented.</description>
43700 <description>Set claim bit 0.</description>
43707 <description>Set claim bit 1 and check if bit is implemented or not.</description>
43714 <description>Claim bit 1 is not implemented.</description>
43719 <description>Claim bit 1 is implemented.</description>
43727 <description>Set claim bit 1.</description>
43734 <description>Set claim bit 2 and check if bit is implemented or not.</description>
43741 <description>Claim bit 2 is not implemented.</description>
43746 <description>Claim bit 2 is implemented.</description>
43754 <description>Set claim bit 2.</description>
43761 <description>Set claim bit 3 and check if bit is implemented or not.</description>
43768 <description>Claim bit 3 is not implemented.</description>
43773 <description>Claim bit 3 is implemented.</description>
43781 <description>Set claim bit 3.</description>
43790 …<description>Software can use the claim tag to coordinate application and debugger access to trace…
43792 …ets the bits in the claim tag to 0 and determines the current value of the claim tag.</description>
43800 <description>Read or clear claim bit 0.</description>
43807 <description>Claim bit 0 is not set.</description>
43812 <description>Claim bit 0 is set.</description>
43820 <description>Clear claim bit 0.</description>
43827 <description>Read or clear claim bit 1.</description>
43834 <description>Claim bit 1 is not set.</description>
43839 <description>Claim bit 1 is set.</description>
43847 <description>Clear claim bit 1.</description>
43854 <description>Read or clear claim bit 2.</description>
43861 <description>Claim bit 2 is not set.</description>
43866 <description>Claim bit 2 is set.</description>
43874 <description>Clear claim bit 2.</description>
43881 <description>Read or clear claim bit 3.</description>
43888 <description>Claim bit 3 is not set.</description>
43893 <description>Claim bit 3 is set.</description>
43901 <description>Clear claim bit 3.</description>
43910 <description>This is used to enable write access to device registers.</description>
43918 …<description>A write of 0xC5ACCE55 enables further write access to this device. Any other write re…
43924 <description>Unlock register interface.</description>
43933 …<description>This indicates the status of the lock control mechanism. This lock prevents accidenta…
43937 … For most components this covers all registers except for the Lock Access Register.</description>
43945 … <description>Indicates that a lock control mechanism exists for this device.</description>
43951 …<description>No lock control mechanism exists, writes to the Lock Access Register are ignored.</de…
43956 <description>Lock control mechanism is present.</description>
43963 <description>Returns the current status of the Lock.</description>
43969 <description>Write access is allowed to this device.</description>
43974 …<description>Write access to the component is blocked. All writes to control registers are ignored…
43981 …<description>Indicates if the Lock Access Register is implemented as 8-bit or 32-bit.</description>
43987 … <description>This component implements a 32-bit Lock Access Register.</description>
43992 … <description>This component implements an 8-bit Lock Access Register.</description>
44001 <description>Indicates the current level of tracing permitted by the system</description>
44009 <description>Non-secure Invasive Debug</description>
44015 <description>The feature is not implemented.</description>
44020 <description>The feature is implemented.</description>
44027 <description>Non-secure Non-Invasive Debug</description>
44033 <description>The feature is not implemented.</description>
44038 <description>The feature is implemented.</description>
44045 <description>Secure Invasive Debug</description>
44051 <description>The feature is not implemented.</description>
44056 <description>The feature is implemented.</description>
44063 <description>Secure Non-Invasive Debug</description>
44069 <description>The feature is not implemented.</description>
44074 <description>The feature is implemented.</description>
44083 <description>Indicates the capabilities of the component.</description>
44091 …<description>Indicates the hidden level of input multiplexing. When non-zero, this value indicates…
44092 …rted, that is, no multiplexing is present. This value helps detect the ATB structure.</description>
44098 <description>Indicates the relationship between atclk and traceclkin.</description>
44104 <description>atclk and traceclkin are synchronous.</description>
44109 <description>atclk and traceclkin are asynchronous.</description>
44116 <description>FIFO size in powers of 2.</description>
44122 <description>FIFO size of 4 entries, that is, 16 bytes.</description>
44129 <description>Indicates whether trace clock plus data is supported.</description>
44135 <description>Trace clock and data is supported.</description>
44140 <description>Trace clock and data is not supported.</description>
44147 …<description>Indicates whether Serial Wire Output, Manchester encoded format, is supported.</descr…
44153 … <description>Serial Wire Output, Manchester encoded format, is not supported.</description>
44158 … <description>Serial Wire Output, Manchester encoded format, is supported.</description>
44165 … <description>Indicates whether Serial Wire Output, UART or NRZ, is supported.</description>
44171 <description>Serial Wire Output, UART or NRZ, is not supported.</description>
44176 <description>Serial Wire Output, UART or NRZ, is supported.</description>
44185 …description>The DEVTYPE register provides a debugger with information about the component when the…
44193 <description>The main type of the component</description>
44199 <description>Peripheral is a trace sink.</description>
44206 <description>The sub-type of the component</description>
44212 … <description>Indicates that this component is a trace port component.</description>
44221 <description>Coresight peripheral identification registers.</description>
44229 <description>Coresight peripheral identification registers.</description>
44237 <description>Coresight peripheral identification registers.</description>
44245 <description>Coresight peripheral identification registers.</description>
44253 <description>Coresight peripheral identification registers.</description>
44261 <description>Coresight component identification registers.</description>
44269 <description>Coresight component identification registers.</description>
44277 <description>Coresight component identification registers.</description>
44285 <description>Coresight component identification registers.</description>
44295 <description>Cross-Trigger Interface control 0</description>
44310 <description>CTI Control register</description>
44318 <description>Enables or disables the CTI.</description>
44324 … <description>All cross-triggering mapping logic functionality is disabled.</description>
44329 … <description>Cross-triggering mapping logic functionality is enabled.</description>
44338 <description>CTI Interrupt Acknowledge register</description>
44346 <description>Acknowledges the ctitrigout 0 output.</description>
44353 <description>Clears the ctitrigout.</description>
44360 <description>Acknowledges the ctitrigout 1 output.</description>
44367 <description>Clears the ctitrigout.</description>
44374 <description>Acknowledges the ctitrigout 2 output.</description>
44381 <description>Clears the ctitrigout.</description>
44388 <description>Acknowledges the ctitrigout 3 output.</description>
44395 <description>Clears the ctitrigout.</description>
44402 <description>Acknowledges the ctitrigout 4 output.</description>
44409 <description>Clears the ctitrigout.</description>
44416 <description>Acknowledges the ctitrigout 5 output.</description>
44423 <description>Clears the ctitrigout.</description>
44430 <description>Acknowledges the ctitrigout 6 output.</description>
44437 <description>Clears the ctitrigout.</description>
44444 <description>Acknowledges the ctitrigout 7 output.</description>
44451 <description>Clears the ctitrigout.</description>
44460 <description>CTI Application Trigger Set register</description>
44468 <description>Application trigger event for channel 0.</description>
44475 <description>Application trigger 0 is inactive.</description>
44480 <description>Application trigger 0 is active.</description>
44488 <description>Generate channel event for channel 0.</description>
44495 <description>Application trigger event for channel 1.</description>
44502 <description>Application trigger 1 is inactive.</description>
44507 <description>Application trigger 1 is active.</description>
44515 <description>Generate channel event for channel 1.</description>
44522 <description>Application trigger event for channel 2.</description>
44529 <description>Application trigger 2 is inactive.</description>
44534 <description>Application trigger 2 is active.</description>
44542 <description>Generate channel event for channel 2.</description>
44549 <description>Application trigger event for channel 3.</description>
44556 <description>Application trigger 3 is inactive.</description>
44561 <description>Application trigger 3 is active.</description>
44569 <description>Generate channel event for channel 3.</description>
44578 <description>CTI Application Trigger Clear register</description>
44586 …<description>Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register f…
44593 <description>Clears the event for channel 0.</description>
44600 …<description>Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register f…
44607 <description>Clears the event for channel 1.</description>
44614 …<description>Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register f…
44621 <description>Clears the event for channel 2.</description>
44628 …<description>Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register f…
44635 <description>Clears the event for channel 3.</description>
44644 <description>CTI Application Pulse register</description>
44652 …description>Setting a bit HIGH generates a channel event pulse for the selected channel. There is …
44659 <description>Generates an event pulse on channel 0.</description>
44666 …description>Setting a bit HIGH generates a channel event pulse for the selected channel. There is …
44673 <description>Generates an event pulse on channel 1.</description>
44680 …description>Setting a bit HIGH generates a channel event pulse for the selected channel. There is …
44687 <description>Generates an event pulse on channel 2.</description>
44694 …description>Setting a bit HIGH generates a channel event pulse for the selected channel. There is …
44701 <description>Generates an event pulse on channel 3.</description>
44712 <description>Description collection: CTI Trigger to Channel Enable register</description>
44720 …<description>Enables a cross trigger event to channel 0 when a ctitrigin input is activated.</desc…
44726 <description>Input trigger n events are ignored by channel 0.</description>
44731 …<description>When an event is received on input trigger n (ctitrigin[n]), generate an event on cha…
44738 …<description>Enables a cross trigger event to channel 1 when a ctitrigin input is activated.</desc…
44744 <description>Input trigger n events are ignored by channel 1.</description>
44749 …<description>When an event is received on input trigger n (ctitrigin[n]), generate an event on cha…
44756 …<description>Enables a cross trigger event to channel 2 when a ctitrigin input is activated.</desc…
44762 <description>Input trigger n events are ignored by channel 2.</description>
44767 …<description>When an event is received on input trigger n (ctitrigin[n]), generate an event on cha…
44774 …<description>Enables a cross trigger event to channel 3 when a ctitrigin input is activated.</desc…
44780 <description>Input trigger n events are ignored by channel 3.</description>
44785 …<description>When an event is received on input trigger n (ctitrigin[n]), generate an event on cha…
44796 <description>Description collection: CTI Channel to Trigger Enable register</description>
44804 …<description>Enables a cross trigger event to ctitrigout when channel 0 is activated.</description>
44810 <description>Channel 0 is ignored by output trigger n.</description>
44815 …<description>When an event occurs on channel 0, generate an event on output event n (ctitrigout[n]…
44822 …<description>Enables a cross trigger event to ctitrigout when channel 1 is activated.</description>
44828 <description>Channel 1 is ignored by output trigger n.</description>
44833 …<description>When an event occurs on channel 1, generate an event on output event n (ctitrigout[n]…
44840 …<description>Enables a cross trigger event to ctitrigout when channel 2 is activated.</description>
44846 <description>Channel 2 is ignored by output trigger n.</description>
44851 …<description>When an event occurs on channel 2, generate an event on output event n (ctitrigout[n]…
44858 …<description>Enables a cross trigger event to ctitrigout when channel 3 is activated.</description>
44864 <description>Channel 3 is ignored by output trigger n.</description>
44869 …<description>When an event occurs on channel 3, generate an event on output event n (ctitrigout[n]…
44878 <description>CTI Trigger In Status register</description>
44886 <description>Shows the status of ctitrigin0 input.</description>
44892 <description>Ctitrigin 0 is active.</description>
44897 <description>Ctitrigin 0 is inactive.</description>
44904 <description>Shows the status of ctitrigin1 input.</description>
44910 <description>Ctitrigin 1 is active.</description>
44915 <description>Ctitrigin 1 is inactive.</description>
44922 <description>Shows the status of ctitrigin2 input.</description>
44928 <description>Ctitrigin 2 is active.</description>
44933 <description>Ctitrigin 2 is inactive.</description>
44940 <description>Shows the status of ctitrigin3 input.</description>
44946 <description>Ctitrigin 3 is active.</description>
44951 <description>Ctitrigin 3 is inactive.</description>
44958 <description>Shows the status of ctitrigin4 input.</description>
44964 <description>Ctitrigin 4 is active.</description>
44969 <description>Ctitrigin 4 is inactive.</description>
44976 <description>Shows the status of ctitrigin5 input.</description>
44982 <description>Ctitrigin 5 is active.</description>
44987 <description>Ctitrigin 5 is inactive.</description>
44994 <description>Shows the status of ctitrigin6 input.</description>
45000 <description>Ctitrigin 6 is active.</description>
45005 <description>Ctitrigin 6 is inactive.</description>
45012 <description>Shows the status of ctitrigin7 input.</description>
45018 <description>Ctitrigin 7 is active.</description>
45023 <description>Ctitrigin 7 is inactive.</description>
45032 <description>CTI Trigger Out Status register</description>
45040 <description>Shows the status of ctitrigout0 output.</description>
45046 <description>Ctitrigout 0 is active.</description>
45051 <description>Ctitrigout 0 is inactive.</description>
45058 <description>Shows the status of ctitrigout1 output.</description>
45064 <description>Ctitrigout 1 is active.</description>
45069 <description>Ctitrigout 1 is inactive.</description>
45076 <description>Shows the status of ctitrigout2 output.</description>
45082 <description>Ctitrigout 2 is active.</description>
45087 <description>Ctitrigout 2 is inactive.</description>
45094 <description>Shows the status of ctitrigout3 output.</description>
45100 <description>Ctitrigout 3 is active.</description>
45105 <description>Ctitrigout 3 is inactive.</description>
45112 <description>Shows the status of ctitrigout4 output.</description>
45118 <description>Ctitrigout 4 is active.</description>
45123 <description>Ctitrigout 4 is inactive.</description>
45130 <description>Shows the status of ctitrigout5 output.</description>
45136 <description>Ctitrigout 5 is active.</description>
45141 <description>Ctitrigout 5 is inactive.</description>
45148 <description>Shows the status of ctitrigout6 output.</description>
45154 <description>Ctitrigout 6 is active.</description>
45159 <description>Ctitrigout 6 is inactive.</description>
45166 <description>Shows the status of ctitrigout7 output.</description>
45172 <description>Ctitrigout 7 is active.</description>
45177 <description>Ctitrigout 7 is inactive.</description>
45186 <description>CTI Channel In Status register</description>
45194 <description>Shows the status of the ctitrigin 0 input.</description>
45200 <description>Ctichin 0 is active.</description>
45205 <description>Ctichin 0 is inactive.</description>
45212 <description>Shows the status of the ctitrigin 1 input.</description>
45218 <description>Ctichin 1 is active.</description>
45223 <description>Ctichin 1 is inactive.</description>
45230 <description>Shows the status of the ctitrigin 2 input.</description>
45236 <description>Ctichin 2 is active.</description>
45241 <description>Ctichin 2 is inactive.</description>
45248 <description>Shows the status of the ctitrigin 3 input.</description>
45254 <description>Ctichin 3 is active.</description>
45259 <description>Ctichin 3 is inactive.</description>
45268 <description>Enable CTI Channel Gate register</description>
45276 <description>Enable ctichout0.</description>
45282 <description>Enable ctichout channel 0 propagation.</description>
45287 <description>Disable ctichout channel 0 propagation.</description>
45294 <description>Enable ctichout1.</description>
45300 <description>Enable ctichout channel 1 propagation.</description>
45305 <description>Disable ctichout channel 1 propagation.</description>
45312 <description>Enable ctichout2.</description>
45318 <description>Enable ctichout channel 2 propagation.</description>
45323 <description>Disable ctichout channel 2 propagation.</description>
45330 <description>Enable ctichout3.</description>
45336 <description>Enable ctichout channel 3 propagation.</description>
45341 <description>Disable ctichout channel 3 propagation.</description>
45350 <description>Device Architecture register</description>
45358 <description>Contains the CTI device architecture.</description>
45366 <description>Device Configuration register</description>
45374 …<description>Indicates the number of multiplexers available on Trigger Inputs and Trigger Outputs …
45375 … The default value of 0b00000 indicates that no multiplexing is present.</description>
45381 <description>Number of ECT triggers available.</description>
45387 <description>Number of ECT channels available.</description>
45395 <description>Device Type Identifier register</description>
45403 …<description>Major classification of the type of the debug component as specified in the Arm Archi…
45404 debug and trace component.</description>
45410 …<description>Indicates that this component allows a debugger to control other components in an Arm…
45417 …<description>Sub-classification of the type of the debug component as specified in the Arm Archite…
45418 the major classification as specified in the MAJOR field.</description>
45424 … <description>Indicates that this component is a sub-triggering component.</description>
45433 <description>Peripheral ID4 Register</description>
45441 …<description>Together, PIDR1.DES_0, PIDR2.DES_1, and PIDR4.DES_2 identify the designer of the comp…
45447 <description>JEDEC continuation code.</description>
45454 … <description>Always 0b0000. Indicates that the device only occupies 4KB of memory.</description>
45462 <description>Peripheral ID5 register</description>
45470 <description>Peripheral ID6 register</description>
45478 <description>Peripheral ID7 register</description>
45486 <description>Peripheral ID0 Register</description>
45494 …<description>Bits[7:0] of the 12-bit part number of the component. The designer of the component a…
45500 … <description>Indicates bits[7:0] of the part number of the component.</description>
45509 <description>Peripheral ID1 Register</description>
45517 …<description>Bits[11:8] of the 12-bit part number of the component. The designer of the component …
45523 … <description>Indicates bits[11:8] of the part number of the component.</description>
45530 …<description>Together, PIDR1.DES_0, PIDR2.DES_1, and PIDR4.DES_2 identify the designer of the comp…
45536 <description>Arm. Bits[3:0] of the JEDEC JEP106 Identity Code</description>
45545 <description>Peripheral ID2 Register</description>
45553 …<description>Together, PIDR1.DES_0, PIDR2.DES_1, and PIDR4.DES_2 identify the designer of the comp…
45559 <description>Arm. Bits[6:4] of the JEDEC JEP106 Identity Code</description>
45566 … <description>Always 1. Indicates that the JEDEC-assigned designer ID is used.</description>
45572 <description>Peripheral revision</description>
45578 <description>This device is at r0p0</description>
45587 <description>Peripheral ID3 Register</description>
45595 …<description>Customer Modified. Indicates whether the customer has modified the behavior of the co…
45596 …ustomers change this value when they make authorized modifications to this component.</description>
45602 … <description>Indicates that the customer has not modified this component.</description>
45609 …<description>Indicates minor errata fixes specific to the revision of the component being used, fo…
45611 …is field if required, for example, by driving it from registers that reset to 0b0000.</description>
45617 … <description>Indicates that there are no errata fixes to this component.</description>
45626 <description>Component ID0 Register</description>
45634 … <description>Preamble[0]. Contains bits[7:0] of the component identification code.</description>
45640 <description>Bits[7:0] of the identification code.</description>
45649 <description>Component ID1 Register</description>
45657 … <description>Preamble[1]. Contains bits[11:8] of the component identification code.</description>
45663 <description>Bits[11:8] of the identification code.</description>
45670 …<description>Class of the component, for example, whether the component is a ROM table or a generi…
45671 Contains bits[15:12] of the component identification code</description>
45677 <description>Indicates that the component is a CoreSight component.</description>
45686 <description>Component ID2 Register</description>
45694 … <description>Preamble[2]. Contains bits[23:16] of the component identification code.</description>
45700 <description>Bits[23:16] of the identification code.</description>
45709 <description>Component ID3 Register</description>
45717 … <description>Preamble[3]. Contains bits[31:24] of the component identification code.</description>
45723 <description>Bits[31:24] of the identification code.</description>
45734 <description>Cross-Trigger Interface control 1</description>
45741 <description>ATB Replicator module 0</description>
45756 …<description>The IDFILTER0 register enables the programming of ID filtering for master port 0.</de…
45764 <description>Enable or disable ID filtering for IDs 0x00_0x0F.</description>
45770 … <description>Transactions with these IDs are passed on to ATB master port 0.</description>
45775 … <description>Transactions with these IDs are discarded by the replicator.</description>
45782 <description>Enable or disable ID filtering for IDs 0x10_0x1F.</description>
45788 … <description>Transactions with these IDs are passed on to ATB master port 0.</description>
45793 … <description>Transactions with these IDs are discarded by the replicator.</description>
45800 <description>Enable or disable ID filtering for IDs 0x20_0x2F.</description>
45806 … <description>Transactions with these IDs are passed on to ATB master port 0.</description>
45811 … <description>Transactions with these IDs are discarded by the replicator.</description>
45818 <description>Enable or disable ID filtering for IDs 0x30_0x3F.</description>
45824 … <description>Transactions with these IDs are passed on to ATB master port 0.</description>
45829 … <description>Transactions with these IDs are discarded by the replicator.</description>
45836 <description>Enable or disable ID filtering for IDs 0x40_0x4F.</description>
45842 … <description>Transactions with these IDs are passed on to ATB master port 0.</description>
45847 … <description>Transactions with these IDs are discarded by the replicator.</description>
45854 <description>Enable or disable ID filtering for IDs 0x50_0x5F.</description>
45860 … <description>Transactions with these IDs are passed on to ATB master port 0.</description>
45865 … <description>Transactions with these IDs are discarded by the replicator.</description>
45872 <description>Enable or disable ID filtering for IDs 0x60_0x6F.</description>
45878 … <description>Transactions with these IDs are passed on to ATB master port 0.</description>
45883 … <description>Transactions with these IDs are discarded by the replicator.</description>
45890 <description>Enable or disable ID filtering for IDs 0x70_0x7F.</description>
45896 … <description>Transactions with these IDs are passed on to ATB master port 0.</description>
45901 … <description>Transactions with these IDs are discarded by the replicator.</description>
45910 …<description>The IDFILTER1 register enables the programming of ID filtering for master port 1.</de…
45918 <description>Enable or disable ID filtering for IDs 0x00_0x0F.</description>
45924 … <description>Transactions with these IDs are passed on to ATB master port 1.</description>
45929 … <description>Transactions with these IDs are discarded by the replicator.</description>
45936 <description>Enable or disable ID filtering for IDs 0x10_0x1F.</description>
45942 … <description>Transactions with these IDs are passed on to ATB master port 1.</description>
45947 … <description>Transactions with these IDs are discarded by the replicator.</description>
45954 <description>Enable or disable ID filtering for IDs 0x20_0x2F.</description>
45960 … <description>Transactions with these IDs are passed on to ATB master port 1.</description>
45965 … <description>Transactions with these IDs are discarded by the replicator.</description>
45972 <description>Enable or disable ID filtering for IDs 0x30_0x3F.</description>
45978 … <description>Transactions with these IDs are passed on to ATB master port 1.</description>
45983 … <description>Transactions with these IDs are discarded by the replicator.</description>
45990 <description>Enable or disable ID filtering for IDs 0x40_0x4F.</description>
45996 … <description>Transactions with these IDs are passed on to ATB master port 1.</description>
46001 … <description>Transactions with these IDs are discarded by the replicator.</description>
46008 <description>Enable or disable ID filtering for IDs 0x50_0x5F.</description>
46014 … <description>Transactions with these IDs are passed on to ATB master port 1.</description>
46019 … <description>Transactions with these IDs are discarded by the replicator.</description>
46026 <description>Enable or disable ID filtering for IDs 0x60_0x6F.</description>
46032 … <description>Transactions with these IDs are passed on to ATB master port 1.</description>
46037 … <description>Transactions with these IDs are discarded by the replicator.</description>
46044 <description>Enable or disable ID filtering for IDs 0x70_0x7F.</description>
46050 … <description>Transactions with these IDs are passed on to ATB master port 1.</description>
46055 … <description>Transactions with these IDs are discarded by the replicator.</description>
46064 …<description>The ITATBCTR1 register returns the value of the atreadym0, atreadym1, and atvalids in…
46072 <description>Reads the value of the atreadym0 input.</description>
46078 <description>Pin is logic 0.</description>
46083 <description>Pin is logic 1.</description>
46090 <description>Reads the value of the atreadym1 input.</description>
46096 <description>Pin is logic 0.</description>
46101 <description>Pin is logic 1.</description>
46108 <description>Reads the value of the atvalids input.</description>
46114 <description>Pin is logic 0.</description>
46119 <description>Pin is logic 1.</description>
46128 …<description>The ITATBCTR0 register controls the value of the atvalidm0, atvalidm1, and atreadys o…
46136 <description>Sets the value of the atvalidm0 output.</description>
46142 <description>Pin is logic 0.</description>
46147 <description>Pin is logic 1.</description>
46154 <description>Sets the value of the atvalidm1 output.</description>
46160 <description>Pin is logic 0.</description>
46165 <description>Pin is logic 1.</description>
46172 <description>Sets the value of the atreadys output.</description>
46178 <description>Pin is logic 0.</description>
46183 <description>Pin is logic 1.</description>
46192 …<description>The ITCTRL register enables the component to switch from a functional mode, which is …
46193 …e directly controlled for the purposes of integration testing and topology detection.</description>
46201 <description>Integration Mode Enable.</description>
46207 <description>Integration mode disabled.</description>
46212 <description>Integration mode enabled.</description>
46221 …<description>Software can use the claim tag to coordinate application and debugger access to trace…
46222 …ster sets bits in the claim tag, and determines the number of claim bits implemented.</description>
46230 <description>Set claim bit 0 and check if bit is implemented or not.</description>
46237 <description>Claim bit 0 is not implemented.</description>
46242 <description>Claim bit 0 is implemented.</description>
46250 <description>Set claim bit 0.</description>
46257 <description>Set claim bit 1 and check if bit is implemented or not.</description>
46264 <description>Claim bit 1 is not implemented.</description>
46269 <description>Claim bit 1 is implemented.</description>
46277 <description>Set claim bit 1.</description>
46284 <description>Set claim bit 2 and check if bit is implemented or not.</description>
46291 <description>Claim bit 2 is not implemented.</description>
46296 <description>Claim bit 2 is implemented.</description>
46304 <description>Set claim bit 2.</description>
46311 <description>Set claim bit 3 and check if bit is implemented or not.</description>
46318 <description>Claim bit 3 is not implemented.</description>
46323 <description>Claim bit 3 is implemented.</description>
46331 <description>Set claim bit 3.</description>
46340 …<description>Software can use the claim tag to coordinate application and debugger access to trace…
46342 …ets the bits in the claim tag to 0 and determines the current value of the claim tag.</description>
46350 <description>Read or clear claim bit 0.</description>
46357 <description>Claim bit 0 is not set.</description>
46362 <description>Claim bit 0 is set.</description>
46370 <description>Clear claim bit 0.</description>
46377 <description>Read or clear claim bit 1.</description>
46384 <description>Claim bit 1 is not set.</description>
46389 <description>Claim bit 1 is set.</description>
46397 <description>Clear claim bit 1.</description>
46404 <description>Read or clear claim bit 2.</description>
46411 <description>Claim bit 2 is not set.</description>
46416 <description>Claim bit 2 is set.</description>
46424 <description>Clear claim bit 2.</description>
46431 <description>Read or clear claim bit 3.</description>
46438 <description>Claim bit 3 is not set.</description>
46443 <description>Claim bit 3 is set.</description>
46451 <description>Clear claim bit 3.</description>
46460 <description>This is used to enable write access to device registers.</description>
46468 …<description>A write of 0xC5ACCE55 enables further write access to this device. Any other write re…
46474 <description>Unlock register interface.</description>
46483 …<description>This indicates the status of the lock control mechanism. This lock prevents accidenta…
46487 … For most components this covers all registers except for the Lock Access Register.</description>
46495 … <description>Indicates that a lock control mechanism exists for this device.</description>
46501 …<description>No lock control mechanism exists, writes to the Lock Access Register are ignored.</de…
46506 <description>Lock control mechanism is present.</description>
46513 <description>Returns the current status of the Lock.</description>
46519 <description>Write access is allowed to this device.</description>
46524 …<description>Write access to the component is blocked. All writes to control registers are ignored…
46531 …<description>Indicates if the Lock Access Register is implemented as 8-bit or 32-bit.</description>
46537 … <description>This component implements a 32-bit Lock Access Register.</description>
46542 … <description>This component implements an 8-bit Lock Access Register.</description>
46551 <description>Indicates the current level of tracing permitted by the system</description>
46559 <description>Non-secure Invasive Debug</description>
46565 <description>The feature is not implemented.</description>
46570 <description>The feature is implemented.</description>
46577 <description>Non-secure Non-Invasive Debug</description>
46583 <description>The feature is not implemented.</description>
46588 <description>The feature is implemented.</description>
46595 <description>Secure Invasive Debug</description>
46601 <description>The feature is not implemented.</description>
46606 <description>The feature is implemented.</description>
46613 <description>Secure Non-Invasive Debug</description>
46619 <description>The feature is not implemented.</description>
46624 <description>The feature is implemented.</description>
46633 <description>Indicates the capabilities of the component.</description>
46641 <description>Indicates the number of master ports implemented.</description>
46649 …description>The DEVTYPE register provides a debugger with information about the component when the…
46657 <description>The main type of the component</description>
46663 … <description>Indicates that this component has ATB inputs and outputs.</description>
46670 <description>The sub-type of the component</description>
46676 …<description>Indicates that this component replicates trace from a single source to multiple targe…
46685 <description>Coresight peripheral identification registers.</description>
46693 <description>Coresight peripheral identification registers.</description>
46701 <description>Coresight peripheral identification registers.</description>
46709 <description>Coresight peripheral identification registers.</description>
46717 <description>Coresight peripheral identification registers.</description>
46725 <description>Coresight component identification registers.</description>
46733 <description>Coresight component identification registers.</description>
46741 <description>Coresight component identification registers.</description>
46749 <description>Coresight component identification registers.</description>
46759 <description>ATB Replicator module 1</description>
46766 <description>ATB Replicator module 2</description>
46773 <description>ATB Replicator module 3</description>
46780 <description>ATB funnel module 0</description>
46795 …<description>The IDFILTER0 register enables the programming of ID filtering for master port 0.</de…
46803 <description>Enable slave port 0.</description>
46809 …<description>Slave port disabled. This excludes the port from the priority selection scheme.</desc…
46814 <description>Slave port enabled.</description>
46821 <description>Enable slave port 1.</description>
46827 …<description>Slave port disabled. This excludes the port from the priority selection scheme.</desc…
46832 <description>Slave port enabled.</description>
46839 <description>Enable slave port 2.</description>
46845 …<description>Slave port disabled. This excludes the port from the priority selection scheme.</desc…
46850 <description>Slave port enabled.</description>
46857 <description>Enable slave port 3.</description>
46863 …<description>Slave port disabled. This excludes the port from the priority selection scheme.</desc…
46868 <description>Slave port enabled.</description>
46875 <description>Enable slave port 4.</description>
46881 …<description>Slave port disabled. This excludes the port from the priority selection scheme.</desc…
46886 <description>Slave port enabled.</description>
46893 <description>Enable slave port 5.</description>
46899 …<description>Slave port disabled. This excludes the port from the priority selection scheme.</desc…
46904 <description>Slave port enabled.</description>
46911 <description>Enable slave port 6.</description>
46917 …<description>Slave port disabled. This excludes the port from the priority selection scheme.</desc…
46922 <description>Slave port enabled.</description>
46929 <description>Enable slave port 7.</description>
46935 …<description>Slave port disabled. This excludes the port from the priority selection scheme.</desc…
46940 <description>Slave port enabled.</description>
46947 …<description>Hold Time. The formatting scheme can become inefficient when fast switching occurs, a…
46950 …hat can be entered is 0b1110 and this equates to 15 transactions. 0b1111 is reserved.</description>
46958 …description>The Priority_Ctrl_Reg register defines the order in which inputs are selected. Each 3-…
46966 <description>Priority value of port number 0.</description>
46972 <description>Priority value of port number 1.</description>
46978 <description>Priority value of port number 2.</description>
46984 <description>Priority value of port number 3.</description>
46990 <description>Priority value of port number 4.</description>
46996 <description>Priority value of port number 5.</description>
47002 <description>Priority value of port number 6.</description>
47008 <description>Priority value of port number 7.</description>
47016 …<description>The ITATBDATA0 register performs different functions depending on whether the access …
47024 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47030 <description>Pin is logic 0.</description>
47035 <description>Pin is logic 1.</description>
47042 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47048 <description>Pin is logic 0.</description>
47053 <description>Pin is logic 1.</description>
47060 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47066 <description>Pin is logic 0.</description>
47071 <description>Pin is logic 1.</description>
47078 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47084 <description>Pin is logic 0.</description>
47089 <description>Pin is logic 1.</description>
47096 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47102 <description>Pin is logic 0.</description>
47107 <description>Pin is logic 1.</description>
47114 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47120 <description>Pin is logic 0.</description>
47125 <description>Pin is logic 1.</description>
47132 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47138 <description>Pin is logic 0.</description>
47143 <description>Pin is logic 1.</description>
47150 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47156 <description>Pin is logic 0.</description>
47161 <description>Pin is logic 1.</description>
47168 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47174 <description>Pin is logic 0.</description>
47179 <description>Pin is logic 1.</description>
47186 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47192 <description>Pin is logic 0.</description>
47197 <description>Pin is logic 1.</description>
47204 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47210 <description>Pin is logic 0.</description>
47215 <description>Pin is logic 1.</description>
47222 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47228 <description>Pin is logic 0.</description>
47233 <description>Pin is logic 1.</description>
47240 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47246 <description>Pin is logic 0.</description>
47251 <description>Pin is logic 1.</description>
47258 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47264 <description>Pin is logic 0.</description>
47269 <description>Pin is logic 1.</description>
47276 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47282 <description>Pin is logic 0.</description>
47287 <description>Pin is logic 1.</description>
47294 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47300 <description>Pin is logic 0.</description>
47305 <description>Pin is logic 1.</description>
47312 …description>A read access returns the value of a pin on atdatas_x of the enabled port. A write acc…
47318 <description>Pin is logic 0.</description>
47323 <description>Pin is logic 1.</description>
47332 …<description>The ITATBCTR2 register performs different functions depending on whether the access i…
47340 <description>A read access returns the value of atreadym.
47341 …s outputs the data to afvalids[n], where the value of the CTRLREG at 0x000 defines n.</description>
47347 <description>Pin is logic 0.</description>
47352 <description>Pin is logic 1.</description>
47359 <description>A read access returns the value of afvalidm.
47360 …s outputs the data to atreadys[n], where the value of the CTRLREG at 0x000 defines n.</description>
47366 <description>Pin is logic 0.</description>
47371 <description>Pin is logic 1.</description>
47380 …<description>The ITATBCTR1 register performs different functions depending on whether the access i…
47388 …<description>A read returns the value of the atids[n] signals, where the value of the Control Regi…
47389 A write outputs the value to the atidm port.</description>
47395 <description>Pin is logic 0.</description>
47400 <description>Pin is logic 1.</description>
47409 …<description>The ITATBCTR0 register performs different functions depending on whether the access i…
47417 …<description>A read returns the value of the atvalids[n] signal, where the value of the CTRLREG at…
47418 A write outputs the value to atvalidm.</description>
47424 <description>Pin is logic 0.</description>
47429 <description>Pin is logic 1.</description>
47436 …<description>A read returns the value of the afreadys[n] signal, where the value of the Ctrl_Reg a…
47437 A write outputs the value to afreadym.</description>
47443 <description>Pin is logic 0.</description>
47448 <description>Pin is logic 1.</description>
47455 …<description>A read returns the value of the atbytess[n] signal, where the value of the Ctrl_Reg a…
47456 A write outputs the value to atbytesm.</description>
47462 <description>Pin is logic 0.</description>
47467 <description>Pin is logic 1.</description>
47476 …<description>The ITCTRL register enables the component to switch from a functional mode, which is …
47477 …e directly controlled for the purposes of integration testing and topology detection.</description>
47485 <description>Integration Mode Enable.</description>
47491 <description>Integration mode disabled.</description>
47496 <description>Integration mode enabled.</description>
47505 …<description>Software can use the claim tag to coordinate application and debugger access to trace…
47506 …ster sets bits in the claim tag, and determines the number of claim bits implemented.</description>
47514 <description>Set claim bit 0 and check if bit is implemented or not.</description>
47521 <description>Claim bit 0 is not implemented.</description>
47526 <description>Claim bit 0 is implemented.</description>
47534 <description>Set claim bit 0.</description>
47541 <description>Set claim bit 1 and check if bit is implemented or not.</description>
47548 <description>Claim bit 1 is not implemented.</description>
47553 <description>Claim bit 1 is implemented.</description>
47561 <description>Set claim bit 1.</description>
47568 <description>Set claim bit 2 and check if bit is implemented or not.</description>
47575 <description>Claim bit 2 is not implemented.</description>
47580 <description>Claim bit 2 is implemented.</description>
47588 <description>Set claim bit 2.</description>
47595 <description>Set claim bit 3 and check if bit is implemented or not.</description>
47602 <description>Claim bit 3 is not implemented.</description>
47607 <description>Claim bit 3 is implemented.</description>
47615 <description>Set claim bit 3.</description>
47624 …<description>Software can use the claim tag to coordinate application and debugger access to trace…
47626 …ets the bits in the claim tag to 0 and determines the current value of the claim tag.</description>
47634 <description>Read or clear claim bit 0.</description>
47641 <description>Claim bit 0 is not set.</description>
47646 <description>Claim bit 0 is set.</description>
47654 <description>Clear claim bit 0.</description>
47661 <description>Read or clear claim bit 1.</description>
47668 <description>Claim bit 1 is not set.</description>
47673 <description>Claim bit 1 is set.</description>
47681 <description>Clear claim bit 1.</description>
47688 <description>Read or clear claim bit 2.</description>
47695 <description>Claim bit 2 is not set.</description>
47700 <description>Claim bit 2 is set.</description>
47708 <description>Clear claim bit 2.</description>
47715 <description>Read or clear claim bit 3.</description>
47722 <description>Claim bit 3 is not set.</description>
47727 <description>Claim bit 3 is set.</description>
47735 <description>Clear claim bit 3.</description>
47744 <description>This is used to enable write access to device registers.</description>
47752 …<description>A write of 0xC5ACCE55 enables further write access to this device. Any other write re…
47758 <description>Unlock register interface.</description>
47767 …<description>This indicates the status of the lock control mechanism. This lock prevents accidenta…
47771 … For most components this covers all registers except for the Lock Access Register.</description>
47779 … <description>Indicates that a lock control mechanism exists for this device.</description>
47785 …<description>No lock control mechanism exists, writes to the Lock Access Register are ignored.</de…
47790 <description>Lock control mechanism is present.</description>
47797 <description>Returns the current status of the Lock.</description>
47803 <description>Write access is allowed to this device.</description>
47808 …<description>Write access to the component is blocked. All writes to control registers are ignored…
47815 …<description>Indicates if the Lock Access Register is implemented as 8-bit or 32-bit.</description>
47821 … <description>This component implements a 32-bit Lock Access Register.</description>
47826 … <description>This component implements an 8-bit Lock Access Register.</description>
47835 <description>Indicates the current level of tracing permitted by the system</description>
47843 <description>Non-secure Invasive Debug</description>
47849 <description>The feature is not implemented.</description>
47854 <description>The feature is implemented.</description>
47861 <description>Non-secure Non-Invasive Debug</description>
47867 <description>The feature is not implemented.</description>
47872 <description>The feature is implemented.</description>
47879 <description>Secure Invasive Debug</description>
47885 <description>The feature is not implemented.</description>
47890 <description>The feature is implemented.</description>
47897 <description>Secure Non-Invasive Debug</description>
47903 <description>The feature is not implemented.</description>
47908 <description>The feature is implemented.</description>
47917 <description>Indicates the capabilities of the component.</description>
47925 …<description>Indicates the number of input ports connected. 0x0 and 0x1 are illegal values.</descr…
47933 …description>The DEVTYPE register provides a debugger with information about the component when the…
47941 <description>The main type of the component</description>
47947 … <description>Indicates that this component has ATB inputs and outputs.</description>
47954 <description>The sub-type of the component</description>
47960 … <description>This component arbitrates ATB inputs mapping to ATB outputs.</description>
47969 <description>Coresight peripheral identification registers.</description>
47977 <description>Coresight peripheral identification registers.</description>
47985 <description>Coresight peripheral identification registers.</description>
47993 <description>Coresight peripheral identification registers.</description>
48001 <description>Coresight peripheral identification registers.</description>
48009 <description>Coresight component identification registers.</description>
48017 <description>Coresight component identification registers.</description>
48025 <description>Coresight component identification registers.</description>
48033 <description>Coresight component identification registers.</description>
48043 <description>ATB funnel module 1</description>
48050 <description>ATB funnel module 2</description>
48057 <description>ATB funnel module 3</description>
48064 <description>VPR CLIC registers</description>
48205 <description>Unspecified</description>
48211 <description>CLIC configuration.</description>
48219 <description>Selective interrupt hardware vectoring.</description>
48225 <description>Selective interrupt hardware vectoring is implemented</description>
48232 <description>Interrupt level encoding.</description>
48238 <description>8 bits = interrupt levels encoded in eight bits</description>
48245 <description>Interrupt privilege mode.</description>
48251 <description>All interrupts are M-mode only</description>
48260 <description>CLIC information.</description>
48268 <description>Maximum number of interrupts supported.</description>
48274 <description>Version</description>
48280 <description>Number of maximum interrupt triggers supported</description>
48290 … <description>Description collection: Interrupt control register for IRQ number [n].</description>
48298 <description>Interrupt Pending bit.</description>
48304 <description>Interrupt not pending</description>
48309 <description>Interrupt pending</description>
48316 <description>Read as 0, write ignored.</description>
48323 <description>Interrupt enable bit.</description>
48329 <description>Interrupt disabled</description>
48334 <description>Interrupt enabled</description>
48341 <description>Read as 0, write ignored.</description>
48348 <description>Selective Hardware Vectoring.</description>
48355 <description>Hardware vectored</description>
48362 <description>Trigger type and polarity for each interrupt input.</description>
48369 <description>Interrupts are edge-triggered</description>
48376 <description>Privilege mode.</description>
48383 <description>Machine mode</description>
48390 <description>Interrupt priority level</description>
48396 <description>Priority level 0</description>
48401 <description>Priority level 1</description>
48406 <description>Priority level 2</description>
48411 <description>Priority level 3</description>
48423 <description>VTIM CSR registers</description>
48439 <description>Unused.</description>
48448 <description>GPIO Tasks and Events 0</description>
48474 …description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on…
48482 …<description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in C…
48488 <description>Trigger task</description>
48499 …<description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action o…
48507 …<description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.…
48513 <description>Trigger task</description>
48524 …<description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action o…
48532 …<description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.<…
48538 <description>Trigger task</description>
48549 <description>Description collection: Subscribe configuration for task OUT[n]</description>
48557 <description>DPPI channel that task OUT[n] will subscribe to</description>
48568 <description>Disable subscription</description>
48573 <description>Enable subscription</description>
48584 <description>Description collection: Subscribe configuration for task SET[n]</description>
48592 <description>DPPI channel that task SET[n] will subscribe to</description>
48603 <description>Disable subscription</description>
48608 <description>Enable subscription</description>
48619 <description>Description collection: Subscribe configuration for task CLR[n]</description>
48627 <description>DPPI channel that task CLR[n] will subscribe to</description>
48638 <description>Disable subscription</description>
48643 <description>Enable subscription</description>
48654 … <description>Description collection: Event from pin specified in CONFIG[n].PSEL</description>
48662 <description>Event from pin specified in CONFIG[n].PSEL</description>
48668 <description>Event not generated</description>
48673 <description>Event generated</description>
48684 <description>Peripheral events.</description>
48690 <description>Description cluster: Non-secure port event from owner n</description>
48699 <description>Non-secure port event from owner n</description>
48705 <description>Event not generated</description>
48710 <description>Event generated</description>
48719 <description>Description cluster: Secure port event from owner n</description>
48728 <description>Secure port event from owner n</description>
48734 <description>Event not generated</description>
48739 <description>Event generated</description>
48751 <description>Description collection: Publish configuration for event IN[n]</description>
48759 <description>DPPI channel that event IN[n] will publish to</description>
48770 <description>Disable publishing</description>
48775 <description>Enable publishing</description>
48786 <description>Publish configuration for events</description>
48792 … <description>Description cluster: Publish configuration for event PORT[n].NONSECURE</description>
48801 <description>DPPI channel that event PORT[n].NONSECURE will publish to</description>
48812 <description>Disable publishing</description>
48817 <description>Enable publishing</description>
48826 … <description>Description cluster: Publish configuration for event PORT[n].SECURE</description>
48835 <description>DPPI channel that event PORT[n].SECURE will publish to</description>
48846 <description>Disable publishing</description>
48851 <description>Enable publishing</description>
48861 <description>Enable interrupt</description>
48869 <description>Write '1' to enable interrupt for event IN[0]</description>
48876 <description>Read: Disabled</description>
48881 <description>Read: Enabled</description>
48889 <description>Enable</description>
48896 <description>Write '1' to enable interrupt for event IN[1]</description>
48903 <description>Read: Disabled</description>
48908 <description>Read: Enabled</description>
48916 <description>Enable</description>
48923 <description>Write '1' to enable interrupt for event IN[2]</description>
48930 <description>Read: Disabled</description>
48935 <description>Read: Enabled</description>
48943 <description>Enable</description>
48950 <description>Write '1' to enable interrupt for event IN[3]</description>
48957 <description>Read: Disabled</description>
48962 <description>Read: Enabled</description>
48970 <description>Enable</description>
48977 <description>Write '1' to enable interrupt for event IN[4]</description>
48984 <description>Read: Disabled</description>
48989 <description>Read: Enabled</description>
48997 <description>Enable</description>
49004 <description>Write '1' to enable interrupt for event IN[5]</description>
49011 <description>Read: Disabled</description>
49016 <description>Read: Enabled</description>
49024 <description>Enable</description>
49031 <description>Write '1' to enable interrupt for event IN[6]</description>
49038 <description>Read: Disabled</description>
49043 <description>Read: Enabled</description>
49051 <description>Enable</description>
49058 <description>Write '1' to enable interrupt for event IN[7]</description>
49065 <description>Read: Disabled</description>
49070 <description>Read: Enabled</description>
49078 <description>Enable</description>
49085 <description>Write '1' to enable interrupt for event PORT0NONSECURE</description>
49092 <description>Read: Disabled</description>
49097 <description>Read: Enabled</description>
49105 <description>Enable</description>
49112 <description>Write '1' to enable interrupt for event PORT0SECURE</description>
49119 <description>Read: Disabled</description>
49124 <description>Read: Enabled</description>
49132 <description>Enable</description>
49139 <description>Write '1' to enable interrupt for event PORT1NONSECURE</description>
49146 <description>Read: Disabled</description>
49151 <description>Read: Enabled</description>
49159 <description>Enable</description>
49166 <description>Write '1' to enable interrupt for event PORT1SECURE</description>
49173 <description>Read: Disabled</description>
49178 <description>Read: Enabled</description>
49186 <description>Enable</description>
49193 <description>Write '1' to enable interrupt for event PORT2NONSECURE</description>
49200 <description>Read: Disabled</description>
49205 <description>Read: Enabled</description>
49213 <description>Enable</description>
49220 <description>Write '1' to enable interrupt for event PORT2SECURE</description>
49227 <description>Read: Disabled</description>
49232 <description>Read: Enabled</description>
49240 <description>Enable</description>
49247 <description>Write '1' to enable interrupt for event PORT3NONSECURE</description>
49254 <description>Read: Disabled</description>
49259 <description>Read: Enabled</description>
49267 <description>Enable</description>
49274 <description>Write '1' to enable interrupt for event PORT3SECURE</description>
49281 <description>Read: Disabled</description>
49286 <description>Read: Enabled</description>
49294 <description>Enable</description>
49303 <description>Disable interrupt</description>
49311 <description>Write '1' to disable interrupt for event IN[0]</description>
49318 <description>Read: Disabled</description>
49323 <description>Read: Enabled</description>
49331 <description>Disable</description>
49338 <description>Write '1' to disable interrupt for event IN[1]</description>
49345 <description>Read: Disabled</description>
49350 <description>Read: Enabled</description>
49358 <description>Disable</description>
49365 <description>Write '1' to disable interrupt for event IN[2]</description>
49372 <description>Read: Disabled</description>
49377 <description>Read: Enabled</description>
49385 <description>Disable</description>
49392 <description>Write '1' to disable interrupt for event IN[3]</description>
49399 <description>Read: Disabled</description>
49404 <description>Read: Enabled</description>
49412 <description>Disable</description>
49419 <description>Write '1' to disable interrupt for event IN[4]</description>
49426 <description>Read: Disabled</description>
49431 <description>Read: Enabled</description>
49439 <description>Disable</description>
49446 <description>Write '1' to disable interrupt for event IN[5]</description>
49453 <description>Read: Disabled</description>
49458 <description>Read: Enabled</description>
49466 <description>Disable</description>
49473 <description>Write '1' to disable interrupt for event IN[6]</description>
49480 <description>Read: Disabled</description>
49485 <description>Read: Enabled</description>
49493 <description>Disable</description>
49500 <description>Write '1' to disable interrupt for event IN[7]</description>
49507 <description>Read: Disabled</description>
49512 <description>Read: Enabled</description>
49520 <description>Disable</description>
49527 <description>Write '1' to disable interrupt for event PORT0NONSECURE</description>
49534 <description>Read: Disabled</description>
49539 <description>Read: Enabled</description>
49547 <description>Disable</description>
49554 <description>Write '1' to disable interrupt for event PORT0SECURE</description>
49561 <description>Read: Disabled</description>
49566 <description>Read: Enabled</description>
49574 <description>Disable</description>
49581 <description>Write '1' to disable interrupt for event PORT1NONSECURE</description>
49588 <description>Read: Disabled</description>
49593 <description>Read: Enabled</description>
49601 <description>Disable</description>
49608 <description>Write '1' to disable interrupt for event PORT1SECURE</description>
49615 <description>Read: Disabled</description>
49620 <description>Read: Enabled</description>
49628 <description>Disable</description>
49635 <description>Write '1' to disable interrupt for event PORT2NONSECURE</description>
49642 <description>Read: Disabled</description>
49647 <description>Read: Enabled</description>
49655 <description>Disable</description>
49662 <description>Write '1' to disable interrupt for event PORT2SECURE</description>
49669 <description>Read: Disabled</description>
49674 <description>Read: Enabled</description>
49682 <description>Disable</description>
49689 <description>Write '1' to disable interrupt for event PORT3NONSECURE</description>
49696 <description>Read: Disabled</description>
49701 <description>Read: Enabled</description>
49709 <description>Disable</description>
49716 <description>Write '1' to disable interrupt for event PORT3SECURE</description>
49723 <description>Read: Disabled</description>
49728 <description>Read: Enabled</description>
49736 <description>Disable</description>
49745 <description>Enable interrupt</description>
49753 <description>Write '1' to enable interrupt for event IN[0]</description>
49760 <description>Read: Disabled</description>
49765 <description>Read: Enabled</description>
49773 <description>Enable</description>
49780 <description>Write '1' to enable interrupt for event IN[1]</description>
49787 <description>Read: Disabled</description>
49792 <description>Read: Enabled</description>
49800 <description>Enable</description>
49807 <description>Write '1' to enable interrupt for event IN[2]</description>
49814 <description>Read: Disabled</description>
49819 <description>Read: Enabled</description>
49827 <description>Enable</description>
49834 <description>Write '1' to enable interrupt for event IN[3]</description>
49841 <description>Read: Disabled</description>
49846 <description>Read: Enabled</description>
49854 <description>Enable</description>
49861 <description>Write '1' to enable interrupt for event IN[4]</description>
49868 <description>Read: Disabled</description>
49873 <description>Read: Enabled</description>
49881 <description>Enable</description>
49888 <description>Write '1' to enable interrupt for event IN[5]</description>
49895 <description>Read: Disabled</description>
49900 <description>Read: Enabled</description>
49908 <description>Enable</description>
49915 <description>Write '1' to enable interrupt for event IN[6]</description>
49922 <description>Read: Disabled</description>
49927 <description>Read: Enabled</description>
49935 <description>Enable</description>
49942 <description>Write '1' to enable interrupt for event IN[7]</description>
49949 <description>Read: Disabled</description>
49954 <description>Read: Enabled</description>
49962 <description>Enable</description>
49969 <description>Write '1' to enable interrupt for event PORT0NONSECURE</description>
49976 <description>Read: Disabled</description>
49981 <description>Read: Enabled</description>
49989 <description>Enable</description>
49996 <description>Write '1' to enable interrupt for event PORT0SECURE</description>
50003 <description>Read: Disabled</description>
50008 <description>Read: Enabled</description>
50016 <description>Enable</description>
50023 <description>Write '1' to enable interrupt for event PORT1NONSECURE</description>
50030 <description>Read: Disabled</description>
50035 <description>Read: Enabled</description>
50043 <description>Enable</description>
50050 <description>Write '1' to enable interrupt for event PORT1SECURE</description>
50057 <description>Read: Disabled</description>
50062 <description>Read: Enabled</description>
50070 <description>Enable</description>
50077 <description>Write '1' to enable interrupt for event PORT2NONSECURE</description>
50084 <description>Read: Disabled</description>
50089 <description>Read: Enabled</description>
50097 <description>Enable</description>
50104 <description>Write '1' to enable interrupt for event PORT2SECURE</description>
50111 <description>Read: Disabled</description>
50116 <description>Read: Enabled</description>
50124 <description>Enable</description>
50131 <description>Write '1' to enable interrupt for event PORT3NONSECURE</description>
50138 <description>Read: Disabled</description>
50143 <description>Read: Enabled</description>
50151 <description>Enable</description>
50158 <description>Write '1' to enable interrupt for event PORT3SECURE</description>
50165 <description>Read: Disabled</description>
50170 <description>Read: Enabled</description>
50178 <description>Enable</description>
50187 <description>Disable interrupt</description>
50195 <description>Write '1' to disable interrupt for event IN[0]</description>
50202 <description>Read: Disabled</description>
50207 <description>Read: Enabled</description>
50215 <description>Disable</description>
50222 <description>Write '1' to disable interrupt for event IN[1]</description>
50229 <description>Read: Disabled</description>
50234 <description>Read: Enabled</description>
50242 <description>Disable</description>
50249 <description>Write '1' to disable interrupt for event IN[2]</description>
50256 <description>Read: Disabled</description>
50261 <description>Read: Enabled</description>
50269 <description>Disable</description>
50276 <description>Write '1' to disable interrupt for event IN[3]</description>
50283 <description>Read: Disabled</description>
50288 <description>Read: Enabled</description>
50296 <description>Disable</description>
50303 <description>Write '1' to disable interrupt for event IN[4]</description>
50310 <description>Read: Disabled</description>
50315 <description>Read: Enabled</description>
50323 <description>Disable</description>
50330 <description>Write '1' to disable interrupt for event IN[5]</description>
50337 <description>Read: Disabled</description>
50342 <description>Read: Enabled</description>
50350 <description>Disable</description>
50357 <description>Write '1' to disable interrupt for event IN[6]</description>
50364 <description>Read: Disabled</description>
50369 <description>Read: Enabled</description>
50377 <description>Disable</description>
50384 <description>Write '1' to disable interrupt for event IN[7]</description>
50391 <description>Read: Disabled</description>
50396 <description>Read: Enabled</description>
50404 <description>Disable</description>
50411 <description>Write '1' to disable interrupt for event PORT0NONSECURE</description>
50418 <description>Read: Disabled</description>
50423 <description>Read: Enabled</description>
50431 <description>Disable</description>
50438 <description>Write '1' to disable interrupt for event PORT0SECURE</description>
50445 <description>Read: Disabled</description>
50450 <description>Read: Enabled</description>
50458 <description>Disable</description>
50465 <description>Write '1' to disable interrupt for event PORT1NONSECURE</description>
50472 <description>Read: Disabled</description>
50477 <description>Read: Enabled</description>
50485 <description>Disable</description>
50492 <description>Write '1' to disable interrupt for event PORT1SECURE</description>
50499 <description>Read: Disabled</description>
50504 <description>Read: Enabled</description>
50512 <description>Disable</description>
50519 <description>Write '1' to disable interrupt for event PORT2NONSECURE</description>
50526 <description>Read: Disabled</description>
50531 <description>Read: Enabled</description>
50539 <description>Disable</description>
50546 <description>Write '1' to disable interrupt for event PORT2SECURE</description>
50553 <description>Read: Disabled</description>
50558 <description>Read: Enabled</description>
50566 <description>Disable</description>
50573 <description>Write '1' to disable interrupt for event PORT3NONSECURE</description>
50580 <description>Read: Disabled</description>
50585 <description>Read: Enabled</description>
50593 <description>Disable</description>
50600 <description>Write '1' to disable interrupt for event PORT3SECURE</description>
50607 <description>Read: Disabled</description>
50612 <description>Read: Enabled</description>
50620 <description>Disable</description>
50629 …<description>Latency selection for Event mode (MODE=Event) with rising or falling edge detection o…
50638 <description>Latency setting</description>
50644 <description>Low power setting</description>
50649 <description>Low latency setting</description>
50660 …<description>Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] …
50668 <description>Mode</description>
50674 …<description>Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.</descripti…
50679 <description>Event mode</description>
50684 <description>Task mode</description>
50691 …<description>GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event</descrip…
50697 <description>Port number</description>
50703 …description>When In task mode: Operation to be performed on output when OUT[n] task is triggered. …
50709 …<description>Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on…
50714 …<description>Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edg…
50719 …<description>Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling …
50724 …<description>Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.…
50731 …<description>When in task mode: Initial value of the output when the GPIOTE channel is configured.…
50737 … <description>Task mode: Initial value of pin before task triggering is low</description>
50742 … <description>Task mode: Initial value of pin before task triggering is high</description>
50753 <description>GPIO Tasks and Events 1</description>
50769 <description>Global Real-time counter</description>
50798 … <description>Description collection: Capture the counter value to CC[n] register</description>
50806 <description>Capture the counter value to CC[n] register</description>
50812 <description>Trigger task</description>
50821 <description>Start the PWM</description>
50829 <description>Start the PWM</description>
50835 <description>Trigger task</description>
50844 <description>Stop the PWM</description>
50852 <description>Stop the PWM</description>
50858 <description>Trigger task</description>
50869 … <description>Description collection: Subscribe configuration for task CAPTURE[n]</description>
50877 <description>DPPI channel that task CAPTURE[n] will subscribe to</description>
50888 <description>Disable subscription</description>
50893 <description>Enable subscription</description>
50904 <description>Description collection: Compare event on CC[n] match</description>
50912 <description>Compare event on CC[n] match</description>
50918 <description>Event not generated</description>
50923 <description>Event generated</description>
50932 <description>Synchronize always-on LFCLK clock domain</description>
50940 <description>Synchronize always-on LFCLK clock domain</description>
50946 <description>Event not generated</description>
50951 <description>Event generated</description>
50960 <description>The SYSCOUNTER is in active state and value is valid</description>
50968 <description>The SYSCOUNTER is in active state and value is valid</description>
50974 <description>Event not generated</description>
50979 <description>Event generated</description>
50988 <description>Event on end of each PWM period</description>
50996 <description>Event on end of each PWM period</description>
51002 <description>Event not generated</description>
51007 <description>Event generated</description>
51018 … <description>Description collection: Publish configuration for event COMPARE[n]</description>
51026 <description>DPPI channel that event COMPARE[n] will publish to</description>
51037 <description>Disable publishing</description>
51042 <description>Enable publishing</description>
51051 <description>Shortcuts between local events and tasks</description>
51059 <description>Enable or disable interrupt</description>
51067 <description>Enable or disable interrupt for event COMPARE[0]</description>
51073 <description>Disable</description>
51078 <description>Enable</description>
51085 <description>Enable or disable interrupt for event COMPARE[1]</description>
51091 <description>Disable</description>
51096 <description>Enable</description>
51103 <description>Enable or disable interrupt for event COMPARE[2]</description>
51109 <description>Disable</description>
51114 <description>Enable</description>
51121 <description>Enable or disable interrupt for event COMPARE[3]</description>
51127 <description>Disable</description>
51132 <description>Enable</description>
51139 <description>Enable or disable interrupt for event COMPARE[4]</description>
51145 <description>Disable</description>
51150 <description>Enable</description>
51157 <description>Enable or disable interrupt for event COMPARE[5]</description>
51163 <description>Disable</description>
51168 <description>Enable</description>
51175 <description>Enable or disable interrupt for event COMPARE[6]</description>
51181 <description>Disable</description>
51186 <description>Enable</description>
51193 <description>Enable or disable interrupt for event COMPARE[7]</description>
51199 <description>Disable</description>
51204 <description>Enable</description>
51211 <description>Enable or disable interrupt for event COMPARE[8]</description>
51217 <description>Disable</description>
51222 <description>Enable</description>
51229 <description>Enable or disable interrupt for event COMPARE[9]</description>
51235 <description>Disable</description>
51240 <description>Enable</description>
51247 <description>Enable or disable interrupt for event COMPARE[10]</description>
51253 <description>Disable</description>
51258 <description>Enable</description>
51265 <description>Enable or disable interrupt for event COMPARE[11]</description>
51271 <description>Disable</description>
51276 <description>Enable</description>
51283 <description>Enable or disable interrupt for event COMPARE[12]</description>
51289 <description>Disable</description>
51294 <description>Enable</description>
51301 <description>Enable or disable interrupt for event COMPARE[13]</description>
51307 <description>Disable</description>
51312 <description>Enable</description>
51319 <description>Enable or disable interrupt for event COMPARE[14]</description>
51325 <description>Disable</description>
51330 <description>Enable</description>
51337 <description>Enable or disable interrupt for event COMPARE[15]</description>
51343 <description>Disable</description>
51348 <description>Enable</description>
51355 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
51361 <description>Disable</description>
51366 <description>Enable</description>
51373 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
51379 <description>Disable</description>
51384 <description>Enable</description>
51391 <description>Enable or disable interrupt for event PWMPERIODEND</description>
51397 <description>Disable</description>
51402 <description>Enable</description>
51411 <description>Enable interrupt</description>
51419 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
51426 <description>Read: Disabled</description>
51431 <description>Read: Enabled</description>
51439 <description>Enable</description>
51446 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
51453 <description>Read: Disabled</description>
51458 <description>Read: Enabled</description>
51466 <description>Enable</description>
51473 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
51480 <description>Read: Disabled</description>
51485 <description>Read: Enabled</description>
51493 <description>Enable</description>
51500 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
51507 <description>Read: Disabled</description>
51512 <description>Read: Enabled</description>
51520 <description>Enable</description>
51527 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
51534 <description>Read: Disabled</description>
51539 <description>Read: Enabled</description>
51547 <description>Enable</description>
51554 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
51561 <description>Read: Disabled</description>
51566 <description>Read: Enabled</description>
51574 <description>Enable</description>
51581 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
51588 <description>Read: Disabled</description>
51593 <description>Read: Enabled</description>
51601 <description>Enable</description>
51608 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
51615 <description>Read: Disabled</description>
51620 <description>Read: Enabled</description>
51628 <description>Enable</description>
51635 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
51642 <description>Read: Disabled</description>
51647 <description>Read: Enabled</description>
51655 <description>Enable</description>
51662 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
51669 <description>Read: Disabled</description>
51674 <description>Read: Enabled</description>
51682 <description>Enable</description>
51689 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
51696 <description>Read: Disabled</description>
51701 <description>Read: Enabled</description>
51709 <description>Enable</description>
51716 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
51723 <description>Read: Disabled</description>
51728 <description>Read: Enabled</description>
51736 <description>Enable</description>
51743 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
51750 <description>Read: Disabled</description>
51755 <description>Read: Enabled</description>
51763 <description>Enable</description>
51770 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
51777 <description>Read: Disabled</description>
51782 <description>Read: Enabled</description>
51790 <description>Enable</description>
51797 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
51804 <description>Read: Disabled</description>
51809 <description>Read: Enabled</description>
51817 <description>Enable</description>
51824 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
51831 <description>Read: Disabled</description>
51836 <description>Read: Enabled</description>
51844 <description>Enable</description>
51851 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
51858 <description>Read: Disabled</description>
51863 <description>Read: Enabled</description>
51871 <description>Enable</description>
51878 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
51885 <description>Read: Disabled</description>
51890 <description>Read: Enabled</description>
51898 <description>Enable</description>
51905 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
51912 <description>Read: Disabled</description>
51917 <description>Read: Enabled</description>
51925 <description>Enable</description>
51934 <description>Disable interrupt</description>
51942 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
51949 <description>Read: Disabled</description>
51954 <description>Read: Enabled</description>
51962 <description>Disable</description>
51969 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
51976 <description>Read: Disabled</description>
51981 <description>Read: Enabled</description>
51989 <description>Disable</description>
51996 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
52003 <description>Read: Disabled</description>
52008 <description>Read: Enabled</description>
52016 <description>Disable</description>
52023 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
52030 <description>Read: Disabled</description>
52035 <description>Read: Enabled</description>
52043 <description>Disable</description>
52050 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
52057 <description>Read: Disabled</description>
52062 <description>Read: Enabled</description>
52070 <description>Disable</description>
52077 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
52084 <description>Read: Disabled</description>
52089 <description>Read: Enabled</description>
52097 <description>Disable</description>
52104 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
52111 <description>Read: Disabled</description>
52116 <description>Read: Enabled</description>
52124 <description>Disable</description>
52131 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
52138 <description>Read: Disabled</description>
52143 <description>Read: Enabled</description>
52151 <description>Disable</description>
52158 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
52165 <description>Read: Disabled</description>
52170 <description>Read: Enabled</description>
52178 <description>Disable</description>
52185 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
52192 <description>Read: Disabled</description>
52197 <description>Read: Enabled</description>
52205 <description>Disable</description>
52212 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
52219 <description>Read: Disabled</description>
52224 <description>Read: Enabled</description>
52232 <description>Disable</description>
52239 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
52246 <description>Read: Disabled</description>
52251 <description>Read: Enabled</description>
52259 <description>Disable</description>
52266 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
52273 <description>Read: Disabled</description>
52278 <description>Read: Enabled</description>
52286 <description>Disable</description>
52293 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
52300 <description>Read: Disabled</description>
52305 <description>Read: Enabled</description>
52313 <description>Disable</description>
52320 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
52327 <description>Read: Disabled</description>
52332 <description>Read: Enabled</description>
52340 <description>Disable</description>
52347 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
52354 <description>Read: Disabled</description>
52359 <description>Read: Enabled</description>
52367 <description>Disable</description>
52374 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
52381 <description>Read: Disabled</description>
52386 <description>Read: Enabled</description>
52394 <description>Disable</description>
52401 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
52408 <description>Read: Disabled</description>
52413 <description>Read: Enabled</description>
52421 <description>Disable</description>
52428 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
52435 <description>Read: Disabled</description>
52440 <description>Read: Enabled</description>
52448 <description>Disable</description>
52457 <description>Pending interrupts</description>
52465 <description>Read pending status of interrupt for event COMPARE[0]</description>
52472 <description>Read: Not pending</description>
52477 <description>Read: Pending</description>
52484 <description>Read pending status of interrupt for event COMPARE[1]</description>
52491 <description>Read: Not pending</description>
52496 <description>Read: Pending</description>
52503 <description>Read pending status of interrupt for event COMPARE[2]</description>
52510 <description>Read: Not pending</description>
52515 <description>Read: Pending</description>
52522 <description>Read pending status of interrupt for event COMPARE[3]</description>
52529 <description>Read: Not pending</description>
52534 <description>Read: Pending</description>
52541 <description>Read pending status of interrupt for event COMPARE[4]</description>
52548 <description>Read: Not pending</description>
52553 <description>Read: Pending</description>
52560 <description>Read pending status of interrupt for event COMPARE[5]</description>
52567 <description>Read: Not pending</description>
52572 <description>Read: Pending</description>
52579 <description>Read pending status of interrupt for event COMPARE[6]</description>
52586 <description>Read: Not pending</description>
52591 <description>Read: Pending</description>
52598 <description>Read pending status of interrupt for event COMPARE[7]</description>
52605 <description>Read: Not pending</description>
52610 <description>Read: Pending</description>
52617 <description>Read pending status of interrupt for event COMPARE[8]</description>
52624 <description>Read: Not pending</description>
52629 <description>Read: Pending</description>
52636 <description>Read pending status of interrupt for event COMPARE[9]</description>
52643 <description>Read: Not pending</description>
52648 <description>Read: Pending</description>
52655 <description>Read pending status of interrupt for event COMPARE[10]</description>
52662 <description>Read: Not pending</description>
52667 <description>Read: Pending</description>
52674 <description>Read pending status of interrupt for event COMPARE[11]</description>
52681 <description>Read: Not pending</description>
52686 <description>Read: Pending</description>
52693 <description>Read pending status of interrupt for event COMPARE[12]</description>
52700 <description>Read: Not pending</description>
52705 <description>Read: Pending</description>
52712 <description>Read pending status of interrupt for event COMPARE[13]</description>
52719 <description>Read: Not pending</description>
52724 <description>Read: Pending</description>
52731 <description>Read pending status of interrupt for event COMPARE[14]</description>
52738 <description>Read: Not pending</description>
52743 <description>Read: Pending</description>
52750 <description>Read pending status of interrupt for event COMPARE[15]</description>
52757 <description>Read: Not pending</description>
52762 <description>Read: Pending</description>
52769 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
52776 <description>Read: Not pending</description>
52781 <description>Read: Pending</description>
52788 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
52795 <description>Read: Not pending</description>
52800 <description>Read: Pending</description>
52807 <description>Read pending status of interrupt for event PWMPERIODEND</description>
52814 <description>Read: Not pending</description>
52819 <description>Read: Pending</description>
52828 <description>Enable or disable interrupt</description>
52836 <description>Enable or disable interrupt for event COMPARE[0]</description>
52842 <description>Disable</description>
52847 <description>Enable</description>
52854 <description>Enable or disable interrupt for event COMPARE[1]</description>
52860 <description>Disable</description>
52865 <description>Enable</description>
52872 <description>Enable or disable interrupt for event COMPARE[2]</description>
52878 <description>Disable</description>
52883 <description>Enable</description>
52890 <description>Enable or disable interrupt for event COMPARE[3]</description>
52896 <description>Disable</description>
52901 <description>Enable</description>
52908 <description>Enable or disable interrupt for event COMPARE[4]</description>
52914 <description>Disable</description>
52919 <description>Enable</description>
52926 <description>Enable or disable interrupt for event COMPARE[5]</description>
52932 <description>Disable</description>
52937 <description>Enable</description>
52944 <description>Enable or disable interrupt for event COMPARE[6]</description>
52950 <description>Disable</description>
52955 <description>Enable</description>
52962 <description>Enable or disable interrupt for event COMPARE[7]</description>
52968 <description>Disable</description>
52973 <description>Enable</description>
52980 <description>Enable or disable interrupt for event COMPARE[8]</description>
52986 <description>Disable</description>
52991 <description>Enable</description>
52998 <description>Enable or disable interrupt for event COMPARE[9]</description>
53004 <description>Disable</description>
53009 <description>Enable</description>
53016 <description>Enable or disable interrupt for event COMPARE[10]</description>
53022 <description>Disable</description>
53027 <description>Enable</description>
53034 <description>Enable or disable interrupt for event COMPARE[11]</description>
53040 <description>Disable</description>
53045 <description>Enable</description>
53052 <description>Enable or disable interrupt for event COMPARE[12]</description>
53058 <description>Disable</description>
53063 <description>Enable</description>
53070 <description>Enable or disable interrupt for event COMPARE[13]</description>
53076 <description>Disable</description>
53081 <description>Enable</description>
53088 <description>Enable or disable interrupt for event COMPARE[14]</description>
53094 <description>Disable</description>
53099 <description>Enable</description>
53106 <description>Enable or disable interrupt for event COMPARE[15]</description>
53112 <description>Disable</description>
53117 <description>Enable</description>
53124 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
53130 <description>Disable</description>
53135 <description>Enable</description>
53142 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
53148 <description>Disable</description>
53153 <description>Enable</description>
53160 <description>Enable or disable interrupt for event PWMPERIODEND</description>
53166 <description>Disable</description>
53171 <description>Enable</description>
53180 <description>Enable interrupt</description>
53188 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
53195 <description>Read: Disabled</description>
53200 <description>Read: Enabled</description>
53208 <description>Enable</description>
53215 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
53222 <description>Read: Disabled</description>
53227 <description>Read: Enabled</description>
53235 <description>Enable</description>
53242 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
53249 <description>Read: Disabled</description>
53254 <description>Read: Enabled</description>
53262 <description>Enable</description>
53269 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
53276 <description>Read: Disabled</description>
53281 <description>Read: Enabled</description>
53289 <description>Enable</description>
53296 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
53303 <description>Read: Disabled</description>
53308 <description>Read: Enabled</description>
53316 <description>Enable</description>
53323 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
53330 <description>Read: Disabled</description>
53335 <description>Read: Enabled</description>
53343 <description>Enable</description>
53350 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
53357 <description>Read: Disabled</description>
53362 <description>Read: Enabled</description>
53370 <description>Enable</description>
53377 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
53384 <description>Read: Disabled</description>
53389 <description>Read: Enabled</description>
53397 <description>Enable</description>
53404 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
53411 <description>Read: Disabled</description>
53416 <description>Read: Enabled</description>
53424 <description>Enable</description>
53431 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
53438 <description>Read: Disabled</description>
53443 <description>Read: Enabled</description>
53451 <description>Enable</description>
53458 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
53465 <description>Read: Disabled</description>
53470 <description>Read: Enabled</description>
53478 <description>Enable</description>
53485 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
53492 <description>Read: Disabled</description>
53497 <description>Read: Enabled</description>
53505 <description>Enable</description>
53512 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
53519 <description>Read: Disabled</description>
53524 <description>Read: Enabled</description>
53532 <description>Enable</description>
53539 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
53546 <description>Read: Disabled</description>
53551 <description>Read: Enabled</description>
53559 <description>Enable</description>
53566 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
53573 <description>Read: Disabled</description>
53578 <description>Read: Enabled</description>
53586 <description>Enable</description>
53593 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
53600 <description>Read: Disabled</description>
53605 <description>Read: Enabled</description>
53613 <description>Enable</description>
53620 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
53627 <description>Read: Disabled</description>
53632 <description>Read: Enabled</description>
53640 <description>Enable</description>
53647 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
53654 <description>Read: Disabled</description>
53659 <description>Read: Enabled</description>
53667 <description>Enable</description>
53674 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
53681 <description>Read: Disabled</description>
53686 <description>Read: Enabled</description>
53694 <description>Enable</description>
53703 <description>Disable interrupt</description>
53711 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
53718 <description>Read: Disabled</description>
53723 <description>Read: Enabled</description>
53731 <description>Disable</description>
53738 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
53745 <description>Read: Disabled</description>
53750 <description>Read: Enabled</description>
53758 <description>Disable</description>
53765 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
53772 <description>Read: Disabled</description>
53777 <description>Read: Enabled</description>
53785 <description>Disable</description>
53792 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
53799 <description>Read: Disabled</description>
53804 <description>Read: Enabled</description>
53812 <description>Disable</description>
53819 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
53826 <description>Read: Disabled</description>
53831 <description>Read: Enabled</description>
53839 <description>Disable</description>
53846 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
53853 <description>Read: Disabled</description>
53858 <description>Read: Enabled</description>
53866 <description>Disable</description>
53873 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
53880 <description>Read: Disabled</description>
53885 <description>Read: Enabled</description>
53893 <description>Disable</description>
53900 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
53907 <description>Read: Disabled</description>
53912 <description>Read: Enabled</description>
53920 <description>Disable</description>
53927 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
53934 <description>Read: Disabled</description>
53939 <description>Read: Enabled</description>
53947 <description>Disable</description>
53954 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
53961 <description>Read: Disabled</description>
53966 <description>Read: Enabled</description>
53974 <description>Disable</description>
53981 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
53988 <description>Read: Disabled</description>
53993 <description>Read: Enabled</description>
54001 <description>Disable</description>
54008 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
54015 <description>Read: Disabled</description>
54020 <description>Read: Enabled</description>
54028 <description>Disable</description>
54035 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
54042 <description>Read: Disabled</description>
54047 <description>Read: Enabled</description>
54055 <description>Disable</description>
54062 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
54069 <description>Read: Disabled</description>
54074 <description>Read: Enabled</description>
54082 <description>Disable</description>
54089 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
54096 <description>Read: Disabled</description>
54101 <description>Read: Enabled</description>
54109 <description>Disable</description>
54116 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
54123 <description>Read: Disabled</description>
54128 <description>Read: Enabled</description>
54136 <description>Disable</description>
54143 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
54150 <description>Read: Disabled</description>
54155 <description>Read: Enabled</description>
54163 <description>Disable</description>
54170 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
54177 <description>Read: Disabled</description>
54182 <description>Read: Enabled</description>
54190 <description>Disable</description>
54197 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
54204 <description>Read: Disabled</description>
54209 <description>Read: Enabled</description>
54217 <description>Disable</description>
54226 <description>Pending interrupts</description>
54234 <description>Read pending status of interrupt for event COMPARE[0]</description>
54241 <description>Read: Not pending</description>
54246 <description>Read: Pending</description>
54253 <description>Read pending status of interrupt for event COMPARE[1]</description>
54260 <description>Read: Not pending</description>
54265 <description>Read: Pending</description>
54272 <description>Read pending status of interrupt for event COMPARE[2]</description>
54279 <description>Read: Not pending</description>
54284 <description>Read: Pending</description>
54291 <description>Read pending status of interrupt for event COMPARE[3]</description>
54298 <description>Read: Not pending</description>
54303 <description>Read: Pending</description>
54310 <description>Read pending status of interrupt for event COMPARE[4]</description>
54317 <description>Read: Not pending</description>
54322 <description>Read: Pending</description>
54329 <description>Read pending status of interrupt for event COMPARE[5]</description>
54336 <description>Read: Not pending</description>
54341 <description>Read: Pending</description>
54348 <description>Read pending status of interrupt for event COMPARE[6]</description>
54355 <description>Read: Not pending</description>
54360 <description>Read: Pending</description>
54367 <description>Read pending status of interrupt for event COMPARE[7]</description>
54374 <description>Read: Not pending</description>
54379 <description>Read: Pending</description>
54386 <description>Read pending status of interrupt for event COMPARE[8]</description>
54393 <description>Read: Not pending</description>
54398 <description>Read: Pending</description>
54405 <description>Read pending status of interrupt for event COMPARE[9]</description>
54412 <description>Read: Not pending</description>
54417 <description>Read: Pending</description>
54424 <description>Read pending status of interrupt for event COMPARE[10]</description>
54431 <description>Read: Not pending</description>
54436 <description>Read: Pending</description>
54443 <description>Read pending status of interrupt for event COMPARE[11]</description>
54450 <description>Read: Not pending</description>
54455 <description>Read: Pending</description>
54462 <description>Read pending status of interrupt for event COMPARE[12]</description>
54469 <description>Read: Not pending</description>
54474 <description>Read: Pending</description>
54481 <description>Read pending status of interrupt for event COMPARE[13]</description>
54488 <description>Read: Not pending</description>
54493 <description>Read: Pending</description>
54500 <description>Read pending status of interrupt for event COMPARE[14]</description>
54507 <description>Read: Not pending</description>
54512 <description>Read: Pending</description>
54519 <description>Read pending status of interrupt for event COMPARE[15]</description>
54526 <description>Read: Not pending</description>
54531 <description>Read: Pending</description>
54538 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
54545 <description>Read: Not pending</description>
54550 <description>Read: Pending</description>
54557 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
54564 <description>Read: Not pending</description>
54569 <description>Read: Pending</description>
54576 <description>Read pending status of interrupt for event PWMPERIODEND</description>
54583 <description>Read: Not pending</description>
54588 <description>Read: Pending</description>
54597 <description>Enable or disable interrupt</description>
54605 <description>Enable or disable interrupt for event COMPARE[0]</description>
54611 <description>Disable</description>
54616 <description>Enable</description>
54623 <description>Enable or disable interrupt for event COMPARE[1]</description>
54629 <description>Disable</description>
54634 <description>Enable</description>
54641 <description>Enable or disable interrupt for event COMPARE[2]</description>
54647 <description>Disable</description>
54652 <description>Enable</description>
54659 <description>Enable or disable interrupt for event COMPARE[3]</description>
54665 <description>Disable</description>
54670 <description>Enable</description>
54677 <description>Enable or disable interrupt for event COMPARE[4]</description>
54683 <description>Disable</description>
54688 <description>Enable</description>
54695 <description>Enable or disable interrupt for event COMPARE[5]</description>
54701 <description>Disable</description>
54706 <description>Enable</description>
54713 <description>Enable or disable interrupt for event COMPARE[6]</description>
54719 <description>Disable</description>
54724 <description>Enable</description>
54731 <description>Enable or disable interrupt for event COMPARE[7]</description>
54737 <description>Disable</description>
54742 <description>Enable</description>
54749 <description>Enable or disable interrupt for event COMPARE[8]</description>
54755 <description>Disable</description>
54760 <description>Enable</description>
54767 <description>Enable or disable interrupt for event COMPARE[9]</description>
54773 <description>Disable</description>
54778 <description>Enable</description>
54785 <description>Enable or disable interrupt for event COMPARE[10]</description>
54791 <description>Disable</description>
54796 <description>Enable</description>
54803 <description>Enable or disable interrupt for event COMPARE[11]</description>
54809 <description>Disable</description>
54814 <description>Enable</description>
54821 <description>Enable or disable interrupt for event COMPARE[12]</description>
54827 <description>Disable</description>
54832 <description>Enable</description>
54839 <description>Enable or disable interrupt for event COMPARE[13]</description>
54845 <description>Disable</description>
54850 <description>Enable</description>
54857 <description>Enable or disable interrupt for event COMPARE[14]</description>
54863 <description>Disable</description>
54868 <description>Enable</description>
54875 <description>Enable or disable interrupt for event COMPARE[15]</description>
54881 <description>Disable</description>
54886 <description>Enable</description>
54893 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
54899 <description>Disable</description>
54904 <description>Enable</description>
54911 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
54917 <description>Disable</description>
54922 <description>Enable</description>
54929 <description>Enable or disable interrupt for event PWMPERIODEND</description>
54935 <description>Disable</description>
54940 <description>Enable</description>
54949 <description>Enable interrupt</description>
54957 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
54964 <description>Read: Disabled</description>
54969 <description>Read: Enabled</description>
54977 <description>Enable</description>
54984 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
54991 <description>Read: Disabled</description>
54996 <description>Read: Enabled</description>
55004 <description>Enable</description>
55011 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
55018 <description>Read: Disabled</description>
55023 <description>Read: Enabled</description>
55031 <description>Enable</description>
55038 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
55045 <description>Read: Disabled</description>
55050 <description>Read: Enabled</description>
55058 <description>Enable</description>
55065 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
55072 <description>Read: Disabled</description>
55077 <description>Read: Enabled</description>
55085 <description>Enable</description>
55092 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
55099 <description>Read: Disabled</description>
55104 <description>Read: Enabled</description>
55112 <description>Enable</description>
55119 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
55126 <description>Read: Disabled</description>
55131 <description>Read: Enabled</description>
55139 <description>Enable</description>
55146 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
55153 <description>Read: Disabled</description>
55158 <description>Read: Enabled</description>
55166 <description>Enable</description>
55173 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
55180 <description>Read: Disabled</description>
55185 <description>Read: Enabled</description>
55193 <description>Enable</description>
55200 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
55207 <description>Read: Disabled</description>
55212 <description>Read: Enabled</description>
55220 <description>Enable</description>
55227 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
55234 <description>Read: Disabled</description>
55239 <description>Read: Enabled</description>
55247 <description>Enable</description>
55254 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
55261 <description>Read: Disabled</description>
55266 <description>Read: Enabled</description>
55274 <description>Enable</description>
55281 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
55288 <description>Read: Disabled</description>
55293 <description>Read: Enabled</description>
55301 <description>Enable</description>
55308 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
55315 <description>Read: Disabled</description>
55320 <description>Read: Enabled</description>
55328 <description>Enable</description>
55335 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
55342 <description>Read: Disabled</description>
55347 <description>Read: Enabled</description>
55355 <description>Enable</description>
55362 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
55369 <description>Read: Disabled</description>
55374 <description>Read: Enabled</description>
55382 <description>Enable</description>
55389 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
55396 <description>Read: Disabled</description>
55401 <description>Read: Enabled</description>
55409 <description>Enable</description>
55416 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
55423 <description>Read: Disabled</description>
55428 <description>Read: Enabled</description>
55436 <description>Enable</description>
55443 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
55450 <description>Read: Disabled</description>
55455 <description>Read: Enabled</description>
55463 <description>Enable</description>
55472 <description>Disable interrupt</description>
55480 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
55487 <description>Read: Disabled</description>
55492 <description>Read: Enabled</description>
55500 <description>Disable</description>
55507 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
55514 <description>Read: Disabled</description>
55519 <description>Read: Enabled</description>
55527 <description>Disable</description>
55534 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
55541 <description>Read: Disabled</description>
55546 <description>Read: Enabled</description>
55554 <description>Disable</description>
55561 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
55568 <description>Read: Disabled</description>
55573 <description>Read: Enabled</description>
55581 <description>Disable</description>
55588 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
55595 <description>Read: Disabled</description>
55600 <description>Read: Enabled</description>
55608 <description>Disable</description>
55615 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
55622 <description>Read: Disabled</description>
55627 <description>Read: Enabled</description>
55635 <description>Disable</description>
55642 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
55649 <description>Read: Disabled</description>
55654 <description>Read: Enabled</description>
55662 <description>Disable</description>
55669 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
55676 <description>Read: Disabled</description>
55681 <description>Read: Enabled</description>
55689 <description>Disable</description>
55696 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
55703 <description>Read: Disabled</description>
55708 <description>Read: Enabled</description>
55716 <description>Disable</description>
55723 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
55730 <description>Read: Disabled</description>
55735 <description>Read: Enabled</description>
55743 <description>Disable</description>
55750 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
55757 <description>Read: Disabled</description>
55762 <description>Read: Enabled</description>
55770 <description>Disable</description>
55777 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
55784 <description>Read: Disabled</description>
55789 <description>Read: Enabled</description>
55797 <description>Disable</description>
55804 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
55811 <description>Read: Disabled</description>
55816 <description>Read: Enabled</description>
55824 <description>Disable</description>
55831 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
55838 <description>Read: Disabled</description>
55843 <description>Read: Enabled</description>
55851 <description>Disable</description>
55858 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
55865 <description>Read: Disabled</description>
55870 <description>Read: Enabled</description>
55878 <description>Disable</description>
55885 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
55892 <description>Read: Disabled</description>
55897 <description>Read: Enabled</description>
55905 <description>Disable</description>
55912 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
55919 <description>Read: Disabled</description>
55924 <description>Read: Enabled</description>
55932 <description>Disable</description>
55939 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
55946 <description>Read: Disabled</description>
55951 <description>Read: Enabled</description>
55959 <description>Disable</description>
55966 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
55973 <description>Read: Disabled</description>
55978 <description>Read: Enabled</description>
55986 <description>Disable</description>
55995 <description>Pending interrupts</description>
56003 <description>Read pending status of interrupt for event COMPARE[0]</description>
56010 <description>Read: Not pending</description>
56015 <description>Read: Pending</description>
56022 <description>Read pending status of interrupt for event COMPARE[1]</description>
56029 <description>Read: Not pending</description>
56034 <description>Read: Pending</description>
56041 <description>Read pending status of interrupt for event COMPARE[2]</description>
56048 <description>Read: Not pending</description>
56053 <description>Read: Pending</description>
56060 <description>Read pending status of interrupt for event COMPARE[3]</description>
56067 <description>Read: Not pending</description>
56072 <description>Read: Pending</description>
56079 <description>Read pending status of interrupt for event COMPARE[4]</description>
56086 <description>Read: Not pending</description>
56091 <description>Read: Pending</description>
56098 <description>Read pending status of interrupt for event COMPARE[5]</description>
56105 <description>Read: Not pending</description>
56110 <description>Read: Pending</description>
56117 <description>Read pending status of interrupt for event COMPARE[6]</description>
56124 <description>Read: Not pending</description>
56129 <description>Read: Pending</description>
56136 <description>Read pending status of interrupt for event COMPARE[7]</description>
56143 <description>Read: Not pending</description>
56148 <description>Read: Pending</description>
56155 <description>Read pending status of interrupt for event COMPARE[8]</description>
56162 <description>Read: Not pending</description>
56167 <description>Read: Pending</description>
56174 <description>Read pending status of interrupt for event COMPARE[9]</description>
56181 <description>Read: Not pending</description>
56186 <description>Read: Pending</description>
56193 <description>Read pending status of interrupt for event COMPARE[10]</description>
56200 <description>Read: Not pending</description>
56205 <description>Read: Pending</description>
56212 <description>Read pending status of interrupt for event COMPARE[11]</description>
56219 <description>Read: Not pending</description>
56224 <description>Read: Pending</description>
56231 <description>Read pending status of interrupt for event COMPARE[12]</description>
56238 <description>Read: Not pending</description>
56243 <description>Read: Pending</description>
56250 <description>Read pending status of interrupt for event COMPARE[13]</description>
56257 <description>Read: Not pending</description>
56262 <description>Read: Pending</description>
56269 <description>Read pending status of interrupt for event COMPARE[14]</description>
56276 <description>Read: Not pending</description>
56281 <description>Read: Pending</description>
56288 <description>Read pending status of interrupt for event COMPARE[15]</description>
56295 <description>Read: Not pending</description>
56300 <description>Read: Pending</description>
56307 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
56314 <description>Read: Not pending</description>
56319 <description>Read: Pending</description>
56326 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
56333 <description>Read: Not pending</description>
56338 <description>Read: Pending</description>
56345 <description>Read pending status of interrupt for event PWMPERIODEND</description>
56352 <description>Read: Not pending</description>
56357 <description>Read: Pending</description>
56366 <description>Enable or disable interrupt</description>
56374 <description>Enable or disable interrupt for event COMPARE[0]</description>
56380 <description>Disable</description>
56385 <description>Enable</description>
56392 <description>Enable or disable interrupt for event COMPARE[1]</description>
56398 <description>Disable</description>
56403 <description>Enable</description>
56410 <description>Enable or disable interrupt for event COMPARE[2]</description>
56416 <description>Disable</description>
56421 <description>Enable</description>
56428 <description>Enable or disable interrupt for event COMPARE[3]</description>
56434 <description>Disable</description>
56439 <description>Enable</description>
56446 <description>Enable or disable interrupt for event COMPARE[4]</description>
56452 <description>Disable</description>
56457 <description>Enable</description>
56464 <description>Enable or disable interrupt for event COMPARE[5]</description>
56470 <description>Disable</description>
56475 <description>Enable</description>
56482 <description>Enable or disable interrupt for event COMPARE[6]</description>
56488 <description>Disable</description>
56493 <description>Enable</description>
56500 <description>Enable or disable interrupt for event COMPARE[7]</description>
56506 <description>Disable</description>
56511 <description>Enable</description>
56518 <description>Enable or disable interrupt for event COMPARE[8]</description>
56524 <description>Disable</description>
56529 <description>Enable</description>
56536 <description>Enable or disable interrupt for event COMPARE[9]</description>
56542 <description>Disable</description>
56547 <description>Enable</description>
56554 <description>Enable or disable interrupt for event COMPARE[10]</description>
56560 <description>Disable</description>
56565 <description>Enable</description>
56572 <description>Enable or disable interrupt for event COMPARE[11]</description>
56578 <description>Disable</description>
56583 <description>Enable</description>
56590 <description>Enable or disable interrupt for event COMPARE[12]</description>
56596 <description>Disable</description>
56601 <description>Enable</description>
56608 <description>Enable or disable interrupt for event COMPARE[13]</description>
56614 <description>Disable</description>
56619 <description>Enable</description>
56626 <description>Enable or disable interrupt for event COMPARE[14]</description>
56632 <description>Disable</description>
56637 <description>Enable</description>
56644 <description>Enable or disable interrupt for event COMPARE[15]</description>
56650 <description>Disable</description>
56655 <description>Enable</description>
56662 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
56668 <description>Disable</description>
56673 <description>Enable</description>
56680 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
56686 <description>Disable</description>
56691 <description>Enable</description>
56698 <description>Enable or disable interrupt for event PWMPERIODEND</description>
56704 <description>Disable</description>
56709 <description>Enable</description>
56718 <description>Enable interrupt</description>
56726 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
56733 <description>Read: Disabled</description>
56738 <description>Read: Enabled</description>
56746 <description>Enable</description>
56753 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
56760 <description>Read: Disabled</description>
56765 <description>Read: Enabled</description>
56773 <description>Enable</description>
56780 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
56787 <description>Read: Disabled</description>
56792 <description>Read: Enabled</description>
56800 <description>Enable</description>
56807 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
56814 <description>Read: Disabled</description>
56819 <description>Read: Enabled</description>
56827 <description>Enable</description>
56834 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
56841 <description>Read: Disabled</description>
56846 <description>Read: Enabled</description>
56854 <description>Enable</description>
56861 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
56868 <description>Read: Disabled</description>
56873 <description>Read: Enabled</description>
56881 <description>Enable</description>
56888 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
56895 <description>Read: Disabled</description>
56900 <description>Read: Enabled</description>
56908 <description>Enable</description>
56915 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
56922 <description>Read: Disabled</description>
56927 <description>Read: Enabled</description>
56935 <description>Enable</description>
56942 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
56949 <description>Read: Disabled</description>
56954 <description>Read: Enabled</description>
56962 <description>Enable</description>
56969 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
56976 <description>Read: Disabled</description>
56981 <description>Read: Enabled</description>
56989 <description>Enable</description>
56996 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
57003 <description>Read: Disabled</description>
57008 <description>Read: Enabled</description>
57016 <description>Enable</description>
57023 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
57030 <description>Read: Disabled</description>
57035 <description>Read: Enabled</description>
57043 <description>Enable</description>
57050 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
57057 <description>Read: Disabled</description>
57062 <description>Read: Enabled</description>
57070 <description>Enable</description>
57077 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
57084 <description>Read: Disabled</description>
57089 <description>Read: Enabled</description>
57097 <description>Enable</description>
57104 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
57111 <description>Read: Disabled</description>
57116 <description>Read: Enabled</description>
57124 <description>Enable</description>
57131 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
57138 <description>Read: Disabled</description>
57143 <description>Read: Enabled</description>
57151 <description>Enable</description>
57158 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
57165 <description>Read: Disabled</description>
57170 <description>Read: Enabled</description>
57178 <description>Enable</description>
57185 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
57192 <description>Read: Disabled</description>
57197 <description>Read: Enabled</description>
57205 <description>Enable</description>
57212 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
57219 <description>Read: Disabled</description>
57224 <description>Read: Enabled</description>
57232 <description>Enable</description>
57241 <description>Disable interrupt</description>
57249 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
57256 <description>Read: Disabled</description>
57261 <description>Read: Enabled</description>
57269 <description>Disable</description>
57276 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
57283 <description>Read: Disabled</description>
57288 <description>Read: Enabled</description>
57296 <description>Disable</description>
57303 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
57310 <description>Read: Disabled</description>
57315 <description>Read: Enabled</description>
57323 <description>Disable</description>
57330 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
57337 <description>Read: Disabled</description>
57342 <description>Read: Enabled</description>
57350 <description>Disable</description>
57357 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
57364 <description>Read: Disabled</description>
57369 <description>Read: Enabled</description>
57377 <description>Disable</description>
57384 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
57391 <description>Read: Disabled</description>
57396 <description>Read: Enabled</description>
57404 <description>Disable</description>
57411 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
57418 <description>Read: Disabled</description>
57423 <description>Read: Enabled</description>
57431 <description>Disable</description>
57438 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
57445 <description>Read: Disabled</description>
57450 <description>Read: Enabled</description>
57458 <description>Disable</description>
57465 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
57472 <description>Read: Disabled</description>
57477 <description>Read: Enabled</description>
57485 <description>Disable</description>
57492 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
57499 <description>Read: Disabled</description>
57504 <description>Read: Enabled</description>
57512 <description>Disable</description>
57519 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
57526 <description>Read: Disabled</description>
57531 <description>Read: Enabled</description>
57539 <description>Disable</description>
57546 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
57553 <description>Read: Disabled</description>
57558 <description>Read: Enabled</description>
57566 <description>Disable</description>
57573 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
57580 <description>Read: Disabled</description>
57585 <description>Read: Enabled</description>
57593 <description>Disable</description>
57600 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
57607 <description>Read: Disabled</description>
57612 <description>Read: Enabled</description>
57620 <description>Disable</description>
57627 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
57634 <description>Read: Disabled</description>
57639 <description>Read: Enabled</description>
57647 <description>Disable</description>
57654 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
57661 <description>Read: Disabled</description>
57666 <description>Read: Enabled</description>
57674 <description>Disable</description>
57681 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
57688 <description>Read: Disabled</description>
57693 <description>Read: Enabled</description>
57701 <description>Disable</description>
57708 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
57715 <description>Read: Disabled</description>
57720 <description>Read: Enabled</description>
57728 <description>Disable</description>
57735 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
57742 <description>Read: Disabled</description>
57747 <description>Read: Enabled</description>
57755 <description>Disable</description>
57764 <description>Pending interrupts</description>
57772 <description>Read pending status of interrupt for event COMPARE[0]</description>
57779 <description>Read: Not pending</description>
57784 <description>Read: Pending</description>
57791 <description>Read pending status of interrupt for event COMPARE[1]</description>
57798 <description>Read: Not pending</description>
57803 <description>Read: Pending</description>
57810 <description>Read pending status of interrupt for event COMPARE[2]</description>
57817 <description>Read: Not pending</description>
57822 <description>Read: Pending</description>
57829 <description>Read pending status of interrupt for event COMPARE[3]</description>
57836 <description>Read: Not pending</description>
57841 <description>Read: Pending</description>
57848 <description>Read pending status of interrupt for event COMPARE[4]</description>
57855 <description>Read: Not pending</description>
57860 <description>Read: Pending</description>
57867 <description>Read pending status of interrupt for event COMPARE[5]</description>
57874 <description>Read: Not pending</description>
57879 <description>Read: Pending</description>
57886 <description>Read pending status of interrupt for event COMPARE[6]</description>
57893 <description>Read: Not pending</description>
57898 <description>Read: Pending</description>
57905 <description>Read pending status of interrupt for event COMPARE[7]</description>
57912 <description>Read: Not pending</description>
57917 <description>Read: Pending</description>
57924 <description>Read pending status of interrupt for event COMPARE[8]</description>
57931 <description>Read: Not pending</description>
57936 <description>Read: Pending</description>
57943 <description>Read pending status of interrupt for event COMPARE[9]</description>
57950 <description>Read: Not pending</description>
57955 <description>Read: Pending</description>
57962 <description>Read pending status of interrupt for event COMPARE[10]</description>
57969 <description>Read: Not pending</description>
57974 <description>Read: Pending</description>
57981 <description>Read pending status of interrupt for event COMPARE[11]</description>
57988 <description>Read: Not pending</description>
57993 <description>Read: Pending</description>
58000 <description>Read pending status of interrupt for event COMPARE[12]</description>
58007 <description>Read: Not pending</description>
58012 <description>Read: Pending</description>
58019 <description>Read pending status of interrupt for event COMPARE[13]</description>
58026 <description>Read: Not pending</description>
58031 <description>Read: Pending</description>
58038 <description>Read pending status of interrupt for event COMPARE[14]</description>
58045 <description>Read: Not pending</description>
58050 <description>Read: Pending</description>
58057 <description>Read pending status of interrupt for event COMPARE[15]</description>
58064 <description>Read: Not pending</description>
58069 <description>Read: Pending</description>
58076 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
58083 <description>Read: Not pending</description>
58088 <description>Read: Pending</description>
58095 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
58102 <description>Read: Not pending</description>
58107 <description>Read: Pending</description>
58114 <description>Read pending status of interrupt for event PWMPERIODEND</description>
58121 <description>Read: Not pending</description>
58126 <description>Read: Pending</description>
58135 <description>Enable or disable interrupt</description>
58143 <description>Enable or disable interrupt for event COMPARE[0]</description>
58149 <description>Disable</description>
58154 <description>Enable</description>
58161 <description>Enable or disable interrupt for event COMPARE[1]</description>
58167 <description>Disable</description>
58172 <description>Enable</description>
58179 <description>Enable or disable interrupt for event COMPARE[2]</description>
58185 <description>Disable</description>
58190 <description>Enable</description>
58197 <description>Enable or disable interrupt for event COMPARE[3]</description>
58203 <description>Disable</description>
58208 <description>Enable</description>
58215 <description>Enable or disable interrupt for event COMPARE[4]</description>
58221 <description>Disable</description>
58226 <description>Enable</description>
58233 <description>Enable or disable interrupt for event COMPARE[5]</description>
58239 <description>Disable</description>
58244 <description>Enable</description>
58251 <description>Enable or disable interrupt for event COMPARE[6]</description>
58257 <description>Disable</description>
58262 <description>Enable</description>
58269 <description>Enable or disable interrupt for event COMPARE[7]</description>
58275 <description>Disable</description>
58280 <description>Enable</description>
58287 <description>Enable or disable interrupt for event COMPARE[8]</description>
58293 <description>Disable</description>
58298 <description>Enable</description>
58305 <description>Enable or disable interrupt for event COMPARE[9]</description>
58311 <description>Disable</description>
58316 <description>Enable</description>
58323 <description>Enable or disable interrupt for event COMPARE[10]</description>
58329 <description>Disable</description>
58334 <description>Enable</description>
58341 <description>Enable or disable interrupt for event COMPARE[11]</description>
58347 <description>Disable</description>
58352 <description>Enable</description>
58359 <description>Enable or disable interrupt for event COMPARE[12]</description>
58365 <description>Disable</description>
58370 <description>Enable</description>
58377 <description>Enable or disable interrupt for event COMPARE[13]</description>
58383 <description>Disable</description>
58388 <description>Enable</description>
58395 <description>Enable or disable interrupt for event COMPARE[14]</description>
58401 <description>Disable</description>
58406 <description>Enable</description>
58413 <description>Enable or disable interrupt for event COMPARE[15]</description>
58419 <description>Disable</description>
58424 <description>Enable</description>
58431 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
58437 <description>Disable</description>
58442 <description>Enable</description>
58449 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
58455 <description>Disable</description>
58460 <description>Enable</description>
58467 <description>Enable or disable interrupt for event PWMPERIODEND</description>
58473 <description>Disable</description>
58478 <description>Enable</description>
58487 <description>Enable interrupt</description>
58495 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
58502 <description>Read: Disabled</description>
58507 <description>Read: Enabled</description>
58515 <description>Enable</description>
58522 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
58529 <description>Read: Disabled</description>
58534 <description>Read: Enabled</description>
58542 <description>Enable</description>
58549 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
58556 <description>Read: Disabled</description>
58561 <description>Read: Enabled</description>
58569 <description>Enable</description>
58576 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
58583 <description>Read: Disabled</description>
58588 <description>Read: Enabled</description>
58596 <description>Enable</description>
58603 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
58610 <description>Read: Disabled</description>
58615 <description>Read: Enabled</description>
58623 <description>Enable</description>
58630 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
58637 <description>Read: Disabled</description>
58642 <description>Read: Enabled</description>
58650 <description>Enable</description>
58657 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
58664 <description>Read: Disabled</description>
58669 <description>Read: Enabled</description>
58677 <description>Enable</description>
58684 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
58691 <description>Read: Disabled</description>
58696 <description>Read: Enabled</description>
58704 <description>Enable</description>
58711 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
58718 <description>Read: Disabled</description>
58723 <description>Read: Enabled</description>
58731 <description>Enable</description>
58738 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
58745 <description>Read: Disabled</description>
58750 <description>Read: Enabled</description>
58758 <description>Enable</description>
58765 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
58772 <description>Read: Disabled</description>
58777 <description>Read: Enabled</description>
58785 <description>Enable</description>
58792 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
58799 <description>Read: Disabled</description>
58804 <description>Read: Enabled</description>
58812 <description>Enable</description>
58819 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
58826 <description>Read: Disabled</description>
58831 <description>Read: Enabled</description>
58839 <description>Enable</description>
58846 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
58853 <description>Read: Disabled</description>
58858 <description>Read: Enabled</description>
58866 <description>Enable</description>
58873 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
58880 <description>Read: Disabled</description>
58885 <description>Read: Enabled</description>
58893 <description>Enable</description>
58900 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
58907 <description>Read: Disabled</description>
58912 <description>Read: Enabled</description>
58920 <description>Enable</description>
58927 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
58934 <description>Read: Disabled</description>
58939 <description>Read: Enabled</description>
58947 <description>Enable</description>
58954 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
58961 <description>Read: Disabled</description>
58966 <description>Read: Enabled</description>
58974 <description>Enable</description>
58981 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
58988 <description>Read: Disabled</description>
58993 <description>Read: Enabled</description>
59001 <description>Enable</description>
59010 <description>Disable interrupt</description>
59018 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
59025 <description>Read: Disabled</description>
59030 <description>Read: Enabled</description>
59038 <description>Disable</description>
59045 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
59052 <description>Read: Disabled</description>
59057 <description>Read: Enabled</description>
59065 <description>Disable</description>
59072 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
59079 <description>Read: Disabled</description>
59084 <description>Read: Enabled</description>
59092 <description>Disable</description>
59099 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
59106 <description>Read: Disabled</description>
59111 <description>Read: Enabled</description>
59119 <description>Disable</description>
59126 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
59133 <description>Read: Disabled</description>
59138 <description>Read: Enabled</description>
59146 <description>Disable</description>
59153 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
59160 <description>Read: Disabled</description>
59165 <description>Read: Enabled</description>
59173 <description>Disable</description>
59180 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
59187 <description>Read: Disabled</description>
59192 <description>Read: Enabled</description>
59200 <description>Disable</description>
59207 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
59214 <description>Read: Disabled</description>
59219 <description>Read: Enabled</description>
59227 <description>Disable</description>
59234 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
59241 <description>Read: Disabled</description>
59246 <description>Read: Enabled</description>
59254 <description>Disable</description>
59261 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
59268 <description>Read: Disabled</description>
59273 <description>Read: Enabled</description>
59281 <description>Disable</description>
59288 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
59295 <description>Read: Disabled</description>
59300 <description>Read: Enabled</description>
59308 <description>Disable</description>
59315 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
59322 <description>Read: Disabled</description>
59327 <description>Read: Enabled</description>
59335 <description>Disable</description>
59342 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
59349 <description>Read: Disabled</description>
59354 <description>Read: Enabled</description>
59362 <description>Disable</description>
59369 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
59376 <description>Read: Disabled</description>
59381 <description>Read: Enabled</description>
59389 <description>Disable</description>
59396 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
59403 <description>Read: Disabled</description>
59408 <description>Read: Enabled</description>
59416 <description>Disable</description>
59423 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
59430 <description>Read: Disabled</description>
59435 <description>Read: Enabled</description>
59443 <description>Disable</description>
59450 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
59457 <description>Read: Disabled</description>
59462 <description>Read: Enabled</description>
59470 <description>Disable</description>
59477 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
59484 <description>Read: Disabled</description>
59489 <description>Read: Enabled</description>
59497 <description>Disable</description>
59504 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
59511 <description>Read: Disabled</description>
59516 <description>Read: Enabled</description>
59524 <description>Disable</description>
59533 <description>Pending interrupts</description>
59541 <description>Read pending status of interrupt for event COMPARE[0]</description>
59548 <description>Read: Not pending</description>
59553 <description>Read: Pending</description>
59560 <description>Read pending status of interrupt for event COMPARE[1]</description>
59567 <description>Read: Not pending</description>
59572 <description>Read: Pending</description>
59579 <description>Read pending status of interrupt for event COMPARE[2]</description>
59586 <description>Read: Not pending</description>
59591 <description>Read: Pending</description>
59598 <description>Read pending status of interrupt for event COMPARE[3]</description>
59605 <description>Read: Not pending</description>
59610 <description>Read: Pending</description>
59617 <description>Read pending status of interrupt for event COMPARE[4]</description>
59624 <description>Read: Not pending</description>
59629 <description>Read: Pending</description>
59636 <description>Read pending status of interrupt for event COMPARE[5]</description>
59643 <description>Read: Not pending</description>
59648 <description>Read: Pending</description>
59655 <description>Read pending status of interrupt for event COMPARE[6]</description>
59662 <description>Read: Not pending</description>
59667 <description>Read: Pending</description>
59674 <description>Read pending status of interrupt for event COMPARE[7]</description>
59681 <description>Read: Not pending</description>
59686 <description>Read: Pending</description>
59693 <description>Read pending status of interrupt for event COMPARE[8]</description>
59700 <description>Read: Not pending</description>
59705 <description>Read: Pending</description>
59712 <description>Read pending status of interrupt for event COMPARE[9]</description>
59719 <description>Read: Not pending</description>
59724 <description>Read: Pending</description>
59731 <description>Read pending status of interrupt for event COMPARE[10]</description>
59738 <description>Read: Not pending</description>
59743 <description>Read: Pending</description>
59750 <description>Read pending status of interrupt for event COMPARE[11]</description>
59757 <description>Read: Not pending</description>
59762 <description>Read: Pending</description>
59769 <description>Read pending status of interrupt for event COMPARE[12]</description>
59776 <description>Read: Not pending</description>
59781 <description>Read: Pending</description>
59788 <description>Read pending status of interrupt for event COMPARE[13]</description>
59795 <description>Read: Not pending</description>
59800 <description>Read: Pending</description>
59807 <description>Read pending status of interrupt for event COMPARE[14]</description>
59814 <description>Read: Not pending</description>
59819 <description>Read: Pending</description>
59826 <description>Read pending status of interrupt for event COMPARE[15]</description>
59833 <description>Read: Not pending</description>
59838 <description>Read: Pending</description>
59845 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
59852 <description>Read: Not pending</description>
59857 <description>Read: Pending</description>
59864 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
59871 <description>Read: Not pending</description>
59876 <description>Read: Pending</description>
59883 <description>Read pending status of interrupt for event PWMPERIODEND</description>
59890 <description>Read: Not pending</description>
59895 <description>Read: Pending</description>
59904 <description>Enable or disable interrupt</description>
59912 <description>Enable or disable interrupt for event COMPARE[0]</description>
59918 <description>Disable</description>
59923 <description>Enable</description>
59930 <description>Enable or disable interrupt for event COMPARE[1]</description>
59936 <description>Disable</description>
59941 <description>Enable</description>
59948 <description>Enable or disable interrupt for event COMPARE[2]</description>
59954 <description>Disable</description>
59959 <description>Enable</description>
59966 <description>Enable or disable interrupt for event COMPARE[3]</description>
59972 <description>Disable</description>
59977 <description>Enable</description>
59984 <description>Enable or disable interrupt for event COMPARE[4]</description>
59990 <description>Disable</description>
59995 <description>Enable</description>
60002 <description>Enable or disable interrupt for event COMPARE[5]</description>
60008 <description>Disable</description>
60013 <description>Enable</description>
60020 <description>Enable or disable interrupt for event COMPARE[6]</description>
60026 <description>Disable</description>
60031 <description>Enable</description>
60038 <description>Enable or disable interrupt for event COMPARE[7]</description>
60044 <description>Disable</description>
60049 <description>Enable</description>
60056 <description>Enable or disable interrupt for event COMPARE[8]</description>
60062 <description>Disable</description>
60067 <description>Enable</description>
60074 <description>Enable or disable interrupt for event COMPARE[9]</description>
60080 <description>Disable</description>
60085 <description>Enable</description>
60092 <description>Enable or disable interrupt for event COMPARE[10]</description>
60098 <description>Disable</description>
60103 <description>Enable</description>
60110 <description>Enable or disable interrupt for event COMPARE[11]</description>
60116 <description>Disable</description>
60121 <description>Enable</description>
60128 <description>Enable or disable interrupt for event COMPARE[12]</description>
60134 <description>Disable</description>
60139 <description>Enable</description>
60146 <description>Enable or disable interrupt for event COMPARE[13]</description>
60152 <description>Disable</description>
60157 <description>Enable</description>
60164 <description>Enable or disable interrupt for event COMPARE[14]</description>
60170 <description>Disable</description>
60175 <description>Enable</description>
60182 <description>Enable or disable interrupt for event COMPARE[15]</description>
60188 <description>Disable</description>
60193 <description>Enable</description>
60200 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
60206 <description>Disable</description>
60211 <description>Enable</description>
60218 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
60224 <description>Disable</description>
60229 <description>Enable</description>
60236 <description>Enable or disable interrupt for event PWMPERIODEND</description>
60242 <description>Disable</description>
60247 <description>Enable</description>
60256 <description>Enable interrupt</description>
60264 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
60271 <description>Read: Disabled</description>
60276 <description>Read: Enabled</description>
60284 <description>Enable</description>
60291 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
60298 <description>Read: Disabled</description>
60303 <description>Read: Enabled</description>
60311 <description>Enable</description>
60318 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
60325 <description>Read: Disabled</description>
60330 <description>Read: Enabled</description>
60338 <description>Enable</description>
60345 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
60352 <description>Read: Disabled</description>
60357 <description>Read: Enabled</description>
60365 <description>Enable</description>
60372 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
60379 <description>Read: Disabled</description>
60384 <description>Read: Enabled</description>
60392 <description>Enable</description>
60399 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
60406 <description>Read: Disabled</description>
60411 <description>Read: Enabled</description>
60419 <description>Enable</description>
60426 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
60433 <description>Read: Disabled</description>
60438 <description>Read: Enabled</description>
60446 <description>Enable</description>
60453 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
60460 <description>Read: Disabled</description>
60465 <description>Read: Enabled</description>
60473 <description>Enable</description>
60480 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
60487 <description>Read: Disabled</description>
60492 <description>Read: Enabled</description>
60500 <description>Enable</description>
60507 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
60514 <description>Read: Disabled</description>
60519 <description>Read: Enabled</description>
60527 <description>Enable</description>
60534 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
60541 <description>Read: Disabled</description>
60546 <description>Read: Enabled</description>
60554 <description>Enable</description>
60561 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
60568 <description>Read: Disabled</description>
60573 <description>Read: Enabled</description>
60581 <description>Enable</description>
60588 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
60595 <description>Read: Disabled</description>
60600 <description>Read: Enabled</description>
60608 <description>Enable</description>
60615 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
60622 <description>Read: Disabled</description>
60627 <description>Read: Enabled</description>
60635 <description>Enable</description>
60642 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
60649 <description>Read: Disabled</description>
60654 <description>Read: Enabled</description>
60662 <description>Enable</description>
60669 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
60676 <description>Read: Disabled</description>
60681 <description>Read: Enabled</description>
60689 <description>Enable</description>
60696 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
60703 <description>Read: Disabled</description>
60708 <description>Read: Enabled</description>
60716 <description>Enable</description>
60723 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
60730 <description>Read: Disabled</description>
60735 <description>Read: Enabled</description>
60743 <description>Enable</description>
60750 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
60757 <description>Read: Disabled</description>
60762 <description>Read: Enabled</description>
60770 <description>Enable</description>
60779 <description>Disable interrupt</description>
60787 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
60794 <description>Read: Disabled</description>
60799 <description>Read: Enabled</description>
60807 <description>Disable</description>
60814 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
60821 <description>Read: Disabled</description>
60826 <description>Read: Enabled</description>
60834 <description>Disable</description>
60841 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
60848 <description>Read: Disabled</description>
60853 <description>Read: Enabled</description>
60861 <description>Disable</description>
60868 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
60875 <description>Read: Disabled</description>
60880 <description>Read: Enabled</description>
60888 <description>Disable</description>
60895 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
60902 <description>Read: Disabled</description>
60907 <description>Read: Enabled</description>
60915 <description>Disable</description>
60922 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
60929 <description>Read: Disabled</description>
60934 <description>Read: Enabled</description>
60942 <description>Disable</description>
60949 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
60956 <description>Read: Disabled</description>
60961 <description>Read: Enabled</description>
60969 <description>Disable</description>
60976 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
60983 <description>Read: Disabled</description>
60988 <description>Read: Enabled</description>
60996 <description>Disable</description>
61003 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
61010 <description>Read: Disabled</description>
61015 <description>Read: Enabled</description>
61023 <description>Disable</description>
61030 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
61037 <description>Read: Disabled</description>
61042 <description>Read: Enabled</description>
61050 <description>Disable</description>
61057 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
61064 <description>Read: Disabled</description>
61069 <description>Read: Enabled</description>
61077 <description>Disable</description>
61084 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
61091 <description>Read: Disabled</description>
61096 <description>Read: Enabled</description>
61104 <description>Disable</description>
61111 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
61118 <description>Read: Disabled</description>
61123 <description>Read: Enabled</description>
61131 <description>Disable</description>
61138 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
61145 <description>Read: Disabled</description>
61150 <description>Read: Enabled</description>
61158 <description>Disable</description>
61165 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
61172 <description>Read: Disabled</description>
61177 <description>Read: Enabled</description>
61185 <description>Disable</description>
61192 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
61199 <description>Read: Disabled</description>
61204 <description>Read: Enabled</description>
61212 <description>Disable</description>
61219 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
61226 <description>Read: Disabled</description>
61231 <description>Read: Enabled</description>
61239 <description>Disable</description>
61246 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
61253 <description>Read: Disabled</description>
61258 <description>Read: Enabled</description>
61266 <description>Disable</description>
61273 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
61280 <description>Read: Disabled</description>
61285 <description>Read: Enabled</description>
61293 <description>Disable</description>
61302 <description>Pending interrupts</description>
61310 <description>Read pending status of interrupt for event COMPARE[0]</description>
61317 <description>Read: Not pending</description>
61322 <description>Read: Pending</description>
61329 <description>Read pending status of interrupt for event COMPARE[1]</description>
61336 <description>Read: Not pending</description>
61341 <description>Read: Pending</description>
61348 <description>Read pending status of interrupt for event COMPARE[2]</description>
61355 <description>Read: Not pending</description>
61360 <description>Read: Pending</description>
61367 <description>Read pending status of interrupt for event COMPARE[3]</description>
61374 <description>Read: Not pending</description>
61379 <description>Read: Pending</description>
61386 <description>Read pending status of interrupt for event COMPARE[4]</description>
61393 <description>Read: Not pending</description>
61398 <description>Read: Pending</description>
61405 <description>Read pending status of interrupt for event COMPARE[5]</description>
61412 <description>Read: Not pending</description>
61417 <description>Read: Pending</description>
61424 <description>Read pending status of interrupt for event COMPARE[6]</description>
61431 <description>Read: Not pending</description>
61436 <description>Read: Pending</description>
61443 <description>Read pending status of interrupt for event COMPARE[7]</description>
61450 <description>Read: Not pending</description>
61455 <description>Read: Pending</description>
61462 <description>Read pending status of interrupt for event COMPARE[8]</description>
61469 <description>Read: Not pending</description>
61474 <description>Read: Pending</description>
61481 <description>Read pending status of interrupt for event COMPARE[9]</description>
61488 <description>Read: Not pending</description>
61493 <description>Read: Pending</description>
61500 <description>Read pending status of interrupt for event COMPARE[10]</description>
61507 <description>Read: Not pending</description>
61512 <description>Read: Pending</description>
61519 <description>Read pending status of interrupt for event COMPARE[11]</description>
61526 <description>Read: Not pending</description>
61531 <description>Read: Pending</description>
61538 <description>Read pending status of interrupt for event COMPARE[12]</description>
61545 <description>Read: Not pending</description>
61550 <description>Read: Pending</description>
61557 <description>Read pending status of interrupt for event COMPARE[13]</description>
61564 <description>Read: Not pending</description>
61569 <description>Read: Pending</description>
61576 <description>Read pending status of interrupt for event COMPARE[14]</description>
61583 <description>Read: Not pending</description>
61588 <description>Read: Pending</description>
61595 <description>Read pending status of interrupt for event COMPARE[15]</description>
61602 <description>Read: Not pending</description>
61607 <description>Read: Pending</description>
61614 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
61621 <description>Read: Not pending</description>
61626 <description>Read: Pending</description>
61633 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
61640 <description>Read: Not pending</description>
61645 <description>Read: Pending</description>
61652 <description>Read pending status of interrupt for event PWMPERIODEND</description>
61659 <description>Read: Not pending</description>
61664 <description>Read: Pending</description>
61673 <description>Enable or disable interrupt</description>
61681 <description>Enable or disable interrupt for event COMPARE[0]</description>
61687 <description>Disable</description>
61692 <description>Enable</description>
61699 <description>Enable or disable interrupt for event COMPARE[1]</description>
61705 <description>Disable</description>
61710 <description>Enable</description>
61717 <description>Enable or disable interrupt for event COMPARE[2]</description>
61723 <description>Disable</description>
61728 <description>Enable</description>
61735 <description>Enable or disable interrupt for event COMPARE[3]</description>
61741 <description>Disable</description>
61746 <description>Enable</description>
61753 <description>Enable or disable interrupt for event COMPARE[4]</description>
61759 <description>Disable</description>
61764 <description>Enable</description>
61771 <description>Enable or disable interrupt for event COMPARE[5]</description>
61777 <description>Disable</description>
61782 <description>Enable</description>
61789 <description>Enable or disable interrupt for event COMPARE[6]</description>
61795 <description>Disable</description>
61800 <description>Enable</description>
61807 <description>Enable or disable interrupt for event COMPARE[7]</description>
61813 <description>Disable</description>
61818 <description>Enable</description>
61825 <description>Enable or disable interrupt for event COMPARE[8]</description>
61831 <description>Disable</description>
61836 <description>Enable</description>
61843 <description>Enable or disable interrupt for event COMPARE[9]</description>
61849 <description>Disable</description>
61854 <description>Enable</description>
61861 <description>Enable or disable interrupt for event COMPARE[10]</description>
61867 <description>Disable</description>
61872 <description>Enable</description>
61879 <description>Enable or disable interrupt for event COMPARE[11]</description>
61885 <description>Disable</description>
61890 <description>Enable</description>
61897 <description>Enable or disable interrupt for event COMPARE[12]</description>
61903 <description>Disable</description>
61908 <description>Enable</description>
61915 <description>Enable or disable interrupt for event COMPARE[13]</description>
61921 <description>Disable</description>
61926 <description>Enable</description>
61933 <description>Enable or disable interrupt for event COMPARE[14]</description>
61939 <description>Disable</description>
61944 <description>Enable</description>
61951 <description>Enable or disable interrupt for event COMPARE[15]</description>
61957 <description>Disable</description>
61962 <description>Enable</description>
61969 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
61975 <description>Disable</description>
61980 <description>Enable</description>
61987 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
61993 <description>Disable</description>
61998 <description>Enable</description>
62005 <description>Enable or disable interrupt for event PWMPERIODEND</description>
62011 <description>Disable</description>
62016 <description>Enable</description>
62025 <description>Enable interrupt</description>
62033 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
62040 <description>Read: Disabled</description>
62045 <description>Read: Enabled</description>
62053 <description>Enable</description>
62060 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
62067 <description>Read: Disabled</description>
62072 <description>Read: Enabled</description>
62080 <description>Enable</description>
62087 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
62094 <description>Read: Disabled</description>
62099 <description>Read: Enabled</description>
62107 <description>Enable</description>
62114 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
62121 <description>Read: Disabled</description>
62126 <description>Read: Enabled</description>
62134 <description>Enable</description>
62141 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
62148 <description>Read: Disabled</description>
62153 <description>Read: Enabled</description>
62161 <description>Enable</description>
62168 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
62175 <description>Read: Disabled</description>
62180 <description>Read: Enabled</description>
62188 <description>Enable</description>
62195 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
62202 <description>Read: Disabled</description>
62207 <description>Read: Enabled</description>
62215 <description>Enable</description>
62222 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
62229 <description>Read: Disabled</description>
62234 <description>Read: Enabled</description>
62242 <description>Enable</description>
62249 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
62256 <description>Read: Disabled</description>
62261 <description>Read: Enabled</description>
62269 <description>Enable</description>
62276 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
62283 <description>Read: Disabled</description>
62288 <description>Read: Enabled</description>
62296 <description>Enable</description>
62303 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
62310 <description>Read: Disabled</description>
62315 <description>Read: Enabled</description>
62323 <description>Enable</description>
62330 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
62337 <description>Read: Disabled</description>
62342 <description>Read: Enabled</description>
62350 <description>Enable</description>
62357 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
62364 <description>Read: Disabled</description>
62369 <description>Read: Enabled</description>
62377 <description>Enable</description>
62384 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
62391 <description>Read: Disabled</description>
62396 <description>Read: Enabled</description>
62404 <description>Enable</description>
62411 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
62418 <description>Read: Disabled</description>
62423 <description>Read: Enabled</description>
62431 <description>Enable</description>
62438 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
62445 <description>Read: Disabled</description>
62450 <description>Read: Enabled</description>
62458 <description>Enable</description>
62465 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
62472 <description>Read: Disabled</description>
62477 <description>Read: Enabled</description>
62485 <description>Enable</description>
62492 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
62499 <description>Read: Disabled</description>
62504 <description>Read: Enabled</description>
62512 <description>Enable</description>
62519 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
62526 <description>Read: Disabled</description>
62531 <description>Read: Enabled</description>
62539 <description>Enable</description>
62548 <description>Disable interrupt</description>
62556 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
62563 <description>Read: Disabled</description>
62568 <description>Read: Enabled</description>
62576 <description>Disable</description>
62583 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
62590 <description>Read: Disabled</description>
62595 <description>Read: Enabled</description>
62603 <description>Disable</description>
62610 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
62617 <description>Read: Disabled</description>
62622 <description>Read: Enabled</description>
62630 <description>Disable</description>
62637 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
62644 <description>Read: Disabled</description>
62649 <description>Read: Enabled</description>
62657 <description>Disable</description>
62664 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
62671 <description>Read: Disabled</description>
62676 <description>Read: Enabled</description>
62684 <description>Disable</description>
62691 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
62698 <description>Read: Disabled</description>
62703 <description>Read: Enabled</description>
62711 <description>Disable</description>
62718 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
62725 <description>Read: Disabled</description>
62730 <description>Read: Enabled</description>
62738 <description>Disable</description>
62745 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
62752 <description>Read: Disabled</description>
62757 <description>Read: Enabled</description>
62765 <description>Disable</description>
62772 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
62779 <description>Read: Disabled</description>
62784 <description>Read: Enabled</description>
62792 <description>Disable</description>
62799 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
62806 <description>Read: Disabled</description>
62811 <description>Read: Enabled</description>
62819 <description>Disable</description>
62826 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
62833 <description>Read: Disabled</description>
62838 <description>Read: Enabled</description>
62846 <description>Disable</description>
62853 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
62860 <description>Read: Disabled</description>
62865 <description>Read: Enabled</description>
62873 <description>Disable</description>
62880 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
62887 <description>Read: Disabled</description>
62892 <description>Read: Enabled</description>
62900 <description>Disable</description>
62907 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
62914 <description>Read: Disabled</description>
62919 <description>Read: Enabled</description>
62927 <description>Disable</description>
62934 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
62941 <description>Read: Disabled</description>
62946 <description>Read: Enabled</description>
62954 <description>Disable</description>
62961 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
62968 <description>Read: Disabled</description>
62973 <description>Read: Enabled</description>
62981 <description>Disable</description>
62988 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
62995 <description>Read: Disabled</description>
63000 <description>Read: Enabled</description>
63008 <description>Disable</description>
63015 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
63022 <description>Read: Disabled</description>
63027 <description>Read: Enabled</description>
63035 <description>Disable</description>
63042 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
63049 <description>Read: Disabled</description>
63054 <description>Read: Enabled</description>
63062 <description>Disable</description>
63071 <description>Pending interrupts</description>
63079 <description>Read pending status of interrupt for event COMPARE[0]</description>
63086 <description>Read: Not pending</description>
63091 <description>Read: Pending</description>
63098 <description>Read pending status of interrupt for event COMPARE[1]</description>
63105 <description>Read: Not pending</description>
63110 <description>Read: Pending</description>
63117 <description>Read pending status of interrupt for event COMPARE[2]</description>
63124 <description>Read: Not pending</description>
63129 <description>Read: Pending</description>
63136 <description>Read pending status of interrupt for event COMPARE[3]</description>
63143 <description>Read: Not pending</description>
63148 <description>Read: Pending</description>
63155 <description>Read pending status of interrupt for event COMPARE[4]</description>
63162 <description>Read: Not pending</description>
63167 <description>Read: Pending</description>
63174 <description>Read pending status of interrupt for event COMPARE[5]</description>
63181 <description>Read: Not pending</description>
63186 <description>Read: Pending</description>
63193 <description>Read pending status of interrupt for event COMPARE[6]</description>
63200 <description>Read: Not pending</description>
63205 <description>Read: Pending</description>
63212 <description>Read pending status of interrupt for event COMPARE[7]</description>
63219 <description>Read: Not pending</description>
63224 <description>Read: Pending</description>
63231 <description>Read pending status of interrupt for event COMPARE[8]</description>
63238 <description>Read: Not pending</description>
63243 <description>Read: Pending</description>
63250 <description>Read pending status of interrupt for event COMPARE[9]</description>
63257 <description>Read: Not pending</description>
63262 <description>Read: Pending</description>
63269 <description>Read pending status of interrupt for event COMPARE[10]</description>
63276 <description>Read: Not pending</description>
63281 <description>Read: Pending</description>
63288 <description>Read pending status of interrupt for event COMPARE[11]</description>
63295 <description>Read: Not pending</description>
63300 <description>Read: Pending</description>
63307 <description>Read pending status of interrupt for event COMPARE[12]</description>
63314 <description>Read: Not pending</description>
63319 <description>Read: Pending</description>
63326 <description>Read pending status of interrupt for event COMPARE[13]</description>
63333 <description>Read: Not pending</description>
63338 <description>Read: Pending</description>
63345 <description>Read pending status of interrupt for event COMPARE[14]</description>
63352 <description>Read: Not pending</description>
63357 <description>Read: Pending</description>
63364 <description>Read pending status of interrupt for event COMPARE[15]</description>
63371 <description>Read: Not pending</description>
63376 <description>Read: Pending</description>
63383 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
63390 <description>Read: Not pending</description>
63395 <description>Read: Pending</description>
63402 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
63409 <description>Read: Not pending</description>
63414 <description>Read: Pending</description>
63421 <description>Read pending status of interrupt for event PWMPERIODEND</description>
63428 <description>Read: Not pending</description>
63433 <description>Read: Pending</description>
63442 <description>Enable or disable interrupt</description>
63450 <description>Enable or disable interrupt for event COMPARE[0]</description>
63456 <description>Disable</description>
63461 <description>Enable</description>
63468 <description>Enable or disable interrupt for event COMPARE[1]</description>
63474 <description>Disable</description>
63479 <description>Enable</description>
63486 <description>Enable or disable interrupt for event COMPARE[2]</description>
63492 <description>Disable</description>
63497 <description>Enable</description>
63504 <description>Enable or disable interrupt for event COMPARE[3]</description>
63510 <description>Disable</description>
63515 <description>Enable</description>
63522 <description>Enable or disable interrupt for event COMPARE[4]</description>
63528 <description>Disable</description>
63533 <description>Enable</description>
63540 <description>Enable or disable interrupt for event COMPARE[5]</description>
63546 <description>Disable</description>
63551 <description>Enable</description>
63558 <description>Enable or disable interrupt for event COMPARE[6]</description>
63564 <description>Disable</description>
63569 <description>Enable</description>
63576 <description>Enable or disable interrupt for event COMPARE[7]</description>
63582 <description>Disable</description>
63587 <description>Enable</description>
63594 <description>Enable or disable interrupt for event COMPARE[8]</description>
63600 <description>Disable</description>
63605 <description>Enable</description>
63612 <description>Enable or disable interrupt for event COMPARE[9]</description>
63618 <description>Disable</description>
63623 <description>Enable</description>
63630 <description>Enable or disable interrupt for event COMPARE[10]</description>
63636 <description>Disable</description>
63641 <description>Enable</description>
63648 <description>Enable or disable interrupt for event COMPARE[11]</description>
63654 <description>Disable</description>
63659 <description>Enable</description>
63666 <description>Enable or disable interrupt for event COMPARE[12]</description>
63672 <description>Disable</description>
63677 <description>Enable</description>
63684 <description>Enable or disable interrupt for event COMPARE[13]</description>
63690 <description>Disable</description>
63695 <description>Enable</description>
63702 <description>Enable or disable interrupt for event COMPARE[14]</description>
63708 <description>Disable</description>
63713 <description>Enable</description>
63720 <description>Enable or disable interrupt for event COMPARE[15]</description>
63726 <description>Disable</description>
63731 <description>Enable</description>
63738 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
63744 <description>Disable</description>
63749 <description>Enable</description>
63756 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
63762 <description>Disable</description>
63767 <description>Enable</description>
63774 <description>Enable or disable interrupt for event PWMPERIODEND</description>
63780 <description>Disable</description>
63785 <description>Enable</description>
63794 <description>Enable interrupt</description>
63802 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
63809 <description>Read: Disabled</description>
63814 <description>Read: Enabled</description>
63822 <description>Enable</description>
63829 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
63836 <description>Read: Disabled</description>
63841 <description>Read: Enabled</description>
63849 <description>Enable</description>
63856 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
63863 <description>Read: Disabled</description>
63868 <description>Read: Enabled</description>
63876 <description>Enable</description>
63883 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
63890 <description>Read: Disabled</description>
63895 <description>Read: Enabled</description>
63903 <description>Enable</description>
63910 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
63917 <description>Read: Disabled</description>
63922 <description>Read: Enabled</description>
63930 <description>Enable</description>
63937 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
63944 <description>Read: Disabled</description>
63949 <description>Read: Enabled</description>
63957 <description>Enable</description>
63964 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
63971 <description>Read: Disabled</description>
63976 <description>Read: Enabled</description>
63984 <description>Enable</description>
63991 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
63998 <description>Read: Disabled</description>
64003 <description>Read: Enabled</description>
64011 <description>Enable</description>
64018 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
64025 <description>Read: Disabled</description>
64030 <description>Read: Enabled</description>
64038 <description>Enable</description>
64045 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
64052 <description>Read: Disabled</description>
64057 <description>Read: Enabled</description>
64065 <description>Enable</description>
64072 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
64079 <description>Read: Disabled</description>
64084 <description>Read: Enabled</description>
64092 <description>Enable</description>
64099 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
64106 <description>Read: Disabled</description>
64111 <description>Read: Enabled</description>
64119 <description>Enable</description>
64126 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
64133 <description>Read: Disabled</description>
64138 <description>Read: Enabled</description>
64146 <description>Enable</description>
64153 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
64160 <description>Read: Disabled</description>
64165 <description>Read: Enabled</description>
64173 <description>Enable</description>
64180 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
64187 <description>Read: Disabled</description>
64192 <description>Read: Enabled</description>
64200 <description>Enable</description>
64207 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
64214 <description>Read: Disabled</description>
64219 <description>Read: Enabled</description>
64227 <description>Enable</description>
64234 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
64241 <description>Read: Disabled</description>
64246 <description>Read: Enabled</description>
64254 <description>Enable</description>
64261 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
64268 <description>Read: Disabled</description>
64273 <description>Read: Enabled</description>
64281 <description>Enable</description>
64288 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
64295 <description>Read: Disabled</description>
64300 <description>Read: Enabled</description>
64308 <description>Enable</description>
64317 <description>Disable interrupt</description>
64325 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
64332 <description>Read: Disabled</description>
64337 <description>Read: Enabled</description>
64345 <description>Disable</description>
64352 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
64359 <description>Read: Disabled</description>
64364 <description>Read: Enabled</description>
64372 <description>Disable</description>
64379 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
64386 <description>Read: Disabled</description>
64391 <description>Read: Enabled</description>
64399 <description>Disable</description>
64406 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
64413 <description>Read: Disabled</description>
64418 <description>Read: Enabled</description>
64426 <description>Disable</description>
64433 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
64440 <description>Read: Disabled</description>
64445 <description>Read: Enabled</description>
64453 <description>Disable</description>
64460 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
64467 <description>Read: Disabled</description>
64472 <description>Read: Enabled</description>
64480 <description>Disable</description>
64487 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
64494 <description>Read: Disabled</description>
64499 <description>Read: Enabled</description>
64507 <description>Disable</description>
64514 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
64521 <description>Read: Disabled</description>
64526 <description>Read: Enabled</description>
64534 <description>Disable</description>
64541 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
64548 <description>Read: Disabled</description>
64553 <description>Read: Enabled</description>
64561 <description>Disable</description>
64568 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
64575 <description>Read: Disabled</description>
64580 <description>Read: Enabled</description>
64588 <description>Disable</description>
64595 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
64602 <description>Read: Disabled</description>
64607 <description>Read: Enabled</description>
64615 <description>Disable</description>
64622 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
64629 <description>Read: Disabled</description>
64634 <description>Read: Enabled</description>
64642 <description>Disable</description>
64649 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
64656 <description>Read: Disabled</description>
64661 <description>Read: Enabled</description>
64669 <description>Disable</description>
64676 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
64683 <description>Read: Disabled</description>
64688 <description>Read: Enabled</description>
64696 <description>Disable</description>
64703 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
64710 <description>Read: Disabled</description>
64715 <description>Read: Enabled</description>
64723 <description>Disable</description>
64730 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
64737 <description>Read: Disabled</description>
64742 <description>Read: Enabled</description>
64750 <description>Disable</description>
64757 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
64764 <description>Read: Disabled</description>
64769 <description>Read: Enabled</description>
64777 <description>Disable</description>
64784 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
64791 <description>Read: Disabled</description>
64796 <description>Read: Enabled</description>
64804 <description>Disable</description>
64811 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
64818 <description>Read: Disabled</description>
64823 <description>Read: Enabled</description>
64831 <description>Disable</description>
64840 <description>Pending interrupts</description>
64848 <description>Read pending status of interrupt for event COMPARE[0]</description>
64855 <description>Read: Not pending</description>
64860 <description>Read: Pending</description>
64867 <description>Read pending status of interrupt for event COMPARE[1]</description>
64874 <description>Read: Not pending</description>
64879 <description>Read: Pending</description>
64886 <description>Read pending status of interrupt for event COMPARE[2]</description>
64893 <description>Read: Not pending</description>
64898 <description>Read: Pending</description>
64905 <description>Read pending status of interrupt for event COMPARE[3]</description>
64912 <description>Read: Not pending</description>
64917 <description>Read: Pending</description>
64924 <description>Read pending status of interrupt for event COMPARE[4]</description>
64931 <description>Read: Not pending</description>
64936 <description>Read: Pending</description>
64943 <description>Read pending status of interrupt for event COMPARE[5]</description>
64950 <description>Read: Not pending</description>
64955 <description>Read: Pending</description>
64962 <description>Read pending status of interrupt for event COMPARE[6]</description>
64969 <description>Read: Not pending</description>
64974 <description>Read: Pending</description>
64981 <description>Read pending status of interrupt for event COMPARE[7]</description>
64988 <description>Read: Not pending</description>
64993 <description>Read: Pending</description>
65000 <description>Read pending status of interrupt for event COMPARE[8]</description>
65007 <description>Read: Not pending</description>
65012 <description>Read: Pending</description>
65019 <description>Read pending status of interrupt for event COMPARE[9]</description>
65026 <description>Read: Not pending</description>
65031 <description>Read: Pending</description>
65038 <description>Read pending status of interrupt for event COMPARE[10]</description>
65045 <description>Read: Not pending</description>
65050 <description>Read: Pending</description>
65057 <description>Read pending status of interrupt for event COMPARE[11]</description>
65064 <description>Read: Not pending</description>
65069 <description>Read: Pending</description>
65076 <description>Read pending status of interrupt for event COMPARE[12]</description>
65083 <description>Read: Not pending</description>
65088 <description>Read: Pending</description>
65095 <description>Read pending status of interrupt for event COMPARE[13]</description>
65102 <description>Read: Not pending</description>
65107 <description>Read: Pending</description>
65114 <description>Read pending status of interrupt for event COMPARE[14]</description>
65121 <description>Read: Not pending</description>
65126 <description>Read: Pending</description>
65133 <description>Read pending status of interrupt for event COMPARE[15]</description>
65140 <description>Read: Not pending</description>
65145 <description>Read: Pending</description>
65152 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
65159 <description>Read: Not pending</description>
65164 <description>Read: Pending</description>
65171 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
65178 <description>Read: Not pending</description>
65183 <description>Read: Pending</description>
65190 <description>Read pending status of interrupt for event PWMPERIODEND</description>
65197 <description>Read: Not pending</description>
65202 <description>Read: Pending</description>
65211 <description>Enable or disable interrupt</description>
65219 <description>Enable or disable interrupt for event COMPARE[0]</description>
65225 <description>Disable</description>
65230 <description>Enable</description>
65237 <description>Enable or disable interrupt for event COMPARE[1]</description>
65243 <description>Disable</description>
65248 <description>Enable</description>
65255 <description>Enable or disable interrupt for event COMPARE[2]</description>
65261 <description>Disable</description>
65266 <description>Enable</description>
65273 <description>Enable or disable interrupt for event COMPARE[3]</description>
65279 <description>Disable</description>
65284 <description>Enable</description>
65291 <description>Enable or disable interrupt for event COMPARE[4]</description>
65297 <description>Disable</description>
65302 <description>Enable</description>
65309 <description>Enable or disable interrupt for event COMPARE[5]</description>
65315 <description>Disable</description>
65320 <description>Enable</description>
65327 <description>Enable or disable interrupt for event COMPARE[6]</description>
65333 <description>Disable</description>
65338 <description>Enable</description>
65345 <description>Enable or disable interrupt for event COMPARE[7]</description>
65351 <description>Disable</description>
65356 <description>Enable</description>
65363 <description>Enable or disable interrupt for event COMPARE[8]</description>
65369 <description>Disable</description>
65374 <description>Enable</description>
65381 <description>Enable or disable interrupt for event COMPARE[9]</description>
65387 <description>Disable</description>
65392 <description>Enable</description>
65399 <description>Enable or disable interrupt for event COMPARE[10]</description>
65405 <description>Disable</description>
65410 <description>Enable</description>
65417 <description>Enable or disable interrupt for event COMPARE[11]</description>
65423 <description>Disable</description>
65428 <description>Enable</description>
65435 <description>Enable or disable interrupt for event COMPARE[12]</description>
65441 <description>Disable</description>
65446 <description>Enable</description>
65453 <description>Enable or disable interrupt for event COMPARE[13]</description>
65459 <description>Disable</description>
65464 <description>Enable</description>
65471 <description>Enable or disable interrupt for event COMPARE[14]</description>
65477 <description>Disable</description>
65482 <description>Enable</description>
65489 <description>Enable or disable interrupt for event COMPARE[15]</description>
65495 <description>Disable</description>
65500 <description>Enable</description>
65507 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
65513 <description>Disable</description>
65518 <description>Enable</description>
65525 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
65531 <description>Disable</description>
65536 <description>Enable</description>
65543 <description>Enable or disable interrupt for event PWMPERIODEND</description>
65549 <description>Disable</description>
65554 <description>Enable</description>
65563 <description>Enable interrupt</description>
65571 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
65578 <description>Read: Disabled</description>
65583 <description>Read: Enabled</description>
65591 <description>Enable</description>
65598 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
65605 <description>Read: Disabled</description>
65610 <description>Read: Enabled</description>
65618 <description>Enable</description>
65625 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
65632 <description>Read: Disabled</description>
65637 <description>Read: Enabled</description>
65645 <description>Enable</description>
65652 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
65659 <description>Read: Disabled</description>
65664 <description>Read: Enabled</description>
65672 <description>Enable</description>
65679 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
65686 <description>Read: Disabled</description>
65691 <description>Read: Enabled</description>
65699 <description>Enable</description>
65706 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
65713 <description>Read: Disabled</description>
65718 <description>Read: Enabled</description>
65726 <description>Enable</description>
65733 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
65740 <description>Read: Disabled</description>
65745 <description>Read: Enabled</description>
65753 <description>Enable</description>
65760 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
65767 <description>Read: Disabled</description>
65772 <description>Read: Enabled</description>
65780 <description>Enable</description>
65787 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
65794 <description>Read: Disabled</description>
65799 <description>Read: Enabled</description>
65807 <description>Enable</description>
65814 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
65821 <description>Read: Disabled</description>
65826 <description>Read: Enabled</description>
65834 <description>Enable</description>
65841 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
65848 <description>Read: Disabled</description>
65853 <description>Read: Enabled</description>
65861 <description>Enable</description>
65868 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
65875 <description>Read: Disabled</description>
65880 <description>Read: Enabled</description>
65888 <description>Enable</description>
65895 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
65902 <description>Read: Disabled</description>
65907 <description>Read: Enabled</description>
65915 <description>Enable</description>
65922 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
65929 <description>Read: Disabled</description>
65934 <description>Read: Enabled</description>
65942 <description>Enable</description>
65949 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
65956 <description>Read: Disabled</description>
65961 <description>Read: Enabled</description>
65969 <description>Enable</description>
65976 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
65983 <description>Read: Disabled</description>
65988 <description>Read: Enabled</description>
65996 <description>Enable</description>
66003 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
66010 <description>Read: Disabled</description>
66015 <description>Read: Enabled</description>
66023 <description>Enable</description>
66030 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
66037 <description>Read: Disabled</description>
66042 <description>Read: Enabled</description>
66050 <description>Enable</description>
66057 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
66064 <description>Read: Disabled</description>
66069 <description>Read: Enabled</description>
66077 <description>Enable</description>
66086 <description>Disable interrupt</description>
66094 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
66101 <description>Read: Disabled</description>
66106 <description>Read: Enabled</description>
66114 <description>Disable</description>
66121 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
66128 <description>Read: Disabled</description>
66133 <description>Read: Enabled</description>
66141 <description>Disable</description>
66148 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
66155 <description>Read: Disabled</description>
66160 <description>Read: Enabled</description>
66168 <description>Disable</description>
66175 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
66182 <description>Read: Disabled</description>
66187 <description>Read: Enabled</description>
66195 <description>Disable</description>
66202 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
66209 <description>Read: Disabled</description>
66214 <description>Read: Enabled</description>
66222 <description>Disable</description>
66229 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
66236 <description>Read: Disabled</description>
66241 <description>Read: Enabled</description>
66249 <description>Disable</description>
66256 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
66263 <description>Read: Disabled</description>
66268 <description>Read: Enabled</description>
66276 <description>Disable</description>
66283 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
66290 <description>Read: Disabled</description>
66295 <description>Read: Enabled</description>
66303 <description>Disable</description>
66310 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
66317 <description>Read: Disabled</description>
66322 <description>Read: Enabled</description>
66330 <description>Disable</description>
66337 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
66344 <description>Read: Disabled</description>
66349 <description>Read: Enabled</description>
66357 <description>Disable</description>
66364 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
66371 <description>Read: Disabled</description>
66376 <description>Read: Enabled</description>
66384 <description>Disable</description>
66391 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
66398 <description>Read: Disabled</description>
66403 <description>Read: Enabled</description>
66411 <description>Disable</description>
66418 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
66425 <description>Read: Disabled</description>
66430 <description>Read: Enabled</description>
66438 <description>Disable</description>
66445 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
66452 <description>Read: Disabled</description>
66457 <description>Read: Enabled</description>
66465 <description>Disable</description>
66472 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
66479 <description>Read: Disabled</description>
66484 <description>Read: Enabled</description>
66492 <description>Disable</description>
66499 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
66506 <description>Read: Disabled</description>
66511 <description>Read: Enabled</description>
66519 <description>Disable</description>
66526 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
66533 <description>Read: Disabled</description>
66538 <description>Read: Enabled</description>
66546 <description>Disable</description>
66553 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
66560 <description>Read: Disabled</description>
66565 <description>Read: Enabled</description>
66573 <description>Disable</description>
66580 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
66587 <description>Read: Disabled</description>
66592 <description>Read: Enabled</description>
66600 <description>Disable</description>
66609 <description>Pending interrupts</description>
66617 <description>Read pending status of interrupt for event COMPARE[0]</description>
66624 <description>Read: Not pending</description>
66629 <description>Read: Pending</description>
66636 <description>Read pending status of interrupt for event COMPARE[1]</description>
66643 <description>Read: Not pending</description>
66648 <description>Read: Pending</description>
66655 <description>Read pending status of interrupt for event COMPARE[2]</description>
66662 <description>Read: Not pending</description>
66667 <description>Read: Pending</description>
66674 <description>Read pending status of interrupt for event COMPARE[3]</description>
66681 <description>Read: Not pending</description>
66686 <description>Read: Pending</description>
66693 <description>Read pending status of interrupt for event COMPARE[4]</description>
66700 <description>Read: Not pending</description>
66705 <description>Read: Pending</description>
66712 <description>Read pending status of interrupt for event COMPARE[5]</description>
66719 <description>Read: Not pending</description>
66724 <description>Read: Pending</description>
66731 <description>Read pending status of interrupt for event COMPARE[6]</description>
66738 <description>Read: Not pending</description>
66743 <description>Read: Pending</description>
66750 <description>Read pending status of interrupt for event COMPARE[7]</description>
66757 <description>Read: Not pending</description>
66762 <description>Read: Pending</description>
66769 <description>Read pending status of interrupt for event COMPARE[8]</description>
66776 <description>Read: Not pending</description>
66781 <description>Read: Pending</description>
66788 <description>Read pending status of interrupt for event COMPARE[9]</description>
66795 <description>Read: Not pending</description>
66800 <description>Read: Pending</description>
66807 <description>Read pending status of interrupt for event COMPARE[10]</description>
66814 <description>Read: Not pending</description>
66819 <description>Read: Pending</description>
66826 <description>Read pending status of interrupt for event COMPARE[11]</description>
66833 <description>Read: Not pending</description>
66838 <description>Read: Pending</description>
66845 <description>Read pending status of interrupt for event COMPARE[12]</description>
66852 <description>Read: Not pending</description>
66857 <description>Read: Pending</description>
66864 <description>Read pending status of interrupt for event COMPARE[13]</description>
66871 <description>Read: Not pending</description>
66876 <description>Read: Pending</description>
66883 <description>Read pending status of interrupt for event COMPARE[14]</description>
66890 <description>Read: Not pending</description>
66895 <description>Read: Pending</description>
66902 <description>Read pending status of interrupt for event COMPARE[15]</description>
66909 <description>Read: Not pending</description>
66914 <description>Read: Pending</description>
66921 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
66928 <description>Read: Not pending</description>
66933 <description>Read: Pending</description>
66940 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
66947 <description>Read: Not pending</description>
66952 <description>Read: Pending</description>
66959 <description>Read pending status of interrupt for event PWMPERIODEND</description>
66966 <description>Read: Not pending</description>
66971 <description>Read: Pending</description>
66980 <description>Enable or disable interrupt</description>
66988 <description>Enable or disable interrupt for event COMPARE[0]</description>
66994 <description>Disable</description>
66999 <description>Enable</description>
67006 <description>Enable or disable interrupt for event COMPARE[1]</description>
67012 <description>Disable</description>
67017 <description>Enable</description>
67024 <description>Enable or disable interrupt for event COMPARE[2]</description>
67030 <description>Disable</description>
67035 <description>Enable</description>
67042 <description>Enable or disable interrupt for event COMPARE[3]</description>
67048 <description>Disable</description>
67053 <description>Enable</description>
67060 <description>Enable or disable interrupt for event COMPARE[4]</description>
67066 <description>Disable</description>
67071 <description>Enable</description>
67078 <description>Enable or disable interrupt for event COMPARE[5]</description>
67084 <description>Disable</description>
67089 <description>Enable</description>
67096 <description>Enable or disable interrupt for event COMPARE[6]</description>
67102 <description>Disable</description>
67107 <description>Enable</description>
67114 <description>Enable or disable interrupt for event COMPARE[7]</description>
67120 <description>Disable</description>
67125 <description>Enable</description>
67132 <description>Enable or disable interrupt for event COMPARE[8]</description>
67138 <description>Disable</description>
67143 <description>Enable</description>
67150 <description>Enable or disable interrupt for event COMPARE[9]</description>
67156 <description>Disable</description>
67161 <description>Enable</description>
67168 <description>Enable or disable interrupt for event COMPARE[10]</description>
67174 <description>Disable</description>
67179 <description>Enable</description>
67186 <description>Enable or disable interrupt for event COMPARE[11]</description>
67192 <description>Disable</description>
67197 <description>Enable</description>
67204 <description>Enable or disable interrupt for event COMPARE[12]</description>
67210 <description>Disable</description>
67215 <description>Enable</description>
67222 <description>Enable or disable interrupt for event COMPARE[13]</description>
67228 <description>Disable</description>
67233 <description>Enable</description>
67240 <description>Enable or disable interrupt for event COMPARE[14]</description>
67246 <description>Disable</description>
67251 <description>Enable</description>
67258 <description>Enable or disable interrupt for event COMPARE[15]</description>
67264 <description>Disable</description>
67269 <description>Enable</description>
67276 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
67282 <description>Disable</description>
67287 <description>Enable</description>
67294 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
67300 <description>Disable</description>
67305 <description>Enable</description>
67312 <description>Enable or disable interrupt for event PWMPERIODEND</description>
67318 <description>Disable</description>
67323 <description>Enable</description>
67332 <description>Enable interrupt</description>
67340 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
67347 <description>Read: Disabled</description>
67352 <description>Read: Enabled</description>
67360 <description>Enable</description>
67367 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
67374 <description>Read: Disabled</description>
67379 <description>Read: Enabled</description>
67387 <description>Enable</description>
67394 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
67401 <description>Read: Disabled</description>
67406 <description>Read: Enabled</description>
67414 <description>Enable</description>
67421 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
67428 <description>Read: Disabled</description>
67433 <description>Read: Enabled</description>
67441 <description>Enable</description>
67448 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
67455 <description>Read: Disabled</description>
67460 <description>Read: Enabled</description>
67468 <description>Enable</description>
67475 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
67482 <description>Read: Disabled</description>
67487 <description>Read: Enabled</description>
67495 <description>Enable</description>
67502 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
67509 <description>Read: Disabled</description>
67514 <description>Read: Enabled</description>
67522 <description>Enable</description>
67529 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
67536 <description>Read: Disabled</description>
67541 <description>Read: Enabled</description>
67549 <description>Enable</description>
67556 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
67563 <description>Read: Disabled</description>
67568 <description>Read: Enabled</description>
67576 <description>Enable</description>
67583 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
67590 <description>Read: Disabled</description>
67595 <description>Read: Enabled</description>
67603 <description>Enable</description>
67610 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
67617 <description>Read: Disabled</description>
67622 <description>Read: Enabled</description>
67630 <description>Enable</description>
67637 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
67644 <description>Read: Disabled</description>
67649 <description>Read: Enabled</description>
67657 <description>Enable</description>
67664 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
67671 <description>Read: Disabled</description>
67676 <description>Read: Enabled</description>
67684 <description>Enable</description>
67691 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
67698 <description>Read: Disabled</description>
67703 <description>Read: Enabled</description>
67711 <description>Enable</description>
67718 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
67725 <description>Read: Disabled</description>
67730 <description>Read: Enabled</description>
67738 <description>Enable</description>
67745 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
67752 <description>Read: Disabled</description>
67757 <description>Read: Enabled</description>
67765 <description>Enable</description>
67772 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
67779 <description>Read: Disabled</description>
67784 <description>Read: Enabled</description>
67792 <description>Enable</description>
67799 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
67806 <description>Read: Disabled</description>
67811 <description>Read: Enabled</description>
67819 <description>Enable</description>
67826 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
67833 <description>Read: Disabled</description>
67838 <description>Read: Enabled</description>
67846 <description>Enable</description>
67855 <description>Disable interrupt</description>
67863 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
67870 <description>Read: Disabled</description>
67875 <description>Read: Enabled</description>
67883 <description>Disable</description>
67890 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
67897 <description>Read: Disabled</description>
67902 <description>Read: Enabled</description>
67910 <description>Disable</description>
67917 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
67924 <description>Read: Disabled</description>
67929 <description>Read: Enabled</description>
67937 <description>Disable</description>
67944 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
67951 <description>Read: Disabled</description>
67956 <description>Read: Enabled</description>
67964 <description>Disable</description>
67971 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
67978 <description>Read: Disabled</description>
67983 <description>Read: Enabled</description>
67991 <description>Disable</description>
67998 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
68005 <description>Read: Disabled</description>
68010 <description>Read: Enabled</description>
68018 <description>Disable</description>
68025 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
68032 <description>Read: Disabled</description>
68037 <description>Read: Enabled</description>
68045 <description>Disable</description>
68052 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
68059 <description>Read: Disabled</description>
68064 <description>Read: Enabled</description>
68072 <description>Disable</description>
68079 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
68086 <description>Read: Disabled</description>
68091 <description>Read: Enabled</description>
68099 <description>Disable</description>
68106 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
68113 <description>Read: Disabled</description>
68118 <description>Read: Enabled</description>
68126 <description>Disable</description>
68133 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
68140 <description>Read: Disabled</description>
68145 <description>Read: Enabled</description>
68153 <description>Disable</description>
68160 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
68167 <description>Read: Disabled</description>
68172 <description>Read: Enabled</description>
68180 <description>Disable</description>
68187 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
68194 <description>Read: Disabled</description>
68199 <description>Read: Enabled</description>
68207 <description>Disable</description>
68214 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
68221 <description>Read: Disabled</description>
68226 <description>Read: Enabled</description>
68234 <description>Disable</description>
68241 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
68248 <description>Read: Disabled</description>
68253 <description>Read: Enabled</description>
68261 <description>Disable</description>
68268 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
68275 <description>Read: Disabled</description>
68280 <description>Read: Enabled</description>
68288 <description>Disable</description>
68295 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
68302 <description>Read: Disabled</description>
68307 <description>Read: Enabled</description>
68315 <description>Disable</description>
68322 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
68329 <description>Read: Disabled</description>
68334 <description>Read: Enabled</description>
68342 <description>Disable</description>
68349 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
68356 <description>Read: Disabled</description>
68361 <description>Read: Enabled</description>
68369 <description>Disable</description>
68378 <description>Pending interrupts</description>
68386 <description>Read pending status of interrupt for event COMPARE[0]</description>
68393 <description>Read: Not pending</description>
68398 <description>Read: Pending</description>
68405 <description>Read pending status of interrupt for event COMPARE[1]</description>
68412 <description>Read: Not pending</description>
68417 <description>Read: Pending</description>
68424 <description>Read pending status of interrupt for event COMPARE[2]</description>
68431 <description>Read: Not pending</description>
68436 <description>Read: Pending</description>
68443 <description>Read pending status of interrupt for event COMPARE[3]</description>
68450 <description>Read: Not pending</description>
68455 <description>Read: Pending</description>
68462 <description>Read pending status of interrupt for event COMPARE[4]</description>
68469 <description>Read: Not pending</description>
68474 <description>Read: Pending</description>
68481 <description>Read pending status of interrupt for event COMPARE[5]</description>
68488 <description>Read: Not pending</description>
68493 <description>Read: Pending</description>
68500 <description>Read pending status of interrupt for event COMPARE[6]</description>
68507 <description>Read: Not pending</description>
68512 <description>Read: Pending</description>
68519 <description>Read pending status of interrupt for event COMPARE[7]</description>
68526 <description>Read: Not pending</description>
68531 <description>Read: Pending</description>
68538 <description>Read pending status of interrupt for event COMPARE[8]</description>
68545 <description>Read: Not pending</description>
68550 <description>Read: Pending</description>
68557 <description>Read pending status of interrupt for event COMPARE[9]</description>
68564 <description>Read: Not pending</description>
68569 <description>Read: Pending</description>
68576 <description>Read pending status of interrupt for event COMPARE[10]</description>
68583 <description>Read: Not pending</description>
68588 <description>Read: Pending</description>
68595 <description>Read pending status of interrupt for event COMPARE[11]</description>
68602 <description>Read: Not pending</description>
68607 <description>Read: Pending</description>
68614 <description>Read pending status of interrupt for event COMPARE[12]</description>
68621 <description>Read: Not pending</description>
68626 <description>Read: Pending</description>
68633 <description>Read pending status of interrupt for event COMPARE[13]</description>
68640 <description>Read: Not pending</description>
68645 <description>Read: Pending</description>
68652 <description>Read pending status of interrupt for event COMPARE[14]</description>
68659 <description>Read: Not pending</description>
68664 <description>Read: Pending</description>
68671 <description>Read pending status of interrupt for event COMPARE[15]</description>
68678 <description>Read: Not pending</description>
68683 <description>Read: Pending</description>
68690 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
68697 <description>Read: Not pending</description>
68702 <description>Read: Pending</description>
68709 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
68716 <description>Read: Not pending</description>
68721 <description>Read: Pending</description>
68728 <description>Read pending status of interrupt for event PWMPERIODEND</description>
68735 <description>Read: Not pending</description>
68740 <description>Read: Pending</description>
68749 <description>Enable or disable interrupt</description>
68757 <description>Enable or disable interrupt for event COMPARE[0]</description>
68763 <description>Disable</description>
68768 <description>Enable</description>
68775 <description>Enable or disable interrupt for event COMPARE[1]</description>
68781 <description>Disable</description>
68786 <description>Enable</description>
68793 <description>Enable or disable interrupt for event COMPARE[2]</description>
68799 <description>Disable</description>
68804 <description>Enable</description>
68811 <description>Enable or disable interrupt for event COMPARE[3]</description>
68817 <description>Disable</description>
68822 <description>Enable</description>
68829 <description>Enable or disable interrupt for event COMPARE[4]</description>
68835 <description>Disable</description>
68840 <description>Enable</description>
68847 <description>Enable or disable interrupt for event COMPARE[5]</description>
68853 <description>Disable</description>
68858 <description>Enable</description>
68865 <description>Enable or disable interrupt for event COMPARE[6]</description>
68871 <description>Disable</description>
68876 <description>Enable</description>
68883 <description>Enable or disable interrupt for event COMPARE[7]</description>
68889 <description>Disable</description>
68894 <description>Enable</description>
68901 <description>Enable or disable interrupt for event COMPARE[8]</description>
68907 <description>Disable</description>
68912 <description>Enable</description>
68919 <description>Enable or disable interrupt for event COMPARE[9]</description>
68925 <description>Disable</description>
68930 <description>Enable</description>
68937 <description>Enable or disable interrupt for event COMPARE[10]</description>
68943 <description>Disable</description>
68948 <description>Enable</description>
68955 <description>Enable or disable interrupt for event COMPARE[11]</description>
68961 <description>Disable</description>
68966 <description>Enable</description>
68973 <description>Enable or disable interrupt for event COMPARE[12]</description>
68979 <description>Disable</description>
68984 <description>Enable</description>
68991 <description>Enable or disable interrupt for event COMPARE[13]</description>
68997 <description>Disable</description>
69002 <description>Enable</description>
69009 <description>Enable or disable interrupt for event COMPARE[14]</description>
69015 <description>Disable</description>
69020 <description>Enable</description>
69027 <description>Enable or disable interrupt for event COMPARE[15]</description>
69033 <description>Disable</description>
69038 <description>Enable</description>
69045 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
69051 <description>Disable</description>
69056 <description>Enable</description>
69063 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
69069 <description>Disable</description>
69074 <description>Enable</description>
69081 <description>Enable or disable interrupt for event PWMPERIODEND</description>
69087 <description>Disable</description>
69092 <description>Enable</description>
69101 <description>Enable interrupt</description>
69109 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
69116 <description>Read: Disabled</description>
69121 <description>Read: Enabled</description>
69129 <description>Enable</description>
69136 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
69143 <description>Read: Disabled</description>
69148 <description>Read: Enabled</description>
69156 <description>Enable</description>
69163 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
69170 <description>Read: Disabled</description>
69175 <description>Read: Enabled</description>
69183 <description>Enable</description>
69190 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
69197 <description>Read: Disabled</description>
69202 <description>Read: Enabled</description>
69210 <description>Enable</description>
69217 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
69224 <description>Read: Disabled</description>
69229 <description>Read: Enabled</description>
69237 <description>Enable</description>
69244 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
69251 <description>Read: Disabled</description>
69256 <description>Read: Enabled</description>
69264 <description>Enable</description>
69271 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
69278 <description>Read: Disabled</description>
69283 <description>Read: Enabled</description>
69291 <description>Enable</description>
69298 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
69305 <description>Read: Disabled</description>
69310 <description>Read: Enabled</description>
69318 <description>Enable</description>
69325 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
69332 <description>Read: Disabled</description>
69337 <description>Read: Enabled</description>
69345 <description>Enable</description>
69352 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
69359 <description>Read: Disabled</description>
69364 <description>Read: Enabled</description>
69372 <description>Enable</description>
69379 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
69386 <description>Read: Disabled</description>
69391 <description>Read: Enabled</description>
69399 <description>Enable</description>
69406 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
69413 <description>Read: Disabled</description>
69418 <description>Read: Enabled</description>
69426 <description>Enable</description>
69433 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
69440 <description>Read: Disabled</description>
69445 <description>Read: Enabled</description>
69453 <description>Enable</description>
69460 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
69467 <description>Read: Disabled</description>
69472 <description>Read: Enabled</description>
69480 <description>Enable</description>
69487 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
69494 <description>Read: Disabled</description>
69499 <description>Read: Enabled</description>
69507 <description>Enable</description>
69514 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
69521 <description>Read: Disabled</description>
69526 <description>Read: Enabled</description>
69534 <description>Enable</description>
69541 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
69548 <description>Read: Disabled</description>
69553 <description>Read: Enabled</description>
69561 <description>Enable</description>
69568 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
69575 <description>Read: Disabled</description>
69580 <description>Read: Enabled</description>
69588 <description>Enable</description>
69595 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
69602 <description>Read: Disabled</description>
69607 <description>Read: Enabled</description>
69615 <description>Enable</description>
69624 <description>Disable interrupt</description>
69632 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
69639 <description>Read: Disabled</description>
69644 <description>Read: Enabled</description>
69652 <description>Disable</description>
69659 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
69666 <description>Read: Disabled</description>
69671 <description>Read: Enabled</description>
69679 <description>Disable</description>
69686 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
69693 <description>Read: Disabled</description>
69698 <description>Read: Enabled</description>
69706 <description>Disable</description>
69713 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
69720 <description>Read: Disabled</description>
69725 <description>Read: Enabled</description>
69733 <description>Disable</description>
69740 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
69747 <description>Read: Disabled</description>
69752 <description>Read: Enabled</description>
69760 <description>Disable</description>
69767 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
69774 <description>Read: Disabled</description>
69779 <description>Read: Enabled</description>
69787 <description>Disable</description>
69794 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
69801 <description>Read: Disabled</description>
69806 <description>Read: Enabled</description>
69814 <description>Disable</description>
69821 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
69828 <description>Read: Disabled</description>
69833 <description>Read: Enabled</description>
69841 <description>Disable</description>
69848 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
69855 <description>Read: Disabled</description>
69860 <description>Read: Enabled</description>
69868 <description>Disable</description>
69875 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
69882 <description>Read: Disabled</description>
69887 <description>Read: Enabled</description>
69895 <description>Disable</description>
69902 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
69909 <description>Read: Disabled</description>
69914 <description>Read: Enabled</description>
69922 <description>Disable</description>
69929 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
69936 <description>Read: Disabled</description>
69941 <description>Read: Enabled</description>
69949 <description>Disable</description>
69956 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
69963 <description>Read: Disabled</description>
69968 <description>Read: Enabled</description>
69976 <description>Disable</description>
69983 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
69990 <description>Read: Disabled</description>
69995 <description>Read: Enabled</description>
70003 <description>Disable</description>
70010 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
70017 <description>Read: Disabled</description>
70022 <description>Read: Enabled</description>
70030 <description>Disable</description>
70037 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
70044 <description>Read: Disabled</description>
70049 <description>Read: Enabled</description>
70057 <description>Disable</description>
70064 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
70071 <description>Read: Disabled</description>
70076 <description>Read: Enabled</description>
70084 <description>Disable</description>
70091 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
70098 <description>Read: Disabled</description>
70103 <description>Read: Enabled</description>
70111 <description>Disable</description>
70118 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
70125 <description>Read: Disabled</description>
70130 <description>Read: Enabled</description>
70138 <description>Disable</description>
70147 <description>Pending interrupts</description>
70155 <description>Read pending status of interrupt for event COMPARE[0]</description>
70162 <description>Read: Not pending</description>
70167 <description>Read: Pending</description>
70174 <description>Read pending status of interrupt for event COMPARE[1]</description>
70181 <description>Read: Not pending</description>
70186 <description>Read: Pending</description>
70193 <description>Read pending status of interrupt for event COMPARE[2]</description>
70200 <description>Read: Not pending</description>
70205 <description>Read: Pending</description>
70212 <description>Read pending status of interrupt for event COMPARE[3]</description>
70219 <description>Read: Not pending</description>
70224 <description>Read: Pending</description>
70231 <description>Read pending status of interrupt for event COMPARE[4]</description>
70238 <description>Read: Not pending</description>
70243 <description>Read: Pending</description>
70250 <description>Read pending status of interrupt for event COMPARE[5]</description>
70257 <description>Read: Not pending</description>
70262 <description>Read: Pending</description>
70269 <description>Read pending status of interrupt for event COMPARE[6]</description>
70276 <description>Read: Not pending</description>
70281 <description>Read: Pending</description>
70288 <description>Read pending status of interrupt for event COMPARE[7]</description>
70295 <description>Read: Not pending</description>
70300 <description>Read: Pending</description>
70307 <description>Read pending status of interrupt for event COMPARE[8]</description>
70314 <description>Read: Not pending</description>
70319 <description>Read: Pending</description>
70326 <description>Read pending status of interrupt for event COMPARE[9]</description>
70333 <description>Read: Not pending</description>
70338 <description>Read: Pending</description>
70345 <description>Read pending status of interrupt for event COMPARE[10]</description>
70352 <description>Read: Not pending</description>
70357 <description>Read: Pending</description>
70364 <description>Read pending status of interrupt for event COMPARE[11]</description>
70371 <description>Read: Not pending</description>
70376 <description>Read: Pending</description>
70383 <description>Read pending status of interrupt for event COMPARE[12]</description>
70390 <description>Read: Not pending</description>
70395 <description>Read: Pending</description>
70402 <description>Read pending status of interrupt for event COMPARE[13]</description>
70409 <description>Read: Not pending</description>
70414 <description>Read: Pending</description>
70421 <description>Read pending status of interrupt for event COMPARE[14]</description>
70428 <description>Read: Not pending</description>
70433 <description>Read: Pending</description>
70440 <description>Read pending status of interrupt for event COMPARE[15]</description>
70447 <description>Read: Not pending</description>
70452 <description>Read: Pending</description>
70459 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
70466 <description>Read: Not pending</description>
70471 <description>Read: Pending</description>
70478 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
70485 <description>Read: Not pending</description>
70490 <description>Read: Pending</description>
70497 <description>Read pending status of interrupt for event PWMPERIODEND</description>
70504 <description>Read: Not pending</description>
70509 <description>Read: Pending</description>
70518 <description>Enable or disable interrupt</description>
70526 <description>Enable or disable interrupt for event COMPARE[0]</description>
70532 <description>Disable</description>
70537 <description>Enable</description>
70544 <description>Enable or disable interrupt for event COMPARE[1]</description>
70550 <description>Disable</description>
70555 <description>Enable</description>
70562 <description>Enable or disable interrupt for event COMPARE[2]</description>
70568 <description>Disable</description>
70573 <description>Enable</description>
70580 <description>Enable or disable interrupt for event COMPARE[3]</description>
70586 <description>Disable</description>
70591 <description>Enable</description>
70598 <description>Enable or disable interrupt for event COMPARE[4]</description>
70604 <description>Disable</description>
70609 <description>Enable</description>
70616 <description>Enable or disable interrupt for event COMPARE[5]</description>
70622 <description>Disable</description>
70627 <description>Enable</description>
70634 <description>Enable or disable interrupt for event COMPARE[6]</description>
70640 <description>Disable</description>
70645 <description>Enable</description>
70652 <description>Enable or disable interrupt for event COMPARE[7]</description>
70658 <description>Disable</description>
70663 <description>Enable</description>
70670 <description>Enable or disable interrupt for event COMPARE[8]</description>
70676 <description>Disable</description>
70681 <description>Enable</description>
70688 <description>Enable or disable interrupt for event COMPARE[9]</description>
70694 <description>Disable</description>
70699 <description>Enable</description>
70706 <description>Enable or disable interrupt for event COMPARE[10]</description>
70712 <description>Disable</description>
70717 <description>Enable</description>
70724 <description>Enable or disable interrupt for event COMPARE[11]</description>
70730 <description>Disable</description>
70735 <description>Enable</description>
70742 <description>Enable or disable interrupt for event COMPARE[12]</description>
70748 <description>Disable</description>
70753 <description>Enable</description>
70760 <description>Enable or disable interrupt for event COMPARE[13]</description>
70766 <description>Disable</description>
70771 <description>Enable</description>
70778 <description>Enable or disable interrupt for event COMPARE[14]</description>
70784 <description>Disable</description>
70789 <description>Enable</description>
70796 <description>Enable or disable interrupt for event COMPARE[15]</description>
70802 <description>Disable</description>
70807 <description>Enable</description>
70814 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
70820 <description>Disable</description>
70825 <description>Enable</description>
70832 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
70838 <description>Disable</description>
70843 <description>Enable</description>
70850 <description>Enable or disable interrupt for event PWMPERIODEND</description>
70856 <description>Disable</description>
70861 <description>Enable</description>
70870 <description>Enable interrupt</description>
70878 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
70885 <description>Read: Disabled</description>
70890 <description>Read: Enabled</description>
70898 <description>Enable</description>
70905 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
70912 <description>Read: Disabled</description>
70917 <description>Read: Enabled</description>
70925 <description>Enable</description>
70932 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
70939 <description>Read: Disabled</description>
70944 <description>Read: Enabled</description>
70952 <description>Enable</description>
70959 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
70966 <description>Read: Disabled</description>
70971 <description>Read: Enabled</description>
70979 <description>Enable</description>
70986 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
70993 <description>Read: Disabled</description>
70998 <description>Read: Enabled</description>
71006 <description>Enable</description>
71013 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
71020 <description>Read: Disabled</description>
71025 <description>Read: Enabled</description>
71033 <description>Enable</description>
71040 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
71047 <description>Read: Disabled</description>
71052 <description>Read: Enabled</description>
71060 <description>Enable</description>
71067 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
71074 <description>Read: Disabled</description>
71079 <description>Read: Enabled</description>
71087 <description>Enable</description>
71094 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
71101 <description>Read: Disabled</description>
71106 <description>Read: Enabled</description>
71114 <description>Enable</description>
71121 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
71128 <description>Read: Disabled</description>
71133 <description>Read: Enabled</description>
71141 <description>Enable</description>
71148 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
71155 <description>Read: Disabled</description>
71160 <description>Read: Enabled</description>
71168 <description>Enable</description>
71175 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
71182 <description>Read: Disabled</description>
71187 <description>Read: Enabled</description>
71195 <description>Enable</description>
71202 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
71209 <description>Read: Disabled</description>
71214 <description>Read: Enabled</description>
71222 <description>Enable</description>
71229 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
71236 <description>Read: Disabled</description>
71241 <description>Read: Enabled</description>
71249 <description>Enable</description>
71256 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
71263 <description>Read: Disabled</description>
71268 <description>Read: Enabled</description>
71276 <description>Enable</description>
71283 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
71290 <description>Read: Disabled</description>
71295 <description>Read: Enabled</description>
71303 <description>Enable</description>
71310 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
71317 <description>Read: Disabled</description>
71322 <description>Read: Enabled</description>
71330 <description>Enable</description>
71337 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
71344 <description>Read: Disabled</description>
71349 <description>Read: Enabled</description>
71357 <description>Enable</description>
71364 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
71371 <description>Read: Disabled</description>
71376 <description>Read: Enabled</description>
71384 <description>Enable</description>
71393 <description>Disable interrupt</description>
71401 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
71408 <description>Read: Disabled</description>
71413 <description>Read: Enabled</description>
71421 <description>Disable</description>
71428 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
71435 <description>Read: Disabled</description>
71440 <description>Read: Enabled</description>
71448 <description>Disable</description>
71455 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
71462 <description>Read: Disabled</description>
71467 <description>Read: Enabled</description>
71475 <description>Disable</description>
71482 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
71489 <description>Read: Disabled</description>
71494 <description>Read: Enabled</description>
71502 <description>Disable</description>
71509 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
71516 <description>Read: Disabled</description>
71521 <description>Read: Enabled</description>
71529 <description>Disable</description>
71536 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
71543 <description>Read: Disabled</description>
71548 <description>Read: Enabled</description>
71556 <description>Disable</description>
71563 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
71570 <description>Read: Disabled</description>
71575 <description>Read: Enabled</description>
71583 <description>Disable</description>
71590 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
71597 <description>Read: Disabled</description>
71602 <description>Read: Enabled</description>
71610 <description>Disable</description>
71617 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
71624 <description>Read: Disabled</description>
71629 <description>Read: Enabled</description>
71637 <description>Disable</description>
71644 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
71651 <description>Read: Disabled</description>
71656 <description>Read: Enabled</description>
71664 <description>Disable</description>
71671 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
71678 <description>Read: Disabled</description>
71683 <description>Read: Enabled</description>
71691 <description>Disable</description>
71698 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
71705 <description>Read: Disabled</description>
71710 <description>Read: Enabled</description>
71718 <description>Disable</description>
71725 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
71732 <description>Read: Disabled</description>
71737 <description>Read: Enabled</description>
71745 <description>Disable</description>
71752 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
71759 <description>Read: Disabled</description>
71764 <description>Read: Enabled</description>
71772 <description>Disable</description>
71779 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
71786 <description>Read: Disabled</description>
71791 <description>Read: Enabled</description>
71799 <description>Disable</description>
71806 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
71813 <description>Read: Disabled</description>
71818 <description>Read: Enabled</description>
71826 <description>Disable</description>
71833 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
71840 <description>Read: Disabled</description>
71845 <description>Read: Enabled</description>
71853 <description>Disable</description>
71860 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
71867 <description>Read: Disabled</description>
71872 <description>Read: Enabled</description>
71880 <description>Disable</description>
71887 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
71894 <description>Read: Disabled</description>
71899 <description>Read: Enabled</description>
71907 <description>Disable</description>
71916 <description>Pending interrupts</description>
71924 <description>Read pending status of interrupt for event COMPARE[0]</description>
71931 <description>Read: Not pending</description>
71936 <description>Read: Pending</description>
71943 <description>Read pending status of interrupt for event COMPARE[1]</description>
71950 <description>Read: Not pending</description>
71955 <description>Read: Pending</description>
71962 <description>Read pending status of interrupt for event COMPARE[2]</description>
71969 <description>Read: Not pending</description>
71974 <description>Read: Pending</description>
71981 <description>Read pending status of interrupt for event COMPARE[3]</description>
71988 <description>Read: Not pending</description>
71993 <description>Read: Pending</description>
72000 <description>Read pending status of interrupt for event COMPARE[4]</description>
72007 <description>Read: Not pending</description>
72012 <description>Read: Pending</description>
72019 <description>Read pending status of interrupt for event COMPARE[5]</description>
72026 <description>Read: Not pending</description>
72031 <description>Read: Pending</description>
72038 <description>Read pending status of interrupt for event COMPARE[6]</description>
72045 <description>Read: Not pending</description>
72050 <description>Read: Pending</description>
72057 <description>Read pending status of interrupt for event COMPARE[7]</description>
72064 <description>Read: Not pending</description>
72069 <description>Read: Pending</description>
72076 <description>Read pending status of interrupt for event COMPARE[8]</description>
72083 <description>Read: Not pending</description>
72088 <description>Read: Pending</description>
72095 <description>Read pending status of interrupt for event COMPARE[9]</description>
72102 <description>Read: Not pending</description>
72107 <description>Read: Pending</description>
72114 <description>Read pending status of interrupt for event COMPARE[10]</description>
72121 <description>Read: Not pending</description>
72126 <description>Read: Pending</description>
72133 <description>Read pending status of interrupt for event COMPARE[11]</description>
72140 <description>Read: Not pending</description>
72145 <description>Read: Pending</description>
72152 <description>Read pending status of interrupt for event COMPARE[12]</description>
72159 <description>Read: Not pending</description>
72164 <description>Read: Pending</description>
72171 <description>Read pending status of interrupt for event COMPARE[13]</description>
72178 <description>Read: Not pending</description>
72183 <description>Read: Pending</description>
72190 <description>Read pending status of interrupt for event COMPARE[14]</description>
72197 <description>Read: Not pending</description>
72202 <description>Read: Pending</description>
72209 <description>Read pending status of interrupt for event COMPARE[15]</description>
72216 <description>Read: Not pending</description>
72221 <description>Read: Pending</description>
72228 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
72235 <description>Read: Not pending</description>
72240 <description>Read: Pending</description>
72247 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
72254 <description>Read: Not pending</description>
72259 <description>Read: Pending</description>
72266 <description>Read pending status of interrupt for event PWMPERIODEND</description>
72273 <description>Read: Not pending</description>
72278 <description>Read: Pending</description>
72287 <description>Enable or disable interrupt</description>
72295 <description>Enable or disable interrupt for event COMPARE[0]</description>
72301 <description>Disable</description>
72306 <description>Enable</description>
72313 <description>Enable or disable interrupt for event COMPARE[1]</description>
72319 <description>Disable</description>
72324 <description>Enable</description>
72331 <description>Enable or disable interrupt for event COMPARE[2]</description>
72337 <description>Disable</description>
72342 <description>Enable</description>
72349 <description>Enable or disable interrupt for event COMPARE[3]</description>
72355 <description>Disable</description>
72360 <description>Enable</description>
72367 <description>Enable or disable interrupt for event COMPARE[4]</description>
72373 <description>Disable</description>
72378 <description>Enable</description>
72385 <description>Enable or disable interrupt for event COMPARE[5]</description>
72391 <description>Disable</description>
72396 <description>Enable</description>
72403 <description>Enable or disable interrupt for event COMPARE[6]</description>
72409 <description>Disable</description>
72414 <description>Enable</description>
72421 <description>Enable or disable interrupt for event COMPARE[7]</description>
72427 <description>Disable</description>
72432 <description>Enable</description>
72439 <description>Enable or disable interrupt for event COMPARE[8]</description>
72445 <description>Disable</description>
72450 <description>Enable</description>
72457 <description>Enable or disable interrupt for event COMPARE[9]</description>
72463 <description>Disable</description>
72468 <description>Enable</description>
72475 <description>Enable or disable interrupt for event COMPARE[10]</description>
72481 <description>Disable</description>
72486 <description>Enable</description>
72493 <description>Enable or disable interrupt for event COMPARE[11]</description>
72499 <description>Disable</description>
72504 <description>Enable</description>
72511 <description>Enable or disable interrupt for event COMPARE[12]</description>
72517 <description>Disable</description>
72522 <description>Enable</description>
72529 <description>Enable or disable interrupt for event COMPARE[13]</description>
72535 <description>Disable</description>
72540 <description>Enable</description>
72547 <description>Enable or disable interrupt for event COMPARE[14]</description>
72553 <description>Disable</description>
72558 <description>Enable</description>
72565 <description>Enable or disable interrupt for event COMPARE[15]</description>
72571 <description>Disable</description>
72576 <description>Enable</description>
72583 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
72589 <description>Disable</description>
72594 <description>Enable</description>
72601 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
72607 <description>Disable</description>
72612 <description>Enable</description>
72619 <description>Enable or disable interrupt for event PWMPERIODEND</description>
72625 <description>Disable</description>
72630 <description>Enable</description>
72639 <description>Enable interrupt</description>
72647 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
72654 <description>Read: Disabled</description>
72659 <description>Read: Enabled</description>
72667 <description>Enable</description>
72674 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
72681 <description>Read: Disabled</description>
72686 <description>Read: Enabled</description>
72694 <description>Enable</description>
72701 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
72708 <description>Read: Disabled</description>
72713 <description>Read: Enabled</description>
72721 <description>Enable</description>
72728 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
72735 <description>Read: Disabled</description>
72740 <description>Read: Enabled</description>
72748 <description>Enable</description>
72755 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
72762 <description>Read: Disabled</description>
72767 <description>Read: Enabled</description>
72775 <description>Enable</description>
72782 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
72789 <description>Read: Disabled</description>
72794 <description>Read: Enabled</description>
72802 <description>Enable</description>
72809 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
72816 <description>Read: Disabled</description>
72821 <description>Read: Enabled</description>
72829 <description>Enable</description>
72836 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
72843 <description>Read: Disabled</description>
72848 <description>Read: Enabled</description>
72856 <description>Enable</description>
72863 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
72870 <description>Read: Disabled</description>
72875 <description>Read: Enabled</description>
72883 <description>Enable</description>
72890 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
72897 <description>Read: Disabled</description>
72902 <description>Read: Enabled</description>
72910 <description>Enable</description>
72917 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
72924 <description>Read: Disabled</description>
72929 <description>Read: Enabled</description>
72937 <description>Enable</description>
72944 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
72951 <description>Read: Disabled</description>
72956 <description>Read: Enabled</description>
72964 <description>Enable</description>
72971 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
72978 <description>Read: Disabled</description>
72983 <description>Read: Enabled</description>
72991 <description>Enable</description>
72998 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
73005 <description>Read: Disabled</description>
73010 <description>Read: Enabled</description>
73018 <description>Enable</description>
73025 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
73032 <description>Read: Disabled</description>
73037 <description>Read: Enabled</description>
73045 <description>Enable</description>
73052 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
73059 <description>Read: Disabled</description>
73064 <description>Read: Enabled</description>
73072 <description>Enable</description>
73079 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
73086 <description>Read: Disabled</description>
73091 <description>Read: Enabled</description>
73099 <description>Enable</description>
73106 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
73113 <description>Read: Disabled</description>
73118 <description>Read: Enabled</description>
73126 <description>Enable</description>
73133 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
73140 <description>Read: Disabled</description>
73145 <description>Read: Enabled</description>
73153 <description>Enable</description>
73162 <description>Disable interrupt</description>
73170 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
73177 <description>Read: Disabled</description>
73182 <description>Read: Enabled</description>
73190 <description>Disable</description>
73197 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
73204 <description>Read: Disabled</description>
73209 <description>Read: Enabled</description>
73217 <description>Disable</description>
73224 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
73231 <description>Read: Disabled</description>
73236 <description>Read: Enabled</description>
73244 <description>Disable</description>
73251 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
73258 <description>Read: Disabled</description>
73263 <description>Read: Enabled</description>
73271 <description>Disable</description>
73278 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
73285 <description>Read: Disabled</description>
73290 <description>Read: Enabled</description>
73298 <description>Disable</description>
73305 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
73312 <description>Read: Disabled</description>
73317 <description>Read: Enabled</description>
73325 <description>Disable</description>
73332 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
73339 <description>Read: Disabled</description>
73344 <description>Read: Enabled</description>
73352 <description>Disable</description>
73359 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
73366 <description>Read: Disabled</description>
73371 <description>Read: Enabled</description>
73379 <description>Disable</description>
73386 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
73393 <description>Read: Disabled</description>
73398 <description>Read: Enabled</description>
73406 <description>Disable</description>
73413 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
73420 <description>Read: Disabled</description>
73425 <description>Read: Enabled</description>
73433 <description>Disable</description>
73440 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
73447 <description>Read: Disabled</description>
73452 <description>Read: Enabled</description>
73460 <description>Disable</description>
73467 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
73474 <description>Read: Disabled</description>
73479 <description>Read: Enabled</description>
73487 <description>Disable</description>
73494 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
73501 <description>Read: Disabled</description>
73506 <description>Read: Enabled</description>
73514 <description>Disable</description>
73521 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
73528 <description>Read: Disabled</description>
73533 <description>Read: Enabled</description>
73541 <description>Disable</description>
73548 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
73555 <description>Read: Disabled</description>
73560 <description>Read: Enabled</description>
73568 <description>Disable</description>
73575 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
73582 <description>Read: Disabled</description>
73587 <description>Read: Enabled</description>
73595 <description>Disable</description>
73602 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
73609 <description>Read: Disabled</description>
73614 <description>Read: Enabled</description>
73622 <description>Disable</description>
73629 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
73636 <description>Read: Disabled</description>
73641 <description>Read: Enabled</description>
73649 <description>Disable</description>
73656 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
73663 <description>Read: Disabled</description>
73668 <description>Read: Enabled</description>
73676 <description>Disable</description>
73685 <description>Pending interrupts</description>
73693 <description>Read pending status of interrupt for event COMPARE[0]</description>
73700 <description>Read: Not pending</description>
73705 <description>Read: Pending</description>
73712 <description>Read pending status of interrupt for event COMPARE[1]</description>
73719 <description>Read: Not pending</description>
73724 <description>Read: Pending</description>
73731 <description>Read pending status of interrupt for event COMPARE[2]</description>
73738 <description>Read: Not pending</description>
73743 <description>Read: Pending</description>
73750 <description>Read pending status of interrupt for event COMPARE[3]</description>
73757 <description>Read: Not pending</description>
73762 <description>Read: Pending</description>
73769 <description>Read pending status of interrupt for event COMPARE[4]</description>
73776 <description>Read: Not pending</description>
73781 <description>Read: Pending</description>
73788 <description>Read pending status of interrupt for event COMPARE[5]</description>
73795 <description>Read: Not pending</description>
73800 <description>Read: Pending</description>
73807 <description>Read pending status of interrupt for event COMPARE[6]</description>
73814 <description>Read: Not pending</description>
73819 <description>Read: Pending</description>
73826 <description>Read pending status of interrupt for event COMPARE[7]</description>
73833 <description>Read: Not pending</description>
73838 <description>Read: Pending</description>
73845 <description>Read pending status of interrupt for event COMPARE[8]</description>
73852 <description>Read: Not pending</description>
73857 <description>Read: Pending</description>
73864 <description>Read pending status of interrupt for event COMPARE[9]</description>
73871 <description>Read: Not pending</description>
73876 <description>Read: Pending</description>
73883 <description>Read pending status of interrupt for event COMPARE[10]</description>
73890 <description>Read: Not pending</description>
73895 <description>Read: Pending</description>
73902 <description>Read pending status of interrupt for event COMPARE[11]</description>
73909 <description>Read: Not pending</description>
73914 <description>Read: Pending</description>
73921 <description>Read pending status of interrupt for event COMPARE[12]</description>
73928 <description>Read: Not pending</description>
73933 <description>Read: Pending</description>
73940 <description>Read pending status of interrupt for event COMPARE[13]</description>
73947 <description>Read: Not pending</description>
73952 <description>Read: Pending</description>
73959 <description>Read pending status of interrupt for event COMPARE[14]</description>
73966 <description>Read: Not pending</description>
73971 <description>Read: Pending</description>
73978 <description>Read pending status of interrupt for event COMPARE[15]</description>
73985 <description>Read: Not pending</description>
73990 <description>Read: Pending</description>
73997 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
74004 <description>Read: Not pending</description>
74009 <description>Read: Pending</description>
74016 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
74023 <description>Read: Not pending</description>
74028 <description>Read: Pending</description>
74035 <description>Read pending status of interrupt for event PWMPERIODEND</description>
74042 <description>Read: Not pending</description>
74047 <description>Read: Pending</description>
74056 <description>Enable or disable interrupt</description>
74064 <description>Enable or disable interrupt for event COMPARE[0]</description>
74070 <description>Disable</description>
74075 <description>Enable</description>
74082 <description>Enable or disable interrupt for event COMPARE[1]</description>
74088 <description>Disable</description>
74093 <description>Enable</description>
74100 <description>Enable or disable interrupt for event COMPARE[2]</description>
74106 <description>Disable</description>
74111 <description>Enable</description>
74118 <description>Enable or disable interrupt for event COMPARE[3]</description>
74124 <description>Disable</description>
74129 <description>Enable</description>
74136 <description>Enable or disable interrupt for event COMPARE[4]</description>
74142 <description>Disable</description>
74147 <description>Enable</description>
74154 <description>Enable or disable interrupt for event COMPARE[5]</description>
74160 <description>Disable</description>
74165 <description>Enable</description>
74172 <description>Enable or disable interrupt for event COMPARE[6]</description>
74178 <description>Disable</description>
74183 <description>Enable</description>
74190 <description>Enable or disable interrupt for event COMPARE[7]</description>
74196 <description>Disable</description>
74201 <description>Enable</description>
74208 <description>Enable or disable interrupt for event COMPARE[8]</description>
74214 <description>Disable</description>
74219 <description>Enable</description>
74226 <description>Enable or disable interrupt for event COMPARE[9]</description>
74232 <description>Disable</description>
74237 <description>Enable</description>
74244 <description>Enable or disable interrupt for event COMPARE[10]</description>
74250 <description>Disable</description>
74255 <description>Enable</description>
74262 <description>Enable or disable interrupt for event COMPARE[11]</description>
74268 <description>Disable</description>
74273 <description>Enable</description>
74280 <description>Enable or disable interrupt for event COMPARE[12]</description>
74286 <description>Disable</description>
74291 <description>Enable</description>
74298 <description>Enable or disable interrupt for event COMPARE[13]</description>
74304 <description>Disable</description>
74309 <description>Enable</description>
74316 <description>Enable or disable interrupt for event COMPARE[14]</description>
74322 <description>Disable</description>
74327 <description>Enable</description>
74334 <description>Enable or disable interrupt for event COMPARE[15]</description>
74340 <description>Disable</description>
74345 <description>Enable</description>
74352 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
74358 <description>Disable</description>
74363 <description>Enable</description>
74370 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
74376 <description>Disable</description>
74381 <description>Enable</description>
74388 <description>Enable or disable interrupt for event PWMPERIODEND</description>
74394 <description>Disable</description>
74399 <description>Enable</description>
74408 <description>Enable interrupt</description>
74416 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
74423 <description>Read: Disabled</description>
74428 <description>Read: Enabled</description>
74436 <description>Enable</description>
74443 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
74450 <description>Read: Disabled</description>
74455 <description>Read: Enabled</description>
74463 <description>Enable</description>
74470 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
74477 <description>Read: Disabled</description>
74482 <description>Read: Enabled</description>
74490 <description>Enable</description>
74497 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
74504 <description>Read: Disabled</description>
74509 <description>Read: Enabled</description>
74517 <description>Enable</description>
74524 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
74531 <description>Read: Disabled</description>
74536 <description>Read: Enabled</description>
74544 <description>Enable</description>
74551 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
74558 <description>Read: Disabled</description>
74563 <description>Read: Enabled</description>
74571 <description>Enable</description>
74578 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
74585 <description>Read: Disabled</description>
74590 <description>Read: Enabled</description>
74598 <description>Enable</description>
74605 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
74612 <description>Read: Disabled</description>
74617 <description>Read: Enabled</description>
74625 <description>Enable</description>
74632 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
74639 <description>Read: Disabled</description>
74644 <description>Read: Enabled</description>
74652 <description>Enable</description>
74659 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
74666 <description>Read: Disabled</description>
74671 <description>Read: Enabled</description>
74679 <description>Enable</description>
74686 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
74693 <description>Read: Disabled</description>
74698 <description>Read: Enabled</description>
74706 <description>Enable</description>
74713 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
74720 <description>Read: Disabled</description>
74725 <description>Read: Enabled</description>
74733 <description>Enable</description>
74740 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
74747 <description>Read: Disabled</description>
74752 <description>Read: Enabled</description>
74760 <description>Enable</description>
74767 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
74774 <description>Read: Disabled</description>
74779 <description>Read: Enabled</description>
74787 <description>Enable</description>
74794 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
74801 <description>Read: Disabled</description>
74806 <description>Read: Enabled</description>
74814 <description>Enable</description>
74821 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
74828 <description>Read: Disabled</description>
74833 <description>Read: Enabled</description>
74841 <description>Enable</description>
74848 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
74855 <description>Read: Disabled</description>
74860 <description>Read: Enabled</description>
74868 <description>Enable</description>
74875 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
74882 <description>Read: Disabled</description>
74887 <description>Read: Enabled</description>
74895 <description>Enable</description>
74902 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
74909 <description>Read: Disabled</description>
74914 <description>Read: Enabled</description>
74922 <description>Enable</description>
74931 <description>Disable interrupt</description>
74939 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
74946 <description>Read: Disabled</description>
74951 <description>Read: Enabled</description>
74959 <description>Disable</description>
74966 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
74973 <description>Read: Disabled</description>
74978 <description>Read: Enabled</description>
74986 <description>Disable</description>
74993 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
75000 <description>Read: Disabled</description>
75005 <description>Read: Enabled</description>
75013 <description>Disable</description>
75020 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
75027 <description>Read: Disabled</description>
75032 <description>Read: Enabled</description>
75040 <description>Disable</description>
75047 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
75054 <description>Read: Disabled</description>
75059 <description>Read: Enabled</description>
75067 <description>Disable</description>
75074 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
75081 <description>Read: Disabled</description>
75086 <description>Read: Enabled</description>
75094 <description>Disable</description>
75101 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
75108 <description>Read: Disabled</description>
75113 <description>Read: Enabled</description>
75121 <description>Disable</description>
75128 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
75135 <description>Read: Disabled</description>
75140 <description>Read: Enabled</description>
75148 <description>Disable</description>
75155 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
75162 <description>Read: Disabled</description>
75167 <description>Read: Enabled</description>
75175 <description>Disable</description>
75182 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
75189 <description>Read: Disabled</description>
75194 <description>Read: Enabled</description>
75202 <description>Disable</description>
75209 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
75216 <description>Read: Disabled</description>
75221 <description>Read: Enabled</description>
75229 <description>Disable</description>
75236 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
75243 <description>Read: Disabled</description>
75248 <description>Read: Enabled</description>
75256 <description>Disable</description>
75263 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
75270 <description>Read: Disabled</description>
75275 <description>Read: Enabled</description>
75283 <description>Disable</description>
75290 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
75297 <description>Read: Disabled</description>
75302 <description>Read: Enabled</description>
75310 <description>Disable</description>
75317 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
75324 <description>Read: Disabled</description>
75329 <description>Read: Enabled</description>
75337 <description>Disable</description>
75344 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
75351 <description>Read: Disabled</description>
75356 <description>Read: Enabled</description>
75364 <description>Disable</description>
75371 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
75378 <description>Read: Disabled</description>
75383 <description>Read: Enabled</description>
75391 <description>Disable</description>
75398 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
75405 <description>Read: Disabled</description>
75410 <description>Read: Enabled</description>
75418 <description>Disable</description>
75425 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
75432 <description>Read: Disabled</description>
75437 <description>Read: Enabled</description>
75445 <description>Disable</description>
75454 <description>Pending interrupts</description>
75462 <description>Read pending status of interrupt for event COMPARE[0]</description>
75469 <description>Read: Not pending</description>
75474 <description>Read: Pending</description>
75481 <description>Read pending status of interrupt for event COMPARE[1]</description>
75488 <description>Read: Not pending</description>
75493 <description>Read: Pending</description>
75500 <description>Read pending status of interrupt for event COMPARE[2]</description>
75507 <description>Read: Not pending</description>
75512 <description>Read: Pending</description>
75519 <description>Read pending status of interrupt for event COMPARE[3]</description>
75526 <description>Read: Not pending</description>
75531 <description>Read: Pending</description>
75538 <description>Read pending status of interrupt for event COMPARE[4]</description>
75545 <description>Read: Not pending</description>
75550 <description>Read: Pending</description>
75557 <description>Read pending status of interrupt for event COMPARE[5]</description>
75564 <description>Read: Not pending</description>
75569 <description>Read: Pending</description>
75576 <description>Read pending status of interrupt for event COMPARE[6]</description>
75583 <description>Read: Not pending</description>
75588 <description>Read: Pending</description>
75595 <description>Read pending status of interrupt for event COMPARE[7]</description>
75602 <description>Read: Not pending</description>
75607 <description>Read: Pending</description>
75614 <description>Read pending status of interrupt for event COMPARE[8]</description>
75621 <description>Read: Not pending</description>
75626 <description>Read: Pending</description>
75633 <description>Read pending status of interrupt for event COMPARE[9]</description>
75640 <description>Read: Not pending</description>
75645 <description>Read: Pending</description>
75652 <description>Read pending status of interrupt for event COMPARE[10]</description>
75659 <description>Read: Not pending</description>
75664 <description>Read: Pending</description>
75671 <description>Read pending status of interrupt for event COMPARE[11]</description>
75678 <description>Read: Not pending</description>
75683 <description>Read: Pending</description>
75690 <description>Read pending status of interrupt for event COMPARE[12]</description>
75697 <description>Read: Not pending</description>
75702 <description>Read: Pending</description>
75709 <description>Read pending status of interrupt for event COMPARE[13]</description>
75716 <description>Read: Not pending</description>
75721 <description>Read: Pending</description>
75728 <description>Read pending status of interrupt for event COMPARE[14]</description>
75735 <description>Read: Not pending</description>
75740 <description>Read: Pending</description>
75747 <description>Read pending status of interrupt for event COMPARE[15]</description>
75754 <description>Read: Not pending</description>
75759 <description>Read: Pending</description>
75766 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
75773 <description>Read: Not pending</description>
75778 <description>Read: Pending</description>
75785 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
75792 <description>Read: Not pending</description>
75797 <description>Read: Pending</description>
75804 <description>Read pending status of interrupt for event PWMPERIODEND</description>
75811 <description>Read: Not pending</description>
75816 <description>Read: Pending</description>
75825 <description>Enable or disable interrupt</description>
75833 <description>Enable or disable interrupt for event COMPARE[0]</description>
75839 <description>Disable</description>
75844 <description>Enable</description>
75851 <description>Enable or disable interrupt for event COMPARE[1]</description>
75857 <description>Disable</description>
75862 <description>Enable</description>
75869 <description>Enable or disable interrupt for event COMPARE[2]</description>
75875 <description>Disable</description>
75880 <description>Enable</description>
75887 <description>Enable or disable interrupt for event COMPARE[3]</description>
75893 <description>Disable</description>
75898 <description>Enable</description>
75905 <description>Enable or disable interrupt for event COMPARE[4]</description>
75911 <description>Disable</description>
75916 <description>Enable</description>
75923 <description>Enable or disable interrupt for event COMPARE[5]</description>
75929 <description>Disable</description>
75934 <description>Enable</description>
75941 <description>Enable or disable interrupt for event COMPARE[6]</description>
75947 <description>Disable</description>
75952 <description>Enable</description>
75959 <description>Enable or disable interrupt for event COMPARE[7]</description>
75965 <description>Disable</description>
75970 <description>Enable</description>
75977 <description>Enable or disable interrupt for event COMPARE[8]</description>
75983 <description>Disable</description>
75988 <description>Enable</description>
75995 <description>Enable or disable interrupt for event COMPARE[9]</description>
76001 <description>Disable</description>
76006 <description>Enable</description>
76013 <description>Enable or disable interrupt for event COMPARE[10]</description>
76019 <description>Disable</description>
76024 <description>Enable</description>
76031 <description>Enable or disable interrupt for event COMPARE[11]</description>
76037 <description>Disable</description>
76042 <description>Enable</description>
76049 <description>Enable or disable interrupt for event COMPARE[12]</description>
76055 <description>Disable</description>
76060 <description>Enable</description>
76067 <description>Enable or disable interrupt for event COMPARE[13]</description>
76073 <description>Disable</description>
76078 <description>Enable</description>
76085 <description>Enable or disable interrupt for event COMPARE[14]</description>
76091 <description>Disable</description>
76096 <description>Enable</description>
76103 <description>Enable or disable interrupt for event COMPARE[15]</description>
76109 <description>Disable</description>
76114 <description>Enable</description>
76121 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
76127 <description>Disable</description>
76132 <description>Enable</description>
76139 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
76145 <description>Disable</description>
76150 <description>Enable</description>
76157 <description>Enable or disable interrupt for event PWMPERIODEND</description>
76163 <description>Disable</description>
76168 <description>Enable</description>
76177 <description>Enable interrupt</description>
76185 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
76192 <description>Read: Disabled</description>
76197 <description>Read: Enabled</description>
76205 <description>Enable</description>
76212 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
76219 <description>Read: Disabled</description>
76224 <description>Read: Enabled</description>
76232 <description>Enable</description>
76239 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
76246 <description>Read: Disabled</description>
76251 <description>Read: Enabled</description>
76259 <description>Enable</description>
76266 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
76273 <description>Read: Disabled</description>
76278 <description>Read: Enabled</description>
76286 <description>Enable</description>
76293 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
76300 <description>Read: Disabled</description>
76305 <description>Read: Enabled</description>
76313 <description>Enable</description>
76320 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
76327 <description>Read: Disabled</description>
76332 <description>Read: Enabled</description>
76340 <description>Enable</description>
76347 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
76354 <description>Read: Disabled</description>
76359 <description>Read: Enabled</description>
76367 <description>Enable</description>
76374 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
76381 <description>Read: Disabled</description>
76386 <description>Read: Enabled</description>
76394 <description>Enable</description>
76401 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
76408 <description>Read: Disabled</description>
76413 <description>Read: Enabled</description>
76421 <description>Enable</description>
76428 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
76435 <description>Read: Disabled</description>
76440 <description>Read: Enabled</description>
76448 <description>Enable</description>
76455 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
76462 <description>Read: Disabled</description>
76467 <description>Read: Enabled</description>
76475 <description>Enable</description>
76482 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
76489 <description>Read: Disabled</description>
76494 <description>Read: Enabled</description>
76502 <description>Enable</description>
76509 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
76516 <description>Read: Disabled</description>
76521 <description>Read: Enabled</description>
76529 <description>Enable</description>
76536 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
76543 <description>Read: Disabled</description>
76548 <description>Read: Enabled</description>
76556 <description>Enable</description>
76563 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
76570 <description>Read: Disabled</description>
76575 <description>Read: Enabled</description>
76583 <description>Enable</description>
76590 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
76597 <description>Read: Disabled</description>
76602 <description>Read: Enabled</description>
76610 <description>Enable</description>
76617 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
76624 <description>Read: Disabled</description>
76629 <description>Read: Enabled</description>
76637 <description>Enable</description>
76644 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
76651 <description>Read: Disabled</description>
76656 <description>Read: Enabled</description>
76664 <description>Enable</description>
76671 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
76678 <description>Read: Disabled</description>
76683 <description>Read: Enabled</description>
76691 <description>Enable</description>
76700 <description>Disable interrupt</description>
76708 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
76715 <description>Read: Disabled</description>
76720 <description>Read: Enabled</description>
76728 <description>Disable</description>
76735 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
76742 <description>Read: Disabled</description>
76747 <description>Read: Enabled</description>
76755 <description>Disable</description>
76762 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
76769 <description>Read: Disabled</description>
76774 <description>Read: Enabled</description>
76782 <description>Disable</description>
76789 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
76796 <description>Read: Disabled</description>
76801 <description>Read: Enabled</description>
76809 <description>Disable</description>
76816 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
76823 <description>Read: Disabled</description>
76828 <description>Read: Enabled</description>
76836 <description>Disable</description>
76843 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
76850 <description>Read: Disabled</description>
76855 <description>Read: Enabled</description>
76863 <description>Disable</description>
76870 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
76877 <description>Read: Disabled</description>
76882 <description>Read: Enabled</description>
76890 <description>Disable</description>
76897 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
76904 <description>Read: Disabled</description>
76909 <description>Read: Enabled</description>
76917 <description>Disable</description>
76924 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
76931 <description>Read: Disabled</description>
76936 <description>Read: Enabled</description>
76944 <description>Disable</description>
76951 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
76958 <description>Read: Disabled</description>
76963 <description>Read: Enabled</description>
76971 <description>Disable</description>
76978 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
76985 <description>Read: Disabled</description>
76990 <description>Read: Enabled</description>
76998 <description>Disable</description>
77005 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
77012 <description>Read: Disabled</description>
77017 <description>Read: Enabled</description>
77025 <description>Disable</description>
77032 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
77039 <description>Read: Disabled</description>
77044 <description>Read: Enabled</description>
77052 <description>Disable</description>
77059 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
77066 <description>Read: Disabled</description>
77071 <description>Read: Enabled</description>
77079 <description>Disable</description>
77086 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
77093 <description>Read: Disabled</description>
77098 <description>Read: Enabled</description>
77106 <description>Disable</description>
77113 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
77120 <description>Read: Disabled</description>
77125 <description>Read: Enabled</description>
77133 <description>Disable</description>
77140 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
77147 <description>Read: Disabled</description>
77152 <description>Read: Enabled</description>
77160 <description>Disable</description>
77167 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
77174 <description>Read: Disabled</description>
77179 <description>Read: Enabled</description>
77187 <description>Disable</description>
77194 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
77201 <description>Read: Disabled</description>
77206 <description>Read: Enabled</description>
77214 <description>Disable</description>
77223 <description>Pending interrupts</description>
77231 <description>Read pending status of interrupt for event COMPARE[0]</description>
77238 <description>Read: Not pending</description>
77243 <description>Read: Pending</description>
77250 <description>Read pending status of interrupt for event COMPARE[1]</description>
77257 <description>Read: Not pending</description>
77262 <description>Read: Pending</description>
77269 <description>Read pending status of interrupt for event COMPARE[2]</description>
77276 <description>Read: Not pending</description>
77281 <description>Read: Pending</description>
77288 <description>Read pending status of interrupt for event COMPARE[3]</description>
77295 <description>Read: Not pending</description>
77300 <description>Read: Pending</description>
77307 <description>Read pending status of interrupt for event COMPARE[4]</description>
77314 <description>Read: Not pending</description>
77319 <description>Read: Pending</description>
77326 <description>Read pending status of interrupt for event COMPARE[5]</description>
77333 <description>Read: Not pending</description>
77338 <description>Read: Pending</description>
77345 <description>Read pending status of interrupt for event COMPARE[6]</description>
77352 <description>Read: Not pending</description>
77357 <description>Read: Pending</description>
77364 <description>Read pending status of interrupt for event COMPARE[7]</description>
77371 <description>Read: Not pending</description>
77376 <description>Read: Pending</description>
77383 <description>Read pending status of interrupt for event COMPARE[8]</description>
77390 <description>Read: Not pending</description>
77395 <description>Read: Pending</description>
77402 <description>Read pending status of interrupt for event COMPARE[9]</description>
77409 <description>Read: Not pending</description>
77414 <description>Read: Pending</description>
77421 <description>Read pending status of interrupt for event COMPARE[10]</description>
77428 <description>Read: Not pending</description>
77433 <description>Read: Pending</description>
77440 <description>Read pending status of interrupt for event COMPARE[11]</description>
77447 <description>Read: Not pending</description>
77452 <description>Read: Pending</description>
77459 <description>Read pending status of interrupt for event COMPARE[12]</description>
77466 <description>Read: Not pending</description>
77471 <description>Read: Pending</description>
77478 <description>Read pending status of interrupt for event COMPARE[13]</description>
77485 <description>Read: Not pending</description>
77490 <description>Read: Pending</description>
77497 <description>Read pending status of interrupt for event COMPARE[14]</description>
77504 <description>Read: Not pending</description>
77509 <description>Read: Pending</description>
77516 <description>Read pending status of interrupt for event COMPARE[15]</description>
77523 <description>Read: Not pending</description>
77528 <description>Read: Pending</description>
77535 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
77542 <description>Read: Not pending</description>
77547 <description>Read: Pending</description>
77554 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
77561 <description>Read: Not pending</description>
77566 <description>Read: Pending</description>
77573 <description>Read pending status of interrupt for event PWMPERIODEND</description>
77580 <description>Read: Not pending</description>
77585 <description>Read: Pending</description>
77594 <description>Enable or disable interrupt</description>
77602 <description>Enable or disable interrupt for event COMPARE[0]</description>
77608 <description>Disable</description>
77613 <description>Enable</description>
77620 <description>Enable or disable interrupt for event COMPARE[1]</description>
77626 <description>Disable</description>
77631 <description>Enable</description>
77638 <description>Enable or disable interrupt for event COMPARE[2]</description>
77644 <description>Disable</description>
77649 <description>Enable</description>
77656 <description>Enable or disable interrupt for event COMPARE[3]</description>
77662 <description>Disable</description>
77667 <description>Enable</description>
77674 <description>Enable or disable interrupt for event COMPARE[4]</description>
77680 <description>Disable</description>
77685 <description>Enable</description>
77692 <description>Enable or disable interrupt for event COMPARE[5]</description>
77698 <description>Disable</description>
77703 <description>Enable</description>
77710 <description>Enable or disable interrupt for event COMPARE[6]</description>
77716 <description>Disable</description>
77721 <description>Enable</description>
77728 <description>Enable or disable interrupt for event COMPARE[7]</description>
77734 <description>Disable</description>
77739 <description>Enable</description>
77746 <description>Enable or disable interrupt for event COMPARE[8]</description>
77752 <description>Disable</description>
77757 <description>Enable</description>
77764 <description>Enable or disable interrupt for event COMPARE[9]</description>
77770 <description>Disable</description>
77775 <description>Enable</description>
77782 <description>Enable or disable interrupt for event COMPARE[10]</description>
77788 <description>Disable</description>
77793 <description>Enable</description>
77800 <description>Enable or disable interrupt for event COMPARE[11]</description>
77806 <description>Disable</description>
77811 <description>Enable</description>
77818 <description>Enable or disable interrupt for event COMPARE[12]</description>
77824 <description>Disable</description>
77829 <description>Enable</description>
77836 <description>Enable or disable interrupt for event COMPARE[13]</description>
77842 <description>Disable</description>
77847 <description>Enable</description>
77854 <description>Enable or disable interrupt for event COMPARE[14]</description>
77860 <description>Disable</description>
77865 <description>Enable</description>
77872 <description>Enable or disable interrupt for event COMPARE[15]</description>
77878 <description>Disable</description>
77883 <description>Enable</description>
77890 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
77896 <description>Disable</description>
77901 <description>Enable</description>
77908 <description>Enable or disable interrupt for event SYSCOUNTERVALID</description>
77914 <description>Disable</description>
77919 <description>Enable</description>
77926 <description>Enable or disable interrupt for event PWMPERIODEND</description>
77932 <description>Disable</description>
77937 <description>Enable</description>
77946 <description>Enable interrupt</description>
77954 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
77961 <description>Read: Disabled</description>
77966 <description>Read: Enabled</description>
77974 <description>Enable</description>
77981 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
77988 <description>Read: Disabled</description>
77993 <description>Read: Enabled</description>
78001 <description>Enable</description>
78008 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
78015 <description>Read: Disabled</description>
78020 <description>Read: Enabled</description>
78028 <description>Enable</description>
78035 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
78042 <description>Read: Disabled</description>
78047 <description>Read: Enabled</description>
78055 <description>Enable</description>
78062 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
78069 <description>Read: Disabled</description>
78074 <description>Read: Enabled</description>
78082 <description>Enable</description>
78089 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
78096 <description>Read: Disabled</description>
78101 <description>Read: Enabled</description>
78109 <description>Enable</description>
78116 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
78123 <description>Read: Disabled</description>
78128 <description>Read: Enabled</description>
78136 <description>Enable</description>
78143 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
78150 <description>Read: Disabled</description>
78155 <description>Read: Enabled</description>
78163 <description>Enable</description>
78170 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
78177 <description>Read: Disabled</description>
78182 <description>Read: Enabled</description>
78190 <description>Enable</description>
78197 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
78204 <description>Read: Disabled</description>
78209 <description>Read: Enabled</description>
78217 <description>Enable</description>
78224 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
78231 <description>Read: Disabled</description>
78236 <description>Read: Enabled</description>
78244 <description>Enable</description>
78251 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
78258 <description>Read: Disabled</description>
78263 <description>Read: Enabled</description>
78271 <description>Enable</description>
78278 <description>Write '1' to enable interrupt for event COMPARE[12]</description>
78285 <description>Read: Disabled</description>
78290 <description>Read: Enabled</description>
78298 <description>Enable</description>
78305 <description>Write '1' to enable interrupt for event COMPARE[13]</description>
78312 <description>Read: Disabled</description>
78317 <description>Read: Enabled</description>
78325 <description>Enable</description>
78332 <description>Write '1' to enable interrupt for event COMPARE[14]</description>
78339 <description>Read: Disabled</description>
78344 <description>Read: Enabled</description>
78352 <description>Enable</description>
78359 <description>Write '1' to enable interrupt for event COMPARE[15]</description>
78366 <description>Read: Disabled</description>
78371 <description>Read: Enabled</description>
78379 <description>Enable</description>
78386 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
78393 <description>Read: Disabled</description>
78398 <description>Read: Enabled</description>
78406 <description>Enable</description>
78413 <description>Write '1' to enable interrupt for event SYSCOUNTERVALID</description>
78420 <description>Read: Disabled</description>
78425 <description>Read: Enabled</description>
78433 <description>Enable</description>
78440 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
78447 <description>Read: Disabled</description>
78452 <description>Read: Enabled</description>
78460 <description>Enable</description>
78469 <description>Disable interrupt</description>
78477 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
78484 <description>Read: Disabled</description>
78489 <description>Read: Enabled</description>
78497 <description>Disable</description>
78504 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
78511 <description>Read: Disabled</description>
78516 <description>Read: Enabled</description>
78524 <description>Disable</description>
78531 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
78538 <description>Read: Disabled</description>
78543 <description>Read: Enabled</description>
78551 <description>Disable</description>
78558 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
78565 <description>Read: Disabled</description>
78570 <description>Read: Enabled</description>
78578 <description>Disable</description>
78585 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
78592 <description>Read: Disabled</description>
78597 <description>Read: Enabled</description>
78605 <description>Disable</description>
78612 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
78619 <description>Read: Disabled</description>
78624 <description>Read: Enabled</description>
78632 <description>Disable</description>
78639 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
78646 <description>Read: Disabled</description>
78651 <description>Read: Enabled</description>
78659 <description>Disable</description>
78666 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
78673 <description>Read: Disabled</description>
78678 <description>Read: Enabled</description>
78686 <description>Disable</description>
78693 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
78700 <description>Read: Disabled</description>
78705 <description>Read: Enabled</description>
78713 <description>Disable</description>
78720 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
78727 <description>Read: Disabled</description>
78732 <description>Read: Enabled</description>
78740 <description>Disable</description>
78747 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
78754 <description>Read: Disabled</description>
78759 <description>Read: Enabled</description>
78767 <description>Disable</description>
78774 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
78781 <description>Read: Disabled</description>
78786 <description>Read: Enabled</description>
78794 <description>Disable</description>
78801 <description>Write '1' to disable interrupt for event COMPARE[12]</description>
78808 <description>Read: Disabled</description>
78813 <description>Read: Enabled</description>
78821 <description>Disable</description>
78828 <description>Write '1' to disable interrupt for event COMPARE[13]</description>
78835 <description>Read: Disabled</description>
78840 <description>Read: Enabled</description>
78848 <description>Disable</description>
78855 <description>Write '1' to disable interrupt for event COMPARE[14]</description>
78862 <description>Read: Disabled</description>
78867 <description>Read: Enabled</description>
78875 <description>Disable</description>
78882 <description>Write '1' to disable interrupt for event COMPARE[15]</description>
78889 <description>Read: Disabled</description>
78894 <description>Read: Enabled</description>
78902 <description>Disable</description>
78909 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
78916 <description>Read: Disabled</description>
78921 <description>Read: Enabled</description>
78929 <description>Disable</description>
78936 <description>Write '1' to disable interrupt for event SYSCOUNTERVALID</description>
78943 <description>Read: Disabled</description>
78948 <description>Read: Enabled</description>
78956 <description>Disable</description>
78963 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
78970 <description>Read: Disabled</description>
78975 <description>Read: Enabled</description>
78983 <description>Disable</description>
78992 <description>Pending interrupts</description>
79000 <description>Read pending status of interrupt for event COMPARE[0]</description>
79007 <description>Read: Not pending</description>
79012 <description>Read: Pending</description>
79019 <description>Read pending status of interrupt for event COMPARE[1]</description>
79026 <description>Read: Not pending</description>
79031 <description>Read: Pending</description>
79038 <description>Read pending status of interrupt for event COMPARE[2]</description>
79045 <description>Read: Not pending</description>
79050 <description>Read: Pending</description>
79057 <description>Read pending status of interrupt for event COMPARE[3]</description>
79064 <description>Read: Not pending</description>
79069 <description>Read: Pending</description>
79076 <description>Read pending status of interrupt for event COMPARE[4]</description>
79083 <description>Read: Not pending</description>
79088 <description>Read: Pending</description>
79095 <description>Read pending status of interrupt for event COMPARE[5]</description>
79102 <description>Read: Not pending</description>
79107 <description>Read: Pending</description>
79114 <description>Read pending status of interrupt for event COMPARE[6]</description>
79121 <description>Read: Not pending</description>
79126 <description>Read: Pending</description>
79133 <description>Read pending status of interrupt for event COMPARE[7]</description>
79140 <description>Read: Not pending</description>
79145 <description>Read: Pending</description>
79152 <description>Read pending status of interrupt for event COMPARE[8]</description>
79159 <description>Read: Not pending</description>
79164 <description>Read: Pending</description>
79171 <description>Read pending status of interrupt for event COMPARE[9]</description>
79178 <description>Read: Not pending</description>
79183 <description>Read: Pending</description>
79190 <description>Read pending status of interrupt for event COMPARE[10]</description>
79197 <description>Read: Not pending</description>
79202 <description>Read: Pending</description>
79209 <description>Read pending status of interrupt for event COMPARE[11]</description>
79216 <description>Read: Not pending</description>
79221 <description>Read: Pending</description>
79228 <description>Read pending status of interrupt for event COMPARE[12]</description>
79235 <description>Read: Not pending</description>
79240 <description>Read: Pending</description>
79247 <description>Read pending status of interrupt for event COMPARE[13]</description>
79254 <description>Read: Not pending</description>
79259 <description>Read: Pending</description>
79266 <description>Read pending status of interrupt for event COMPARE[14]</description>
79273 <description>Read: Not pending</description>
79278 <description>Read: Pending</description>
79285 <description>Read pending status of interrupt for event COMPARE[15]</description>
79292 <description>Read: Not pending</description>
79297 <description>Read: Pending</description>
79304 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
79311 <description>Read: Not pending</description>
79316 <description>Read: Pending</description>
79323 <description>Read pending status of interrupt for event SYSCOUNTERVALID</description>
79330 <description>Read: Not pending</description>
79335 <description>Read: Pending</description>
79342 <description>Read pending status of interrupt for event PWMPERIODEND</description>
79349 <description>Read: Not pending</description>
79354 <description>Read: Pending</description>
79363 <description>Enable or disable event routing</description>
79371 <description>Enable or disable event routing for event PWMPERIODEND</description>
79377 <description>Disable</description>
79382 <description>Enable</description>
79391 <description>Enable event routing</description>
79399 <description>Write '1' to enable event routing for event PWMPERIODEND</description>
79406 <description>Read: Disabled</description>
79411 <description>Read: Enabled</description>
79419 <description>Enable</description>
79428 <description>Disable event routing</description>
79436 <description>Write '1' to disable event routing for event PWMPERIODEND</description>
79443 <description>Read: Disabled</description>
79448 <description>Read: Enabled</description>
79456 <description>Disable</description>
79465 <description>Counter mode selection</description>
79473 <description>Automatic enable to keep the SYSCOUNTER active.</description>
79479 <description>Default configuration to keep the SYSCOUNTER active.</description>
79484 …<description>In addition to the above mode, any local CPU that is not sleeping keep the SYSCOUNTER…
79491 <description>Enable the SYSCOUNTER</description>
79497 <description>SYSCOUNTER disabled</description>
79502 <description>SYSCOUNTER enabled</description>
79513 <description>Unspecified</description>
79519 …<description>Description cluster: The lower 32-bits of Capture/Compare register CC[n]</description>
79527 <description>Capture/Compare low value in 1 us</description>
79535 …<description>Description cluster: The higher 32-bits of Capture/Compare register CC[n]</descriptio…
79543 <description>Capture/Compare high value in 1 us</description>
79551 …<description>Description cluster: Count to add to CC[n] when this register is written.</descriptio…
79559 <description>Count to add to CC[n]</description>
79565 <description>Configure the Capture/Compare register</description>
79571 <description>Adds SYSCOUNTER value.</description>
79576 <description>Adds CC value.</description>
79585 <description>Description cluster: Configure Capture/Compare register CC[n]</description>
79593 <description>Configure the Capture/Compare register</description>
79599 <description>Capture/Compare register CC[n] Disabled.</description>
79604 <description>Capture/Compare register CC[n] enabled.</description>
79614 …<description>Request to keep the SYSCOUNTER in the active state and prevent going to sleep</descri…
79622 <description>Request from index [0]</description>
79628 <description>Allow SYSCOUNTER to go to sleep</description>
79633 <description>Keep SYSCOUNTER active</description>
79640 <description>Request from index [1]</description>
79646 <description>Allow SYSCOUNTER to go to sleep</description>
79651 <description>Keep SYSCOUNTER active</description>
79658 <description>Request from index [2]</description>
79664 <description>Allow SYSCOUNTER to go to sleep</description>
79669 <description>Keep SYSCOUNTER active</description>
79676 <description>Request from index [3]</description>
79682 <description>Allow SYSCOUNTER to go to sleep</description>
79687 <description>Keep SYSCOUNTER active</description>
79694 <description>Request from index [4]</description>
79700 <description>Allow SYSCOUNTER to go to sleep</description>
79705 <description>Keep SYSCOUNTER active</description>
79712 <description>Request from index [5]</description>
79718 <description>Allow SYSCOUNTER to go to sleep</description>
79723 <description>Keep SYSCOUNTER active</description>
79730 <description>Request from index [6]</description>
79736 <description>Allow SYSCOUNTER to go to sleep</description>
79741 <description>Keep SYSCOUNTER active</description>
79748 <description>Request from index [7]</description>
79754 <description>Allow SYSCOUNTER to go to sleep</description>
79759 <description>Keep SYSCOUNTER active</description>
79766 <description>Request from index [8]</description>
79772 <description>Allow SYSCOUNTER to go to sleep</description>
79777 <description>Keep SYSCOUNTER active</description>
79784 <description>Request from index [9]</description>
79790 <description>Allow SYSCOUNTER to go to sleep</description>
79795 <description>Keep SYSCOUNTER active</description>
79802 <description>Request from index [10]</description>
79808 <description>Allow SYSCOUNTER to go to sleep</description>
79813 <description>Keep SYSCOUNTER active</description>
79820 <description>Request from index [11]</description>
79826 <description>Allow SYSCOUNTER to go to sleep</description>
79831 <description>Keep SYSCOUNTER active</description>
79838 <description>Request from index [12]</description>
79844 <description>Allow SYSCOUNTER to go to sleep</description>
79849 <description>Keep SYSCOUNTER active</description>
79856 <description>Request from index [13]</description>
79862 <description>Allow SYSCOUNTER to go to sleep</description>
79867 <description>Keep SYSCOUNTER active</description>
79874 <description>Request from index [14]</description>
79880 <description>Allow SYSCOUNTER to go to sleep</description>
79885 <description>Keep SYSCOUNTER active</description>
79892 <description>Request from index [15]</description>
79898 <description>Allow SYSCOUNTER to go to sleep</description>
79903 <description>Keep SYSCOUNTER active</description>
79912 … <description>Timeout after all CPUs gone into sleep state to stop the SYSCOUNTER</description>
79920 <description>Number of 32Ki cycles</description>
79928 … <description>Count to add to CC[0] when the event EVENTS_COMPARE[0] triggers.</description>
79936 <description>Count to add to CC[0]</description>
79944 <description>PWM configuration.</description>
79952 <description>The PWM compare value</description>
79960 <description>Configuration of clock output</description>
79968 <description>Enable 32Ki clock output on pin</description>
79974 <description>Disabled</description>
79979 <description>Enabled</description>
79986 <description>Enable fast clock output on pin</description>
79992 <description>Disabled</description>
79997 <description>Enabled</description>
80006 <description>Clock Configuration</description>
80014 <description>Fast clock divisor value of clock output</description>
80020 <description>GRTC LFCLK clock source selection</description>
80026 <description>GRTC LFCLK clock source is LFXO</description>
80031 <description>GRTC LFCLK clock source is system LFCLK</description>
80042 <description>Unspecified</description>
80048 … <description>Description cluster: The lower 32-bits of the SYSCOUNTER for index [n]</description>
80056 <description>The lower 32-bits of the SYSCOUNTER value.</description>
80064 … <description>Description cluster: The higher 20-bits of the SYSCOUNTER for index [n]</description>
80072 <description>The higher 20-bits of the SYSCOUNTER value.</description>
80078 <description>SYSCOUNTER busy status</description>
80084 <description>SYSCOUNTER is ready for read</description>
80089 …<description>SYSCOUNTER is busy, so not ready for read (value returned in the VALUE field of this …
80096 <description>The SYSCOUNTERL overflow indication after reading it.</description>
80102 <description>SYSCOUNTERL is not overflown</description>
80107 <description>SYSCOUNTERL overflown</description>
80116 …<description>Description cluster: Request to keep the SYSCOUNTER in the active state and prevent g…
80124 <description>Keep SYSCOUNTER in active state</description>
80130 <description>Allow SYSCOUNTER to go to sleep</description>
80135 <description>Keep SYSCOUNTER active</description>
80147 <description>Trace buffer monitor</description>
80165 <description>Start counter</description>
80173 <description>Start counter</description>
80179 <description>Trigger task</description>
80188 <description>Stop counter, clear counter value</description>
80196 <description>Stop counter, clear counter value</description>
80202 <description>Trigger task</description>
80211 <description>Save current counter value to COUNTSNAPSHOT</description>
80219 <description>Save current counter value to COUNTSNAPSHOT</description>
80225 <description>Trigger task</description>
80234 <description>Counter value equals half-full</description>
80242 <description>Counter value equals half-full</description>
80248 <description>Event not generated</description>
80253 <description>Event generated</description>
80262 <description>Counter value equals full</description>
80270 <description>Counter value equals full</description>
80276 <description>Event not generated</description>
80281 <description>Event generated</description>
80290 <description>Counter value saved to COUNTSNAPSHOT due to flush</description>
80298 <description>Counter value saved to COUNTSNAPSHOT due to flush</description>
80304 <description>Event not generated</description>
80309 <description>Event generated</description>
80318 <description>Enable or disable interrupt</description>
80326 <description>Enable or disable interrupt for event HALFFULL</description>
80332 <description>Disable</description>
80337 <description>Enable</description>
80344 <description>Enable or disable interrupt for event FULL</description>
80350 <description>Disable</description>
80355 <description>Enable</description>
80362 <description>Enable or disable interrupt for event FLUSH</description>
80368 <description>Disable</description>
80373 <description>Enable</description>
80382 <description>Enable interrupt</description>
80390 <description>Write '1' to enable interrupt for event HALFFULL</description>
80397 <description>Read: Disabled</description>
80402 <description>Read: Enabled</description>
80410 <description>Enable</description>
80417 <description>Write '1' to enable interrupt for event FULL</description>
80424 <description>Read: Disabled</description>
80429 <description>Read: Enabled</description>
80437 <description>Enable</description>
80444 <description>Write '1' to enable interrupt for event FLUSH</description>
80451 <description>Read: Disabled</description>
80456 <description>Read: Enabled</description>
80464 <description>Enable</description>
80473 <description>Disable interrupt</description>
80481 <description>Write '1' to disable interrupt for event HALFFULL</description>
80488 <description>Read: Disabled</description>
80493 <description>Read: Enabled</description>
80501 <description>Disable</description>
80508 <description>Write '1' to disable interrupt for event FULL</description>
80515 <description>Read: Disabled</description>
80520 <description>Read: Enabled</description>
80528 <description>Disable</description>
80535 <description>Write '1' to disable interrupt for event FLUSH</description>
80542 <description>Read: Disabled</description>
80547 <description>Read: Enabled</description>
80555 <description>Disable</description>
80564 <description>Pending interrupts</description>
80572 <description>Read pending status of interrupt for event HALFFULL</description>
80579 <description>Read: Not pending</description>
80584 <description>Read: Pending</description>
80591 <description>Read pending status of interrupt for event FULL</description>
80598 <description>Read: Not pending</description>
80603 <description>Read: Pending</description>
80610 <description>Read pending status of interrupt for event FLUSH</description>
80617 <description>Read: Not pending</description>
80622 <description>Read: Pending</description>
80631 <description>System RAM trace buffer total size in bytes</description>
80639 …<description>Must only be configured in STOP mode. Must be programmed to multiple of 16 bytes to m…
80641 maximum value 0x1000 i.e. 4096 bytes.</description>
80647 <description>0 bytes</description>
80652 <description>16 bytes</description>
80657 <description>4096 bytes</description>
80666 <description>Counter current value</description>
80674 …<description>Counter current value. Only writable when counter is in stopped state. Writing when n…
80675 state will generate a bus fault.</description>
80683 <description>Copy of the current COUNT value</description>
80691 … <description>TASKS_FLUSH will copy the current COUNT value to this register.</description>
80701 <description>USBHS</description>
80719 <description>Start the USB peripheral.</description>
80727 <description>Start the USB peripheral.</description>
80733 <description>Trigger task</description>
80742 <description>Event indicating that interrupt triggered at USBHS core</description>
80750 <description>Event indicating that interrupt triggered at USBHS core</description>
80756 <description>Event not generated</description>
80761 <description>Event generated</description>
80770 <description>Enable or disable interrupt</description>
80778 <description>Enable or disable interrupt for event CORE</description>
80784 <description>Disable</description>
80789 <description>Enable</description>
80798 <description>Enable interrupt</description>
80806 <description>Write '1' to enable interrupt for event CORE</description>
80813 <description>Read: Disabled</description>
80818 <description>Read: Enabled</description>
80826 <description>Enable</description>
80835 <description>Disable interrupt</description>
80843 <description>Write '1' to disable interrupt for event CORE</description>
80850 <description>Read: Disabled</description>
80855 <description>Read: Enabled</description>
80863 <description>Disable</description>
80872 <description>Pending interrupts</description>
80880 <description>Read pending status of interrupt for event CORE</description>
80887 <description>Read: Not pending</description>
80892 <description>Read: Pending</description>
80901 <description>Enable USB peripheral.</description>
80909 <description>Enable USB Controller</description>
80915 <description>USB Controller disabled.</description>
80920 <description>USB Controller enabled.</description>
80927 <description>Enable USB PHY</description>
80933 <description>USB PHY disabled.</description>
80938 <description>USB PHY enabled.</description>
80949 <description>External Memory Interface</description>
80967 <description>Start operation.</description>
80975 <description>Start operation.</description>
80981 <description>Trigger task</description>
80990 <description>Stop operation.</description>
80998 <description>Stop operation.</description>
81004 <description>Trigger task</description>
81013 … <description>Enable or disable locked APB access to serial memory controller.</description>
81021 <description>Enable or disable locked APB access to SSI.</description>
81027 <description>Disable locked APB access.</description>
81032 <description>Enable locked APB access.</description>
81041 <description>Reset the external memory.</description>
81054 <description>Reset is cleared.</description>
81059 <description>Reset is set.</description>
81068 <description>Event indicating that interrupt triggered at EXMIF core</description>
81076 <description>Event indicating that interrupt triggered at EXMIF core</description>
81082 <description>Event not generated</description>
81087 <description>Event generated</description>
81096 …<description>Event indicating that the START task is completed and the EXMIF has started.</descrip…
81104 …<description>Event indicating that the START task is completed and the EXMIF has started.</descrip…
81110 <description>Event not generated</description>
81115 <description>Event generated</description>
81124 <description>Enable or disable interrupt</description>
81132 <description>Enable or disable interrupt for event CORE</description>
81138 <description>Disable</description>
81143 <description>Enable</description>
81150 <description>Enable or disable interrupt for event STARTED</description>
81156 <description>Disable</description>
81161 <description>Enable</description>
81170 <description>Enable interrupt</description>
81178 <description>Write '1' to enable interrupt for event CORE</description>
81185 <description>Read: Disabled</description>
81190 <description>Read: Enabled</description>
81198 <description>Enable</description>
81205 <description>Write '1' to enable interrupt for event STARTED</description>
81212 <description>Read: Disabled</description>
81217 <description>Read: Enabled</description>
81225 <description>Enable</description>
81234 <description>Disable interrupt</description>
81242 <description>Write '1' to disable interrupt for event CORE</description>
81249 <description>Read: Disabled</description>
81254 <description>Read: Enabled</description>
81262 <description>Disable</description>
81269 <description>Write '1' to disable interrupt for event STARTED</description>
81276 <description>Read: Disabled</description>
81281 <description>Read: Enabled</description>
81289 <description>Disable</description>
81298 <description>Pending interrupts</description>
81306 <description>Read pending status of interrupt for event CORE</description>
81313 <description>Read: Not pending</description>
81318 <description>Read: Pending</description>
81325 <description>Read pending status of interrupt for event STARTED</description>
81332 <description>Read: Not pending</description>
81337 <description>Read: Pending</description>
81346 <description>Configuration for external memory device 1.</description>
81352 <description>Address offset for external memory device 1.</description>
81360 <description>External memory Offset.</description>
81368 <description>Upper address range for external memory device 1.</description>
81376 <description>Upper limit address.</description>
81384 <description>Enable or disable external memory access.</description>
81392 … <description>Enable or disable external memory access from AXI interface.</description>
81398 <description>Disable external memory.</description>
81403 <description>Enable external memory.</description>
81413 <description>Configuration for external memory device 2.</description>
81420 <description>Address offset for external memory device 2.</description>
81428 <description>External memory Offset.</description>
81436 <description>Upper address range for external memory device 2.</description>
81444 <description>Upper limit address.</description>
81452 <description>Enable or disable external memory access.</description>
81460 … <description>Enable or disable external memory access from AXI interface.</description>
81466 <description>Disable external memory.</description>
81471 <description>Enable external memory.</description>
81481 <description>Unspecified</description>
81487 <description>Unspecified</description>
81493 <description>This register controls the serial data transfer.</description>
81501 <description>Data Frame Size.</description>
81507 <description>Unspecified</description>
81512 <description>Unspecified</description>
81517 <description>Unspecified</description>
81522 <description>Unspecified</description>
81527 <description>Unspecified</description>
81532 <description>Unspecified</description>
81537 <description>Unspecified</description>
81542 <description>Unspecified</description>
81547 <description>Unspecified</description>
81552 <description>Unspecified</description>
81557 <description>Unspecified</description>
81562 <description>Unspecified</description>
81567 <description>Unspecified</description>
81572 <description>Unspecified</description>
81577 <description>Unspecified</description>
81582 <description>Unspecified</description>
81587 <description>Unspecified</description>
81592 <description>Unspecified</description>
81597 <description>Unspecified</description>
81602 <description>Unspecified</description>
81607 <description>Unspecified</description>
81612 <description>Unspecified</description>
81617 <description>Unspecified</description>
81622 <description>Unspecified</description>
81627 <description>Unspecified</description>
81632 <description>Unspecified</description>
81637 <description>Unspecified</description>
81642 <description>Unspecified</description>
81647 <description>Unspecified</description>
81652 <description>Unspecified</description>
81657 <description>Unspecified</description>
81662 <description>Unspecified</description>
81669 <description>Frame Format.</description>
81675 <description>Unspecified</description>
81680 <description>Unspecified</description>
81685 <description>Unspecified</description>
81692 <description>Serial Clock Phase.</description>
81698 <description>Unspecified</description>
81703 <description>Unspecified</description>
81710 <description>Serial Clock Polarity.</description>
81716 <description>Unspecified</description>
81721 <description>Unspecified</description>
81728 <description>Transfer Mode.</description>
81734 <description>Unspecified</description>
81739 <description>Unspecified</description>
81744 <description>Unspecified</description>
81749 <description>Unspecified</description>
81756 <description>Slave Output Enable.</description>
81762 <description>Unspecified</description>
81767 <description>Unspecified</description>
81774 <description>Shift Register Loop.</description>
81780 <description>Unspecified</description>
81785 <description>Unspecified</description>
81792 <description>Slave Select Toggle Enable.</description>
81798 <description>Unspecified</description>
81803 <description>Unspecified</description>
81810 <description>Control Frame Size.</description>
81816 <description>Unspecified</description>
81821 <description>Unspecified</description>
81826 <description>Unspecified</description>
81831 <description>Unspecified</description>
81836 <description>Unspecified</description>
81841 <description>Unspecified</description>
81846 <description>Unspecified</description>
81851 <description>Unspecified</description>
81856 <description>Unspecified</description>
81861 <description>Unspecified</description>
81866 <description>Unspecified</description>
81871 <description>Unspecified</description>
81876 <description>Unspecified</description>
81881 <description>Unspecified</description>
81886 <description>Unspecified</description>
81891 <description>Unspecified</description>
81898 <description>SPI Frame Format</description>
81904 <description>Unspecified</description>
81909 <description>Unspecified</description>
81914 <description>Unspecified</description>
81919 <description>Unspecified</description>
81926 <description>SPI Hyperbus Frame format enable.</description>
81932 <description>Unspecified</description>
81937 <description>Unspecified</description>
81944 <description>Enable Dynamic wait states in SPI mode of operation.</description>
81951 <description>Unspecified</description>
81956 <description>Unspecified</description>
81963 … <description>This field selects if DWC_ssi is working in Master or Slave mode</description>
81970 <description>Unspecified</description>
81975 <description>Unspecified</description>
81984 …<description>This register exists only when the DWC_ssi is configured as a master device.</descrip…
81992 <description>Number of Data Frames.</description>
82000 <description>This register enables and disables the DWC_ssi.</description>
82008 <description>SSI Enable.</description>
82014 <description>Unspecified</description>
82019 <description>Unspecified</description>
82028 …<description>This register controls the direction of the data word for the half-duplex Microwire s…
82036 <description>Microwire Transfer Mode.</description>
82042 <description>Unspecified</description>
82047 <description>Unspecified</description>
82054 <description>Microwire Control.</description>
82060 <description>Unspecified</description>
82065 <description>Unspecified</description>
82072 <description>Microwire Handshaking.</description>
82078 <description>Unspecified</description>
82083 <description>Unspecified</description>
82092 …<description>This register is valid only when the DWC_ssi is configured as a master device.</descr…
82100 <description>Slave Select Enable Flag.</description>
82106 <description>Unspecified</description>
82111 <description>Unspecified</description>
82120 …<description>This register is valid only when the DWC_ssi is configured as a master device.</descr…
82128 <description>SSI Clock Divider.</description>
82136 …<description>This register controls the threshold value for the transmit FIFO memory..</descriptio…
82144 <description>Transmit FIFO Threshold.</description>
82150 <description>Transfer start FIFO level.</description>
82158 …<description>This register controls the threshold value for the receive FIFO memory..</description>
82166 <description>Receive FIFO Threshold.</description>
82174 …<description>This register contains the number of valid data entries in the transmit FIFO memory.<…
82182 <description>Transmit FIFO Level.</description>
82191 …<description>This register contains the number of valid data entries in the receive FIFO memory.</…
82199 <description>Receive FIFO Level.</description>
82208 …description>This is a read-only register used to indicate the current transfer status, FIFO status…
82216 <description>SSI Busy Flag.</description>
82223 <description>Unspecified</description>
82228 <description>Unspecified</description>
82235 <description>Transmit FIFO Not Full.</description>
82242 <description>Unspecified</description>
82247 <description>Unspecified</description>
82254 <description>Transmit FIFO Empty.</description>
82261 <description>Unspecified</description>
82266 <description>Unspecified</description>
82273 <description>Receive FIFO Not Empty.</description>
82280 <description>Unspecified</description>
82285 <description>Unspecified</description>
82292 <description>Receive FIFO Full.</description>
82299 <description>Unspecified</description>
82304 <description>Unspecified</description>
82311 <description>Transmission Error.</description>
82318 <description>Unspecified</description>
82323 <description>Unspecified</description>
82330 <description>Data Collision Error.</description>
82337 <description>Unspecified</description>
82342 <description>Unspecified</description>
82351 …<description>This read/write register masks or enables all interrupts generated by the DWC_ssi.</d…
82359 <description>Transmit FIFO Empty Interrupt Mask</description>
82365 <description>Unspecified</description>
82370 <description>Unspecified</description>
82377 <description>Transmit FIFO Overflow Interrupt Mask</description>
82383 <description>Unspecified</description>
82388 <description>Unspecified</description>
82395 <description>Receive FIFO Underflow Interrupt Mask</description>
82401 <description>Unspecified</description>
82406 <description>Unspecified</description>
82413 <description>Receive FIFO Overflow Interrupt Mask</description>
82419 <description>Unspecified</description>
82424 <description>Unspecified</description>
82431 <description>Receive FIFO Full Interrupt Mask</description>
82437 <description>ssi_rxf_intr interrupt is masked</description>
82442 <description>ssi_rxf_intr interrupt is not masked</description>
82449 <description>Multi-Master Contention Interrupt Mask.</description>
82455 <description>Unspecified</description>
82460 <description>Unspecified</description>
82467 <description>XIP Receive FIFO Overflow Interrupt Mask</description>
82473 <description>Unspecified</description>
82478 <description>Unspecified</description>
82485 <description>Transmit FIFO Underflow Interrupt Mask</description>
82491 <description>Unspecified</description>
82496 <description>Unspecified</description>
82503 <description>SSI Done Interrupt Mask</description>
82510 <description>Unspecified</description>
82515 <description>Unspecified</description>
82524 …<description>This register reports the status of the DWC_ssi interrupts after they have been maske…
82532 <description>Transmit FIFO Empty Interrupt Status</description>
82539 <description>Unspecified</description>
82544 <description>Unspecified</description>
82551 <description>Transmit FIFO Overflow Interrupt Status</description>
82558 <description>Unspecified</description>
82563 <description>Unspecified</description>
82570 <description>Receive FIFO Underflow Interrupt Status</description>
82577 <description>Unspecified</description>
82582 <description>Unspecified</description>
82589 <description>Receive FIFO Overflow Interrupt Status</description>
82596 <description>Unspecified</description>
82601 <description>Unspecified</description>
82608 <description>Receive FIFO Full Interrupt Status</description>
82615 <description>Unspecified</description>
82620 <description>Unspecified</description>
82627 <description>Multi-Master Contention Interrupt Status.</description>
82634 <description>Unspecified</description>
82639 <description>Unspecified</description>
82646 <description>XIP Receive FIFO Overflow Interrupt Status</description>
82653 <description>Unspecified</description>
82658 <description>Unspecified</description>
82665 <description>Transmit FIFO Underflow Interrupt Status</description>
82672 <description>Unspecified</description>
82677 <description>Unspecified</description>
82684 <description>SSI Done Interrupt Status</description>
82691 <description>Unspecified</description>
82696 <description>Unspecified</description>
82705 <description>Raw Interrupt Status Register</description>
82713 <description>Transmit FIFO Empty Raw Interrupt Status</description>
82720 <description>Unspecified</description>
82725 <description>Unspecified</description>
82732 <description>Transmit FIFO Overflow Raw Interrupt Status</description>
82739 <description>Unspecified</description>
82744 <description>Unspecified</description>
82751 <description>Receive FIFO Underflow Raw Interrupt Status</description>
82758 <description>Unspecified</description>
82763 <description>Unspecified</description>
82770 <description>Receive FIFO Overflow Raw Interrupt Status</description>
82777 <description>Unspecified</description>
82782 <description>Unspecified</description>
82789 <description>Receive FIFO Full Raw Interrupt Status</description>
82796 <description>Unspecified</description>
82801 <description>Unspecified</description>
82808 <description>Multi-Master Contention Raw Interrupt Status.</description>
82815 <description>Unspecified</description>
82820 <description>Unspecified</description>
82827 <description>XIP Receive FIFO Overflow Raw Interrupt Status</description>
82834 <description>Unspecified</description>
82839 <description>Unspecified</description>
82846 <description>Transmit FIFO Underflow Interrupt Raw Status</description>
82853 <description>Unspecified</description>
82858 <description>Unspecified</description>
82865 <description>SSI Done Interrupt Raw Status</description>
82872 <description>Unspecified</description>
82877 <description>Unspecified</description>
82886 <description>Transmit FIFO Error Interrupt Clear Register</description>
82894 <description>Clear Transmit FIFO Overflow/Underflow Interrupt.</description>
82903 <description>Receive FIFO Overflow Interrupt Clear Register</description>
82911 <description>Clear Receive FIFO Overflow Interrupt.</description>
82920 <description>Receive FIFO Underflow Interrupt Clear Register</description>
82928 <description>Clear Receive FIFO Underflow Interrupt.</description>
82937 <description>Multi-Master Interrupt Clear Register</description>
82945 <description>Clear Multi-Master Contention Interrupt.</description>
82954 <description>Interrupt Clear Register</description>
82962 <description>Clear Interrupts.</description>
82971 …description>This register contains the peripherals identification code, which is written into the …
82979 <description>Identification code.</description>
82988 … <description>This read-only register stores the specific DWC_ssi component version.</description>
82996 … <description>Contains the hex representation of the Synopsys component version.</description>
83007 …<description>Description collection: The DWC_ssi data register is a 32-bit read/write buffer for t…
83015 <description>Data Register.</description>
83023 …<description>This register is only valid when the DWC_ssi is configured with rxd sample delay logi…
83031 <description>Receive Data (rxd) Sample Delay.</description>
83037 <description>Receive Data (rxd) Sampling Edge.</description>
83045 …<description>This register is used to control the serial data transfer in enhanced SPI mode of ope…
83053 <description>Address and instruction transfer format.</description>
83059 <description>Unspecified</description>
83064 <description>Unspecified</description>
83069 <description>Unspecified</description>
83074 <description>Unspecified</description>
83081 <description>This bit defines Length of Address to be transmitted.</description>
83087 <description>Unspecified</description>
83092 <description>Unspecified</description>
83097 <description>Unspecified</description>
83102 <description>Unspecified</description>
83107 <description>Unspecified</description>
83112 <description>Unspecified</description>
83117 <description>Unspecified</description>
83122 <description>Unspecified</description>
83127 <description>Unspecified</description>
83132 <description>Unspecified</description>
83137 <description>Unspecified</description>
83142 <description>Unspecified</description>
83147 <description>Unspecified</description>
83152 <description>Unspecified</description>
83157 <description>Unspecified</description>
83162 <description>Unspecified</description>
83169 <description>Mode bits enable in XIP mode.</description>
83176 <description>Dual/Quad/Octal mode instruction length in bits.</description>
83182 <description>Unspecified</description>
83187 <description>Unspecified</description>
83192 <description>Unspecified</description>
83197 <description>Unspecified</description>
83204 …<description>Wait cycles in Dual/Quad/Octal mode between control frames transmit and data receptio…
83210 <description>SPI DDR Enable bit.</description>
83216 <description>Instruction DDR Enable bit.</description>
83222 <description>Read data strobe enable bit.</description>
83228 <description>Fix DFS for XIP transfers.</description>
83235 <description>XIP instruction enable bit.</description>
83242 <description>Enable continuous transfer in XIP mode.</description>
83249 <description>SPI data mask enable bit.</description>
83255 …<description>Enable rxds signaling during address and command phase of Hyperbus transfer.</descrip…
83261 <description>XIP Mode bits length.</description>
83268 <description>Unspecified</description>
83273 <description>Unspecified</description>
83278 <description>Unspecified</description>
83283 <description>Unspecified</description>
83290 <description>Enables XIP pre-fetch functionality in DWC_ssi.</description>
83297 <description>Enables clock stretching capability in SPI transfers.</description>
83305 … <description>This Register is valid only when SSIC_HAS_DDR is equal to 1.</description>
83313 …<description>TXD Drive edge register which decided the driving edge of transmit data.</description>
83321 …<description>This register carries the mode bits which are sent in the XIP mode of operation after…
83329 … <description>XIP mode bits to be sent after address phase of XIP transfer.</description>
83338 <description>Unspecified</description>
83344 <description>This Register is valid only when SSIC_XIP_EN is equal to 1.</description>
83352 <description>XIP INCR transfer opcode.</description>
83360 <description>This Register is valid only when SSIC_XIP_EN is equal to 1.</description>
83368 <description>XIP WRAP transfer opcode.</description>
83376 … <description>This Register is valid only when SSIC_CONCURRENT_XIP_EN is equal to 1.</description>
83384 <description>SPI Frame Format</description>
83390 <description>Unspecified</description>
83395 <description>Unspecified</description>
83400 <description>Unspecified</description>
83405 <description>Unspecified</description>
83412 <description>Address and instruction transfer format.</description>
83418 <description>Unspecified</description>
83423 <description>Unspecified</description>
83428 <description>Unspecified</description>
83433 <description>Unspecified</description>
83440 <description>This bit defines Length of Address to be transmitted.</description>
83446 <description>Unspecified</description>
83451 <description>Unspecified</description>
83456 <description>Unspecified</description>
83461 <description>Unspecified</description>
83466 <description>Unspecified</description>
83471 <description>Unspecified</description>
83476 <description>Unspecified</description>
83481 <description>Unspecified</description>
83486 <description>Unspecified</description>
83491 <description>Unspecified</description>
83496 <description>Unspecified</description>
83501 <description>Unspecified</description>
83506 <description>Unspecified</description>
83511 <description>Unspecified</description>
83516 <description>Unspecified</description>
83521 <description>Unspecified</description>
83528 <description>Dual/Quad/Octal mode instruction length in bits.</description>
83534 <description>Unspecified</description>
83539 <description>Unspecified</description>
83544 <description>Unspecified</description>
83549 <description>Unspecified</description>
83556 <description>Mode bits enable in XIP mode.</description>
83562 …<description>Wait cycles in Dual/Quad/Octal mode between control frames transmit and data receptio…
83568 <description>Fix DFS for XIP transfers.</description>
83574 <description>SPI DDR Enable bit.</description>
83580 <description>Instruction DDR Enable bit.</description>
83586 <description>Read data strobe enable bit.</description>
83592 <description>XIP instruction enable bit.</description>
83598 <description>Enable continuous transfer in XIP mode.</description>
83605 <description>SPI Hyperbus Frame format enable for XIP transfers.</description>
83611 …<description>Enable rxds signaling during address and command phase of Hyperbus transfer.</descrip…
83617 <description>XIP Mode bits length.</description>
83623 <description>Unspecified</description>
83628 <description>Unspecified</description>
83633 <description>Unspecified</description>
83638 <description>Unspecified</description>
83645 <description>Enables XIP pre-fetch functionality in DWC_ssi.</description>
83653 <description>XIP Receive FIFO Overflow Interrupt Clear Register</description>
83661 <description>Clear XIP Receive FIFO Overflow Interrupt.</description>
83670 …<description>This Register is valid only when both SSIC_XIP_WRITE_REG_EN is set to 1.</description>
83678 <description>XIP Write INCR transfer opcode.</description>
83684 <description>Reserved bits - Read Only</description>
83693 …<description>This Register is valid only when both SSIC_XIP_WRITE_REG_EN is set to 1.</description>
83701 <description>XIP Write WRAP transfer opcode.</description>
83707 <description>Reserved bits - Read Only</description>
83716 … <description>This Register is valid only when SSIC_XIP_WRITE_REG_EN is equal to 1.</description>
83724 <description>SPI Frame Format</description>
83730 <description>Unspecified</description>
83735 <description>Unspecified</description>
83740 <description>Unspecified</description>
83745 <description>Unspecified</description>
83752 <description>Address and instruction transfer format.</description>
83758 <description>Unspecified</description>
83763 <description>Unspecified</description>
83768 <description>Unspecified</description>
83773 <description>Unspecified</description>
83780 <description>This bit defines Length of Address to be transmitted.</description>
83786 <description>Unspecified</description>
83791 <description>Unspecified</description>
83796 <description>Unspecified</description>
83801 <description>Unspecified</description>
83806 <description>Unspecified</description>
83811 <description>Unspecified</description>
83816 <description>Unspecified</description>
83821 <description>Unspecified</description>
83826 <description>Unspecified</description>
83833 <description>Dual/Quad/Octal mode instruction length in bits.</description>
83839 <description>Unspecified</description>
83844 <description>Unspecified</description>
83849 <description>Unspecified</description>
83854 <description>Unspecified</description>
83861 <description>SPI DDR Enable bit.</description>
83867 <description>Instruction DDR Enable bit.</description>
83873 … <description>SPI Hyperbus Frame format enable for XIP Write transfers.</description>
83879 …<description>Enable rxds signaling during address and command phase of Hyperbus transfer.</descrip…
83885 <description>Reserved bits - Read Only</description>
83892 …<description>Wait cycles in Dual/Quad/Octal mode between control frames transmit and data receptio…
83898 <description>Reserved bits - Read Only</description>
83911 <description>BELLBOARD public registers</description>
83929 <description>Description collection: Task TRIGGER[n]</description>
83937 <description>Task TRIGGER[n]</description>
83943 <description>Trigger task</description>
83954 <description>VPR peripheral registers</description>
83971 <description>Description collection: VPR task [n] register</description>
83979 <description>VPR task [n] register</description>
83985 <description>Trigger task</description>
83996 <description>IPCT APB registers 0</description>
84018 …<description>Description collection: Trigger event on IPCT source channel n if there are no active…
84026 …<description>Trigger event on IPCT source channel n if there are no active signals present on that…
84032 <description>Trigger task</description>
84043 …<description>Description collection: Flush IPCT sink channel n. Any pending IPCT signal on that ch…
84045 configuring the SHORTS register accordingly.</description>
84053 <description>Flush IPCT sink channel n. Any pending IPCT signal on that channel will
84055 configuring the SHORTS register accordingly.</description>
84061 <description>Trigger task</description>
84072 … <description>Description collection: Subscribe configuration for task SEND[n]</description>
84080 <description>DPPI channel that task SEND[n] will subscribe to</description>
84091 <description>Disable subscription</description>
84096 <description>Enable subscription</description>
84107 … <description>Description collection: Subscribe configuration for task FLUSH[n]</description>
84115 <description>DPPI channel that task FLUSH[n] will subscribe to</description>
84126 <description>Disable subscription</description>
84131 <description>Enable subscription</description>
84142 <description>Description collection: Event received on IPCT sink channel n</description>
84150 <description>Event received on IPCT sink channel n</description>
84156 <description>Event not generated</description>
84161 <description>Event generated</description>
84172 … <description>Description collection: Event received when hardware handshake of SEND task for IPCT
84174 on that channel.</description>
84182 <description>Event received when hardware handshake of SEND task for IPCT
84184 on that channel.</description>
84190 <description>Event not generated</description>
84195 <description>Event generated</description>
84206 … <description>Description collection: Publish configuration for event RECEIVE[n]</description>
84214 <description>DPPI channel that event RECEIVE[n] will publish to</description>
84225 <description>Disable publishing</description>
84230 <description>Enable publishing</description>
84241 … <description>Description collection: Publish configuration for event READY[n]</description>
84249 <description>DPPI channel that event READY[n] will publish to</description>
84260 <description>Disable publishing</description>
84265 <description>Enable publishing</description>
84274 <description>Shortcuts between local events and tasks</description>
84282 <description>Shortcut between event RECEIVE[0] and task FLUSH[0]</description>
84288 <description>Disable shortcut</description>
84293 <description>Enable shortcut</description>
84300 <description>Shortcut between event RECEIVE[1] and task FLUSH[1]</description>
84306 <description>Disable shortcut</description>
84311 <description>Enable shortcut</description>
84318 <description>Shortcut between event RECEIVE[2] and task FLUSH[2]</description>
84324 <description>Disable shortcut</description>
84329 <description>Enable shortcut</description>
84336 <description>Shortcut between event RECEIVE[3] and task FLUSH[3]</description>
84342 <description>Disable shortcut</description>
84347 <description>Enable shortcut</description>
84354 <description>Shortcut between event RECEIVE[4] and task FLUSH[4]</description>
84360 <description>Disable shortcut</description>
84365 <description>Enable shortcut</description>
84372 <description>Shortcut between event RECEIVE[5] and task FLUSH[5]</description>
84378 <description>Disable shortcut</description>
84383 <description>Enable shortcut</description>
84390 <description>Shortcut between event RECEIVE[6] and task FLUSH[6]</description>
84396 <description>Disable shortcut</description>
84401 <description>Enable shortcut</description>
84408 <description>Shortcut between event RECEIVE[7] and task FLUSH[7]</description>
84414 <description>Disable shortcut</description>
84419 <description>Enable shortcut</description>
84428 <description>Enable or disable interrupt</description>
84436 <description>Enable or disable interrupt for event RECEIVE[0]</description>
84442 <description>Disable</description>
84447 <description>Enable</description>
84454 <description>Enable or disable interrupt for event RECEIVE[1]</description>
84460 <description>Disable</description>
84465 <description>Enable</description>
84472 <description>Enable or disable interrupt for event RECEIVE[2]</description>
84478 <description>Disable</description>
84483 <description>Enable</description>
84490 <description>Enable or disable interrupt for event RECEIVE[3]</description>
84496 <description>Disable</description>
84501 <description>Enable</description>
84508 <description>Enable or disable interrupt for event RECEIVE[4]</description>
84514 <description>Disable</description>
84519 <description>Enable</description>
84526 <description>Enable or disable interrupt for event RECEIVE[5]</description>
84532 <description>Disable</description>
84537 <description>Enable</description>
84544 <description>Enable or disable interrupt for event RECEIVE[6]</description>
84550 <description>Disable</description>
84555 <description>Enable</description>
84562 <description>Enable or disable interrupt for event RECEIVE[7]</description>
84568 <description>Disable</description>
84573 <description>Enable</description>
84580 <description>Enable or disable interrupt for event READY[0]</description>
84586 <description>Disable</description>
84591 <description>Enable</description>
84598 <description>Enable or disable interrupt for event READY[1]</description>
84604 <description>Disable</description>
84609 <description>Enable</description>
84616 <description>Enable or disable interrupt for event READY[2]</description>
84622 <description>Disable</description>
84627 <description>Enable</description>
84634 <description>Enable or disable interrupt for event READY[3]</description>
84640 <description>Disable</description>
84645 <description>Enable</description>
84652 <description>Enable or disable interrupt for event READY[4]</description>
84658 <description>Disable</description>
84663 <description>Enable</description>
84670 <description>Enable or disable interrupt for event READY[5]</description>
84676 <description>Disable</description>
84681 <description>Enable</description>
84688 <description>Enable or disable interrupt for event READY[6]</description>
84694 <description>Disable</description>
84699 <description>Enable</description>
84706 <description>Enable or disable interrupt for event READY[7]</description>
84712 <description>Disable</description>
84717 <description>Enable</description>
84726 <description>Enable interrupt</description>
84734 <description>Write '1' to enable interrupt for event RECEIVE[0]</description>
84741 <description>Read: Disabled</description>
84746 <description>Read: Enabled</description>
84754 <description>Enable</description>
84761 <description>Write '1' to enable interrupt for event RECEIVE[1]</description>
84768 <description>Read: Disabled</description>
84773 <description>Read: Enabled</description>
84781 <description>Enable</description>
84788 <description>Write '1' to enable interrupt for event RECEIVE[2]</description>
84795 <description>Read: Disabled</description>
84800 <description>Read: Enabled</description>
84808 <description>Enable</description>
84815 <description>Write '1' to enable interrupt for event RECEIVE[3]</description>
84822 <description>Read: Disabled</description>
84827 <description>Read: Enabled</description>
84835 <description>Enable</description>
84842 <description>Write '1' to enable interrupt for event RECEIVE[4]</description>
84849 <description>Read: Disabled</description>
84854 <description>Read: Enabled</description>
84862 <description>Enable</description>
84869 <description>Write '1' to enable interrupt for event RECEIVE[5]</description>
84876 <description>Read: Disabled</description>
84881 <description>Read: Enabled</description>
84889 <description>Enable</description>
84896 <description>Write '1' to enable interrupt for event RECEIVE[6]</description>
84903 <description>Read: Disabled</description>
84908 <description>Read: Enabled</description>
84916 <description>Enable</description>
84923 <description>Write '1' to enable interrupt for event RECEIVE[7]</description>
84930 <description>Read: Disabled</description>
84935 <description>Read: Enabled</description>
84943 <description>Enable</description>
84950 <description>Write '1' to enable interrupt for event READY[0]</description>
84957 <description>Read: Disabled</description>
84962 <description>Read: Enabled</description>
84970 <description>Enable</description>
84977 <description>Write '1' to enable interrupt for event READY[1]</description>
84984 <description>Read: Disabled</description>
84989 <description>Read: Enabled</description>
84997 <description>Enable</description>
85004 <description>Write '1' to enable interrupt for event READY[2]</description>
85011 <description>Read: Disabled</description>
85016 <description>Read: Enabled</description>
85024 <description>Enable</description>
85031 <description>Write '1' to enable interrupt for event READY[3]</description>
85038 <description>Read: Disabled</description>
85043 <description>Read: Enabled</description>
85051 <description>Enable</description>
85058 <description>Write '1' to enable interrupt for event READY[4]</description>
85065 <description>Read: Disabled</description>
85070 <description>Read: Enabled</description>
85078 <description>Enable</description>
85085 <description>Write '1' to enable interrupt for event READY[5]</description>
85092 <description>Read: Disabled</description>
85097 <description>Read: Enabled</description>
85105 <description>Enable</description>
85112 <description>Write '1' to enable interrupt for event READY[6]</description>
85119 <description>Read: Disabled</description>
85124 <description>Read: Enabled</description>
85132 <description>Enable</description>
85139 <description>Write '1' to enable interrupt for event READY[7]</description>
85146 <description>Read: Disabled</description>
85151 <description>Read: Enabled</description>
85159 <description>Enable</description>
85168 <description>Disable interrupt</description>
85176 <description>Write '1' to disable interrupt for event RECEIVE[0]</description>
85183 <description>Read: Disabled</description>
85188 <description>Read: Enabled</description>
85196 <description>Disable</description>
85203 <description>Write '1' to disable interrupt for event RECEIVE[1]</description>
85210 <description>Read: Disabled</description>
85215 <description>Read: Enabled</description>
85223 <description>Disable</description>
85230 <description>Write '1' to disable interrupt for event RECEIVE[2]</description>
85237 <description>Read: Disabled</description>
85242 <description>Read: Enabled</description>
85250 <description>Disable</description>
85257 <description>Write '1' to disable interrupt for event RECEIVE[3]</description>
85264 <description>Read: Disabled</description>
85269 <description>Read: Enabled</description>
85277 <description>Disable</description>
85284 <description>Write '1' to disable interrupt for event RECEIVE[4]</description>
85291 <description>Read: Disabled</description>
85296 <description>Read: Enabled</description>
85304 <description>Disable</description>
85311 <description>Write '1' to disable interrupt for event RECEIVE[5]</description>
85318 <description>Read: Disabled</description>
85323 <description>Read: Enabled</description>
85331 <description>Disable</description>
85338 <description>Write '1' to disable interrupt for event RECEIVE[6]</description>
85345 <description>Read: Disabled</description>
85350 <description>Read: Enabled</description>
85358 <description>Disable</description>
85365 <description>Write '1' to disable interrupt for event RECEIVE[7]</description>
85372 <description>Read: Disabled</description>
85377 <description>Read: Enabled</description>
85385 <description>Disable</description>
85392 <description>Write '1' to disable interrupt for event READY[0]</description>
85399 <description>Read: Disabled</description>
85404 <description>Read: Enabled</description>
85412 <description>Disable</description>
85419 <description>Write '1' to disable interrupt for event READY[1]</description>
85426 <description>Read: Disabled</description>
85431 <description>Read: Enabled</description>
85439 <description>Disable</description>
85446 <description>Write '1' to disable interrupt for event READY[2]</description>
85453 <description>Read: Disabled</description>
85458 <description>Read: Enabled</description>
85466 <description>Disable</description>
85473 <description>Write '1' to disable interrupt for event READY[3]</description>
85480 <description>Read: Disabled</description>
85485 <description>Read: Enabled</description>
85493 <description>Disable</description>
85500 <description>Write '1' to disable interrupt for event READY[4]</description>
85507 <description>Read: Disabled</description>
85512 <description>Read: Enabled</description>
85520 <description>Disable</description>
85527 <description>Write '1' to disable interrupt for event READY[5]</description>
85534 <description>Read: Disabled</description>
85539 <description>Read: Enabled</description>
85547 <description>Disable</description>
85554 <description>Write '1' to disable interrupt for event READY[6]</description>
85561 <description>Read: Disabled</description>
85566 <description>Read: Enabled</description>
85574 <description>Disable</description>
85581 <description>Write '1' to disable interrupt for event READY[7]</description>
85588 <description>Read: Disabled</description>
85593 <description>Read: Enabled</description>
85601 <description>Disable</description>
85610 <description>Pending interrupts</description>
85618 <description>Read pending status of interrupt for event RECEIVE[0]</description>
85625 <description>Read: Not pending</description>
85630 <description>Read: Pending</description>
85637 <description>Read pending status of interrupt for event RECEIVE[1]</description>
85644 <description>Read: Not pending</description>
85649 <description>Read: Pending</description>
85656 <description>Read pending status of interrupt for event RECEIVE[2]</description>
85663 <description>Read: Not pending</description>
85668 <description>Read: Pending</description>
85675 <description>Read pending status of interrupt for event RECEIVE[3]</description>
85682 <description>Read: Not pending</description>
85687 <description>Read: Pending</description>
85694 <description>Read pending status of interrupt for event RECEIVE[4]</description>
85701 <description>Read: Not pending</description>
85706 <description>Read: Pending</description>
85713 <description>Read pending status of interrupt for event RECEIVE[5]</description>
85720 <description>Read: Not pending</description>
85725 <description>Read: Pending</description>
85732 <description>Read pending status of interrupt for event RECEIVE[6]</description>
85739 <description>Read: Not pending</description>
85744 <description>Read: Pending</description>
85751 <description>Read pending status of interrupt for event RECEIVE[7]</description>
85758 <description>Read: Not pending</description>
85763 <description>Read: Pending</description>
85770 <description>Read pending status of interrupt for event READY[0]</description>
85777 <description>Read: Not pending</description>
85782 <description>Read: Pending</description>
85789 <description>Read pending status of interrupt for event READY[1]</description>
85796 <description>Read: Not pending</description>
85801 <description>Read: Pending</description>
85808 <description>Read pending status of interrupt for event READY[2]</description>
85815 <description>Read: Not pending</description>
85820 <description>Read: Pending</description>
85827 <description>Read pending status of interrupt for event READY[3]</description>
85834 <description>Read: Not pending</description>
85839 <description>Read: Pending</description>
85846 <description>Read pending status of interrupt for event READY[4]</description>
85853 <description>Read: Not pending</description>
85858 <description>Read: Pending</description>
85865 <description>Read pending status of interrupt for event READY[5]</description>
85872 <description>Read: Not pending</description>
85877 <description>Read: Pending</description>
85884 <description>Read pending status of interrupt for event READY[6]</description>
85891 <description>Read: Not pending</description>
85896 <description>Read: Pending</description>
85903 <description>Read pending status of interrupt for event READY[7]</description>
85910 <description>Read: Not pending</description>
85915 <description>Read: Pending</description>
85924 <description>Unspecified</description>
85930 <description>Overflow status for SEND tasks Write 0 to clear</description>
85938 <description>Overflow status for SEND[0] task</description>
85944 <description>Task overflow has happened</description>
85949 <description>Task overflow has not happened</description>
85956 <description>Overflow status for SEND[1] task</description>
85962 <description>Task overflow has happened</description>
85967 <description>Task overflow has not happened</description>
85974 <description>Overflow status for SEND[2] task</description>
85980 <description>Task overflow has happened</description>
85985 <description>Task overflow has not happened</description>
85992 <description>Overflow status for SEND[3] task</description>
85998 <description>Task overflow has happened</description>
86003 <description>Task overflow has not happened</description>
86010 <description>Overflow status for SEND[4] task</description>
86016 <description>Task overflow has happened</description>
86021 <description>Task overflow has not happened</description>
86028 <description>Overflow status for SEND[5] task</description>
86034 <description>Task overflow has happened</description>
86039 <description>Task overflow has not happened</description>
86046 <description>Overflow status for SEND[6] task</description>
86052 <description>Task overflow has happened</description>
86057 <description>Task overflow has not happened</description>
86064 <description>Overflow status for SEND[7] task</description>
86070 <description>Task overflow has happened</description>
86075 <description>Task overflow has not happened</description>
86087 <description>MUTEX 0</description>
86104 <description>Description collection: Mutex register</description>
86112 <description>Mutex register n</description>
86118 <description>Mutex n is in unlocked state</description>
86123 <description>Mutex n is in locked state</description>
86134 <description>I3C 0</description>
86153 <description>Event indicating that interrupt triggered at I3C core</description>
86161 <description>Event indicating that interrupt triggered at I3C core</description>
86167 <description>Event not generated</description>
86172 <description>Event generated</description>
86181 <description>Event indicating that interrupt triggered at I3C DMA</description>
86189 <description>Event indicating that interrupt triggered at I3C DMA</description>
86195 <description>Event not generated</description>
86200 <description>Event generated</description>
86209 <description>Enable or disable interrupt</description>
86217 <description>Enable or disable interrupt for event CORE</description>
86223 <description>Disable</description>
86228 <description>Enable</description>
86235 <description>Enable or disable interrupt for event DMA</description>
86241 <description>Disable</description>
86246 <description>Enable</description>
86255 <description>Enable interrupt</description>
86263 <description>Write '1' to enable interrupt for event CORE</description>
86270 <description>Read: Disabled</description>
86275 <description>Read: Enabled</description>
86283 <description>Enable</description>
86290 <description>Write '1' to enable interrupt for event DMA</description>
86297 <description>Read: Disabled</description>
86302 <description>Read: Enabled</description>
86310 <description>Enable</description>
86319 <description>Disable interrupt</description>
86327 <description>Write '1' to disable interrupt for event CORE</description>
86334 <description>Read: Disabled</description>
86339 <description>Read: Enabled</description>
86347 <description>Disable</description>
86354 <description>Write '1' to disable interrupt for event DMA</description>
86361 <description>Read: Disabled</description>
86366 <description>Read: Enabled</description>
86374 <description>Disable</description>
86383 <description>Pending interrupts</description>
86391 <description>Read pending status of interrupt for event CORE</description>
86398 <description>Read: Not pending</description>
86403 <description>Read: Pending</description>
86410 <description>Read pending status of interrupt for event DMA</description>
86417 <description>Read: Not pending</description>
86422 <description>Read: Pending</description>
86431 <description>Enable I3C peripheral.</description>
86439 <description>Enable</description>
86445 <description>I3C peripheral disabled.</description>
86450 <description>I3C peripheral enabled.</description>
86459 <description>Unspecified</description>
86465 <description>Start offset of recovered clock</description>
86473 <description>Value</description>
86481 …<description>Maximum cycle ratio between SDA/SCL and CDR (clock and data recovery) clock</descript…
86489 <description>Value</description>
86497 <description>Maximum skew between SCL and SCL in CDR clock cycles</description>
86505 <description>Value</description>
86514 <description>I3C slave interface 0</description>
86522 <description>I2C or I3C mode select signal</description>
86528 <description>Unspecified</description>
86533 <description>Unspecified</description>
86540 <description>Slave activity mode for GETSTATUS CCC</description>
86546 <description>Pending interrupt information for GETSTATUS CCC</description>
86552 <description>Slave static address valid</description>
86558 <description>Unspecified</description>
86563 <description>Unspecified</description>
86570 <description>Slave static address</description>
86576 <description>Slave maximum read data rate</description>
86582 <description>Slave maximum write write rate</description>
86588 <description>Slave maximum clock data turnaround time</description>
86594 <description>Device Characteristic Register value</description>
86602 <description>I3C slave interface 1</description>
86610 <description>Slave wakeup signal</description>
86617 <description>Unspecified</description>
86622 <description>Unspecified</description>
86631 <description>Slave Device Provisioned ID 0</description>
86639 <description>Additional Meaning</description>
86645 <description>Instance ID</description>
86651 <description>Part ID</description>
86659 <description>Slave Device Provisioned ID 1</description>
86667 <description>Provisional ID Type Selector</description>
86673 <description>MIPI Manufacturer ID</description>
86681 …<description>Enable or disable the SDA high-keeper used for Master-to-Slave and Slave-to-Master bu…
86689 <description>Enable or disable the SDA high-keeper</description>
86695 <description>High-keeper disabled.</description>
86700 <description>High-keeper enabled.</description>
86709 …<description>Enable or disable the SCL high-keeper used for Master-to-Slave and Slave-to-Master bu…
86717 <description>Enable or disable the SCL high-keeper</description>
86723 <description>High-keeper disabled.</description>
86728 <description>High-keeper enabled.</description>
86739 <description>VPR peripheral registers 0</description>
86760 <description>Description collection: VPR task [n] register</description>
86768 <description>VPR task [n] register</description>
86774 <description>Trigger task</description>
86785 …<description>Description collection: Subscribe configuration for task TASKS_TRIGGER[n]</descriptio…
86793 <description>Subscription enable bit</description>
86799 <description>Disable subscription</description>
86804 <description>Enable subscription</description>
86815 <description>Description collection: VPR event [n] register</description>
86823 <description>VPR event [n] register</description>
86829 <description>Event not generated</description>
86834 <description>Event generated</description>
86845 …<description>Description collection: Publish configuration for event EVENTS_TRIGGERED[n]</descript…
86853 <description>Publication enable bit</description>
86859 <description>Disable publishing</description>
86864 <description>Enable publishing</description>
86873 <description>Enable or disable interrupt</description>
86881 <description>Enable or disable interrupt for event TRIGGERED[0]</description>
86887 <description>Disable</description>
86892 <description>Enable</description>
86899 <description>Enable or disable interrupt for event TRIGGERED[1]</description>
86905 <description>Disable</description>
86910 <description>Enable</description>
86917 <description>Enable or disable interrupt for event TRIGGERED[2]</description>
86923 <description>Disable</description>
86928 <description>Enable</description>
86935 <description>Enable or disable interrupt for event TRIGGERED[3]</description>
86941 <description>Disable</description>
86946 <description>Enable</description>
86953 <description>Enable or disable interrupt for event TRIGGERED[4]</description>
86959 <description>Disable</description>
86964 <description>Enable</description>
86971 <description>Enable or disable interrupt for event TRIGGERED[5]</description>
86977 <description>Disable</description>
86982 <description>Enable</description>
86989 <description>Enable or disable interrupt for event TRIGGERED[6]</description>
86995 <description>Disable</description>
87000 <description>Enable</description>
87007 <description>Enable or disable interrupt for event TRIGGERED[7]</description>
87013 <description>Disable</description>
87018 <description>Enable</description>
87025 <description>Enable or disable interrupt for event TRIGGERED[8]</description>
87031 <description>Disable</description>
87036 <description>Enable</description>
87043 <description>Enable or disable interrupt for event TRIGGERED[9]</description>
87049 <description>Disable</description>
87054 <description>Enable</description>
87061 <description>Enable or disable interrupt for event TRIGGERED[10]</description>
87067 <description>Disable</description>
87072 <description>Enable</description>
87079 <description>Enable or disable interrupt for event TRIGGERED[11]</description>
87085 <description>Disable</description>
87090 <description>Enable</description>
87097 <description>Enable or disable interrupt for event TRIGGERED[12]</description>
87103 <description>Disable</description>
87108 <description>Enable</description>
87115 <description>Enable or disable interrupt for event TRIGGERED[13]</description>
87121 <description>Disable</description>
87126 <description>Enable</description>
87133 <description>Enable or disable interrupt for event TRIGGERED[14]</description>
87139 <description>Disable</description>
87144 <description>Enable</description>
87151 <description>Enable or disable interrupt for event TRIGGERED[15]</description>
87157 <description>Disable</description>
87162 <description>Enable</description>
87169 <description>Enable or disable interrupt for event TRIGGERED[16]</description>
87175 <description>Disable</description>
87180 <description>Enable</description>
87187 <description>Enable or disable interrupt for event TRIGGERED[17]</description>
87193 <description>Disable</description>
87198 <description>Enable</description>
87205 <description>Enable or disable interrupt for event TRIGGERED[18]</description>
87211 <description>Disable</description>
87216 <description>Enable</description>
87223 <description>Enable or disable interrupt for event TRIGGERED[19]</description>
87229 <description>Disable</description>
87234 <description>Enable</description>
87241 <description>Enable or disable interrupt for event TRIGGERED[20]</description>
87247 <description>Disable</description>
87252 <description>Enable</description>
87259 <description>Enable or disable interrupt for event TRIGGERED[21]</description>
87265 <description>Disable</description>
87270 <description>Enable</description>
87277 <description>Enable or disable interrupt for event TRIGGERED[22]</description>
87283 <description>Disable</description>
87288 <description>Enable</description>
87295 <description>Enable or disable interrupt for event TRIGGERED[23]</description>
87301 <description>Disable</description>
87306 <description>Enable</description>
87313 <description>Enable or disable interrupt for event TRIGGERED[24]</description>
87319 <description>Disable</description>
87324 <description>Enable</description>
87331 <description>Enable or disable interrupt for event TRIGGERED[25]</description>
87337 <description>Disable</description>
87342 <description>Enable</description>
87349 <description>Enable or disable interrupt for event TRIGGERED[26]</description>
87355 <description>Disable</description>
87360 <description>Enable</description>
87367 <description>Enable or disable interrupt for event TRIGGERED[27]</description>
87373 <description>Disable</description>
87378 <description>Enable</description>
87385 <description>Enable or disable interrupt for event TRIGGERED[28]</description>
87391 <description>Disable</description>
87396 <description>Enable</description>
87403 <description>Enable or disable interrupt for event TRIGGERED[29]</description>
87409 <description>Disable</description>
87414 <description>Enable</description>
87421 <description>Enable or disable interrupt for event TRIGGERED[30]</description>
87427 <description>Disable</description>
87432 <description>Enable</description>
87439 <description>Enable or disable interrupt for event TRIGGERED[31]</description>
87445 <description>Disable</description>
87450 <description>Enable</description>
87459 <description>Enable interrupt</description>
87467 <description>Write '1' to enable interrupt for event TRIGGERED[0]</description>
87474 <description>Read: Disabled</description>
87479 <description>Read: Enabled</description>
87487 <description>Enable</description>
87494 <description>Write '1' to enable interrupt for event TRIGGERED[1]</description>
87501 <description>Read: Disabled</description>
87506 <description>Read: Enabled</description>
87514 <description>Enable</description>
87521 <description>Write '1' to enable interrupt for event TRIGGERED[2]</description>
87528 <description>Read: Disabled</description>
87533 <description>Read: Enabled</description>
87541 <description>Enable</description>
87548 <description>Write '1' to enable interrupt for event TRIGGERED[3]</description>
87555 <description>Read: Disabled</description>
87560 <description>Read: Enabled</description>
87568 <description>Enable</description>
87575 <description>Write '1' to enable interrupt for event TRIGGERED[4]</description>
87582 <description>Read: Disabled</description>
87587 <description>Read: Enabled</description>
87595 <description>Enable</description>
87602 <description>Write '1' to enable interrupt for event TRIGGERED[5]</description>
87609 <description>Read: Disabled</description>
87614 <description>Read: Enabled</description>
87622 <description>Enable</description>
87629 <description>Write '1' to enable interrupt for event TRIGGERED[6]</description>
87636 <description>Read: Disabled</description>
87641 <description>Read: Enabled</description>
87649 <description>Enable</description>
87656 <description>Write '1' to enable interrupt for event TRIGGERED[7]</description>
87663 <description>Read: Disabled</description>
87668 <description>Read: Enabled</description>
87676 <description>Enable</description>
87683 <description>Write '1' to enable interrupt for event TRIGGERED[8]</description>
87690 <description>Read: Disabled</description>
87695 <description>Read: Enabled</description>
87703 <description>Enable</description>
87710 <description>Write '1' to enable interrupt for event TRIGGERED[9]</description>
87717 <description>Read: Disabled</description>
87722 <description>Read: Enabled</description>
87730 <description>Enable</description>
87737 <description>Write '1' to enable interrupt for event TRIGGERED[10]</description>
87744 <description>Read: Disabled</description>
87749 <description>Read: Enabled</description>
87757 <description>Enable</description>
87764 <description>Write '1' to enable interrupt for event TRIGGERED[11]</description>
87771 <description>Read: Disabled</description>
87776 <description>Read: Enabled</description>
87784 <description>Enable</description>
87791 <description>Write '1' to enable interrupt for event TRIGGERED[12]</description>
87798 <description>Read: Disabled</description>
87803 <description>Read: Enabled</description>
87811 <description>Enable</description>
87818 <description>Write '1' to enable interrupt for event TRIGGERED[13]</description>
87825 <description>Read: Disabled</description>
87830 <description>Read: Enabled</description>
87838 <description>Enable</description>
87845 <description>Write '1' to enable interrupt for event TRIGGERED[14]</description>
87852 <description>Read: Disabled</description>
87857 <description>Read: Enabled</description>
87865 <description>Enable</description>
87872 <description>Write '1' to enable interrupt for event TRIGGERED[15]</description>
87879 <description>Read: Disabled</description>
87884 <description>Read: Enabled</description>
87892 <description>Enable</description>
87899 <description>Write '1' to enable interrupt for event TRIGGERED[16]</description>
87906 <description>Read: Disabled</description>
87911 <description>Read: Enabled</description>
87919 <description>Enable</description>
87926 <description>Write '1' to enable interrupt for event TRIGGERED[17]</description>
87933 <description>Read: Disabled</description>
87938 <description>Read: Enabled</description>
87946 <description>Enable</description>
87953 <description>Write '1' to enable interrupt for event TRIGGERED[18]</description>
87960 <description>Read: Disabled</description>
87965 <description>Read: Enabled</description>
87973 <description>Enable</description>
87980 <description>Write '1' to enable interrupt for event TRIGGERED[19]</description>
87987 <description>Read: Disabled</description>
87992 <description>Read: Enabled</description>
88000 <description>Enable</description>
88007 <description>Write '1' to enable interrupt for event TRIGGERED[20]</description>
88014 <description>Read: Disabled</description>
88019 <description>Read: Enabled</description>
88027 <description>Enable</description>
88034 <description>Write '1' to enable interrupt for event TRIGGERED[21]</description>
88041 <description>Read: Disabled</description>
88046 <description>Read: Enabled</description>
88054 <description>Enable</description>
88061 <description>Write '1' to enable interrupt for event TRIGGERED[22]</description>
88068 <description>Read: Disabled</description>
88073 <description>Read: Enabled</description>
88081 <description>Enable</description>
88088 <description>Write '1' to enable interrupt for event TRIGGERED[23]</description>
88095 <description>Read: Disabled</description>
88100 <description>Read: Enabled</description>
88108 <description>Enable</description>
88115 <description>Write '1' to enable interrupt for event TRIGGERED[24]</description>
88122 <description>Read: Disabled</description>
88127 <description>Read: Enabled</description>
88135 <description>Enable</description>
88142 <description>Write '1' to enable interrupt for event TRIGGERED[25]</description>
88149 <description>Read: Disabled</description>
88154 <description>Read: Enabled</description>
88162 <description>Enable</description>
88169 <description>Write '1' to enable interrupt for event TRIGGERED[26]</description>
88176 <description>Read: Disabled</description>
88181 <description>Read: Enabled</description>
88189 <description>Enable</description>
88196 <description>Write '1' to enable interrupt for event TRIGGERED[27]</description>
88203 <description>Read: Disabled</description>
88208 <description>Read: Enabled</description>
88216 <description>Enable</description>
88223 <description>Write '1' to enable interrupt for event TRIGGERED[28]</description>
88230 <description>Read: Disabled</description>
88235 <description>Read: Enabled</description>
88243 <description>Enable</description>
88250 <description>Write '1' to enable interrupt for event TRIGGERED[29]</description>
88257 <description>Read: Disabled</description>
88262 <description>Read: Enabled</description>
88270 <description>Enable</description>
88277 <description>Write '1' to enable interrupt for event TRIGGERED[30]</description>
88284 <description>Read: Disabled</description>
88289 <description>Read: Enabled</description>
88297 <description>Enable</description>
88304 <description>Write '1' to enable interrupt for event TRIGGERED[31]</description>
88311 <description>Read: Disabled</description>
88316 <description>Read: Enabled</description>
88324 <description>Enable</description>
88333 <description>Disable interrupt</description>
88341 <description>Write '1' to disable interrupt for event TRIGGERED[0]</description>
88348 <description>Read: Disabled</description>
88353 <description>Read: Enabled</description>
88361 <description>Disable</description>
88368 <description>Write '1' to disable interrupt for event TRIGGERED[1]</description>
88375 <description>Read: Disabled</description>
88380 <description>Read: Enabled</description>
88388 <description>Disable</description>
88395 <description>Write '1' to disable interrupt for event TRIGGERED[2]</description>
88402 <description>Read: Disabled</description>
88407 <description>Read: Enabled</description>
88415 <description>Disable</description>
88422 <description>Write '1' to disable interrupt for event TRIGGERED[3]</description>
88429 <description>Read: Disabled</description>
88434 <description>Read: Enabled</description>
88442 <description>Disable</description>
88449 <description>Write '1' to disable interrupt for event TRIGGERED[4]</description>
88456 <description>Read: Disabled</description>
88461 <description>Read: Enabled</description>
88469 <description>Disable</description>
88476 <description>Write '1' to disable interrupt for event TRIGGERED[5]</description>
88483 <description>Read: Disabled</description>
88488 <description>Read: Enabled</description>
88496 <description>Disable</description>
88503 <description>Write '1' to disable interrupt for event TRIGGERED[6]</description>
88510 <description>Read: Disabled</description>
88515 <description>Read: Enabled</description>
88523 <description>Disable</description>
88530 <description>Write '1' to disable interrupt for event TRIGGERED[7]</description>
88537 <description>Read: Disabled</description>
88542 <description>Read: Enabled</description>
88550 <description>Disable</description>
88557 <description>Write '1' to disable interrupt for event TRIGGERED[8]</description>
88564 <description>Read: Disabled</description>
88569 <description>Read: Enabled</description>
88577 <description>Disable</description>
88584 <description>Write '1' to disable interrupt for event TRIGGERED[9]</description>
88591 <description>Read: Disabled</description>
88596 <description>Read: Enabled</description>
88604 <description>Disable</description>
88611 <description>Write '1' to disable interrupt for event TRIGGERED[10]</description>
88618 <description>Read: Disabled</description>
88623 <description>Read: Enabled</description>
88631 <description>Disable</description>
88638 <description>Write '1' to disable interrupt for event TRIGGERED[11]</description>
88645 <description>Read: Disabled</description>
88650 <description>Read: Enabled</description>
88658 <description>Disable</description>
88665 <description>Write '1' to disable interrupt for event TRIGGERED[12]</description>
88672 <description>Read: Disabled</description>
88677 <description>Read: Enabled</description>
88685 <description>Disable</description>
88692 <description>Write '1' to disable interrupt for event TRIGGERED[13]</description>
88699 <description>Read: Disabled</description>
88704 <description>Read: Enabled</description>
88712 <description>Disable</description>
88719 <description>Write '1' to disable interrupt for event TRIGGERED[14]</description>
88726 <description>Read: Disabled</description>
88731 <description>Read: Enabled</description>
88739 <description>Disable</description>
88746 <description>Write '1' to disable interrupt for event TRIGGERED[15]</description>
88753 <description>Read: Disabled</description>
88758 <description>Read: Enabled</description>
88766 <description>Disable</description>
88773 <description>Write '1' to disable interrupt for event TRIGGERED[16]</description>
88780 <description>Read: Disabled</description>
88785 <description>Read: Enabled</description>
88793 <description>Disable</description>
88800 <description>Write '1' to disable interrupt for event TRIGGERED[17]</description>
88807 <description>Read: Disabled</description>
88812 <description>Read: Enabled</description>
88820 <description>Disable</description>
88827 <description>Write '1' to disable interrupt for event TRIGGERED[18]</description>
88834 <description>Read: Disabled</description>
88839 <description>Read: Enabled</description>
88847 <description>Disable</description>
88854 <description>Write '1' to disable interrupt for event TRIGGERED[19]</description>
88861 <description>Read: Disabled</description>
88866 <description>Read: Enabled</description>
88874 <description>Disable</description>
88881 <description>Write '1' to disable interrupt for event TRIGGERED[20]</description>
88888 <description>Read: Disabled</description>
88893 <description>Read: Enabled</description>
88901 <description>Disable</description>
88908 <description>Write '1' to disable interrupt for event TRIGGERED[21]</description>
88915 <description>Read: Disabled</description>
88920 <description>Read: Enabled</description>
88928 <description>Disable</description>
88935 <description>Write '1' to disable interrupt for event TRIGGERED[22]</description>
88942 <description>Read: Disabled</description>
88947 <description>Read: Enabled</description>
88955 <description>Disable</description>
88962 <description>Write '1' to disable interrupt for event TRIGGERED[23]</description>
88969 <description>Read: Disabled</description>
88974 <description>Read: Enabled</description>
88982 <description>Disable</description>
88989 <description>Write '1' to disable interrupt for event TRIGGERED[24]</description>
88996 <description>Read: Disabled</description>
89001 <description>Read: Enabled</description>
89009 <description>Disable</description>
89016 <description>Write '1' to disable interrupt for event TRIGGERED[25]</description>
89023 <description>Read: Disabled</description>
89028 <description>Read: Enabled</description>
89036 <description>Disable</description>
89043 <description>Write '1' to disable interrupt for event TRIGGERED[26]</description>
89050 <description>Read: Disabled</description>
89055 <description>Read: Enabled</description>
89063 <description>Disable</description>
89070 <description>Write '1' to disable interrupt for event TRIGGERED[27]</description>
89077 <description>Read: Disabled</description>
89082 <description>Read: Enabled</description>
89090 <description>Disable</description>
89097 <description>Write '1' to disable interrupt for event TRIGGERED[28]</description>
89104 <description>Read: Disabled</description>
89109 <description>Read: Enabled</description>
89117 <description>Disable</description>
89124 <description>Write '1' to disable interrupt for event TRIGGERED[29]</description>
89131 <description>Read: Disabled</description>
89136 <description>Read: Enabled</description>
89144 <description>Disable</description>
89151 <description>Write '1' to disable interrupt for event TRIGGERED[30]</description>
89158 <description>Read: Disabled</description>
89163 <description>Read: Enabled</description>
89171 <description>Disable</description>
89178 <description>Write '1' to disable interrupt for event TRIGGERED[31]</description>
89185 <description>Read: Disabled</description>
89190 <description>Read: Enabled</description>
89198 <description>Disable</description>
89207 <description>Pending interrupts</description>
89215 <description>Read pending status of interrupt for event TRIGGERED[0]</description>
89222 <description>Read: Not pending</description>
89227 <description>Read: Pending</description>
89234 <description>Read pending status of interrupt for event TRIGGERED[1]</description>
89241 <description>Read: Not pending</description>
89246 <description>Read: Pending</description>
89253 <description>Read pending status of interrupt for event TRIGGERED[2]</description>
89260 <description>Read: Not pending</description>
89265 <description>Read: Pending</description>
89272 <description>Read pending status of interrupt for event TRIGGERED[3]</description>
89279 <description>Read: Not pending</description>
89284 <description>Read: Pending</description>
89291 <description>Read pending status of interrupt for event TRIGGERED[4]</description>
89298 <description>Read: Not pending</description>
89303 <description>Read: Pending</description>
89310 <description>Read pending status of interrupt for event TRIGGERED[5]</description>
89317 <description>Read: Not pending</description>
89322 <description>Read: Pending</description>
89329 <description>Read pending status of interrupt for event TRIGGERED[6]</description>
89336 <description>Read: Not pending</description>
89341 <description>Read: Pending</description>
89348 <description>Read pending status of interrupt for event TRIGGERED[7]</description>
89355 <description>Read: Not pending</description>
89360 <description>Read: Pending</description>
89367 <description>Read pending status of interrupt for event TRIGGERED[8]</description>
89374 <description>Read: Not pending</description>
89379 <description>Read: Pending</description>
89386 <description>Read pending status of interrupt for event TRIGGERED[9]</description>
89393 <description>Read: Not pending</description>
89398 <description>Read: Pending</description>
89405 <description>Read pending status of interrupt for event TRIGGERED[10]</description>
89412 <description>Read: Not pending</description>
89417 <description>Read: Pending</description>
89424 <description>Read pending status of interrupt for event TRIGGERED[11]</description>
89431 <description>Read: Not pending</description>
89436 <description>Read: Pending</description>
89443 <description>Read pending status of interrupt for event TRIGGERED[12]</description>
89450 <description>Read: Not pending</description>
89455 <description>Read: Pending</description>
89462 <description>Read pending status of interrupt for event TRIGGERED[13]</description>
89469 <description>Read: Not pending</description>
89474 <description>Read: Pending</description>
89481 <description>Read pending status of interrupt for event TRIGGERED[14]</description>
89488 <description>Read: Not pending</description>
89493 <description>Read: Pending</description>
89500 <description>Read pending status of interrupt for event TRIGGERED[15]</description>
89507 <description>Read: Not pending</description>
89512 <description>Read: Pending</description>
89519 <description>Read pending status of interrupt for event TRIGGERED[16]</description>
89526 <description>Read: Not pending</description>
89531 <description>Read: Pending</description>
89538 <description>Read pending status of interrupt for event TRIGGERED[17]</description>
89545 <description>Read: Not pending</description>
89550 <description>Read: Pending</description>
89557 <description>Read pending status of interrupt for event TRIGGERED[18]</description>
89564 <description>Read: Not pending</description>
89569 <description>Read: Pending</description>
89576 <description>Read pending status of interrupt for event TRIGGERED[19]</description>
89583 <description>Read: Not pending</description>
89588 <description>Read: Pending</description>
89595 <description>Read pending status of interrupt for event TRIGGERED[20]</description>
89602 <description>Read: Not pending</description>
89607 <description>Read: Pending</description>
89614 <description>Read pending status of interrupt for event TRIGGERED[21]</description>
89621 <description>Read: Not pending</description>
89626 <description>Read: Pending</description>
89633 <description>Read pending status of interrupt for event TRIGGERED[22]</description>
89640 <description>Read: Not pending</description>
89645 <description>Read: Pending</description>
89652 <description>Read pending status of interrupt for event TRIGGERED[23]</description>
89659 <description>Read: Not pending</description>
89664 <description>Read: Pending</description>
89671 <description>Read pending status of interrupt for event TRIGGERED[24]</description>
89678 <description>Read: Not pending</description>
89683 <description>Read: Pending</description>
89690 <description>Read pending status of interrupt for event TRIGGERED[25]</description>
89697 <description>Read: Not pending</description>
89702 <description>Read: Pending</description>
89709 <description>Read pending status of interrupt for event TRIGGERED[26]</description>
89716 <description>Read: Not pending</description>
89721 <description>Read: Pending</description>
89728 <description>Read pending status of interrupt for event TRIGGERED[27]</description>
89735 <description>Read: Not pending</description>
89740 <description>Read: Pending</description>
89747 <description>Read pending status of interrupt for event TRIGGERED[28]</description>
89754 <description>Read: Not pending</description>
89759 <description>Read: Pending</description>
89766 <description>Read pending status of interrupt for event TRIGGERED[29]</description>
89773 <description>Read: Not pending</description>
89778 <description>Read: Pending</description>
89785 <description>Read pending status of interrupt for event TRIGGERED[30]</description>
89792 <description>Read: Not pending</description>
89797 <description>Read: Pending</description>
89804 <description>Read pending status of interrupt for event TRIGGERED[31]</description>
89811 <description>Read: Not pending</description>
89816 <description>Read: Pending</description>
89825 <description>Unspecified</description>
89831 <description>Abstract Data 0. Read/write data for argument 0</description>
89839 <description>Abstract Data 0</description>
89847 <description>Abstract Data 1. Read/write data for argument 1</description>
89855 <description>Abstract Data 1</description>
89863 <description>Debug Module Control</description>
89871 <description>Reset signal for the debug module.</description>
89877 <description>Reset the debug module itself</description>
89882 <description>Normal operation</description>
89889 <description>Reset signal output from the debug module to the system.</description>
89895 <description>Reset inactive</description>
89900 <description>Reset active</description>
89907 <description>Clear the halt on reset request.</description>
89914 <description>No operation when written 0.</description>
89919 <description>Clears the halt on reset request</description>
89926 <description>Set the halt on reset request.</description>
89933 <description>No operation when written 0.</description>
89938 <description>Sets the halt on reset request</description>
89945 <description>The high 10 bits of hartsel.</description>
89952 <description>The low 10 bits of hartsel.</description>
89959 <description>Definition of currently selected harts.</description>
89966 <description>Single hart selected.</description>
89971 <description>Multiple harts selected</description>
89978 <description>Clear the havereset.</description>
89985 <description>No operation when written 0.</description>
89990 <description>Clears the havereset for selected harts.</description>
89997 <description>Reset harts.</description>
90003 <description>Reset de-asserted.</description>
90008 <description>Reset asserted.</description>
90015 <description>Resume currently selected harts.</description>
90022 <description>No operation when written 0.</description>
90027 <description>Currently selected harts resumed.</description>
90034 <description>Halt currently selected harts.</description>
90041 … <description>Clears halt request bit for all currently selected harts.</description>
90046 <description>Currently selected harts halted.</description>
90055 <description>Debug Module Status</description>
90063 <description>Version of the debug module.</description>
90069 <description>Debug module not present.</description>
90074 …<description>There is a Debug Module and it conforms to version 0.11 of this specifcation.</descri…
90079 …<description>There is a Debug Module and it conforms to version 0.13 of this specifcation.</descri…
90084 …<description>There is a Debug Module but it does not conform to any available version of the spec.…
90091 <description>Configuration string.</description>
90097 …<description>The confstrptr0..confstrptr3 holds information which is not relevant to the configura…
90102 …<description>The confstrptr0..confstrptr3 holds the address of the configuration string.</descript…
90109 <description>Halt-on-reset support status.</description>
90115 <description>Halt-on-reset is supported.</description>
90120 <description>Halt-on-reset is not supported.</description>
90127 <description>Authentication busy status.</description>
90133 <description>The authentication module is ready.</description>
90138 <description>The authentication module is busy.</description>
90145 <description>Authentication status.</description>
90151 … <description>Authentication required before using the debug module.</description>
90156 <description>Authentication passed.</description>
90163 <description>Any currently selected harts halted status.</description>
90169 <description>None of the currently selected harts halted.</description>
90174 <description>Any of the currently selected harts halted.</description>
90181 <description>All currently selected harts halted status.</description>
90187 <description>Not all of the currently selected harts halted.</description>
90192 <description>All of the currently selected harts halted.</description>
90199 <description>Any currently selected harts running status.</description>
90205 <description>None of the currently selected harts running.</description>
90210 <description>Any of the currently selected harts running.</description>
90217 <description>All currently selected harts running status.</description>
90223 <description>Not all of the currently selected harts running.</description>
90228 <description>All of the currently selected harts running.</description>
90235 <description>Any currently selected harts unavailable status.</description>
90241 <description>None of the currently selected harts unavailable.</description>
90246 <description>Any of the currently selected harts unavailable.</description>
90253 <description>All currently selected harts unavailable status.</description>
90259 <description>Not all of the currently selected harts unavailable.</description>
90264 <description>All of the currently selected harts unavailable.</description>
90271 <description>Any currently selected harts nonexistent status.</description>
90277 <description>None of the currently selected harts nonexistent.</description>
90282 <description>Any of the currently selected harts nonexistent.</description>
90289 <description>All currently selected harts nonexistent status.</description>
90295 <description>Not all of the currently selected harts nonexistent.</description>
90300 <description>All of the currently selected harts nonexistent.</description>
90307 … <description>Any currently selected harts acknowledged last resume request.</description>
90313 … <description>None of the currently selected harts acknowledged last resume request.</description>
90318 … <description>Any of the currently selected harts acknowledged last resume request.</description>
90325 <description>All currently selected harts acknowledged last resume</description>
90331 …<description>Not all of the currently selected harts acknowledged last resume request.</descriptio…
90336 … <description>All of the currently selected harts acknowledged last resume request.</description>
90343 …<description>Any currently selected harts have been reset and reset is not acknowledged.</descript…
90349 …<description>None of the currently selected harts have been reset and reset is not acknowledget.</…
90354 …<description>Any of the currently selected harts have been reset and reset is not acknowledge.</de…
90361 …<description>All currently selected harts have been reset and reset is not acknowledge</descriptio…
90367 …<description>Not all of the currently selected harts have been reset and reset is not acknowledge.…
90372 …<description>All of the currently selected harts have been reset and reset is not acknowledge.</de…
90379 …<description>Implicit ebreak instruction at the non-existent word immediately after the Program Bu…
90385 <description>No implicit ebreak instruction.</description>
90390 <description>Implicit ebreak instruction.</description>
90399 <description>Hart Information</description>
90407 <description>Data Address</description>
90414 <description>Data Size</description>
90421 <description>Data Access</description>
90428 <description>The data registers are shadowed in the hart
90430 corresponds to a single argument.</description>
90435 <description>The data registers are shadowed in the hart's
90437 the memory map.</description>
90444 <description>Number of dscratch registers</description>
90453 <description>Halt Summary 1</description>
90461 <description>Halt Summary 1</description>
90470 <description>Hart Array Window Select</description>
90478 …<description>The high bits of this field may be tied to 0, depending on how large the array mask r…
90479 … E.g. on a system with 48 harts only bit 0 of this field may actually be writable.</description>
90488 <description>Hart Array Window</description>
90496 <description>Mask data.</description>
90504 <description>Abstract Control and Status</description>
90512 …<description>Number of data registers that are implemented as part of the abstract command interfa…
90519 <description>Command error when the abstract command fails.</description>
90525 <description>No error.</description>
90530 <description>An abstract command was executing while command,
90532 or written. This status is only written if cmderr contains 0</description>
90537 <description>The requested command is notsupported,
90538 regardless of whether the hart is running or not.</description>
90543 <description>An exception occurred while executing the
90544 command (e.g. while executing theProgram Buffer).</description>
90549 <description>The abstract command couldn't execute
90550 … because the hart wasn't in the required state (running/halted). or unavailable.</description>
90555 <description>The abstract command failed due to abus
90556 error (e.g. alignment, access size, or timeout).</description>
90561 <description>The command failed for another reason.</description>
90568 <description>Abstract command execution status.</description>
90575 <description>Not busy.</description>
90580 <description>An abstract command is currently being executed.
90581 …t as soon as command is written, and is not cleared until that command has completed.</description>
90588 … <description>Size of the Program Buffer, in 32-bit words. Valid sizes are 0 - 1.</description>
90597 <description>Abstract command</description>
90605 …<description>This Field is interpreted in a command specific manner, described for each abstract c…
90611 … <description>The type determines the overall functionality of this abstract command.</description>
90617 <description>Register Access Command</description>
90622 <description>Quick Access Command</description>
90627 <description>Memory Access Command</description>
90636 <description>Abstract Command Autoexec</description>
90644 …<description>When a bit in this field is 1, read or write accesses to the corresponding data word …
90645 command in command to be executed again.</description>
90652 …<description>When a bit in this field is 1, read or write accesses to the corresponding progbuf wo…
90653 the command in command to be executed again.</description>
90664 <description>Description collection: Configuration String Pointer [n]</description>
90672 <description>Address</description>
90681 <description>Next Debug Module</description>
90689 <description>Address</description>
90700 <description>Description collection: Program Buffer [n]</description>
90708 <description>Data</description>
90717 <description>Authentication Data</description>
90725 <description>Data</description>
90734 <description>Halt Summary 2</description>
90742 <description>Halt Summary 2</description>
90751 <description>Halt Summary 3</description>
90759 <description>Halt Summary 3</description>
90768 <description>System Bus Addres 127:96</description>
90776 <description>Accesses bits 127:96 of the physical address in
90778 wide).</description>
90787 <description>System Bus Access Control and Status</description>
90801 <description>8-bit system bus accesses are supported.</description>
90814 <description>16-bit system bus accesses are supported.</description>
90827 <description>32-bit system bus accesses are supported.</description>
90840 <description>64-bit system bus accesses are supported.</description>
90853 <description>128-bit system bus accesses are supported.</description>
90860 …<description>Width of system bus addresses in bits. (0 indicates there is no bus access support.)<…
90873 <description>There was no bus error.</description>
90878 <description>There was a timeout.</description>
90883 <description>A bad address was accessed.</description>
90888 <description>There was an alignment error.</description>
90893 <description>An access of unsupported size was requested.</description>
90898 <description>Other.</description>
90911 <description>Every read from sbdata0 automatically
90912 triggers a system bus read at the (possibly autoincremented) address.</description>
90925 <description>sbaddress is incremented by the access
90926 size (in bytes) selected in sbaccess after every system bus access.</description>
90939 <description>8-bit.</description>
90944 <description>16-bit.</description>
90949 <description>32-bit.</description>
90954 <description>64-bit.</description>
90959 <description>128-bit.</description>
90972 <description>Every write to sbaddress0 automatically
90973 triggers a system bus read at the new address.</description>
90986 <description>System bus master is not busy.</description>
90991 <description>System bus master is busy.</description>
91004 <description>No error.</description>
91009 <description>Debugger access attempted while one in progress.</description>
91022 <description>The System Bus interface conforms to mainline
91023 … drafts of thia RISC-V External Debug Support spec older than 1 January, 2018.</description>
91028 …<description>The System Bus interface conforms to RISC-V External Debug Support version 0.14.0-DRA…
91029 Other values are reserved for future versions.</description>
91038 <description>System Bus Addres 31:0</description>
91046 <description>Accesses bits 31:0 of the physical address in
91047 sbaddress.</description>
91056 <description>System Bus Addres 63:32</description>
91064 <description>Accesses bits 63:32 of the physical address in
91066 wide).</description>
91075 <description>System Bus Addres 95:64</description>
91083 <description>Accesses bits 95:64 of the physical address in
91085 wide).</description>
91094 <description>System Bus Data 31:0</description>
91102 <description>Accesses bits 31:0 of sbdata</description>
91111 <description>System Bus Data 63:32</description>
91119 <description>Accesses bits 63:32 of sbdata (if the system bus
91120 is that wide).</description>
91129 <description>System Bus Data 95:64</description>
91137 <description>Accesses bits 95:64 of sbdata (if the system bus
91138 is that wide).</description>
91147 <description>System Bus Data 127:96</description>
91155 <description>Accesses bits 127:96 of sbdata (if the system bus
91156 is that wide).</description>
91165 <description>Halt summary 0</description>
91173 <description>Halt summary 0</description>
91183 <description>State of the CPU after a core reset</description>
91191 <description>Controls CPU running state after a core reset.</description>
91197 …<description>CPU stopped. If this is the CPU state after a core reset, setting this bit will chang…
91202 …description>CPU running. If this is the CPU state after a core reset, clearing this bit will chang…
91211 <description>Initial value of the PC at CPU start.</description>
91219 <description>Initial value of the PC at CPU start.</description>
91229 <description>Controller Area Network 0</description>
91248 <description>Start the CAN peripheral.</description>
91256 <description>Start the CAN peripheral.</description>
91262 <description>Trigger task</description>
91271 <description>Request to stop the CAN peripheral</description>
91279 <description>Request to stop the CAN peripheral</description>
91285 <description>Trigger task</description>
91294 <description>Stop the CAN peripheral</description>
91302 <description>Stop the CAN peripheral</description>
91308 <description>Trigger task</description>
91319 …<description>Description collection: Event indicating that interrupt n triggered at CAN core</desc…
91327 <description>Event indicating that interrupt n triggered at CAN core</description>
91333 <description>Event not generated</description>
91338 <description>Event generated</description>
91347 <description>Event indicating that interrupt triggered at CAN DMU</description>
91355 <description>Event indicating that interrupt triggered at CAN DMU</description>
91361 <description>Event not generated</description>
91366 <description>Event generated</description>
91375 <description>Event indicating that interrupt triggered at CAN DMA</description>
91383 <description>Event indicating that interrupt triggered at CAN DMA</description>
91389 <description>Event not generated</description>
91394 <description>Event generated</description>
91403 <description>Event indicating that the CAN is ready to be stopped</description>
91411 <description>Event indicating that the CAN is ready to be stopped</description>
91417 <description>Event not generated</description>
91422 <description>Event generated</description>
91431 <description>Shortcuts between local events and tasks</description>
91439 <description>Shortcut between event READYFORSTOP and task STOP</description>
91445 <description>Disable shortcut</description>
91450 <description>Enable shortcut</description>
91459 <description>Enable or disable interrupt</description>
91467 <description>Enable or disable interrupt for event CORE[0]</description>
91473 <description>Disable</description>
91478 <description>Enable</description>
91485 <description>Enable or disable interrupt for event CORE[1]</description>
91491 <description>Disable</description>
91496 <description>Enable</description>
91503 <description>Enable or disable interrupt for event DMU</description>
91509 <description>Disable</description>
91514 <description>Enable</description>
91521 <description>Enable or disable interrupt for event DMA</description>
91527 <description>Disable</description>
91532 <description>Enable</description>
91539 <description>Enable or disable interrupt for event READYFORSTOP</description>
91545 <description>Disable</description>
91550 <description>Enable</description>
91559 <description>Enable interrupt</description>
91567 <description>Write '1' to enable interrupt for event CORE[0]</description>
91574 <description>Read: Disabled</description>
91579 <description>Read: Enabled</description>
91587 <description>Enable</description>
91594 <description>Write '1' to enable interrupt for event CORE[1]</description>
91601 <description>Read: Disabled</description>
91606 <description>Read: Enabled</description>
91614 <description>Enable</description>
91621 <description>Write '1' to enable interrupt for event DMU</description>
91628 <description>Read: Disabled</description>
91633 <description>Read: Enabled</description>
91641 <description>Enable</description>
91648 <description>Write '1' to enable interrupt for event DMA</description>
91655 <description>Read: Disabled</description>
91660 <description>Read: Enabled</description>
91668 <description>Enable</description>
91675 <description>Write '1' to enable interrupt for event READYFORSTOP</description>
91682 <description>Read: Disabled</description>
91687 <description>Read: Enabled</description>
91695 <description>Enable</description>
91704 <description>Disable interrupt</description>
91712 <description>Write '1' to disable interrupt for event CORE[0]</description>
91719 <description>Read: Disabled</description>
91724 <description>Read: Enabled</description>
91732 <description>Disable</description>
91739 <description>Write '1' to disable interrupt for event CORE[1]</description>
91746 <description>Read: Disabled</description>
91751 <description>Read: Enabled</description>
91759 <description>Disable</description>
91766 <description>Write '1' to disable interrupt for event DMU</description>
91773 <description>Read: Disabled</description>
91778 <description>Read: Enabled</description>
91786 <description>Disable</description>
91793 <description>Write '1' to disable interrupt for event DMA</description>
91800 <description>Read: Disabled</description>
91805 <description>Read: Enabled</description>
91813 <description>Disable</description>
91820 <description>Write '1' to disable interrupt for event READYFORSTOP</description>
91827 <description>Read: Disabled</description>
91832 <description>Read: Enabled</description>
91840 <description>Disable</description>
91849 <description>Pending interrupts</description>
91857 <description>Read pending status of interrupt for event CORE[0]</description>
91864 <description>Read: Not pending</description>
91869 <description>Read: Pending</description>
91876 <description>Read pending status of interrupt for event CORE[1]</description>
91883 <description>Read: Not pending</description>
91888 <description>Read: Pending</description>
91895 <description>Read pending status of interrupt for event DMU</description>
91902 <description>Read: Not pending</description>
91907 <description>Read: Pending</description>
91914 <description>Read pending status of interrupt for event DMA</description>
91921 <description>Read: Not pending</description>
91926 <description>Read: Pending</description>
91933 <description>Read pending status of interrupt for event READYFORSTOP</description>
91940 <description>Read: Not pending</description>
91945 <description>Read: Pending</description>
91956 …description>MVDMA performs direct-memory-accesses between memories. Data is transferred according …
91975 <description>Pause operation.</description>
91983 <description>Pause operation.</description>
91989 <description>Trigger task</description>
91998 <description>Reset operation.</description>
92006 <description>Reset operation.</description>
92012 <description>Trigger task</description>
92023 …<description>Description collection: Start operation of job list n. Base address for successive TA…
92031 …<description>Start operation of job list n. Base address for successive TASKS_STARTs.</description>
92037 <description>Trigger task</description>
92048 … <description>Description collection: Subscribe configuration for task START[n]</description>
92056 <description>DPPI channel that task START[n] will subscribe to</description>
92067 <description>Disable subscription</description>
92072 <description>Enable subscription</description>
92081 … <description>Event indicating that Sink data descriptor list has been completed.</description>
92089 … <description>Event indicating that Sink data descriptor list has been completed.</description>
92095 <description>Event not generated</description>
92100 <description>Event generated</description>
92109 <description>Event indicating that the source list processing has started.</description>
92117 … <description>Event indicating that the source list processing has started.</description>
92123 <description>Event not generated</description>
92128 <description>Event generated</description>
92137 <description>Event indicating that the data transfer has been paused.</description>
92145 <description>Event indicating that the data transfer has been paused.</description>
92151 <description>Event not generated</description>
92156 <description>Event generated</description>
92165 <description>Event indicating that the peripheral has been reset.</description>
92173 <description>Event indicating that the peripheral has been reset.</description>
92179 <description>Event not generated</description>
92184 <description>Event generated</description>
92193 <description>Peripheral events.</description>
92199 …<description>Event indicating that a bus error has been received on the Source channel.</descripti…
92207 …<description>Event indicating that a bus error has been received on the Source channel.</descripti…
92213 <description>Event not generated</description>
92218 <description>Event generated</description>
92227 …<description>Event indicating that a job on the Source channel with EVENT_ENABLE active has been p…
92235 …<description>Event indicating that a job on the Source channel with EVENT_ENABLE active has been p…
92241 <description>Event not generated</description>
92246 <description>Event generated</description>
92256 <description>Peripheral events.</description>
92262 …<description>Event indicating that a bus error has been received on the Sink channel.</description>
92270 …<description>Event indicating that a bus error has been received on the Sink channel.</description>
92276 <description>Event not generated</description>
92281 <description>Event generated</description>
92290 …<description>Event indicating that a job on the Sink channel with EVENT_ENABLE active has been pro…
92298 …<description>Event indicating that a job on the Sink channel with EVENT_ENABLE active has been pro…
92304 <description>Event not generated</description>
92309 <description>Event generated</description>
92321 …description>Description collection: Event indicating that the operation started by the task START[…
92329 …description>Event indicating that the operation started by the task START[n] has been completed. B…
92335 <description>Event not generated</description>
92340 <description>Event generated</description>
92349 <description>Publish configuration for event END</description>
92357 <description>DPPI channel that event END will publish to</description>
92368 <description>Disable publishing</description>
92373 <description>Enable publishing</description>
92382 <description>Publish configuration for events</description>
92388 <description>Publish configuration for event SOURCE.SELECTJOBDONE</description>
92396 … <description>DPPI channel that event SOURCE.SELECTJOBDONE will publish to</description>
92407 <description>Disable publishing</description>
92412 <description>Enable publishing</description>
92422 <description>Publish configuration for events</description>
92428 <description>Publish configuration for event SINK.SELECTJOBDONE</description>
92436 … <description>DPPI channel that event SINK.SELECTJOBDONE will publish to</description>
92447 <description>Disable publishing</description>
92452 <description>Enable publishing</description>
92464 … <description>Description collection: Publish configuration for event COMPLETED[n]</description>
92472 <description>DPPI channel that event COMPLETED[n] will publish to</description>
92483 <description>Disable publishing</description>
92488 <description>Enable publishing</description>
92497 <description>Enable or disable interrupt</description>
92505 <description>Enable or disable interrupt for event END</description>
92511 <description>Disable</description>
92516 <description>Enable</description>
92523 <description>Enable or disable interrupt for event STARTED</description>
92529 <description>Disable</description>
92534 <description>Enable</description>
92541 <description>Enable or disable interrupt for event PAUSED</description>
92547 <description>Disable</description>
92552 <description>Enable</description>
92559 <description>Enable or disable interrupt for event RESET</description>
92565 <description>Disable</description>
92570 <description>Enable</description>
92577 <description>Enable or disable interrupt for event SOURCEBUSERROR</description>
92583 <description>Disable</description>
92588 <description>Enable</description>
92595 <description>Enable or disable interrupt for event SOURCESELECTJOBDONE</description>
92601 <description>Disable</description>
92606 <description>Enable</description>
92613 <description>Enable or disable interrupt for event SINKBUSERROR</description>
92619 <description>Disable</description>
92624 <description>Enable</description>
92631 <description>Enable or disable interrupt for event SINKSELECTJOBDONE</description>
92637 <description>Disable</description>
92642 <description>Enable</description>
92649 <description>Enable or disable interrupt for event COMPLETED[0]</description>
92655 <description>Disable</description>
92660 <description>Enable</description>
92667 <description>Enable or disable interrupt for event COMPLETED[1]</description>
92673 <description>Disable</description>
92678 <description>Enable</description>
92685 <description>Enable or disable interrupt for event COMPLETED[2]</description>
92691 <description>Disable</description>
92696 <description>Enable</description>
92703 <description>Enable or disable interrupt for event COMPLETED[3]</description>
92709 <description>Disable</description>
92714 <description>Enable</description>
92721 <description>Enable or disable interrupt for event COMPLETED[4]</description>
92727 <description>Disable</description>
92732 <description>Enable</description>
92739 <description>Enable or disable interrupt for event COMPLETED[5]</description>
92745 <description>Disable</description>
92750 <description>Enable</description>
92757 <description>Enable or disable interrupt for event COMPLETED[6]</description>
92763 <description>Disable</description>
92768 <description>Enable</description>
92775 <description>Enable or disable interrupt for event COMPLETED[7]</description>
92781 <description>Disable</description>
92786 <description>Enable</description>
92795 <description>Enable interrupt</description>
92803 <description>Write '1' to enable interrupt for event END</description>
92810 <description>Read: Disabled</description>
92815 <description>Read: Enabled</description>
92823 <description>Enable</description>
92830 <description>Write '1' to enable interrupt for event STARTED</description>
92837 <description>Read: Disabled</description>
92842 <description>Read: Enabled</description>
92850 <description>Enable</description>
92857 <description>Write '1' to enable interrupt for event PAUSED</description>
92864 <description>Read: Disabled</description>
92869 <description>Read: Enabled</description>
92877 <description>Enable</description>
92884 <description>Write '1' to enable interrupt for event RESET</description>
92891 <description>Read: Disabled</description>
92896 <description>Read: Enabled</description>
92904 <description>Enable</description>
92911 <description>Write '1' to enable interrupt for event SOURCEBUSERROR</description>
92918 <description>Read: Disabled</description>
92923 <description>Read: Enabled</description>
92931 <description>Enable</description>
92938 <description>Write '1' to enable interrupt for event SOURCESELECTJOBDONE</description>
92945 <description>Read: Disabled</description>
92950 <description>Read: Enabled</description>
92958 <description>Enable</description>
92965 <description>Write '1' to enable interrupt for event SINKBUSERROR</description>
92972 <description>Read: Disabled</description>
92977 <description>Read: Enabled</description>
92985 <description>Enable</description>
92992 <description>Write '1' to enable interrupt for event SINKSELECTJOBDONE</description>
92999 <description>Read: Disabled</description>
93004 <description>Read: Enabled</description>
93012 <description>Enable</description>
93019 <description>Write '1' to enable interrupt for event COMPLETED[0]</description>
93026 <description>Read: Disabled</description>
93031 <description>Read: Enabled</description>
93039 <description>Enable</description>
93046 <description>Write '1' to enable interrupt for event COMPLETED[1]</description>
93053 <description>Read: Disabled</description>
93058 <description>Read: Enabled</description>
93066 <description>Enable</description>
93073 <description>Write '1' to enable interrupt for event COMPLETED[2]</description>
93080 <description>Read: Disabled</description>
93085 <description>Read: Enabled</description>
93093 <description>Enable</description>
93100 <description>Write '1' to enable interrupt for event COMPLETED[3]</description>
93107 <description>Read: Disabled</description>
93112 <description>Read: Enabled</description>
93120 <description>Enable</description>
93127 <description>Write '1' to enable interrupt for event COMPLETED[4]</description>
93134 <description>Read: Disabled</description>
93139 <description>Read: Enabled</description>
93147 <description>Enable</description>
93154 <description>Write '1' to enable interrupt for event COMPLETED[5]</description>
93161 <description>Read: Disabled</description>
93166 <description>Read: Enabled</description>
93174 <description>Enable</description>
93181 <description>Write '1' to enable interrupt for event COMPLETED[6]</description>
93188 <description>Read: Disabled</description>
93193 <description>Read: Enabled</description>
93201 <description>Enable</description>
93208 <description>Write '1' to enable interrupt for event COMPLETED[7]</description>
93215 <description>Read: Disabled</description>
93220 <description>Read: Enabled</description>
93228 <description>Enable</description>
93237 <description>Disable interrupt</description>
93245 <description>Write '1' to disable interrupt for event END</description>
93252 <description>Read: Disabled</description>
93257 <description>Read: Enabled</description>
93265 <description>Disable</description>
93272 <description>Write '1' to disable interrupt for event STARTED</description>
93279 <description>Read: Disabled</description>
93284 <description>Read: Enabled</description>
93292 <description>Disable</description>
93299 <description>Write '1' to disable interrupt for event PAUSED</description>
93306 <description>Read: Disabled</description>
93311 <description>Read: Enabled</description>
93319 <description>Disable</description>
93326 <description>Write '1' to disable interrupt for event RESET</description>
93333 <description>Read: Disabled</description>
93338 <description>Read: Enabled</description>
93346 <description>Disable</description>
93353 <description>Write '1' to disable interrupt for event SOURCEBUSERROR</description>
93360 <description>Read: Disabled</description>
93365 <description>Read: Enabled</description>
93373 <description>Disable</description>
93380 … <description>Write '1' to disable interrupt for event SOURCESELECTJOBDONE</description>
93387 <description>Read: Disabled</description>
93392 <description>Read: Enabled</description>
93400 <description>Disable</description>
93407 <description>Write '1' to disable interrupt for event SINKBUSERROR</description>
93414 <description>Read: Disabled</description>
93419 <description>Read: Enabled</description>
93427 <description>Disable</description>
93434 <description>Write '1' to disable interrupt for event SINKSELECTJOBDONE</description>
93441 <description>Read: Disabled</description>
93446 <description>Read: Enabled</description>
93454 <description>Disable</description>
93461 <description>Write '1' to disable interrupt for event COMPLETED[0]</description>
93468 <description>Read: Disabled</description>
93473 <description>Read: Enabled</description>
93481 <description>Disable</description>
93488 <description>Write '1' to disable interrupt for event COMPLETED[1]</description>
93495 <description>Read: Disabled</description>
93500 <description>Read: Enabled</description>
93508 <description>Disable</description>
93515 <description>Write '1' to disable interrupt for event COMPLETED[2]</description>
93522 <description>Read: Disabled</description>
93527 <description>Read: Enabled</description>
93535 <description>Disable</description>
93542 <description>Write '1' to disable interrupt for event COMPLETED[3]</description>
93549 <description>Read: Disabled</description>
93554 <description>Read: Enabled</description>
93562 <description>Disable</description>
93569 <description>Write '1' to disable interrupt for event COMPLETED[4]</description>
93576 <description>Read: Disabled</description>
93581 <description>Read: Enabled</description>
93589 <description>Disable</description>
93596 <description>Write '1' to disable interrupt for event COMPLETED[5]</description>
93603 <description>Read: Disabled</description>
93608 <description>Read: Enabled</description>
93616 <description>Disable</description>
93623 <description>Write '1' to disable interrupt for event COMPLETED[6]</description>
93630 <description>Read: Disabled</description>
93635 <description>Read: Enabled</description>
93643 <description>Disable</description>
93650 <description>Write '1' to disable interrupt for event COMPLETED[7]</description>
93657 <description>Read: Disabled</description>
93662 <description>Read: Enabled</description>
93670 <description>Disable</description>
93679 <description>Pending interrupts</description>
93687 <description>Read pending status of interrupt for event END</description>
93694 <description>Read: Not pending</description>
93699 <description>Read: Pending</description>
93706 <description>Read pending status of interrupt for event STARTED</description>
93713 <description>Read: Not pending</description>
93718 <description>Read: Pending</description>
93725 <description>Read pending status of interrupt for event PAUSED</description>
93732 <description>Read: Not pending</description>
93737 <description>Read: Pending</description>
93744 <description>Read pending status of interrupt for event RESET</description>
93751 <description>Read: Not pending</description>
93756 <description>Read: Pending</description>
93763 <description>Read pending status of interrupt for event SOURCEBUSERROR</description>
93770 <description>Read: Not pending</description>
93775 <description>Read: Pending</description>
93782 … <description>Read pending status of interrupt for event SOURCESELECTJOBDONE</description>
93789 <description>Read: Not pending</description>
93794 <description>Read: Pending</description>
93801 <description>Read pending status of interrupt for event SINKBUSERROR</description>
93808 <description>Read: Not pending</description>
93813 <description>Read: Pending</description>
93820 … <description>Read pending status of interrupt for event SINKSELECTJOBDONE</description>
93827 <description>Read: Not pending</description>
93832 <description>Read: Pending</description>
93839 <description>Read pending status of interrupt for event COMPLETED[0]</description>
93846 <description>Read: Not pending</description>
93851 <description>Read: Pending</description>
93858 <description>Read pending status of interrupt for event COMPLETED[1]</description>
93865 <description>Read: Not pending</description>
93870 <description>Read: Pending</description>
93877 <description>Read pending status of interrupt for event COMPLETED[2]</description>
93884 <description>Read: Not pending</description>
93889 <description>Read: Pending</description>
93896 <description>Read pending status of interrupt for event COMPLETED[3]</description>
93903 <description>Read: Not pending</description>
93908 <description>Read: Pending</description>
93915 <description>Read pending status of interrupt for event COMPLETED[4]</description>
93922 <description>Read: Not pending</description>
93927 <description>Read: Pending</description>
93934 <description>Read pending status of interrupt for event COMPLETED[5]</description>
93941 <description>Read: Not pending</description>
93946 <description>Read: Pending</description>
93953 <description>Read pending status of interrupt for event COMPLETED[6]</description>
93960 <description>Read: Not pending</description>
93965 <description>Read: Pending</description>
93972 <description>Read pending status of interrupt for event COMPLETED[7]</description>
93979 <description>Read: Not pending</description>
93984 <description>Read: Pending</description>
93993 <description>MVDMA status registers.</description>
93999 <description>CRC checksum calculation result</description>
94007 <description>Result</description>
94015 …<description>Status of intermediate fifo: empty, not empty and full information available.</descri…
94023 <description>Result</description>
94029 <description>Fifo is empty.</description>
94034 <description>Fifo contains data.</description>
94039 <description>Fifo is full.</description>
94048 <description>Status of DMA transfer.</description>
94056 <description>DMA activity</description>
94062 <description>DMA is in IDLE state.</description>
94067 <description>Data being transferred.</description>
94077 <description>MVDMA configuration registers.</description>
94083 <description>Configure MVDMA mode of operation.</description>
94096 …<description>Registers SOURCE.LISTPTR and SINK.LISTPTR contain start address of a single job list.…
94101 …<description>Registers SOURCE.LISTPTR and SINK.LISTPTR contain start address of a list of job list…
94111 <description>Source channel configuration and status.</description>
94117 …<description>Start address of Source job list or list of job list pointers, depending on value of …
94125 <description>Source job descriptor list address.</description>
94133 <description>Source bus error status.</description>
94141 <description>Bus error type</description>
94147 <description>There are no errors.</description>
94152 …<description>Error related to memory when reading joblist, or error related to memory/register whe…
94157 …<description>Error related to the joblist address when reading joblist, or error related to addres…
94166 …description>Latest address being accessed on the Source channel.If a bus error occurs, these regis…
94174 <description>Source address</description>
94182 …<description>Number of completed jobs in the current Source descriptor list. This resets to 0 when…
94190 <description>Source job count</description>
94199 <description>Sink channel configuration and status.</description>
94205 …<description>Start address of Sink job list or list of job list pointers, depending on value of CO…
94213 <description>Sink descriptor list address.</description>
94221 <description>Sink bus error status.</description>
94229 <description>Bus error type</description>
94235 <description>There are no errors.</description>
94240 <description>Error related to memory when reading joblist.</description>
94245 … <description>Error related to the joblist address when reading joblist.</description>
94250 <description>Error related to memory/register when writing data.</description>
94255 … <description>Error related to the memory/register address when writing data.</description>
94264 …description>Latest address being accessed on the Sink channel. If a bus error occurs, these regist…
94272 <description>Sink address</description>
94280 …<description>Number of completed jobs in the current Sink descriptor list. This resets to 0 when a…
94288 <description>Sink job count</description>
94299 <description>RAM Controller 0</description>
94314 <description>Waitstates for read operations.</description>
94322 <description>Number of waitstates for a read from the RAM.</description>
94332 <description>Controller Area Network 1</description>
94343 …description>MVDMA performs direct-memory-accesses between memories. Data is transferred according …
94354 <description>RAM Controller 1</description>
94361 <description>I3C 1</description>
94372 <description>Distributed programmable peripheral interconnect controller 0</description>
94390 <description>Channel group tasks</description>
94396 <description>Description cluster: Enable channel group n</description>
94404 <description>Enable channel group n</description>
94410 <description>Trigger task</description>
94419 <description>Description cluster: Disable channel group n</description>
94427 <description>Disable channel group n</description>
94433 <description>Trigger task</description>
94445 <description>Subscribe configuration for tasks</description>
94451 … <description>Description cluster: Subscribe configuration for task CHG[n].EN</description>
94459 <description>DPPI channel that task CHG[n].EN will subscribe to</description>
94470 <description>Disable subscription</description>
94475 <description>Enable subscription</description>
94484 … <description>Description cluster: Subscribe configuration for task CHG[n].DIS</description>
94492 <description>DPPI channel that task CHG[n].DIS will subscribe to</description>
94503 <description>Disable subscription</description>
94508 <description>Enable subscription</description>
94518 <description>Channel enable register</description>
94526 <description>Enable or disable channel 0</description>
94532 <description>Disable channel</description>
94537 <description>Enable channel</description>
94544 <description>Enable or disable channel 1</description>
94550 <description>Disable channel</description>
94555 <description>Enable channel</description>
94562 <description>Enable or disable channel 2</description>
94568 <description>Disable channel</description>
94573 <description>Enable channel</description>
94580 <description>Enable or disable channel 3</description>
94586 <description>Disable channel</description>
94591 <description>Enable channel</description>
94598 <description>Enable or disable channel 4</description>
94604 <description>Disable channel</description>
94609 <description>Enable channel</description>
94616 <description>Enable or disable channel 5</description>
94622 <description>Disable channel</description>
94627 <description>Enable channel</description>
94634 <description>Enable or disable channel 6</description>
94640 <description>Disable channel</description>
94645 <description>Enable channel</description>
94652 <description>Enable or disable channel 7</description>
94658 <description>Disable channel</description>
94663 <description>Enable channel</description>
94670 <description>Enable or disable channel 8</description>
94676 <description>Disable channel</description>
94681 <description>Enable channel</description>
94688 <description>Enable or disable channel 9</description>
94694 <description>Disable channel</description>
94699 <description>Enable channel</description>
94706 <description>Enable or disable channel 10</description>
94712 <description>Disable channel</description>
94717 <description>Enable channel</description>
94724 <description>Enable or disable channel 11</description>
94730 <description>Disable channel</description>
94735 <description>Enable channel</description>
94742 <description>Enable or disable channel 12</description>
94748 <description>Disable channel</description>
94753 <description>Enable channel</description>
94760 <description>Enable or disable channel 13</description>
94766 <description>Disable channel</description>
94771 <description>Enable channel</description>
94778 <description>Enable or disable channel 14</description>
94784 <description>Disable channel</description>
94789 <description>Enable channel</description>
94796 <description>Enable or disable channel 15</description>
94802 <description>Disable channel</description>
94807 <description>Enable channel</description>
94814 <description>Enable or disable channel 16</description>
94820 <description>Disable channel</description>
94825 <description>Enable channel</description>
94832 <description>Enable or disable channel 17</description>
94838 <description>Disable channel</description>
94843 <description>Enable channel</description>
94850 <description>Enable or disable channel 18</description>
94856 <description>Disable channel</description>
94861 <description>Enable channel</description>
94868 <description>Enable or disable channel 19</description>
94874 <description>Disable channel</description>
94879 <description>Enable channel</description>
94886 <description>Enable or disable channel 20</description>
94892 <description>Disable channel</description>
94897 <description>Enable channel</description>
94904 <description>Enable or disable channel 21</description>
94910 <description>Disable channel</description>
94915 <description>Enable channel</description>
94922 <description>Enable or disable channel 22</description>
94928 <description>Disable channel</description>
94933 <description>Enable channel</description>
94940 <description>Enable or disable channel 23</description>
94946 <description>Disable channel</description>
94951 <description>Enable channel</description>
94960 <description>Channel enable set register</description>
94969 <description>Channel 0 enable set register. Writing 0 has no effect.</description>
94976 <description>Read: Channel disabled</description>
94981 <description>Read: Channel enabled</description>
94989 <description>Write: Enable channel</description>
94996 <description>Channel 1 enable set register. Writing 0 has no effect.</description>
95003 <description>Read: Channel disabled</description>
95008 <description>Read: Channel enabled</description>
95016 <description>Write: Enable channel</description>
95023 <description>Channel 2 enable set register. Writing 0 has no effect.</description>
95030 <description>Read: Channel disabled</description>
95035 <description>Read: Channel enabled</description>
95043 <description>Write: Enable channel</description>
95050 <description>Channel 3 enable set register. Writing 0 has no effect.</description>
95057 <description>Read: Channel disabled</description>
95062 <description>Read: Channel enabled</description>
95070 <description>Write: Enable channel</description>
95077 <description>Channel 4 enable set register. Writing 0 has no effect.</description>
95084 <description>Read: Channel disabled</description>
95089 <description>Read: Channel enabled</description>
95097 <description>Write: Enable channel</description>
95104 <description>Channel 5 enable set register. Writing 0 has no effect.</description>
95111 <description>Read: Channel disabled</description>
95116 <description>Read: Channel enabled</description>
95124 <description>Write: Enable channel</description>
95131 <description>Channel 6 enable set register. Writing 0 has no effect.</description>
95138 <description>Read: Channel disabled</description>
95143 <description>Read: Channel enabled</description>
95151 <description>Write: Enable channel</description>
95158 <description>Channel 7 enable set register. Writing 0 has no effect.</description>
95165 <description>Read: Channel disabled</description>
95170 <description>Read: Channel enabled</description>
95178 <description>Write: Enable channel</description>
95185 <description>Channel 8 enable set register. Writing 0 has no effect.</description>
95192 <description>Read: Channel disabled</description>
95197 <description>Read: Channel enabled</description>
95205 <description>Write: Enable channel</description>
95212 <description>Channel 9 enable set register. Writing 0 has no effect.</description>
95219 <description>Read: Channel disabled</description>
95224 <description>Read: Channel enabled</description>
95232 <description>Write: Enable channel</description>
95239 <description>Channel 10 enable set register. Writing 0 has no effect.</description>
95246 <description>Read: Channel disabled</description>
95251 <description>Read: Channel enabled</description>
95259 <description>Write: Enable channel</description>
95266 <description>Channel 11 enable set register. Writing 0 has no effect.</description>
95273 <description>Read: Channel disabled</description>
95278 <description>Read: Channel enabled</description>
95286 <description>Write: Enable channel</description>
95293 <description>Channel 12 enable set register. Writing 0 has no effect.</description>
95300 <description>Read: Channel disabled</description>
95305 <description>Read: Channel enabled</description>
95313 <description>Write: Enable channel</description>
95320 <description>Channel 13 enable set register. Writing 0 has no effect.</description>
95327 <description>Read: Channel disabled</description>
95332 <description>Read: Channel enabled</description>
95340 <description>Write: Enable channel</description>
95347 <description>Channel 14 enable set register. Writing 0 has no effect.</description>
95354 <description>Read: Channel disabled</description>
95359 <description>Read: Channel enabled</description>
95367 <description>Write: Enable channel</description>
95374 <description>Channel 15 enable set register. Writing 0 has no effect.</description>
95381 <description>Read: Channel disabled</description>
95386 <description>Read: Channel enabled</description>
95394 <description>Write: Enable channel</description>
95401 <description>Channel 16 enable set register. Writing 0 has no effect.</description>
95408 <description>Read: Channel disabled</description>
95413 <description>Read: Channel enabled</description>
95421 <description>Write: Enable channel</description>
95428 <description>Channel 17 enable set register. Writing 0 has no effect.</description>
95435 <description>Read: Channel disabled</description>
95440 <description>Read: Channel enabled</description>
95448 <description>Write: Enable channel</description>
95455 <description>Channel 18 enable set register. Writing 0 has no effect.</description>
95462 <description>Read: Channel disabled</description>
95467 <description>Read: Channel enabled</description>
95475 <description>Write: Enable channel</description>
95482 <description>Channel 19 enable set register. Writing 0 has no effect.</description>
95489 <description>Read: Channel disabled</description>
95494 <description>Read: Channel enabled</description>
95502 <description>Write: Enable channel</description>
95509 <description>Channel 20 enable set register. Writing 0 has no effect.</description>
95516 <description>Read: Channel disabled</description>
95521 <description>Read: Channel enabled</description>
95529 <description>Write: Enable channel</description>
95536 <description>Channel 21 enable set register. Writing 0 has no effect.</description>
95543 <description>Read: Channel disabled</description>
95548 <description>Read: Channel enabled</description>
95556 <description>Write: Enable channel</description>
95563 <description>Channel 22 enable set register. Writing 0 has no effect.</description>
95570 <description>Read: Channel disabled</description>
95575 <description>Read: Channel enabled</description>
95583 <description>Write: Enable channel</description>
95590 <description>Channel 23 enable set register. Writing 0 has no effect.</description>
95597 <description>Read: Channel disabled</description>
95602 <description>Read: Channel enabled</description>
95610 <description>Write: Enable channel</description>
95619 <description>Channel enable clear register</description>
95628 <description>Channel 0 enable clear register. Writing 0 has no effect.</description>
95635 <description>Read: Channel disabled</description>
95640 <description>Read: Channel enabled</description>
95648 <description>Write: Disable channel</description>
95655 <description>Channel 1 enable clear register. Writing 0 has no effect.</description>
95662 <description>Read: Channel disabled</description>
95667 <description>Read: Channel enabled</description>
95675 <description>Write: Disable channel</description>
95682 <description>Channel 2 enable clear register. Writing 0 has no effect.</description>
95689 <description>Read: Channel disabled</description>
95694 <description>Read: Channel enabled</description>
95702 <description>Write: Disable channel</description>
95709 <description>Channel 3 enable clear register. Writing 0 has no effect.</description>
95716 <description>Read: Channel disabled</description>
95721 <description>Read: Channel enabled</description>
95729 <description>Write: Disable channel</description>
95736 <description>Channel 4 enable clear register. Writing 0 has no effect.</description>
95743 <description>Read: Channel disabled</description>
95748 <description>Read: Channel enabled</description>
95756 <description>Write: Disable channel</description>
95763 <description>Channel 5 enable clear register. Writing 0 has no effect.</description>
95770 <description>Read: Channel disabled</description>
95775 <description>Read: Channel enabled</description>
95783 <description>Write: Disable channel</description>
95790 <description>Channel 6 enable clear register. Writing 0 has no effect.</description>
95797 <description>Read: Channel disabled</description>
95802 <description>Read: Channel enabled</description>
95810 <description>Write: Disable channel</description>
95817 <description>Channel 7 enable clear register. Writing 0 has no effect.</description>
95824 <description>Read: Channel disabled</description>
95829 <description>Read: Channel enabled</description>
95837 <description>Write: Disable channel</description>
95844 <description>Channel 8 enable clear register. Writing 0 has no effect.</description>
95851 <description>Read: Channel disabled</description>
95856 <description>Read: Channel enabled</description>
95864 <description>Write: Disable channel</description>
95871 <description>Channel 9 enable clear register. Writing 0 has no effect.</description>
95878 <description>Read: Channel disabled</description>
95883 <description>Read: Channel enabled</description>
95891 <description>Write: Disable channel</description>
95898 <description>Channel 10 enable clear register. Writing 0 has no effect.</description>
95905 <description>Read: Channel disabled</description>
95910 <description>Read: Channel enabled</description>
95918 <description>Write: Disable channel</description>
95925 <description>Channel 11 enable clear register. Writing 0 has no effect.</description>
95932 <description>Read: Channel disabled</description>
95937 <description>Read: Channel enabled</description>
95945 <description>Write: Disable channel</description>
95952 <description>Channel 12 enable clear register. Writing 0 has no effect.</description>
95959 <description>Read: Channel disabled</description>
95964 <description>Read: Channel enabled</description>
95972 <description>Write: Disable channel</description>
95979 <description>Channel 13 enable clear register. Writing 0 has no effect.</description>
95986 <description>Read: Channel disabled</description>
95991 <description>Read: Channel enabled</description>
95999 <description>Write: Disable channel</description>
96006 <description>Channel 14 enable clear register. Writing 0 has no effect.</description>
96013 <description>Read: Channel disabled</description>
96018 <description>Read: Channel enabled</description>
96026 <description>Write: Disable channel</description>
96033 <description>Channel 15 enable clear register. Writing 0 has no effect.</description>
96040 <description>Read: Channel disabled</description>
96045 <description>Read: Channel enabled</description>
96053 <description>Write: Disable channel</description>
96060 <description>Channel 16 enable clear register. Writing 0 has no effect.</description>
96067 <description>Read: Channel disabled</description>
96072 <description>Read: Channel enabled</description>
96080 <description>Write: Disable channel</description>
96087 <description>Channel 17 enable clear register. Writing 0 has no effect.</description>
96094 <description>Read: Channel disabled</description>
96099 <description>Read: Channel enabled</description>
96107 <description>Write: Disable channel</description>
96114 <description>Channel 18 enable clear register. Writing 0 has no effect.</description>
96121 <description>Read: Channel disabled</description>
96126 <description>Read: Channel enabled</description>
96134 <description>Write: Disable channel</description>
96141 <description>Channel 19 enable clear register. Writing 0 has no effect.</description>
96148 <description>Read: Channel disabled</description>
96153 <description>Read: Channel enabled</description>
96161 <description>Write: Disable channel</description>
96168 <description>Channel 20 enable clear register. Writing 0 has no effect.</description>
96175 <description>Read: Channel disabled</description>
96180 <description>Read: Channel enabled</description>
96188 <description>Write: Disable channel</description>
96195 <description>Channel 21 enable clear register. Writing 0 has no effect.</description>
96202 <description>Read: Channel disabled</description>
96207 <description>Read: Channel enabled</description>
96215 <description>Write: Disable channel</description>
96222 <description>Channel 22 enable clear register. Writing 0 has no effect.</description>
96229 <description>Read: Channel disabled</description>
96234 <description>Read: Channel enabled</description>
96242 <description>Write: Disable channel</description>
96249 <description>Channel 23 enable clear register. Writing 0 has no effect.</description>
96256 <description>Read: Channel disabled</description>
96261 <description>Read: Channel enabled</description>
96269 <description>Write: Disable channel</description>
96280 …description>Description collection: Channel group n Note: Writes to this register are ignored if e…
96288 <description>Include or exclude channel 0</description>
96294 <description>Exclude</description>
96299 <description>Include</description>
96306 <description>Include or exclude channel 1</description>
96312 <description>Exclude</description>
96317 <description>Include</description>
96324 <description>Include or exclude channel 2</description>
96330 <description>Exclude</description>
96335 <description>Include</description>
96342 <description>Include or exclude channel 3</description>
96348 <description>Exclude</description>
96353 <description>Include</description>
96360 <description>Include or exclude channel 4</description>
96366 <description>Exclude</description>
96371 <description>Include</description>
96378 <description>Include or exclude channel 5</description>
96384 <description>Exclude</description>
96389 <description>Include</description>
96396 <description>Include or exclude channel 6</description>
96402 <description>Exclude</description>
96407 <description>Include</description>
96414 <description>Include or exclude channel 7</description>
96420 <description>Exclude</description>
96425 <description>Include</description>
96432 <description>Include or exclude channel 8</description>
96438 <description>Exclude</description>
96443 <description>Include</description>
96450 <description>Include or exclude channel 9</description>
96456 <description>Exclude</description>
96461 <description>Include</description>
96468 <description>Include or exclude channel 10</description>
96474 <description>Exclude</description>
96479 <description>Include</description>
96486 <description>Include or exclude channel 11</description>
96492 <description>Exclude</description>
96497 <description>Include</description>
96504 <description>Include or exclude channel 12</description>
96510 <description>Exclude</description>
96515 <description>Include</description>
96522 <description>Include or exclude channel 13</description>
96528 <description>Exclude</description>
96533 <description>Include</description>
96540 <description>Include or exclude channel 14</description>
96546 <description>Exclude</description>
96551 <description>Include</description>
96558 <description>Include or exclude channel 15</description>
96564 <description>Exclude</description>
96569 <description>Include</description>
96576 <description>Include or exclude channel 16</description>
96582 <description>Exclude</description>
96587 <description>Include</description>
96594 <description>Include or exclude channel 17</description>
96600 <description>Exclude</description>
96605 <description>Include</description>
96612 <description>Include or exclude channel 18</description>
96618 <description>Exclude</description>
96623 <description>Include</description>
96630 <description>Include or exclude channel 19</description>
96636 <description>Exclude</description>
96641 <description>Include</description>
96648 <description>Include or exclude channel 20</description>
96654 <description>Exclude</description>
96659 <description>Include</description>
96666 <description>Include or exclude channel 21</description>
96672 <description>Exclude</description>
96677 <description>Include</description>
96684 <description>Include or exclude channel 22</description>
96690 <description>Exclude</description>
96695 <description>Include</description>
96702 <description>Include or exclude channel 23</description>
96708 <description>Exclude</description>
96713 <description>Include</description>
96724 <description>Timer/Counter 0</description>
96743 <description>Start Timer</description>
96751 <description>Start Timer</description>
96757 <description>Trigger task</description>
96766 <description>Stop Timer</description>
96774 <description>Stop Timer</description>
96780 <description>Trigger task</description>
96789 <description>Increment Timer (Counter mode only)</description>
96797 <description>Increment Timer (Counter mode only)</description>
96803 <description>Trigger task</description>
96812 <description>Clear time</description>
96820 <description>Clear time</description>
96826 <description>Trigger task</description>
96835 <description>Deprecated register - Shut down timer</description>
96843 <description>Deprecated field - Shut down timer</description>
96849 <description>Trigger task</description>
96860 <description>Description collection: Capture Timer value to CC[n] register</description>
96868 <description>Capture Timer value to CC[n] register</description>
96874 <description>Trigger task</description>
96883 <description>Subscribe configuration for task START</description>
96891 <description>DPPI channel that task START will subscribe to</description>
96902 <description>Disable subscription</description>
96907 <description>Enable subscription</description>
96916 <description>Subscribe configuration for task STOP</description>
96924 <description>DPPI channel that task STOP will subscribe to</description>
96935 <description>Disable subscription</description>
96940 <description>Enable subscription</description>
96949 <description>Subscribe configuration for task COUNT</description>
96957 <description>DPPI channel that task COUNT will subscribe to</description>
96968 <description>Disable subscription</description>
96973 <description>Enable subscription</description>
96982 <description>Subscribe configuration for task CLEAR</description>
96990 <description>DPPI channel that task CLEAR will subscribe to</description>
97001 <description>Disable subscription</description>
97006 <description>Enable subscription</description>
97015 <description>Deprecated register - Subscribe configuration for task SHUTDOWN</description>
97023 <description>DPPI channel that task SHUTDOWN will subscribe to</description>
97034 <description>Disable subscription</description>
97039 <description>Enable subscription</description>
97050 … <description>Description collection: Subscribe configuration for task CAPTURE[n]</description>
97058 <description>DPPI channel that task CAPTURE[n] will subscribe to</description>
97069 <description>Disable subscription</description>
97074 <description>Enable subscription</description>
97085 <description>Description collection: Compare event on CC[n] match</description>
97093 <description>Compare event on CC[n] match</description>
97099 <description>Event not generated</description>
97104 <description>Event generated</description>
97115 … <description>Description collection: Publish configuration for event COMPARE[n]</description>
97123 <description>DPPI channel that event COMPARE[n] will publish to</description>
97134 <description>Disable publishing</description>
97139 <description>Enable publishing</description>
97148 <description>Shortcuts between local events and tasks</description>
97156 <description>Shortcut between event COMPARE[0] and task CLEAR</description>
97162 <description>Disable shortcut</description>
97167 <description>Enable shortcut</description>
97174 <description>Shortcut between event COMPARE[1] and task CLEAR</description>
97180 <description>Disable shortcut</description>
97185 <description>Enable shortcut</description>
97192 <description>Shortcut between event COMPARE[2] and task CLEAR</description>
97198 <description>Disable shortcut</description>
97203 <description>Enable shortcut</description>
97210 <description>Shortcut between event COMPARE[3] and task CLEAR</description>
97216 <description>Disable shortcut</description>
97221 <description>Enable shortcut</description>
97228 <description>Shortcut between event COMPARE[4] and task CLEAR</description>
97234 <description>Disable shortcut</description>
97239 <description>Enable shortcut</description>
97246 <description>Shortcut between event COMPARE[5] and task CLEAR</description>
97252 <description>Disable shortcut</description>
97257 <description>Enable shortcut</description>
97264 <description>Shortcut between event COMPARE[6] and task CLEAR</description>
97270 <description>Disable shortcut</description>
97275 <description>Enable shortcut</description>
97282 <description>Shortcut between event COMPARE[7] and task CLEAR</description>
97288 <description>Disable shortcut</description>
97293 <description>Enable shortcut</description>
97300 <description>Shortcut between event COMPARE[0] and task STOP</description>
97306 <description>Disable shortcut</description>
97311 <description>Enable shortcut</description>
97318 <description>Shortcut between event COMPARE[1] and task STOP</description>
97324 <description>Disable shortcut</description>
97329 <description>Enable shortcut</description>
97336 <description>Shortcut between event COMPARE[2] and task STOP</description>
97342 <description>Disable shortcut</description>
97347 <description>Enable shortcut</description>
97354 <description>Shortcut between event COMPARE[3] and task STOP</description>
97360 <description>Disable shortcut</description>
97365 <description>Enable shortcut</description>
97372 <description>Shortcut between event COMPARE[4] and task STOP</description>
97378 <description>Disable shortcut</description>
97383 <description>Enable shortcut</description>
97390 <description>Shortcut between event COMPARE[5] and task STOP</description>
97396 <description>Disable shortcut</description>
97401 <description>Enable shortcut</description>
97408 <description>Shortcut between event COMPARE[6] and task STOP</description>
97414 <description>Disable shortcut</description>
97419 <description>Enable shortcut</description>
97426 <description>Shortcut between event COMPARE[7] and task STOP</description>
97432 <description>Disable shortcut</description>
97437 <description>Enable shortcut</description>
97446 <description>Enable or disable interrupt</description>
97454 <description>Enable or disable interrupt for event COMPARE[0]</description>
97460 <description>Disable</description>
97465 <description>Enable</description>
97472 <description>Enable or disable interrupt for event COMPARE[1]</description>
97478 <description>Disable</description>
97483 <description>Enable</description>
97490 <description>Enable or disable interrupt for event COMPARE[2]</description>
97496 <description>Disable</description>
97501 <description>Enable</description>
97508 <description>Enable or disable interrupt for event COMPARE[3]</description>
97514 <description>Disable</description>
97519 <description>Enable</description>
97526 <description>Enable or disable interrupt for event COMPARE[4]</description>
97532 <description>Disable</description>
97537 <description>Enable</description>
97544 <description>Enable or disable interrupt for event COMPARE[5]</description>
97550 <description>Disable</description>
97555 <description>Enable</description>
97562 <description>Enable or disable interrupt for event COMPARE[6]</description>
97568 <description>Disable</description>
97573 <description>Enable</description>
97580 <description>Enable or disable interrupt for event COMPARE[7]</description>
97586 <description>Disable</description>
97591 <description>Enable</description>
97600 <description>Enable interrupt</description>
97608 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
97615 <description>Read: Disabled</description>
97620 <description>Read: Enabled</description>
97628 <description>Enable</description>
97635 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
97642 <description>Read: Disabled</description>
97647 <description>Read: Enabled</description>
97655 <description>Enable</description>
97662 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
97669 <description>Read: Disabled</description>
97674 <description>Read: Enabled</description>
97682 <description>Enable</description>
97689 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
97696 <description>Read: Disabled</description>
97701 <description>Read: Enabled</description>
97709 <description>Enable</description>
97716 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
97723 <description>Read: Disabled</description>
97728 <description>Read: Enabled</description>
97736 <description>Enable</description>
97743 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
97750 <description>Read: Disabled</description>
97755 <description>Read: Enabled</description>
97763 <description>Enable</description>
97770 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
97777 <description>Read: Disabled</description>
97782 <description>Read: Enabled</description>
97790 <description>Enable</description>
97797 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
97804 <description>Read: Disabled</description>
97809 <description>Read: Enabled</description>
97817 <description>Enable</description>
97826 <description>Disable interrupt</description>
97834 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
97841 <description>Read: Disabled</description>
97846 <description>Read: Enabled</description>
97854 <description>Disable</description>
97861 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
97868 <description>Read: Disabled</description>
97873 <description>Read: Enabled</description>
97881 <description>Disable</description>
97888 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
97895 <description>Read: Disabled</description>
97900 <description>Read: Enabled</description>
97908 <description>Disable</description>
97915 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
97922 <description>Read: Disabled</description>
97927 <description>Read: Enabled</description>
97935 <description>Disable</description>
97942 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
97949 <description>Read: Disabled</description>
97954 <description>Read: Enabled</description>
97962 <description>Disable</description>
97969 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
97976 <description>Read: Disabled</description>
97981 <description>Read: Enabled</description>
97989 <description>Disable</description>
97996 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
98003 <description>Read: Disabled</description>
98008 <description>Read: Enabled</description>
98016 <description>Disable</description>
98023 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
98030 <description>Read: Disabled</description>
98035 <description>Read: Enabled</description>
98043 <description>Disable</description>
98052 <description>Timer mode selection</description>
98060 <description>Timer mode</description>
98066 <description>Select Timer mode</description>
98071 <description>Deprecated enumerator - Select Counter mode</description>
98076 <description>Select Low Power Counter mode</description>
98085 <description>Configure the number of bits used by the TIMER</description>
98093 <description>Timer bit width</description>
98099 <description>16 bit timer bit width</description>
98104 <description>8 bit timer bit width</description>
98109 <description>24 bit timer bit width</description>
98114 <description>32 bit timer bit width</description>
98123 <description>Timer prescaler register</description>
98131 <description>Prescaler value</description>
98141 <description>Description collection: Capture/Compare register n</description>
98149 <description>Capture/Compare value</description>
98159 …<description>Description collection: Enable one-shot operation for Capture/Compare channel n</desc…
98167 <description>Enable one-shot operation</description>
98173 <description>Disable one-shot operation</description>
98178 <description>Enable one-shot operation</description>
98189 <description>Timer/Counter 1</description>
98200 <description>Pulse width modulation unit 0</description>
98219 …<description>Stops PWM pulse generation on all channels at the end of current PWM period, and stop…
98227 …<description>Stops PWM pulse generation on all channels at the end of current PWM period, and stop…
98233 <description>Trigger task</description>
98242 …description>Steps by one value in the current sequence on all enabled channels if DECODER.MODE=Nex…
98250 …description>Steps by one value in the current sequence on all enabled channels if DECODER.MODE=Nex…
98256 <description>Trigger task</description>
98265 <description>Peripheral tasks.</description>
98273 <description>Peripheral tasks.</description>
98279 …description>Description cluster: Starts operation using easyDMA to load the values. See peripheral…
98287 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
98293 <description>Trigger task</description>
98302 …<description>Description cluster: Stops operation using easyDMA. This does not trigger an END even…
98310 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
98316 <description>Trigger task</description>
98327 <description>Subscribe configuration for task STOP</description>
98335 <description>DPPI channel that task STOP will subscribe to</description>
98346 <description>Disable subscription</description>
98351 <description>Enable subscription</description>
98360 <description>Subscribe configuration for task NEXTSTEP</description>
98368 <description>DPPI channel that task NEXTSTEP will subscribe to</description>
98379 <description>Disable subscription</description>
98384 <description>Enable subscription</description>
98393 <description>Subscribe configuration for tasks</description>
98401 <description>Subscribe configuration for tasks</description>
98407 <description>Description cluster: Subscribe configuration for task START</description>
98415 <description>DPPI channel that task START will subscribe to</description>
98426 <description>Disable subscription</description>
98431 <description>Enable subscription</description>
98440 <description>Description cluster: Subscribe configuration for task STOP</description>
98448 <description>DPPI channel that task STOP will subscribe to</description>
98459 <description>Disable subscription</description>
98464 <description>Enable subscription</description>
98475 … <description>Response to STOP task, emitted when PWM pulses are no longer generated</description>
98483 … <description>Response to STOP task, emitted when PWM pulses are no longer generated</description>
98489 <description>Event not generated</description>
98494 <description>Event generated</description>
98505 <description>Description collection: First PWM period started on sequence n</description>
98513 <description>First PWM period started on sequence n</description>
98519 <description>Event not generated</description>
98524 <description>Event generated</description>
98535 …<description>Description collection: Emitted at end of every sequence n, when last value from RAM …
98543 …<description>Emitted at end of every sequence n, when last value from RAM has been applied to wave…
98549 <description>Event not generated</description>
98554 <description>Event generated</description>
98563 <description>Emitted at the end of each PWM period</description>
98571 <description>Emitted at the end of each PWM period</description>
98577 <description>Event not generated</description>
98582 <description>Event generated</description>
98591 …<description>Concatenated sequences have been played the amount of times defined in LOOP.CNT</desc…
98599 …<description>Concatenated sequences have been played the amount of times defined in LOOP.CNT</desc…
98605 <description>Event not generated</description>
98610 <description>Event generated</description>
98619 …<description>Emitted when retrieving from RAM does not complete in time for the PWM module</descri…
98627 …<description>Emitted when retrieving from RAM does not complete in time for the PWM module</descri…
98633 <description>Event not generated</description>
98638 <description>Event generated</description>
98647 <description>Peripheral events.</description>
98655 <description>Peripheral events.</description>
98661 …<description>Description cluster: Generated after all MAXCNT bytes have been transferred</descript…
98669 <description>Generated after all MAXCNT bytes have been transferred</description>
98675 <description>Event not generated</description>
98680 <description>Event generated</description>
98689 …description>Description cluster: Generated when EasyDMA has buffered the .PTR and .MAXCNT register…
98697 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
98703 <description>Event not generated</description>
98708 <description>Event generated</description>
98717 … <description>Description cluster: An error occured during the bus transfer.</description>
98725 <description>An error occured during the bus transfer.</description>
98731 <description>Event not generated</description>
98736 <description>Event generated</description>
98749 …<description>Description collection: This event is generated when the compare matches for the comp…
98757 …<description>This event is generated when the compare matches for the compare channel [n].</descri…
98763 <description>Event not generated</description>
98768 <description>Event generated</description>
98777 <description>Publish configuration for event STOPPED</description>
98785 <description>DPPI channel that event STOPPED will publish to</description>
98796 <description>Disable publishing</description>
98801 <description>Enable publishing</description>
98812 … <description>Description collection: Publish configuration for event SEQSTARTED[n]</description>
98820 <description>DPPI channel that event SEQSTARTED[n] will publish to</description>
98831 <description>Disable publishing</description>
98836 <description>Enable publishing</description>
98847 … <description>Description collection: Publish configuration for event SEQEND[n]</description>
98855 <description>DPPI channel that event SEQEND[n] will publish to</description>
98866 <description>Disable publishing</description>
98871 <description>Enable publishing</description>
98880 <description>Publish configuration for event PWMPERIODEND</description>
98888 <description>DPPI channel that event PWMPERIODEND will publish to</description>
98899 <description>Disable publishing</description>
98904 <description>Enable publishing</description>
98913 <description>Publish configuration for event LOOPSDONE</description>
98921 <description>DPPI channel that event LOOPSDONE will publish to</description>
98932 <description>Disable publishing</description>
98937 <description>Enable publishing</description>
98946 <description>Publish configuration for event RAMUNDERFLOW</description>
98954 <description>DPPI channel that event RAMUNDERFLOW will publish to</description>
98965 <description>Disable publishing</description>
98970 <description>Enable publishing</description>
98979 <description>Publish configuration for events</description>
98987 <description>Publish configuration for events</description>
98993 <description>Description cluster: Publish configuration for event END</description>
99001 <description>DPPI channel that event END will publish to</description>
99012 <description>Disable publishing</description>
99017 <description>Enable publishing</description>
99026 <description>Description cluster: Publish configuration for event READY</description>
99034 <description>DPPI channel that event READY will publish to</description>
99045 <description>Disable publishing</description>
99050 <description>Enable publishing</description>
99059 … <description>Description cluster: Publish configuration for event BUSERROR</description>
99067 <description>DPPI channel that event BUSERROR will publish to</description>
99078 <description>Disable publishing</description>
99083 <description>Enable publishing</description>
99096 … <description>Description collection: Publish configuration for event COMPAREMATCH[n]</description>
99104 <description>DPPI channel that event COMPAREMATCH[n] will publish to</description>
99115 <description>Disable publishing</description>
99120 <description>Enable publishing</description>
99129 <description>Shortcuts between local events and tasks</description>
99137 <description>Shortcut between event SEQEND[n] and task STOP</description>
99143 <description>Disable shortcut</description>
99148 <description>Enable shortcut</description>
99155 <description>Shortcut between event SEQEND[n] and task STOP</description>
99161 <description>Disable shortcut</description>
99166 <description>Enable shortcut</description>
99173 <description>Shortcut between event LOOPSDONE and task DMA.SEQ[n].START</description>
99179 <description>Disable shortcut</description>
99184 <description>Enable shortcut</description>
99191 <description>Shortcut between event LOOPSDONE and task DMA.SEQ[n].START</description>
99197 <description>Disable shortcut</description>
99202 <description>Enable shortcut</description>
99209 <description>Shortcut between event LOOPSDONE and task STOP</description>
99215 <description>Disable shortcut</description>
99220 <description>Enable shortcut</description>
99227 <description>Shortcut between event RAMUNDERFLOW and task STOP</description>
99233 <description>Disable shortcut</description>
99238 <description>Enable shortcut</description>
99245 <description>Shortcut between event DMA.SEQ[n].BUSERROR and task STOP</description>
99251 <description>Disable shortcut</description>
99256 <description>Enable shortcut</description>
99263 <description>Shortcut between event DMA.SEQ[n].BUSERROR and task STOP</description>
99269 <description>Disable shortcut</description>
99274 <description>Enable shortcut</description>
99283 <description>Enable or disable interrupt</description>
99291 <description>Enable or disable interrupt for event STOPPED</description>
99297 <description>Disable</description>
99302 <description>Enable</description>
99309 <description>Enable or disable interrupt for event SEQSTARTED[0]</description>
99315 <description>Disable</description>
99320 <description>Enable</description>
99327 <description>Enable or disable interrupt for event SEQSTARTED[1]</description>
99333 <description>Disable</description>
99338 <description>Enable</description>
99345 <description>Enable or disable interrupt for event SEQEND[0]</description>
99351 <description>Disable</description>
99356 <description>Enable</description>
99363 <description>Enable or disable interrupt for event SEQEND[1]</description>
99369 <description>Disable</description>
99374 <description>Enable</description>
99381 <description>Enable or disable interrupt for event PWMPERIODEND</description>
99387 <description>Disable</description>
99392 <description>Enable</description>
99399 <description>Enable or disable interrupt for event LOOPSDONE</description>
99405 <description>Disable</description>
99410 <description>Enable</description>
99417 <description>Enable or disable interrupt for event RAMUNDERFLOW</description>
99423 <description>Disable</description>
99428 <description>Enable</description>
99435 <description>Enable or disable interrupt for event DMASEQ0END</description>
99441 <description>Disable</description>
99446 <description>Enable</description>
99453 <description>Enable or disable interrupt for event DMASEQ0READY</description>
99459 <description>Disable</description>
99464 <description>Enable</description>
99471 <description>Enable or disable interrupt for event DMASEQ0BUSERROR</description>
99477 <description>Disable</description>
99482 <description>Enable</description>
99489 <description>Enable or disable interrupt for event DMASEQ1END</description>
99495 <description>Disable</description>
99500 <description>Enable</description>
99507 <description>Enable or disable interrupt for event DMASEQ1READY</description>
99513 <description>Disable</description>
99518 <description>Enable</description>
99525 <description>Enable or disable interrupt for event DMASEQ1BUSERROR</description>
99531 <description>Disable</description>
99536 <description>Enable</description>
99543 <description>Enable or disable interrupt for event COMPAREMATCH[0]</description>
99549 <description>Disable</description>
99554 <description>Enable</description>
99561 <description>Enable or disable interrupt for event COMPAREMATCH[1]</description>
99567 <description>Disable</description>
99572 <description>Enable</description>
99579 <description>Enable or disable interrupt for event COMPAREMATCH[2]</description>
99585 <description>Disable</description>
99590 <description>Enable</description>
99597 <description>Enable or disable interrupt for event COMPAREMATCH[3]</description>
99603 <description>Disable</description>
99608 <description>Enable</description>
99617 <description>Enable interrupt</description>
99625 <description>Write '1' to enable interrupt for event STOPPED</description>
99632 <description>Read: Disabled</description>
99637 <description>Read: Enabled</description>
99645 <description>Enable</description>
99652 <description>Write '1' to enable interrupt for event SEQSTARTED[0]</description>
99659 <description>Read: Disabled</description>
99664 <description>Read: Enabled</description>
99672 <description>Enable</description>
99679 <description>Write '1' to enable interrupt for event SEQSTARTED[1]</description>
99686 <description>Read: Disabled</description>
99691 <description>Read: Enabled</description>
99699 <description>Enable</description>
99706 <description>Write '1' to enable interrupt for event SEQEND[0]</description>
99713 <description>Read: Disabled</description>
99718 <description>Read: Enabled</description>
99726 <description>Enable</description>
99733 <description>Write '1' to enable interrupt for event SEQEND[1]</description>
99740 <description>Read: Disabled</description>
99745 <description>Read: Enabled</description>
99753 <description>Enable</description>
99760 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
99767 <description>Read: Disabled</description>
99772 <description>Read: Enabled</description>
99780 <description>Enable</description>
99787 <description>Write '1' to enable interrupt for event LOOPSDONE</description>
99794 <description>Read: Disabled</description>
99799 <description>Read: Enabled</description>
99807 <description>Enable</description>
99814 <description>Write '1' to enable interrupt for event RAMUNDERFLOW</description>
99821 <description>Read: Disabled</description>
99826 <description>Read: Enabled</description>
99834 <description>Enable</description>
99841 <description>Write '1' to enable interrupt for event DMASEQ0END</description>
99848 <description>Read: Disabled</description>
99853 <description>Read: Enabled</description>
99861 <description>Enable</description>
99868 <description>Write '1' to enable interrupt for event DMASEQ0READY</description>
99875 <description>Read: Disabled</description>
99880 <description>Read: Enabled</description>
99888 <description>Enable</description>
99895 <description>Write '1' to enable interrupt for event DMASEQ0BUSERROR</description>
99902 <description>Read: Disabled</description>
99907 <description>Read: Enabled</description>
99915 <description>Enable</description>
99922 <description>Write '1' to enable interrupt for event DMASEQ1END</description>
99929 <description>Read: Disabled</description>
99934 <description>Read: Enabled</description>
99942 <description>Enable</description>
99949 <description>Write '1' to enable interrupt for event DMASEQ1READY</description>
99956 <description>Read: Disabled</description>
99961 <description>Read: Enabled</description>
99969 <description>Enable</description>
99976 <description>Write '1' to enable interrupt for event DMASEQ1BUSERROR</description>
99983 <description>Read: Disabled</description>
99988 <description>Read: Enabled</description>
99996 <description>Enable</description>
100003 <description>Write '1' to enable interrupt for event COMPAREMATCH[0]</description>
100010 <description>Read: Disabled</description>
100015 <description>Read: Enabled</description>
100023 <description>Enable</description>
100030 <description>Write '1' to enable interrupt for event COMPAREMATCH[1]</description>
100037 <description>Read: Disabled</description>
100042 <description>Read: Enabled</description>
100050 <description>Enable</description>
100057 <description>Write '1' to enable interrupt for event COMPAREMATCH[2]</description>
100064 <description>Read: Disabled</description>
100069 <description>Read: Enabled</description>
100077 <description>Enable</description>
100084 <description>Write '1' to enable interrupt for event COMPAREMATCH[3]</description>
100091 <description>Read: Disabled</description>
100096 <description>Read: Enabled</description>
100104 <description>Enable</description>
100113 <description>Disable interrupt</description>
100121 <description>Write '1' to disable interrupt for event STOPPED</description>
100128 <description>Read: Disabled</description>
100133 <description>Read: Enabled</description>
100141 <description>Disable</description>
100148 <description>Write '1' to disable interrupt for event SEQSTARTED[0]</description>
100155 <description>Read: Disabled</description>
100160 <description>Read: Enabled</description>
100168 <description>Disable</description>
100175 <description>Write '1' to disable interrupt for event SEQSTARTED[1]</description>
100182 <description>Read: Disabled</description>
100187 <description>Read: Enabled</description>
100195 <description>Disable</description>
100202 <description>Write '1' to disable interrupt for event SEQEND[0]</description>
100209 <description>Read: Disabled</description>
100214 <description>Read: Enabled</description>
100222 <description>Disable</description>
100229 <description>Write '1' to disable interrupt for event SEQEND[1]</description>
100236 <description>Read: Disabled</description>
100241 <description>Read: Enabled</description>
100249 <description>Disable</description>
100256 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
100263 <description>Read: Disabled</description>
100268 <description>Read: Enabled</description>
100276 <description>Disable</description>
100283 <description>Write '1' to disable interrupt for event LOOPSDONE</description>
100290 <description>Read: Disabled</description>
100295 <description>Read: Enabled</description>
100303 <description>Disable</description>
100310 <description>Write '1' to disable interrupt for event RAMUNDERFLOW</description>
100317 <description>Read: Disabled</description>
100322 <description>Read: Enabled</description>
100330 <description>Disable</description>
100337 <description>Write '1' to disable interrupt for event DMASEQ0END</description>
100344 <description>Read: Disabled</description>
100349 <description>Read: Enabled</description>
100357 <description>Disable</description>
100364 <description>Write '1' to disable interrupt for event DMASEQ0READY</description>
100371 <description>Read: Disabled</description>
100376 <description>Read: Enabled</description>
100384 <description>Disable</description>
100391 <description>Write '1' to disable interrupt for event DMASEQ0BUSERROR</description>
100398 <description>Read: Disabled</description>
100403 <description>Read: Enabled</description>
100411 <description>Disable</description>
100418 <description>Write '1' to disable interrupt for event DMASEQ1END</description>
100425 <description>Read: Disabled</description>
100430 <description>Read: Enabled</description>
100438 <description>Disable</description>
100445 <description>Write '1' to disable interrupt for event DMASEQ1READY</description>
100452 <description>Read: Disabled</description>
100457 <description>Read: Enabled</description>
100465 <description>Disable</description>
100472 <description>Write '1' to disable interrupt for event DMASEQ1BUSERROR</description>
100479 <description>Read: Disabled</description>
100484 <description>Read: Enabled</description>
100492 <description>Disable</description>
100499 <description>Write '1' to disable interrupt for event COMPAREMATCH[0]</description>
100506 <description>Read: Disabled</description>
100511 <description>Read: Enabled</description>
100519 <description>Disable</description>
100526 <description>Write '1' to disable interrupt for event COMPAREMATCH[1]</description>
100533 <description>Read: Disabled</description>
100538 <description>Read: Enabled</description>
100546 <description>Disable</description>
100553 <description>Write '1' to disable interrupt for event COMPAREMATCH[2]</description>
100560 <description>Read: Disabled</description>
100565 <description>Read: Enabled</description>
100573 <description>Disable</description>
100580 <description>Write '1' to disable interrupt for event COMPAREMATCH[3]</description>
100587 <description>Read: Disabled</description>
100592 <description>Read: Enabled</description>
100600 <description>Disable</description>
100609 <description>Pending interrupts</description>
100617 <description>Read pending status of interrupt for event STOPPED</description>
100624 <description>Read: Not pending</description>
100629 <description>Read: Pending</description>
100636 <description>Read pending status of interrupt for event SEQSTARTED[0]</description>
100643 <description>Read: Not pending</description>
100648 <description>Read: Pending</description>
100655 <description>Read pending status of interrupt for event SEQSTARTED[1]</description>
100662 <description>Read: Not pending</description>
100667 <description>Read: Pending</description>
100674 <description>Read pending status of interrupt for event SEQEND[0]</description>
100681 <description>Read: Not pending</description>
100686 <description>Read: Pending</description>
100693 <description>Read pending status of interrupt for event SEQEND[1]</description>
100700 <description>Read: Not pending</description>
100705 <description>Read: Pending</description>
100712 <description>Read pending status of interrupt for event PWMPERIODEND</description>
100719 <description>Read: Not pending</description>
100724 <description>Read: Pending</description>
100731 <description>Read pending status of interrupt for event LOOPSDONE</description>
100738 <description>Read: Not pending</description>
100743 <description>Read: Pending</description>
100750 <description>Read pending status of interrupt for event RAMUNDERFLOW</description>
100757 <description>Read: Not pending</description>
100762 <description>Read: Pending</description>
100769 <description>Read pending status of interrupt for event DMASEQ0END</description>
100776 <description>Read: Not pending</description>
100781 <description>Read: Pending</description>
100788 <description>Read pending status of interrupt for event DMASEQ0READY</description>
100795 <description>Read: Not pending</description>
100800 <description>Read: Pending</description>
100807 <description>Read pending status of interrupt for event DMASEQ0BUSERROR</description>
100814 <description>Read: Not pending</description>
100819 <description>Read: Pending</description>
100826 <description>Read pending status of interrupt for event DMASEQ1END</description>
100833 <description>Read: Not pending</description>
100838 <description>Read: Pending</description>
100845 <description>Read pending status of interrupt for event DMASEQ1READY</description>
100852 <description>Read: Not pending</description>
100857 <description>Read: Pending</description>
100864 <description>Read pending status of interrupt for event DMASEQ1BUSERROR</description>
100871 <description>Read: Not pending</description>
100876 <description>Read: Pending</description>
100883 <description>Read pending status of interrupt for event COMPAREMATCH[0]</description>
100890 <description>Read: Not pending</description>
100895 <description>Read: Pending</description>
100902 <description>Read pending status of interrupt for event COMPAREMATCH[1]</description>
100909 <description>Read: Not pending</description>
100914 <description>Read: Pending</description>
100921 <description>Read pending status of interrupt for event COMPAREMATCH[2]</description>
100928 <description>Read: Not pending</description>
100933 <description>Read: Pending</description>
100940 <description>Read pending status of interrupt for event COMPAREMATCH[3]</description>
100947 <description>Read: Not pending</description>
100952 <description>Read: Pending</description>
100961 <description>PWM module enable register</description>
100969 <description>Enable or disable PWM module</description>
100975 <description>Disabled</description>
100980 <description>Enable</description>
100989 <description>Selects operating mode of the wave counter</description>
100997 <description>Selects up mode or up-and-down mode for the counter</description>
101003 <description>Up counter, edge-aligned PWM duty cycle</description>
101008 <description>Up and down counter, center-aligned PWM duty cycle</description>
101017 <description>Value up to which the pulse generator counter counts</description>
101025 …description>Value up to which the pulse generator counter counts. This register is ignored when DE…
101033 <description>Configuration for PWM_CLK</description>
101041 <description>Prescaler of PWM_CLK</description>
101047 <description>Divide by 1 (16 MHz)</description>
101052 <description>Divide by 2 (8 MHz)</description>
101057 <description>Divide by 4 (4 MHz)</description>
101062 <description>Divide by 8 (2 MHz)</description>
101067 <description>Divide by 16 (1 MHz)</description>
101072 <description>Divide by 32 (500 kHz)</description>
101077 <description>Divide by 64 (250 kHz)</description>
101082 <description>Divide by 128 (125 kHz)</description>
101091 <description>Configuration of the decoder</description>
101099 … <description>How a sequence is read from RAM and spread to the compare register</description>
101105 <description>1st half word (16-bit) used in all PWM channels 0..3</description>
101110 … <description>1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3</description>
101115 … <description>1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3</description>
101120 … <description>1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP</description>
101127 <description>Selects source for advancing the active sequence</description>
101133 … <description>SEQ[n].REFRESH is used to determine loading internal compare registers</description>
101138 …<description>NEXTSTEP task causes a new value to be loaded to internal compare registers</descript…
101147 <description>Number of playbacks of a loop</description>
101155 <description>Number of playbacks of pattern cycles</description>
101161 <description>Looping disabled (stop at the end of the sequence)</description>
101170 <description>Configure the output value on the PWM channel during idle</description>
101178 <description>Idle output value for PWM channel [0]</description>
101184 <description>Idle output value for PWM channel [1]</description>
101190 <description>Idle output value for PWM channel [2]</description>
101196 <description>Idle output value for PWM channel [3]</description>
101206 <description>Unspecified</description>
101212 …<description>Description cluster: Number of additional PWM periods between samples loaded into com…
101220 …<description>Number of additional PWM periods between samples loaded into compare register (load e…
101226 <description>Update every PWM period</description>
101235 <description>Description cluster: Time added after the sequence</description>
101243 <description>Time added after the sequence in PWM periods</description>
101252 <description>Unspecified</description>
101260 <description>Description collection: Output pin select for PWM channel n</description>
101268 <description>Pin number</description>
101274 <description>Port number</description>
101280 <description>Connection</description>
101286 <description>Disconnect</description>
101291 <description>Connect</description>
101301 <description>Unspecified</description>
101309 <description>Unspecified</description>
101315 <description>Description cluster: RAM buffer start address</description>
101323 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
101331 … <description>Description cluster: Maximum number of bytes in channel buffer</description>
101339 <description>Maximum number of bytes in channel buffer</description>
101347 …<description>Description cluster: Number of bytes transferred in the last transaction, updated aft…
101355 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
101363 …<description>Description cluster: Number of bytes transferred in the current transaction</descript…
101371 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
101379 …<description>Description cluster: Terminate the transaction if a BUSERROR event is detected.</desc…
101392 <description>Disable</description>
101397 <description>Enable</description>
101406 …<description>Description cluster: Address of transaction that generated the last BUSERROR event.</…
101425 <description>SPI Slave 0</description>
101444 <description>Acquire SPI semaphore</description>
101452 <description>Acquire SPI semaphore</description>
101458 <description>Trigger task</description>
101467 <description>Release SPI semaphore, enabling the SPI slave to acquire it</description>
101475 <description>Release SPI semaphore, enabling the SPI slave to acquire it</description>
101481 <description>Trigger task</description>
101490 <description>Peripheral tasks.</description>
101496 <description>Peripheral tasks.</description>
101504 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
101512 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
101518 <description>Trigger task</description>
101529 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
101537 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
101543 <description>Trigger task</description>
101554 <description>Subscribe configuration for task ACQUIRE</description>
101562 <description>DPPI channel that task ACQUIRE will subscribe to</description>
101573 <description>Disable subscription</description>
101578 <description>Enable subscription</description>
101587 <description>Subscribe configuration for task RELEASE</description>
101595 <description>DPPI channel that task RELEASE will subscribe to</description>
101606 <description>Disable subscription</description>
101611 <description>Enable subscription</description>
101620 <description>Subscribe configuration for tasks</description>
101626 <description>Subscribe configuration for tasks</description>
101634 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
101642 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
101653 <description>Disable subscription</description>
101658 <description>Enable subscription</description>
101669 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
101677 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
101688 <description>Disable subscription</description>
101693 <description>Enable subscription</description>
101704 <description>Granted transaction completed</description>
101712 <description>Granted transaction completed</description>
101718 <description>Event not generated</description>
101723 <description>Event generated</description>
101732 <description>Semaphore acquired</description>
101740 <description>Semaphore acquired</description>
101746 <description>Event not generated</description>
101751 <description>Event generated</description>
101760 <description>Peripheral events.</description>
101766 <description>Peripheral events.</description>
101772 <description>Generated after all MAXCNT bytes have been transferred</description>
101780 <description>Generated after all MAXCNT bytes have been transferred</description>
101786 <description>Event not generated</description>
101791 <description>Event generated</description>
101800 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
101808 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
101814 <description>Event not generated</description>
101819 <description>Event generated</description>
101828 <description>An error occured during the bus transfer.</description>
101836 <description>An error occured during the bus transfer.</description>
101842 <description>Event not generated</description>
101847 <description>Event generated</description>
101858 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
101866 <description>Pattern match is detected on the DMA data bus.</description>
101872 <description>Event not generated</description>
101877 <description>Event generated</description>
101887 <description>Peripheral events.</description>
101893 <description>Generated after all MAXCNT bytes have been transferred</description>
101901 <description>Generated after all MAXCNT bytes have been transferred</description>
101907 <description>Event not generated</description>
101912 <description>Event generated</description>
101921 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
101929 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
101935 <description>Event not generated</description>
101940 <description>Event generated</description>
101949 <description>An error occured during the bus transfer.</description>
101957 <description>An error occured during the bus transfer.</description>
101963 <description>Event not generated</description>
101968 <description>Event generated</description>
101979 <description>Publish configuration for event END</description>
101987 <description>DPPI channel that event END will publish to</description>
101998 <description>Disable publishing</description>
102003 <description>Enable publishing</description>
102012 <description>Publish configuration for event ACQUIRED</description>
102020 <description>DPPI channel that event ACQUIRED will publish to</description>
102031 <description>Disable publishing</description>
102036 <description>Enable publishing</description>
102045 <description>Publish configuration for events</description>
102051 <description>Publish configuration for events</description>
102057 <description>Publish configuration for event END</description>
102065 <description>DPPI channel that event END will publish to</description>
102076 <description>Disable publishing</description>
102081 <description>Enable publishing</description>
102090 <description>Publish configuration for event READY</description>
102098 <description>DPPI channel that event READY will publish to</description>
102109 <description>Disable publishing</description>
102114 <description>Enable publishing</description>
102123 <description>Publish configuration for event BUSERROR</description>
102131 <description>DPPI channel that event BUSERROR will publish to</description>
102142 <description>Disable publishing</description>
102147 <description>Enable publishing</description>
102158 … <description>Description collection: Publish configuration for event MATCH[n]</description>
102166 <description>DPPI channel that event MATCH[n] will publish to</description>
102177 <description>Disable publishing</description>
102182 <description>Enable publishing</description>
102192 <description>Publish configuration for events</description>
102198 <description>Publish configuration for event END</description>
102206 <description>DPPI channel that event END will publish to</description>
102217 <description>Disable publishing</description>
102222 <description>Enable publishing</description>
102231 <description>Publish configuration for event READY</description>
102239 <description>DPPI channel that event READY will publish to</description>
102250 <description>Disable publishing</description>
102255 <description>Enable publishing</description>
102264 <description>Publish configuration for event BUSERROR</description>
102272 <description>DPPI channel that event BUSERROR will publish to</description>
102283 <description>Disable publishing</description>
102288 <description>Enable publishing</description>
102299 <description>Shortcuts between local events and tasks</description>
102307 <description>Shortcut between event END and task ACQUIRE</description>
102313 <description>Disable shortcut</description>
102318 <description>Enable shortcut</description>
102325 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
102331 <description>Disable shortcut</description>
102336 <description>Enable shortcut</description>
102343 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
102349 <description>Disable shortcut</description>
102354 <description>Enable shortcut</description>
102361 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
102367 <description>Disable shortcut</description>
102372 <description>Enable shortcut</description>
102379 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
102385 <description>Disable shortcut</description>
102390 <description>Enable shortcut</description>
102397 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
102403 <description>Disable shortcut</description>
102408 <description>Enable shortcut</description>
102415 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
102421 <description>Disable shortcut</description>
102426 <description>Enable shortcut</description>
102433 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
102439 <description>Disable shortcut</description>
102444 <description>Enable shortcut</description>
102451 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
102457 <description>Disable shortcut</description>
102462 <description>Enable shortcut</description>
102471 <description>Enable interrupt</description>
102479 <description>Write '1' to enable interrupt for event END</description>
102486 <description>Read: Disabled</description>
102491 <description>Read: Enabled</description>
102499 <description>Enable</description>
102506 <description>Write '1' to enable interrupt for event ACQUIRED</description>
102513 <description>Read: Disabled</description>
102518 <description>Read: Enabled</description>
102526 <description>Enable</description>
102533 <description>Write '1' to enable interrupt for event DMARXEND</description>
102540 <description>Read: Disabled</description>
102545 <description>Read: Enabled</description>
102553 <description>Enable</description>
102560 <description>Write '1' to enable interrupt for event DMARXREADY</description>
102567 <description>Read: Disabled</description>
102572 <description>Read: Enabled</description>
102580 <description>Enable</description>
102587 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
102594 <description>Read: Disabled</description>
102599 <description>Read: Enabled</description>
102607 <description>Enable</description>
102614 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
102621 <description>Read: Disabled</description>
102626 <description>Read: Enabled</description>
102634 <description>Enable</description>
102641 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
102648 <description>Read: Disabled</description>
102653 <description>Read: Enabled</description>
102661 <description>Enable</description>
102668 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
102675 <description>Read: Disabled</description>
102680 <description>Read: Enabled</description>
102688 <description>Enable</description>
102695 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
102702 <description>Read: Disabled</description>
102707 <description>Read: Enabled</description>
102715 <description>Enable</description>
102722 <description>Write '1' to enable interrupt for event DMATXEND</description>
102729 <description>Read: Disabled</description>
102734 <description>Read: Enabled</description>
102742 <description>Enable</description>
102749 <description>Write '1' to enable interrupt for event DMATXREADY</description>
102756 <description>Read: Disabled</description>
102761 <description>Read: Enabled</description>
102769 <description>Enable</description>
102776 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
102783 <description>Read: Disabled</description>
102788 <description>Read: Enabled</description>
102796 <description>Enable</description>
102805 <description>Disable interrupt</description>
102813 <description>Write '1' to disable interrupt for event END</description>
102820 <description>Read: Disabled</description>
102825 <description>Read: Enabled</description>
102833 <description>Disable</description>
102840 <description>Write '1' to disable interrupt for event ACQUIRED</description>
102847 <description>Read: Disabled</description>
102852 <description>Read: Enabled</description>
102860 <description>Disable</description>
102867 <description>Write '1' to disable interrupt for event DMARXEND</description>
102874 <description>Read: Disabled</description>
102879 <description>Read: Enabled</description>
102887 <description>Disable</description>
102894 <description>Write '1' to disable interrupt for event DMARXREADY</description>
102901 <description>Read: Disabled</description>
102906 <description>Read: Enabled</description>
102914 <description>Disable</description>
102921 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
102928 <description>Read: Disabled</description>
102933 <description>Read: Enabled</description>
102941 <description>Disable</description>
102948 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
102955 <description>Read: Disabled</description>
102960 <description>Read: Enabled</description>
102968 <description>Disable</description>
102975 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
102982 <description>Read: Disabled</description>
102987 <description>Read: Enabled</description>
102995 <description>Disable</description>
103002 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
103009 <description>Read: Disabled</description>
103014 <description>Read: Enabled</description>
103022 <description>Disable</description>
103029 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
103036 <description>Read: Disabled</description>
103041 <description>Read: Enabled</description>
103049 <description>Disable</description>
103056 <description>Write '1' to disable interrupt for event DMATXEND</description>
103063 <description>Read: Disabled</description>
103068 <description>Read: Enabled</description>
103076 <description>Disable</description>
103083 <description>Write '1' to disable interrupt for event DMATXREADY</description>
103090 <description>Read: Disabled</description>
103095 <description>Read: Enabled</description>
103103 <description>Disable</description>
103110 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
103117 <description>Read: Disabled</description>
103122 <description>Read: Enabled</description>
103130 <description>Disable</description>
103139 <description>Semaphore status register</description>
103147 <description>Semaphore status</description>
103153 <description>Semaphore is free</description>
103158 <description>Semaphore is assigned to CPU</description>
103163 <description>Semaphore is assigned to SPI slave</description>
103168 … <description>Semaphore is assigned to SPI but a handover to the CPU is pending</description>
103177 <description>Status from last transaction</description>
103185 <description>TX buffer over-read detected, and prevented</description>
103192 <description>Read: error not present</description>
103197 <description>Read: error present</description>
103205 <description>Write: clear error on writing '1'</description>
103212 <description>RX buffer overflow detected, and prevented</description>
103219 <description>Read: error not present</description>
103224 <description>Read: error present</description>
103232 <description>Write: clear error on writing '1'</description>
103241 <description>Enable SPI slave</description>
103249 <description>Enable or disable SPI slave</description>
103255 <description>Disable SPI slave</description>
103260 <description>Enable SPI slave</description>
103269 <description>Configuration register</description>
103277 <description>Bit order</description>
103283 <description>Most significant bit shifted out first</description>
103288 <description>Least significant bit shifted out first</description>
103295 <description>Serial clock (SCK) phase</description>
103301 … <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
103306 … <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
103313 <description>Serial clock (SCK) polarity</description>
103319 <description>Active high</description>
103324 <description>Active low</description>
103333 …<description>Default character. Character clocked out in case of an ignored transaction.</descript…
103341 …<description>Default character. Character clocked out in case of an ignored transaction.</descript…
103349 <description>Over-read character</description>
103357 …<description>Over-read character. Character clocked out after an over-read of the transmit buffer.…
103365 <description>Unspecified</description>
103371 <description>Pin select for SCK</description>
103379 <description>Pin number</description>
103385 <description>Port number</description>
103391 <description>Connection</description>
103397 <description>Disconnect</description>
103402 <description>Connect</description>
103411 <description>Pin select for MISO signal</description>
103419 <description>Pin number</description>
103425 <description>Port number</description>
103431 <description>Connection</description>
103437 <description>Disconnect</description>
103442 <description>Connect</description>
103451 <description>Pin select for MOSI signal</description>
103459 <description>Pin number</description>
103465 <description>Port number</description>
103471 <description>Connection</description>
103477 <description>Disconnect</description>
103482 <description>Connect</description>
103491 <description>Pin select for CSN signal</description>
103499 <description>Pin number</description>
103505 <description>Port number</description>
103511 <description>Connection</description>
103517 <description>Disconnect</description>
103522 <description>Connect</description>
103532 <description>Unspecified</description>
103538 <description>Unspecified</description>
103544 <description>RAM buffer start address</description>
103552 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
103560 <description>Maximum number of bytes in channel buffer</description>
103568 <description>Maximum number of bytes in channel buffer</description>
103576 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
103584 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
103592 <description>Number of bytes transferred in the current transaction</description>
103600 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
103608 <description>EasyDMA list type</description>
103616 <description>List type</description>
103622 <description>Disable EasyDMA list</description>
103627 <description>Use array list</description>
103636 <description>Terminate the transaction if a BUSERROR event is detected.</description>
103649 <description>Disable</description>
103654 <description>Enable</description>
103663 … <description>Address of transaction that generated the last BUSERROR event.</description>
103678 … <description>Registers to control the behavior of the pattern matcher engine</description>
103684 <description>Configure individual match events</description>
103692 <description>Enable match filter 0</description>
103698 <description>Match filter disabled</description>
103703 <description>Match filter enabled</description>
103710 <description>Enable match filter 1</description>
103716 <description>Match filter disabled</description>
103721 <description>Match filter enabled</description>
103728 <description>Enable match filter 2</description>
103734 <description>Match filter disabled</description>
103739 <description>Match filter enabled</description>
103746 <description>Enable match filter 3</description>
103752 <description>Match filter disabled</description>
103757 <description>Match filter enabled</description>
103764 <description>Configure match filter 0 as one-shot or sticky</description>
103770 <description>Match filter stays enabled until disabled by task</description>
103775 … <description>Match filter stays enabled until next data word is received</description>
103782 <description>Configure match filter 1 as one-shot or sticky</description>
103788 <description>Match filter stays enabled until disabled by task</description>
103793 … <description>Match filter stays enabled until next data word is received</description>
103800 <description>Configure match filter 2 as one-shot or sticky</description>
103806 <description>Match filter stays enabled until disabled by task</description>
103811 … <description>Match filter stays enabled until next data word is received</description>
103818 <description>Configure match filter 3 as one-shot or sticky</description>
103824 <description>Match filter stays enabled until disabled by task</description>
103829 … <description>Match filter stays enabled until next data word is received</description>
103840 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
103848 <description>Data to look for</description>
103858 <description>Unspecified</description>
103864 <description>RAM buffer start address</description>
103872 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
103880 <description>Maximum number of bytes in channel buffer</description>
103888 <description>Maximum number of bytes in channel buffer</description>
103896 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
103904 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
103912 <description>Number of bytes transferred in the current transaction</description>
103920 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
103928 <description>EasyDMA list type</description>
103936 <description>List type</description>
103942 <description>Disable EasyDMA list</description>
103947 <description>Use array list</description>
103956 <description>Terminate the transaction if a BUSERROR event is detected.</description>
103969 <description>Disable</description>
103974 <description>Enable</description>
103983 … <description>Address of transaction that generated the last BUSERROR event.</description>
104002 <description>Serial Peripheral Interface Master with EasyDMA 0</description>
104021 <description>Start SPI transaction</description>
104029 <description>Start SPI transaction</description>
104035 <description>Trigger task</description>
104044 <description>Stop SPI transaction</description>
104052 <description>Stop SPI transaction</description>
104058 <description>Trigger task</description>
104067 <description>Suspend SPI transaction</description>
104075 <description>Suspend SPI transaction</description>
104081 <description>Trigger task</description>
104090 <description>Resume SPI transaction</description>
104098 <description>Resume SPI transaction</description>
104104 <description>Trigger task</description>
104113 <description>Peripheral tasks.</description>
104119 <description>Peripheral tasks.</description>
104127 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
104135 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
104141 <description>Trigger task</description>
104152 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
104160 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
104166 <description>Trigger task</description>
104177 <description>Subscribe configuration for task START</description>
104185 <description>DPPI channel that task START will subscribe to</description>
104196 <description>Disable subscription</description>
104201 <description>Enable subscription</description>
104210 <description>Subscribe configuration for task STOP</description>
104218 <description>DPPI channel that task STOP will subscribe to</description>
104229 <description>Disable subscription</description>
104234 <description>Enable subscription</description>
104243 <description>Subscribe configuration for task SUSPEND</description>
104251 <description>DPPI channel that task SUSPEND will subscribe to</description>
104262 <description>Disable subscription</description>
104267 <description>Enable subscription</description>
104276 <description>Subscribe configuration for task RESUME</description>
104284 <description>DPPI channel that task RESUME will subscribe to</description>
104295 <description>Disable subscription</description>
104300 <description>Enable subscription</description>
104309 <description>Subscribe configuration for tasks</description>
104315 <description>Subscribe configuration for tasks</description>
104323 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
104331 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
104342 <description>Disable subscription</description>
104347 <description>Enable subscription</description>
104358 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
104366 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
104377 <description>Disable subscription</description>
104382 <description>Enable subscription</description>
104393 <description>SPI transaction has started</description>
104401 <description>SPI transaction has started</description>
104407 <description>Event not generated</description>
104412 <description>Event generated</description>
104421 <description>SPI transaction has stopped</description>
104429 <description>SPI transaction has stopped</description>
104435 <description>Event not generated</description>
104440 <description>Event generated</description>
104449 <description>End of RXD buffer and TXD buffer reached</description>
104457 <description>End of RXD buffer and TXD buffer reached</description>
104463 <description>Event not generated</description>
104468 <description>Event generated</description>
104477 <description>Peripheral events.</description>
104483 <description>Peripheral events.</description>
104489 <description>Generated after all MAXCNT bytes have been transferred</description>
104497 <description>Generated after all MAXCNT bytes have been transferred</description>
104503 <description>Event not generated</description>
104508 <description>Event generated</description>
104517 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
104525 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
104531 <description>Event not generated</description>
104536 <description>Event generated</description>
104545 <description>An error occured during the bus transfer.</description>
104553 <description>An error occured during the bus transfer.</description>
104559 <description>Event not generated</description>
104564 <description>Event generated</description>
104575 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
104583 <description>Pattern match is detected on the DMA data bus.</description>
104589 <description>Event not generated</description>
104594 <description>Event generated</description>
104604 <description>Peripheral events.</description>
104610 <description>Generated after all MAXCNT bytes have been transferred</description>
104618 <description>Generated after all MAXCNT bytes have been transferred</description>
104624 <description>Event not generated</description>
104629 <description>Event generated</description>
104638 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
104646 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
104652 <description>Event not generated</description>
104657 <description>Event generated</description>
104666 <description>An error occured during the bus transfer.</description>
104674 <description>An error occured during the bus transfer.</description>
104680 <description>Event not generated</description>
104685 <description>Event generated</description>
104696 <description>Publish configuration for event STARTED</description>
104704 <description>DPPI channel that event STARTED will publish to</description>
104715 <description>Disable publishing</description>
104720 <description>Enable publishing</description>
104729 <description>Publish configuration for event STOPPED</description>
104737 <description>DPPI channel that event STOPPED will publish to</description>
104748 <description>Disable publishing</description>
104753 <description>Enable publishing</description>
104762 <description>Publish configuration for event END</description>
104770 <description>DPPI channel that event END will publish to</description>
104781 <description>Disable publishing</description>
104786 <description>Enable publishing</description>
104795 <description>Publish configuration for events</description>
104801 <description>Publish configuration for events</description>
104807 <description>Publish configuration for event END</description>
104815 <description>DPPI channel that event END will publish to</description>
104826 <description>Disable publishing</description>
104831 <description>Enable publishing</description>
104840 <description>Publish configuration for event READY</description>
104848 <description>DPPI channel that event READY will publish to</description>
104859 <description>Disable publishing</description>
104864 <description>Enable publishing</description>
104873 <description>Publish configuration for event BUSERROR</description>
104881 <description>DPPI channel that event BUSERROR will publish to</description>
104892 <description>Disable publishing</description>
104897 <description>Enable publishing</description>
104908 … <description>Description collection: Publish configuration for event MATCH[n]</description>
104916 <description>DPPI channel that event MATCH[n] will publish to</description>
104927 <description>Disable publishing</description>
104932 <description>Enable publishing</description>
104942 <description>Publish configuration for events</description>
104948 <description>Publish configuration for event END</description>
104956 <description>DPPI channel that event END will publish to</description>
104967 <description>Disable publishing</description>
104972 <description>Enable publishing</description>
104981 <description>Publish configuration for event READY</description>
104989 <description>DPPI channel that event READY will publish to</description>
105000 <description>Disable publishing</description>
105005 <description>Enable publishing</description>
105014 <description>Publish configuration for event BUSERROR</description>
105022 <description>DPPI channel that event BUSERROR will publish to</description>
105033 <description>Disable publishing</description>
105038 <description>Enable publishing</description>
105049 <description>Shortcuts between local events and tasks</description>
105057 <description>Shortcut between event END and task START</description>
105063 <description>Disable shortcut</description>
105068 <description>Enable shortcut</description>
105075 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
105081 <description>Disable shortcut</description>
105086 <description>Enable shortcut</description>
105093 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
105099 <description>Disable shortcut</description>
105104 <description>Enable shortcut</description>
105111 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
105117 <description>Disable shortcut</description>
105122 <description>Enable shortcut</description>
105129 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
105135 <description>Disable shortcut</description>
105140 <description>Enable shortcut</description>
105147 … <description>Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]</description>
105153 <description>Disable shortcut</description>
105158 <description>Enable shortcut</description>
105165 … <description>Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]</description>
105171 <description>Disable shortcut</description>
105176 <description>Enable shortcut</description>
105183 … <description>Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]</description>
105189 <description>Disable shortcut</description>
105194 <description>Enable shortcut</description>
105201 … <description>Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]</description>
105207 <description>Disable shortcut</description>
105212 <description>Enable shortcut</description>
105221 <description>Enable interrupt</description>
105229 <description>Write '1' to enable interrupt for event STARTED</description>
105236 <description>Read: Disabled</description>
105241 <description>Read: Enabled</description>
105249 <description>Enable</description>
105256 <description>Write '1' to enable interrupt for event STOPPED</description>
105263 <description>Read: Disabled</description>
105268 <description>Read: Enabled</description>
105276 <description>Enable</description>
105283 <description>Write '1' to enable interrupt for event END</description>
105290 <description>Read: Disabled</description>
105295 <description>Read: Enabled</description>
105303 <description>Enable</description>
105310 <description>Write '1' to enable interrupt for event DMARXEND</description>
105317 <description>Read: Disabled</description>
105322 <description>Read: Enabled</description>
105330 <description>Enable</description>
105337 <description>Write '1' to enable interrupt for event DMARXREADY</description>
105344 <description>Read: Disabled</description>
105349 <description>Read: Enabled</description>
105357 <description>Enable</description>
105364 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
105371 <description>Read: Disabled</description>
105376 <description>Read: Enabled</description>
105384 <description>Enable</description>
105391 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
105398 <description>Read: Disabled</description>
105403 <description>Read: Enabled</description>
105411 <description>Enable</description>
105418 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
105425 <description>Read: Disabled</description>
105430 <description>Read: Enabled</description>
105438 <description>Enable</description>
105445 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
105452 <description>Read: Disabled</description>
105457 <description>Read: Enabled</description>
105465 <description>Enable</description>
105472 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
105479 <description>Read: Disabled</description>
105484 <description>Read: Enabled</description>
105492 <description>Enable</description>
105499 <description>Write '1' to enable interrupt for event DMATXEND</description>
105506 <description>Read: Disabled</description>
105511 <description>Read: Enabled</description>
105519 <description>Enable</description>
105526 <description>Write '1' to enable interrupt for event DMATXREADY</description>
105533 <description>Read: Disabled</description>
105538 <description>Read: Enabled</description>
105546 <description>Enable</description>
105553 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
105560 <description>Read: Disabled</description>
105565 <description>Read: Enabled</description>
105573 <description>Enable</description>
105582 <description>Disable interrupt</description>
105590 <description>Write '1' to disable interrupt for event STARTED</description>
105597 <description>Read: Disabled</description>
105602 <description>Read: Enabled</description>
105610 <description>Disable</description>
105617 <description>Write '1' to disable interrupt for event STOPPED</description>
105624 <description>Read: Disabled</description>
105629 <description>Read: Enabled</description>
105637 <description>Disable</description>
105644 <description>Write '1' to disable interrupt for event END</description>
105651 <description>Read: Disabled</description>
105656 <description>Read: Enabled</description>
105664 <description>Disable</description>
105671 <description>Write '1' to disable interrupt for event DMARXEND</description>
105678 <description>Read: Disabled</description>
105683 <description>Read: Enabled</description>
105691 <description>Disable</description>
105698 <description>Write '1' to disable interrupt for event DMARXREADY</description>
105705 <description>Read: Disabled</description>
105710 <description>Read: Enabled</description>
105718 <description>Disable</description>
105725 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
105732 <description>Read: Disabled</description>
105737 <description>Read: Enabled</description>
105745 <description>Disable</description>
105752 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
105759 <description>Read: Disabled</description>
105764 <description>Read: Enabled</description>
105772 <description>Disable</description>
105779 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
105786 <description>Read: Disabled</description>
105791 <description>Read: Enabled</description>
105799 <description>Disable</description>
105806 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
105813 <description>Read: Disabled</description>
105818 <description>Read: Enabled</description>
105826 <description>Disable</description>
105833 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
105840 <description>Read: Disabled</description>
105845 <description>Read: Enabled</description>
105853 <description>Disable</description>
105860 <description>Write '1' to disable interrupt for event DMATXEND</description>
105867 <description>Read: Disabled</description>
105872 <description>Read: Enabled</description>
105880 <description>Disable</description>
105887 <description>Write '1' to disable interrupt for event DMATXREADY</description>
105894 <description>Read: Disabled</description>
105899 <description>Read: Enabled</description>
105907 <description>Disable</description>
105914 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
105921 <description>Read: Disabled</description>
105926 <description>Read: Enabled</description>
105934 <description>Disable</description>
105943 <description>Enable SPIM</description>
105951 <description>Enable or disable SPIM</description>
105957 <description>Disable SPIM</description>
105962 <description>Enable SPIM</description>
105971 <description>The prescaler is used to set the SPI frequency.</description>
105979 <description>Core clock to SCK divisor</description>
105987 <description>Configuration register</description>
105995 <description>Bit order</description>
106001 <description>Most significant bit shifted out first</description>
106006 <description>Least significant bit shifted out first</description>
106013 <description>Serial clock (SCK) phase</description>
106019 … <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
106024 … <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
106031 <description>Serial clock (SCK) polarity</description>
106037 <description>Active high</description>
106042 <description>Active low</description>
106051 <description>Unspecified</description>
106057 <description>Sample delay for input serial data on MISO</description>
106065 …description>Sample delay for input serial data on MISO. The value specifies the number of SPIM cor…
106073 …description>Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used, t…
106081 …description>Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used, t…
106090 <description>DCX configuration</description>
106098 …description>This register specifies the number of command bytes preceding the data bytes. The PSEL…
106106 <description>Polarity of CSN output</description>
106114 <description>Polarity of CSN output</description>
106120 <description>Active low (idle state high)</description>
106125 <description>Active high (idle state low)</description>
106134 …description>Selects which CSN is used, only one CSN can be active at one time. This register can b…
106142 <description>CSN Number.</description>
106150 …<description>Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MA…
106158 …<description>Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MA…
106166 <description>Unspecified</description>
106172 <description>Pin select for SCK</description>
106180 <description>Pin number</description>
106186 <description>Port number</description>
106192 <description>Connection</description>
106198 <description>Disconnect</description>
106203 <description>Connect</description>
106212 <description>Pin select for MOSI signal</description>
106220 <description>Pin number</description>
106226 <description>Port number</description>
106232 <description>Connection</description>
106238 <description>Disconnect</description>
106243 <description>Connect</description>
106252 <description>Pin select for MISO signal</description>
106260 <description>Pin number</description>
106266 <description>Port number</description>
106272 <description>Connection</description>
106278 <description>Disconnect</description>
106283 <description>Connect</description>
106292 <description>Pin select for DCX signal</description>
106300 <description>Pin number</description>
106306 <description>Port number</description>
106312 <description>Connection</description>
106318 <description>Disconnect</description>
106323 <description>Connect</description>
106334 <description>Description collection: Pin select for CSN</description>
106342 <description>Pin number</description>
106348 <description>Port number</description>
106354 <description>Connection</description>
106360 <description>Disconnect</description>
106365 <description>Connect</description>
106375 <description>Unspecified</description>
106381 <description>Unspecified</description>
106387 <description>RAM buffer start address</description>
106395 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
106403 <description>Maximum number of bytes in channel buffer</description>
106411 <description>Maximum number of bytes in channel buffer</description>
106419 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
106427 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
106435 <description>Number of bytes transferred in the current transaction</description>
106443 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
106451 <description>EasyDMA list type</description>
106459 <description>List type</description>
106465 <description>Disable EasyDMA list</description>
106470 <description>Use array list</description>
106479 <description>Terminate the transaction if a BUSERROR event is detected.</description>
106492 <description>Disable</description>
106497 <description>Enable</description>
106506 … <description>Address of transaction that generated the last BUSERROR event.</description>
106521 … <description>Registers to control the behavior of the pattern matcher engine</description>
106527 <description>Configure individual match events</description>
106535 <description>Enable match filter 0</description>
106541 <description>Match filter disabled</description>
106546 <description>Match filter enabled</description>
106553 <description>Enable match filter 1</description>
106559 <description>Match filter disabled</description>
106564 <description>Match filter enabled</description>
106571 <description>Enable match filter 2</description>
106577 <description>Match filter disabled</description>
106582 <description>Match filter enabled</description>
106589 <description>Enable match filter 3</description>
106595 <description>Match filter disabled</description>
106600 <description>Match filter enabled</description>
106607 <description>Configure match filter 0 as one-shot or sticky</description>
106613 <description>Match filter stays enabled until disabled by task</description>
106618 … <description>Match filter stays enabled until next data word is received</description>
106625 <description>Configure match filter 1 as one-shot or sticky</description>
106631 <description>Match filter stays enabled until disabled by task</description>
106636 … <description>Match filter stays enabled until next data word is received</description>
106643 <description>Configure match filter 2 as one-shot or sticky</description>
106649 <description>Match filter stays enabled until disabled by task</description>
106654 … <description>Match filter stays enabled until next data word is received</description>
106661 <description>Configure match filter 3 as one-shot or sticky</description>
106667 <description>Match filter stays enabled until disabled by task</description>
106672 … <description>Match filter stays enabled until next data word is received</description>
106683 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
106691 <description>Data to look for</description>
106701 <description>Unspecified</description>
106707 <description>RAM buffer start address</description>
106715 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
106723 <description>Maximum number of bytes in channel buffer</description>
106731 <description>Maximum number of bytes in channel buffer</description>
106739 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
106747 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
106755 <description>Number of bytes transferred in the current transaction</description>
106763 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
106771 <description>EasyDMA list type</description>
106779 <description>List type</description>
106785 <description>Disable EasyDMA list</description>
106790 <description>Use array list</description>
106799 <description>Terminate the transaction if a BUSERROR event is detected.</description>
106812 <description>Disable</description>
106817 <description>Enable</description>
106826 … <description>Address of transaction that generated the last BUSERROR event.</description>
106845 <description>UART with EasyDMA 0</description>
106865 <description>Flush RX FIFO into RX buffer</description>
106873 <description>Flush RX FIFO into RX buffer</description>
106879 <description>Trigger task</description>
106888 <description>Peripheral tasks.</description>
106894 <description>Peripheral tasks.</description>
106900 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
106908 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
106914 <description>Trigger task</description>
106923 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
106931 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
106937 <description>Trigger task</description>
106948 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
106956 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
106962 <description>Trigger task</description>
106973 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
106981 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
106987 <description>Trigger task</description>
106997 <description>Peripheral tasks.</description>
107003 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
107011 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
107017 <description>Trigger task</description>
107026 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
107034 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
107040 <description>Trigger task</description>
107051 <description>Subscribe configuration for task FLUSHRX</description>
107059 <description>DPPI channel that task FLUSHRX will subscribe to</description>
107070 <description>Disable subscription</description>
107075 <description>Enable subscription</description>
107084 <description>Subscribe configuration for tasks</description>
107090 <description>Subscribe configuration for tasks</description>
107096 <description>Subscribe configuration for task START</description>
107104 <description>DPPI channel that task START will subscribe to</description>
107115 <description>Disable subscription</description>
107120 <description>Enable subscription</description>
107129 <description>Subscribe configuration for task STOP</description>
107137 <description>DPPI channel that task STOP will subscribe to</description>
107148 <description>Disable subscription</description>
107153 <description>Enable subscription</description>
107164 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
107172 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
107183 <description>Disable subscription</description>
107188 <description>Enable subscription</description>
107199 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
107207 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
107218 <description>Disable subscription</description>
107223 <description>Enable subscription</description>
107233 <description>Subscribe configuration for tasks</description>
107239 <description>Subscribe configuration for task START</description>
107247 <description>DPPI channel that task START will subscribe to</description>
107258 <description>Disable subscription</description>
107263 <description>Enable subscription</description>
107272 <description>Subscribe configuration for task STOP</description>
107280 <description>DPPI channel that task STOP will subscribe to</description>
107291 <description>Disable subscription</description>
107296 <description>Enable subscription</description>
107307 <description>CTS is activated (set low). Clear To Send.</description>
107315 <description>CTS is activated (set low). Clear To Send.</description>
107321 <description>Event not generated</description>
107326 <description>Event generated</description>
107335 <description>CTS is deactivated (set high). Not Clear To Send.</description>
107343 <description>CTS is deactivated (set high). Not Clear To Send.</description>
107349 <description>Event not generated</description>
107354 <description>Event generated</description>
107363 <description>Data sent from TXD</description>
107371 <description>Data sent from TXD</description>
107377 <description>Event not generated</description>
107382 <description>Event generated</description>
107391 … <description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
107399 … <description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
107405 <description>Event not generated</description>
107410 <description>Event generated</description>
107419 <description>Error detected</description>
107427 <description>Error detected</description>
107433 <description>Event not generated</description>
107438 <description>Event generated</description>
107447 <description>Receiver timeout</description>
107455 <description>Receiver timeout</description>
107461 <description>Event not generated</description>
107466 <description>Event generated</description>
107475 <description>Transmitter stopped</description>
107483 <description>Transmitter stopped</description>
107489 <description>Event not generated</description>
107494 <description>Event generated</description>
107503 <description>Peripheral events.</description>
107509 <description>Peripheral events.</description>
107515 <description>Generated after all MAXCNT bytes have been transferred</description>
107523 <description>Generated after all MAXCNT bytes have been transferred</description>
107529 <description>Event not generated</description>
107534 <description>Event generated</description>
107543 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
107551 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
107557 <description>Event not generated</description>
107562 <description>Event generated</description>
107571 <description>An error occured during the bus transfer.</description>
107579 <description>An error occured during the bus transfer.</description>
107585 <description>Event not generated</description>
107590 <description>Event generated</description>
107601 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
107609 <description>Pattern match is detected on the DMA data bus.</description>
107615 <description>Event not generated</description>
107620 <description>Event generated</description>
107630 <description>Peripheral events.</description>
107636 <description>Generated after all MAXCNT bytes have been transferred</description>
107644 <description>Generated after all MAXCNT bytes have been transferred</description>
107650 <description>Event not generated</description>
107655 <description>Event generated</description>
107664 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
107672 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
107678 <description>Event not generated</description>
107683 <description>Event generated</description>
107692 <description>An error occured during the bus transfer.</description>
107700 <description>An error occured during the bus transfer.</description>
107706 <description>Event not generated</description>
107711 <description>Event generated</description>
107722 <description>Timed out due to bus being idle while receiving data.</description>
107730 <description>Timed out due to bus being idle while receiving data.</description>
107736 <description>Event not generated</description>
107741 <description>Event generated</description>
107750 <description>Publish configuration for event CTS</description>
107758 <description>DPPI channel that event CTS will publish to</description>
107769 <description>Disable publishing</description>
107774 <description>Enable publishing</description>
107783 <description>Publish configuration for event NCTS</description>
107791 <description>DPPI channel that event NCTS will publish to</description>
107802 <description>Disable publishing</description>
107807 <description>Enable publishing</description>
107816 <description>Publish configuration for event TXDRDY</description>
107824 <description>DPPI channel that event TXDRDY will publish to</description>
107835 <description>Disable publishing</description>
107840 <description>Enable publishing</description>
107849 <description>Publish configuration for event RXDRDY</description>
107857 <description>DPPI channel that event RXDRDY will publish to</description>
107868 <description>Disable publishing</description>
107873 <description>Enable publishing</description>
107882 <description>Publish configuration for event ERROR</description>
107890 <description>DPPI channel that event ERROR will publish to</description>
107901 <description>Disable publishing</description>
107906 <description>Enable publishing</description>
107915 <description>Publish configuration for event RXTO</description>
107923 <description>DPPI channel that event RXTO will publish to</description>
107934 <description>Disable publishing</description>
107939 <description>Enable publishing</description>
107948 <description>Publish configuration for event TXSTOPPED</description>
107956 <description>DPPI channel that event TXSTOPPED will publish to</description>
107967 <description>Disable publishing</description>
107972 <description>Enable publishing</description>
107981 <description>Publish configuration for events</description>
107987 <description>Publish configuration for events</description>
107993 <description>Publish configuration for event END</description>
108001 <description>DPPI channel that event END will publish to</description>
108012 <description>Disable publishing</description>
108017 <description>Enable publishing</description>
108026 <description>Publish configuration for event READY</description>
108034 <description>DPPI channel that event READY will publish to</description>
108045 <description>Disable publishing</description>
108050 <description>Enable publishing</description>
108059 <description>Publish configuration for event BUSERROR</description>
108067 <description>DPPI channel that event BUSERROR will publish to</description>
108078 <description>Disable publishing</description>
108083 <description>Enable publishing</description>
108094 … <description>Description collection: Publish configuration for event MATCH[n]</description>
108102 <description>DPPI channel that event MATCH[n] will publish to</description>
108113 <description>Disable publishing</description>
108118 <description>Enable publishing</description>
108128 <description>Publish configuration for events</description>
108134 <description>Publish configuration for event END</description>
108142 <description>DPPI channel that event END will publish to</description>
108153 <description>Disable publishing</description>
108158 <description>Enable publishing</description>
108167 <description>Publish configuration for event READY</description>
108175 <description>DPPI channel that event READY will publish to</description>
108186 <description>Disable publishing</description>
108191 <description>Enable publishing</description>
108200 <description>Publish configuration for event BUSERROR</description>
108208 <description>DPPI channel that event BUSERROR will publish to</description>
108219 <description>Disable publishing</description>
108224 <description>Enable publishing</description>
108235 <description>Publish configuration for event FRAMETIMEOUT</description>
108243 <description>DPPI channel that event FRAMETIMEOUT will publish to</description>
108254 <description>Disable publishing</description>
108259 <description>Enable publishing</description>
108268 <description>Shortcuts between local events and tasks</description>
108276 <description>Shortcut between event DMA.RX.END and task DMA.RX.START</description>
108282 <description>Disable shortcut</description>
108287 <description>Enable shortcut</description>
108294 <description>Shortcut between event DMA.RX.END and task DMA.RX.STOP</description>
108300 <description>Disable shortcut</description>
108305 <description>Enable shortcut</description>
108312 <description>Shortcut between event DMA.TX.END and task DMA.TX.STOP</description>
108318 <description>Disable shortcut</description>
108323 <description>Enable shortcut</description>
108330 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
108336 <description>Disable shortcut</description>
108341 <description>Enable shortcut</description>
108348 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
108354 <description>Disable shortcut</description>
108359 <description>Enable shortcut</description>
108366 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
108372 <description>Disable shortcut</description>
108377 <description>Enable shortcut</description>
108384 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
108390 <description>Disable shortcut</description>
108395 <description>Enable shortcut</description>
108402 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
108408 <description>Disable shortcut</description>
108413 <description>Enable shortcut</description>
108420 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
108426 <description>Disable shortcut</description>
108431 <description>Enable shortcut</description>
108438 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
108444 <description>Disable shortcut</description>
108449 <description>Enable shortcut</description>
108456 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
108462 <description>Disable shortcut</description>
108467 <description>Enable shortcut</description>
108474 <description>Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP</description>
108480 <description>Disable shortcut</description>
108485 <description>Enable shortcut</description>
108494 <description>Enable or disable interrupt</description>
108502 <description>Enable or disable interrupt for event CTS</description>
108508 <description>Disable</description>
108513 <description>Enable</description>
108520 <description>Enable or disable interrupt for event NCTS</description>
108526 <description>Disable</description>
108531 <description>Enable</description>
108538 <description>Enable or disable interrupt for event TXDRDY</description>
108544 <description>Disable</description>
108549 <description>Enable</description>
108556 <description>Enable or disable interrupt for event RXDRDY</description>
108562 <description>Disable</description>
108567 <description>Enable</description>
108574 <description>Enable or disable interrupt for event ERROR</description>
108580 <description>Disable</description>
108585 <description>Enable</description>
108592 <description>Enable or disable interrupt for event RXTO</description>
108598 <description>Disable</description>
108603 <description>Enable</description>
108610 <description>Enable or disable interrupt for event TXSTOPPED</description>
108616 <description>Disable</description>
108621 <description>Enable</description>
108628 <description>Enable or disable interrupt for event DMARXEND</description>
108634 <description>Disable</description>
108639 <description>Enable</description>
108646 <description>Enable or disable interrupt for event DMARXREADY</description>
108652 <description>Disable</description>
108657 <description>Enable</description>
108664 <description>Enable or disable interrupt for event DMARXBUSERROR</description>
108670 <description>Disable</description>
108675 <description>Enable</description>
108682 <description>Enable or disable interrupt for event DMARXMATCH[0]</description>
108688 <description>Disable</description>
108693 <description>Enable</description>
108700 <description>Enable or disable interrupt for event DMARXMATCH[1]</description>
108706 <description>Disable</description>
108711 <description>Enable</description>
108718 <description>Enable or disable interrupt for event DMARXMATCH[2]</description>
108724 <description>Disable</description>
108729 <description>Enable</description>
108736 <description>Enable or disable interrupt for event DMARXMATCH[3]</description>
108742 <description>Disable</description>
108747 <description>Enable</description>
108754 <description>Enable or disable interrupt for event DMATXEND</description>
108760 <description>Disable</description>
108765 <description>Enable</description>
108772 <description>Enable or disable interrupt for event DMATXREADY</description>
108778 <description>Disable</description>
108783 <description>Enable</description>
108790 <description>Enable or disable interrupt for event DMATXBUSERROR</description>
108796 <description>Disable</description>
108801 <description>Enable</description>
108808 <description>Enable or disable interrupt for event FRAMETIMEOUT</description>
108814 <description>Disable</description>
108819 <description>Enable</description>
108828 <description>Enable interrupt</description>
108836 <description>Write '1' to enable interrupt for event CTS</description>
108843 <description>Read: Disabled</description>
108848 <description>Read: Enabled</description>
108856 <description>Enable</description>
108863 <description>Write '1' to enable interrupt for event NCTS</description>
108870 <description>Read: Disabled</description>
108875 <description>Read: Enabled</description>
108883 <description>Enable</description>
108890 <description>Write '1' to enable interrupt for event TXDRDY</description>
108897 <description>Read: Disabled</description>
108902 <description>Read: Enabled</description>
108910 <description>Enable</description>
108917 <description>Write '1' to enable interrupt for event RXDRDY</description>
108924 <description>Read: Disabled</description>
108929 <description>Read: Enabled</description>
108937 <description>Enable</description>
108944 <description>Write '1' to enable interrupt for event ERROR</description>
108951 <description>Read: Disabled</description>
108956 <description>Read: Enabled</description>
108964 <description>Enable</description>
108971 <description>Write '1' to enable interrupt for event RXTO</description>
108978 <description>Read: Disabled</description>
108983 <description>Read: Enabled</description>
108991 <description>Enable</description>
108998 <description>Write '1' to enable interrupt for event TXSTOPPED</description>
109005 <description>Read: Disabled</description>
109010 <description>Read: Enabled</description>
109018 <description>Enable</description>
109025 <description>Write '1' to enable interrupt for event DMARXEND</description>
109032 <description>Read: Disabled</description>
109037 <description>Read: Enabled</description>
109045 <description>Enable</description>
109052 <description>Write '1' to enable interrupt for event DMARXREADY</description>
109059 <description>Read: Disabled</description>
109064 <description>Read: Enabled</description>
109072 <description>Enable</description>
109079 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
109086 <description>Read: Disabled</description>
109091 <description>Read: Enabled</description>
109099 <description>Enable</description>
109106 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
109113 <description>Read: Disabled</description>
109118 <description>Read: Enabled</description>
109126 <description>Enable</description>
109133 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
109140 <description>Read: Disabled</description>
109145 <description>Read: Enabled</description>
109153 <description>Enable</description>
109160 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
109167 <description>Read: Disabled</description>
109172 <description>Read: Enabled</description>
109180 <description>Enable</description>
109187 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
109194 <description>Read: Disabled</description>
109199 <description>Read: Enabled</description>
109207 <description>Enable</description>
109214 <description>Write '1' to enable interrupt for event DMATXEND</description>
109221 <description>Read: Disabled</description>
109226 <description>Read: Enabled</description>
109234 <description>Enable</description>
109241 <description>Write '1' to enable interrupt for event DMATXREADY</description>
109248 <description>Read: Disabled</description>
109253 <description>Read: Enabled</description>
109261 <description>Enable</description>
109268 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
109275 <description>Read: Disabled</description>
109280 <description>Read: Enabled</description>
109288 <description>Enable</description>
109295 <description>Write '1' to enable interrupt for event FRAMETIMEOUT</description>
109302 <description>Read: Disabled</description>
109307 <description>Read: Enabled</description>
109315 <description>Enable</description>
109324 <description>Disable interrupt</description>
109332 <description>Write '1' to disable interrupt for event CTS</description>
109339 <description>Read: Disabled</description>
109344 <description>Read: Enabled</description>
109352 <description>Disable</description>
109359 <description>Write '1' to disable interrupt for event NCTS</description>
109366 <description>Read: Disabled</description>
109371 <description>Read: Enabled</description>
109379 <description>Disable</description>
109386 <description>Write '1' to disable interrupt for event TXDRDY</description>
109393 <description>Read: Disabled</description>
109398 <description>Read: Enabled</description>
109406 <description>Disable</description>
109413 <description>Write '1' to disable interrupt for event RXDRDY</description>
109420 <description>Read: Disabled</description>
109425 <description>Read: Enabled</description>
109433 <description>Disable</description>
109440 <description>Write '1' to disable interrupt for event ERROR</description>
109447 <description>Read: Disabled</description>
109452 <description>Read: Enabled</description>
109460 <description>Disable</description>
109467 <description>Write '1' to disable interrupt for event RXTO</description>
109474 <description>Read: Disabled</description>
109479 <description>Read: Enabled</description>
109487 <description>Disable</description>
109494 <description>Write '1' to disable interrupt for event TXSTOPPED</description>
109501 <description>Read: Disabled</description>
109506 <description>Read: Enabled</description>
109514 <description>Disable</description>
109521 <description>Write '1' to disable interrupt for event DMARXEND</description>
109528 <description>Read: Disabled</description>
109533 <description>Read: Enabled</description>
109541 <description>Disable</description>
109548 <description>Write '1' to disable interrupt for event DMARXREADY</description>
109555 <description>Read: Disabled</description>
109560 <description>Read: Enabled</description>
109568 <description>Disable</description>
109575 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
109582 <description>Read: Disabled</description>
109587 <description>Read: Enabled</description>
109595 <description>Disable</description>
109602 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
109609 <description>Read: Disabled</description>
109614 <description>Read: Enabled</description>
109622 <description>Disable</description>
109629 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
109636 <description>Read: Disabled</description>
109641 <description>Read: Enabled</description>
109649 <description>Disable</description>
109656 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
109663 <description>Read: Disabled</description>
109668 <description>Read: Enabled</description>
109676 <description>Disable</description>
109683 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
109690 <description>Read: Disabled</description>
109695 <description>Read: Enabled</description>
109703 <description>Disable</description>
109710 <description>Write '1' to disable interrupt for event DMATXEND</description>
109717 <description>Read: Disabled</description>
109722 <description>Read: Enabled</description>
109730 <description>Disable</description>
109737 <description>Write '1' to disable interrupt for event DMATXREADY</description>
109744 <description>Read: Disabled</description>
109749 <description>Read: Enabled</description>
109757 <description>Disable</description>
109764 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
109771 <description>Read: Disabled</description>
109776 <description>Read: Enabled</description>
109784 <description>Disable</description>
109791 <description>Write '1' to disable interrupt for event FRAMETIMEOUT</description>
109798 <description>Read: Disabled</description>
109803 <description>Read: Enabled</description>
109811 <description>Disable</description>
109820 <description>Error source</description>
109829 <description>Overrun error</description>
109836 <description>Read: error not present</description>
109841 <description>Read: error present</description>
109848 <description>Parity error</description>
109855 <description>Read: error not present</description>
109860 <description>Read: error present</description>
109867 <description>Framing error occurred</description>
109874 <description>Read: error not present</description>
109879 <description>Read: error present</description>
109886 <description>Break condition</description>
109893 <description>Read: error not present</description>
109898 <description>Read: error present</description>
109907 <description>Enable UART</description>
109915 <description>Enable or disable UARTE</description>
109921 <description>Disable UARTE</description>
109926 <description>Enable UARTE</description>
109935 <description>Baud rate. Accuracy depends on the HFCLK source selected.</description>
109943 <description>Baud rate</description>
109949 <description>1200 baud (actual rate: 1205)</description>
109954 <description>2400 baud (actual rate: 2396)</description>
109959 <description>4800 baud (actual rate: 4808)</description>
109964 <description>9600 baud (actual rate: 9598)</description>
109969 <description>14400 baud (actual rate: 14401)</description>
109974 <description>19200 baud (actual rate: 19208)</description>
109979 <description>28800 baud (actual rate: 28777)</description>
109984 <description>31250 baud</description>
109989 <description>38400 baud (actual rate: 38369)</description>
109994 <description>56000 baud (actual rate: 55944)</description>
109999 <description>57600 baud (actual rate: 57554)</description>
110004 <description>76800 baud (actual rate: 76923)</description>
110009 <description>115200 baud (actual rate: 115108)</description>
110014 <description>230400 baud (actual rate: 231884)</description>
110019 <description>250000 baud</description>
110024 <description>460800 baud (actual rate: 457143)</description>
110029 <description>921600 baud (actual rate: 941176)</description>
110034 <description>1 megabaud</description>
110043 …<description>Configuration of parity, hardware flow control, framesize, and packet timeout.</descr…
110051 <description>Hardware flow control</description>
110057 <description>Disabled</description>
110062 <description>Enabled</description>
110069 <description>Parity</description>
110075 <description>Exclude parity bit</description>
110080 <description>Include even parity bit</description>
110087 <description>Stop bits</description>
110093 <description>One stop bit</description>
110098 <description>Two stop bits</description>
110105 <description>Even or odd parity type</description>
110111 <description>Even parity</description>
110116 <description>Odd parity</description>
110123 <description>Set the data frame size</description>
110129 … <description>9 bit data frame size. 9th bit is treated as address bit.</description>
110134 <description>8 bit data frame size.</description>
110139 <description>7 bit data frame size.</description>
110144 <description>6 bit data frame size.</description>
110149 <description>5 bit data frame size.</description>
110154 <description>4 bit data frame size.</description>
110161 …<description>Select if data is trimmed from MSB or LSB end when the data frame size is less than 8…
110167 <description>Data is trimmed from MSB end.</description>
110172 <description>Data is trimmed from LSB end.</description>
110179 <description>Enable packet timeout.</description>
110185 <description>Packet timeout is disabled.</description>
110190 <description>Packet timeout is enabled.</description>
110199 … <description>Set the address of the UARTE for RX when used in 9 bit data frame mode.</description>
110207 <description>Set address</description>
110215 … <description>Set the number of UARTE bits to count before triggering packet timeout.</description>
110223 <description>Number of UARTE bits before timeout.</description>
110231 <description>Unspecified</description>
110237 <description>Pin select for TXD signal</description>
110245 <description>Pin number</description>
110251 <description>Port number</description>
110257 <description>Connection</description>
110263 <description>Disconnect</description>
110268 <description>Connect</description>
110277 <description>Pin select for CTS signal</description>
110285 <description>Pin number</description>
110291 <description>Port number</description>
110297 <description>Connection</description>
110303 <description>Disconnect</description>
110308 <description>Connect</description>
110317 <description>Pin select for RXD signal</description>
110325 <description>Pin number</description>
110331 <description>Port number</description>
110337 <description>Connection</description>
110343 <description>Disconnect</description>
110348 <description>Connect</description>
110357 <description>Pin select for RTS signal</description>
110365 <description>Pin number</description>
110371 <description>Port number</description>
110377 <description>Connection</description>
110383 <description>Disconnect</description>
110388 <description>Connect</description>
110398 <description>Unspecified</description>
110404 <description>Unspecified</description>
110410 <description>RAM buffer start address</description>
110418 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
110426 <description>Maximum number of bytes in channel buffer</description>
110434 <description>Maximum number of bytes in channel buffer</description>
110442 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
110450 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
110458 <description>Number of bytes transferred in the current transaction</description>
110466 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
110474 <description>EasyDMA list type</description>
110482 <description>List type</description>
110488 <description>Disable EasyDMA list</description>
110493 <description>Use array list</description>
110502 <description>Terminate the transaction if a BUSERROR event is detected.</description>
110515 <description>Disable</description>
110520 <description>Enable</description>
110529 … <description>Address of transaction that generated the last BUSERROR event.</description>
110544 … <description>Registers to control the behavior of the pattern matcher engine</description>
110550 <description>Configure individual match events</description>
110558 <description>Enable match filter 0</description>
110564 <description>Match filter disabled</description>
110569 <description>Match filter enabled</description>
110576 <description>Enable match filter 1</description>
110582 <description>Match filter disabled</description>
110587 <description>Match filter enabled</description>
110594 <description>Enable match filter 2</description>
110600 <description>Match filter disabled</description>
110605 <description>Match filter enabled</description>
110612 <description>Enable match filter 3</description>
110618 <description>Match filter disabled</description>
110623 <description>Match filter enabled</description>
110630 <description>Configure match filter 0 as one-shot or sticky</description>
110636 <description>Match filter stays enabled until disabled by task</description>
110641 … <description>Match filter stays enabled until next data word is received</description>
110648 <description>Configure match filter 1 as one-shot or sticky</description>
110654 <description>Match filter stays enabled until disabled by task</description>
110659 … <description>Match filter stays enabled until next data word is received</description>
110666 <description>Configure match filter 2 as one-shot or sticky</description>
110672 <description>Match filter stays enabled until disabled by task</description>
110677 … <description>Match filter stays enabled until next data word is received</description>
110684 <description>Configure match filter 3 as one-shot or sticky</description>
110690 <description>Match filter stays enabled until disabled by task</description>
110695 … <description>Match filter stays enabled until next data word is received</description>
110706 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
110714 <description>Data to look for</description>
110724 <description>Unspecified</description>
110730 <description>RAM buffer start address</description>
110738 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
110746 <description>Maximum number of bytes in channel buffer</description>
110754 <description>Maximum number of bytes in channel buffer</description>
110762 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
110770 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
110778 <description>Number of bytes transferred in the current transaction</description>
110786 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
110794 <description>EasyDMA list type</description>
110802 <description>List type</description>
110808 <description>Disable EasyDMA list</description>
110813 <description>Use array list</description>
110822 <description>Terminate the transaction if a BUSERROR event is detected.</description>
110835 <description>Disable</description>
110840 <description>Enable</description>
110849 … <description>Address of transaction that generated the last BUSERROR event.</description>
110868 <description>Serial Peripheral Interface Master with EasyDMA 1</description>
110879 <description>VPR peripheral registers 1</description>
110890 <description>IPCT APB registers 1</description>
110902 <description>Distributed programmable peripheral interconnect controller 1</description>
110910 <description>MUTEX 1</description>
110917 <description>Real-time counter 0</description>
110936 <description>Start RTC counter</description>
110944 <description>Start RTC counter</description>
110950 <description>Trigger task</description>
110959 <description>Stop RTC counter</description>
110967 <description>Stop RTC counter</description>
110973 <description>Trigger task</description>
110982 <description>Clear RTC counter</description>
110990 <description>Clear RTC counter</description>
110996 <description>Trigger task</description>
111005 <description>Set counter to 0xFFFFF0</description>
111013 <description>Set counter to 0xFFFFF0</description>
111019 <description>Trigger task</description>
111030 <description>Description collection: Capture RTC counter to CC[n] register</description>
111038 <description>Capture RTC counter to CC[n] register</description>
111044 <description>Trigger task</description>
111053 <description>Subscribe configuration for task START</description>
111061 <description>DPPI channel that task START will subscribe to</description>
111072 <description>Disable subscription</description>
111077 <description>Enable subscription</description>
111086 <description>Subscribe configuration for task STOP</description>
111094 <description>DPPI channel that task STOP will subscribe to</description>
111105 <description>Disable subscription</description>
111110 <description>Enable subscription</description>
111119 <description>Subscribe configuration for task CLEAR</description>
111127 <description>DPPI channel that task CLEAR will subscribe to</description>
111138 <description>Disable subscription</description>
111143 <description>Enable subscription</description>
111152 <description>Subscribe configuration for task TRIGOVRFLW</description>
111160 <description>DPPI channel that task TRIGOVRFLW will subscribe to</description>
111171 <description>Disable subscription</description>
111176 <description>Enable subscription</description>
111187 … <description>Description collection: Subscribe configuration for task CAPTURE[n]</description>
111195 <description>DPPI channel that task CAPTURE[n] will subscribe to</description>
111206 <description>Disable subscription</description>
111211 <description>Enable subscription</description>
111220 <description>Event on counter increment</description>
111228 <description>Event on counter increment</description>
111234 <description>Event not generated</description>
111239 <description>Event generated</description>
111248 <description>Event on counter overflow</description>
111256 <description>Event on counter overflow</description>
111262 <description>Event not generated</description>
111267 <description>Event generated</description>
111278 <description>Description collection: Compare event on CC[n] match</description>
111286 <description>Compare event on CC[n] match</description>
111292 <description>Event not generated</description>
111297 <description>Event generated</description>
111306 <description>Publish configuration for event TICK</description>
111314 <description>DPPI channel that event TICK will publish to</description>
111325 <description>Disable publishing</description>
111330 <description>Enable publishing</description>
111339 <description>Publish configuration for event OVRFLW</description>
111347 <description>DPPI channel that event OVRFLW will publish to</description>
111358 <description>Disable publishing</description>
111363 <description>Enable publishing</description>
111374 … <description>Description collection: Publish configuration for event COMPARE[n]</description>
111382 <description>DPPI channel that event COMPARE[n] will publish to</description>
111393 <description>Disable publishing</description>
111398 <description>Enable publishing</description>
111407 <description>Shortcuts between local events and tasks</description>
111415 <description>Shortcut between event COMPARE[0] and task CLEAR</description>
111421 <description>Disable shortcut</description>
111426 <description>Enable shortcut</description>
111433 <description>Shortcut between event COMPARE[1] and task CLEAR</description>
111439 <description>Disable shortcut</description>
111444 <description>Enable shortcut</description>
111451 <description>Shortcut between event COMPARE[2] and task CLEAR</description>
111457 <description>Disable shortcut</description>
111462 <description>Enable shortcut</description>
111469 <description>Shortcut between event COMPARE[3] and task CLEAR</description>
111475 <description>Disable shortcut</description>
111480 <description>Enable shortcut</description>
111487 <description>Shortcut between event COMPARE[4] and task CLEAR</description>
111493 <description>Disable shortcut</description>
111498 <description>Enable shortcut</description>
111505 <description>Shortcut between event COMPARE[5] and task CLEAR</description>
111511 <description>Disable shortcut</description>
111516 <description>Enable shortcut</description>
111523 <description>Shortcut between event COMPARE[6] and task CLEAR</description>
111529 <description>Disable shortcut</description>
111534 <description>Enable shortcut</description>
111541 <description>Shortcut between event COMPARE[7] and task CLEAR</description>
111547 <description>Disable shortcut</description>
111552 <description>Enable shortcut</description>
111561 <description>Enable interrupt</description>
111569 <description>Write '1' to enable interrupt for event TICK</description>
111576 <description>Read: Disabled</description>
111581 <description>Read: Enabled</description>
111589 <description>Enable</description>
111596 <description>Write '1' to enable interrupt for event OVRFLW</description>
111603 <description>Read: Disabled</description>
111608 <description>Read: Enabled</description>
111616 <description>Enable</description>
111623 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
111630 <description>Read: Disabled</description>
111635 <description>Read: Enabled</description>
111643 <description>Enable</description>
111650 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
111657 <description>Read: Disabled</description>
111662 <description>Read: Enabled</description>
111670 <description>Enable</description>
111677 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
111684 <description>Read: Disabled</description>
111689 <description>Read: Enabled</description>
111697 <description>Enable</description>
111704 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
111711 <description>Read: Disabled</description>
111716 <description>Read: Enabled</description>
111724 <description>Enable</description>
111731 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
111738 <description>Read: Disabled</description>
111743 <description>Read: Enabled</description>
111751 <description>Enable</description>
111758 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
111765 <description>Read: Disabled</description>
111770 <description>Read: Enabled</description>
111778 <description>Enable</description>
111785 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
111792 <description>Read: Disabled</description>
111797 <description>Read: Enabled</description>
111805 <description>Enable</description>
111812 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
111819 <description>Read: Disabled</description>
111824 <description>Read: Enabled</description>
111832 <description>Enable</description>
111841 <description>Disable interrupt</description>
111849 <description>Write '1' to disable interrupt for event TICK</description>
111856 <description>Read: Disabled</description>
111861 <description>Read: Enabled</description>
111869 <description>Disable</description>
111876 <description>Write '1' to disable interrupt for event OVRFLW</description>
111883 <description>Read: Disabled</description>
111888 <description>Read: Enabled</description>
111896 <description>Disable</description>
111903 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
111910 <description>Read: Disabled</description>
111915 <description>Read: Enabled</description>
111923 <description>Disable</description>
111930 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
111937 <description>Read: Disabled</description>
111942 <description>Read: Enabled</description>
111950 <description>Disable</description>
111957 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
111964 <description>Read: Disabled</description>
111969 <description>Read: Enabled</description>
111977 <description>Disable</description>
111984 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
111991 <description>Read: Disabled</description>
111996 <description>Read: Enabled</description>
112004 <description>Disable</description>
112011 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
112018 <description>Read: Disabled</description>
112023 <description>Read: Enabled</description>
112031 <description>Disable</description>
112038 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
112045 <description>Read: Disabled</description>
112050 <description>Read: Enabled</description>
112058 <description>Disable</description>
112065 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
112072 <description>Read: Disabled</description>
112077 <description>Read: Enabled</description>
112085 <description>Disable</description>
112092 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
112099 <description>Read: Disabled</description>
112104 <description>Read: Enabled</description>
112112 <description>Disable</description>
112121 <description>Enable or disable event routing</description>
112129 <description>Enable or disable event routing for event TICK</description>
112135 <description>Disable</description>
112140 <description>Enable</description>
112147 <description>Enable or disable event routing for event OVRFLW</description>
112153 <description>Disable</description>
112158 <description>Enable</description>
112165 <description>Enable or disable event routing for event COMPARE[0]</description>
112171 <description>Disable</description>
112176 <description>Enable</description>
112183 <description>Enable or disable event routing for event COMPARE[1]</description>
112189 <description>Disable</description>
112194 <description>Enable</description>
112201 <description>Enable or disable event routing for event COMPARE[2]</description>
112207 <description>Disable</description>
112212 <description>Enable</description>
112219 <description>Enable or disable event routing for event COMPARE[3]</description>
112225 <description>Disable</description>
112230 <description>Enable</description>
112237 <description>Enable or disable event routing for event COMPARE[4]</description>
112243 <description>Disable</description>
112248 <description>Enable</description>
112255 <description>Enable or disable event routing for event COMPARE[5]</description>
112261 <description>Disable</description>
112266 <description>Enable</description>
112273 <description>Enable or disable event routing for event COMPARE[6]</description>
112279 <description>Disable</description>
112284 <description>Enable</description>
112291 <description>Enable or disable event routing for event COMPARE[7]</description>
112297 <description>Disable</description>
112302 <description>Enable</description>
112311 <description>Enable event routing</description>
112319 <description>Write '1' to enable event routing for event TICK</description>
112326 <description>Read: Disabled</description>
112331 <description>Read: Enabled</description>
112339 <description>Enable</description>
112346 <description>Write '1' to enable event routing for event OVRFLW</description>
112353 <description>Read: Disabled</description>
112358 <description>Read: Enabled</description>
112366 <description>Enable</description>
112373 <description>Write '1' to enable event routing for event COMPARE[0]</description>
112380 <description>Read: Disabled</description>
112385 <description>Read: Enabled</description>
112393 <description>Enable</description>
112400 <description>Write '1' to enable event routing for event COMPARE[1]</description>
112407 <description>Read: Disabled</description>
112412 <description>Read: Enabled</description>
112420 <description>Enable</description>
112427 <description>Write '1' to enable event routing for event COMPARE[2]</description>
112434 <description>Read: Disabled</description>
112439 <description>Read: Enabled</description>
112447 <description>Enable</description>
112454 <description>Write '1' to enable event routing for event COMPARE[3]</description>
112461 <description>Read: Disabled</description>
112466 <description>Read: Enabled</description>
112474 <description>Enable</description>
112481 <description>Write '1' to enable event routing for event COMPARE[4]</description>
112488 <description>Read: Disabled</description>
112493 <description>Read: Enabled</description>
112501 <description>Enable</description>
112508 <description>Write '1' to enable event routing for event COMPARE[5]</description>
112515 <description>Read: Disabled</description>
112520 <description>Read: Enabled</description>
112528 <description>Enable</description>
112535 <description>Write '1' to enable event routing for event COMPARE[6]</description>
112542 <description>Read: Disabled</description>
112547 <description>Read: Enabled</description>
112555 <description>Enable</description>
112562 <description>Write '1' to enable event routing for event COMPARE[7]</description>
112569 <description>Read: Disabled</description>
112574 <description>Read: Enabled</description>
112582 <description>Enable</description>
112591 <description>Disable event routing</description>
112599 <description>Write '1' to disable event routing for event TICK</description>
112606 <description>Read: Disabled</description>
112611 <description>Read: Enabled</description>
112619 <description>Disable</description>
112626 <description>Write '1' to disable event routing for event OVRFLW</description>
112633 <description>Read: Disabled</description>
112638 <description>Read: Enabled</description>
112646 <description>Disable</description>
112653 <description>Write '1' to disable event routing for event COMPARE[0]</description>
112660 <description>Read: Disabled</description>
112665 <description>Read: Enabled</description>
112673 <description>Disable</description>
112680 <description>Write '1' to disable event routing for event COMPARE[1]</description>
112687 <description>Read: Disabled</description>
112692 <description>Read: Enabled</description>
112700 <description>Disable</description>
112707 <description>Write '1' to disable event routing for event COMPARE[2]</description>
112714 <description>Read: Disabled</description>
112719 <description>Read: Enabled</description>
112727 <description>Disable</description>
112734 <description>Write '1' to disable event routing for event COMPARE[3]</description>
112741 <description>Read: Disabled</description>
112746 <description>Read: Enabled</description>
112754 <description>Disable</description>
112761 <description>Write '1' to disable event routing for event COMPARE[4]</description>
112768 <description>Read: Disabled</description>
112773 <description>Read: Enabled</description>
112781 <description>Disable</description>
112788 <description>Write '1' to disable event routing for event COMPARE[5]</description>
112795 <description>Read: Disabled</description>
112800 <description>Read: Enabled</description>
112808 <description>Disable</description>
112815 <description>Write '1' to disable event routing for event COMPARE[6]</description>
112822 <description>Read: Disabled</description>
112827 <description>Read: Enabled</description>
112835 <description>Disable</description>
112842 <description>Write '1' to disable event routing for event COMPARE[7]</description>
112849 <description>Read: Disabled</description>
112854 <description>Read: Enabled</description>
112862 <description>Disable</description>
112871 <description>Current counter value</description>
112879 <description>Counter value</description>
112887 …<description>12-bit prescaler for counter frequency (32768 / (PRESCALER + 1)). Must be written whe…
112895 <description>Prescaler value</description>
112905 <description>Description collection: Compare register n</description>
112913 <description>Compare value</description>
112923 <description>Real-time counter 1</description>
112934 <description>Watchdog Timer 0</description>
112953 <description>Start WDT</description>
112961 <description>Start WDT</description>
112967 <description>Trigger task</description>
112976 <description>Stop WDT</description>
112984 <description>Stop WDT</description>
112990 <description>Trigger task</description>
112999 <description>Subscribe configuration for task START</description>
113007 <description>DPPI channel that task START will subscribe to</description>
113018 <description>Disable subscription</description>
113023 <description>Enable subscription</description>
113032 <description>Subscribe configuration for task STOP</description>
113040 <description>DPPI channel that task STOP will subscribe to</description>
113051 <description>Disable subscription</description>
113056 <description>Enable subscription</description>
113065 <description>Watchdog timeout</description>
113073 <description>Watchdog timeout</description>
113079 <description>Event not generated</description>
113084 <description>Event generated</description>
113093 <description>Watchdog stopped</description>
113101 <description>Watchdog stopped</description>
113107 <description>Event not generated</description>
113112 <description>Event generated</description>
113121 <description>Publish configuration for event TIMEOUT</description>
113129 <description>DPPI channel that event TIMEOUT will publish to</description>
113140 <description>Disable publishing</description>
113145 <description>Enable publishing</description>
113154 <description>Publish configuration for event STOPPED</description>
113162 <description>DPPI channel that event STOPPED will publish to</description>
113173 <description>Disable publishing</description>
113178 <description>Enable publishing</description>
113187 <description>Enable interrupt</description>
113195 <description>Write '1' to enable interrupt for event TIMEOUT</description>
113202 <description>Read: Disabled</description>
113207 <description>Read: Enabled</description>
113215 <description>Enable</description>
113222 <description>Write '1' to enable interrupt for event STOPPED</description>
113229 <description>Read: Disabled</description>
113234 <description>Read: Enabled</description>
113242 <description>Enable</description>
113251 <description>Disable interrupt</description>
113259 <description>Write '1' to disable interrupt for event TIMEOUT</description>
113266 <description>Read: Disabled</description>
113271 <description>Read: Enabled</description>
113279 <description>Disable</description>
113286 <description>Write '1' to disable interrupt for event STOPPED</description>
113293 <description>Read: Disabled</description>
113298 <description>Read: Enabled</description>
113306 <description>Disable</description>
113315 <description>Enable interrupt</description>
113323 <description>Write '1' to enable interrupt for event TIMEOUT</description>
113330 <description>Read: Disabled</description>
113335 <description>Read: Enabled</description>
113343 <description>Enable</description>
113350 <description>Write '1' to enable interrupt for event STOPPED</description>
113357 <description>Read: Disabled</description>
113362 <description>Read: Enabled</description>
113370 <description>Enable</description>
113379 <description>Disable interrupt</description>
113387 <description>Write '1' to disable interrupt for event TIMEOUT</description>
113394 <description>Read: Disabled</description>
113399 <description>Read: Enabled</description>
113407 <description>Disable</description>
113414 <description>Write '1' to disable interrupt for event STOPPED</description>
113421 <description>Read: Disabled</description>
113426 <description>Read: Enabled</description>
113434 <description>Disable</description>
113443 <description>Run status</description>
113451 <description>Indicates whether or not WDT is running</description>
113457 <description>Watchdog is not running</description>
113462 <description>Watchdog is running</description>
113471 <description>Request status</description>
113479 <description>Request status for RR[0] register</description>
113485 … <description>RR[0] register is not enabled, or are already requesting reload</description>
113490 … <description>RR[0] register is enabled, and are not yet requesting reload</description>
113497 <description>Request status for RR[1] register</description>
113503 … <description>RR[1] register is not enabled, or are already requesting reload</description>
113508 … <description>RR[1] register is enabled, and are not yet requesting reload</description>
113515 <description>Request status for RR[2] register</description>
113521 … <description>RR[2] register is not enabled, or are already requesting reload</description>
113526 … <description>RR[2] register is enabled, and are not yet requesting reload</description>
113533 <description>Request status for RR[3] register</description>
113539 … <description>RR[3] register is not enabled, or are already requesting reload</description>
113544 … <description>RR[3] register is enabled, and are not yet requesting reload</description>
113551 <description>Request status for RR[4] register</description>
113557 … <description>RR[4] register is not enabled, or are already requesting reload</description>
113562 … <description>RR[4] register is enabled, and are not yet requesting reload</description>
113569 <description>Request status for RR[5] register</description>
113575 … <description>RR[5] register is not enabled, or are already requesting reload</description>
113580 … <description>RR[5] register is enabled, and are not yet requesting reload</description>
113587 <description>Request status for RR[6] register</description>
113593 … <description>RR[6] register is not enabled, or are already requesting reload</description>
113598 … <description>RR[6] register is enabled, and are not yet requesting reload</description>
113605 <description>Request status for RR[7] register</description>
113611 … <description>RR[7] register is not enabled, or are already requesting reload</description>
113616 … <description>RR[7] register is enabled, and are not yet requesting reload</description>
113625 <description>Counter reload value</description>
113633 … <description>Counter reload value in number of cycles of the 32.768 kHz clock</description>
113641 <description>Enable register for reload request registers</description>
113649 <description>Enable or disable RR[0] register</description>
113655 <description>Disable RR[0] register</description>
113660 <description>Enable RR[0] register</description>
113667 <description>Enable or disable RR[1] register</description>
113673 <description>Disable RR[1] register</description>
113678 <description>Enable RR[1] register</description>
113685 <description>Enable or disable RR[2] register</description>
113691 <description>Disable RR[2] register</description>
113696 <description>Enable RR[2] register</description>
113703 <description>Enable or disable RR[3] register</description>
113709 <description>Disable RR[3] register</description>
113714 <description>Enable RR[3] register</description>
113721 <description>Enable or disable RR[4] register</description>
113727 <description>Disable RR[4] register</description>
113732 <description>Enable RR[4] register</description>
113739 <description>Enable or disable RR[5] register</description>
113745 <description>Disable RR[5] register</description>
113750 <description>Enable RR[5] register</description>
113757 <description>Enable or disable RR[6] register</description>
113763 <description>Disable RR[6] register</description>
113768 <description>Enable RR[6] register</description>
113775 <description>Enable or disable RR[7] register</description>
113781 <description>Disable RR[7] register</description>
113786 <description>Enable RR[7] register</description>
113795 <description>Configuration register</description>
113803 …<description>Configure WDT to either be paused, or kept running, while the CPU is sleeping</descri…
113809 <description>Pause WDT while the CPU is sleeping</description>
113814 <description>Keep WDT running while the CPU is sleeping</description>
113821 …<description>Configure WDT to either be paused, or kept running, while the CPU is halted by the de…
113827 <description>Pause WDT while the CPU is halted by the debugger</description>
113832 … <description>Keep WDT running while the CPU is halted by the debugger</description>
113839 <description>Allow stopping WDT</description>
113845 <description>Do not allow stopping WDT</description>
113850 <description>Allow stopping WDT</description>
113859 <description>Task stop enable</description>
113867 <description>Allow stopping WDT</description>
113873 <description>Value to allow stopping WDT</description>
113884 <description>Description collection: Reload request n</description>
113892 <description>Reload request register</description>
113898 <description>Value to request a reload of the watchdog timer</description>
113909 <description>Watchdog Timer 1</description>
113920 <description>Event generator unit</description>
113941 …<description>Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event…
113949 … <description>Trigger n for triggering the corresponding TRIGGERED[n] event</description>
113955 <description>Trigger task</description>
113966 … <description>Description collection: Subscribe configuration for task TRIGGER[n]</description>
113974 <description>DPPI channel that task TRIGGER[n] will subscribe to</description>
113985 <description>Disable subscription</description>
113990 <description>Enable subscription</description>
114001 …<description>Description collection: Event number n generated by triggering the corresponding TRIG…
114009 …<description>Event number n generated by triggering the corresponding TRIGGER[n] task</description>
114015 <description>Event not generated</description>
114020 <description>Event generated</description>
114031 … <description>Description collection: Publish configuration for event TRIGGERED[n]</description>
114039 <description>DPPI channel that event TRIGGERED[n] will publish to</description>
114050 <description>Disable publishing</description>
114055 <description>Enable publishing</description>
114064 <description>Enable or disable interrupt</description>
114072 <description>Enable or disable interrupt for event TRIGGERED[0]</description>
114078 <description>Disable</description>
114083 <description>Enable</description>
114090 <description>Enable or disable interrupt for event TRIGGERED[1]</description>
114096 <description>Disable</description>
114101 <description>Enable</description>
114108 <description>Enable or disable interrupt for event TRIGGERED[2]</description>
114114 <description>Disable</description>
114119 <description>Enable</description>
114126 <description>Enable or disable interrupt for event TRIGGERED[3]</description>
114132 <description>Disable</description>
114137 <description>Enable</description>
114144 <description>Enable or disable interrupt for event TRIGGERED[4]</description>
114150 <description>Disable</description>
114155 <description>Enable</description>
114162 <description>Enable or disable interrupt for event TRIGGERED[5]</description>
114168 <description>Disable</description>
114173 <description>Enable</description>
114180 <description>Enable or disable interrupt for event TRIGGERED[6]</description>
114186 <description>Disable</description>
114191 <description>Enable</description>
114198 <description>Enable or disable interrupt for event TRIGGERED[7]</description>
114204 <description>Disable</description>
114209 <description>Enable</description>
114216 <description>Enable or disable interrupt for event TRIGGERED[8]</description>
114222 <description>Disable</description>
114227 <description>Enable</description>
114234 <description>Enable or disable interrupt for event TRIGGERED[9]</description>
114240 <description>Disable</description>
114245 <description>Enable</description>
114252 <description>Enable or disable interrupt for event TRIGGERED[10]</description>
114258 <description>Disable</description>
114263 <description>Enable</description>
114270 <description>Enable or disable interrupt for event TRIGGERED[11]</description>
114276 <description>Disable</description>
114281 <description>Enable</description>
114288 <description>Enable or disable interrupt for event TRIGGERED[12]</description>
114294 <description>Disable</description>
114299 <description>Enable</description>
114306 <description>Enable or disable interrupt for event TRIGGERED[13]</description>
114312 <description>Disable</description>
114317 <description>Enable</description>
114324 <description>Enable or disable interrupt for event TRIGGERED[14]</description>
114330 <description>Disable</description>
114335 <description>Enable</description>
114342 <description>Enable or disable interrupt for event TRIGGERED[15]</description>
114348 <description>Disable</description>
114353 <description>Enable</description>
114362 <description>Enable interrupt</description>
114370 <description>Write '1' to enable interrupt for event TRIGGERED[0]</description>
114377 <description>Read: Disabled</description>
114382 <description>Read: Enabled</description>
114390 <description>Enable</description>
114397 <description>Write '1' to enable interrupt for event TRIGGERED[1]</description>
114404 <description>Read: Disabled</description>
114409 <description>Read: Enabled</description>
114417 <description>Enable</description>
114424 <description>Write '1' to enable interrupt for event TRIGGERED[2]</description>
114431 <description>Read: Disabled</description>
114436 <description>Read: Enabled</description>
114444 <description>Enable</description>
114451 <description>Write '1' to enable interrupt for event TRIGGERED[3]</description>
114458 <description>Read: Disabled</description>
114463 <description>Read: Enabled</description>
114471 <description>Enable</description>
114478 <description>Write '1' to enable interrupt for event TRIGGERED[4]</description>
114485 <description>Read: Disabled</description>
114490 <description>Read: Enabled</description>
114498 <description>Enable</description>
114505 <description>Write '1' to enable interrupt for event TRIGGERED[5]</description>
114512 <description>Read: Disabled</description>
114517 <description>Read: Enabled</description>
114525 <description>Enable</description>
114532 <description>Write '1' to enable interrupt for event TRIGGERED[6]</description>
114539 <description>Read: Disabled</description>
114544 <description>Read: Enabled</description>
114552 <description>Enable</description>
114559 <description>Write '1' to enable interrupt for event TRIGGERED[7]</description>
114566 <description>Read: Disabled</description>
114571 <description>Read: Enabled</description>
114579 <description>Enable</description>
114586 <description>Write '1' to enable interrupt for event TRIGGERED[8]</description>
114593 <description>Read: Disabled</description>
114598 <description>Read: Enabled</description>
114606 <description>Enable</description>
114613 <description>Write '1' to enable interrupt for event TRIGGERED[9]</description>
114620 <description>Read: Disabled</description>
114625 <description>Read: Enabled</description>
114633 <description>Enable</description>
114640 <description>Write '1' to enable interrupt for event TRIGGERED[10]</description>
114647 <description>Read: Disabled</description>
114652 <description>Read: Enabled</description>
114660 <description>Enable</description>
114667 <description>Write '1' to enable interrupt for event TRIGGERED[11]</description>
114674 <description>Read: Disabled</description>
114679 <description>Read: Enabled</description>
114687 <description>Enable</description>
114694 <description>Write '1' to enable interrupt for event TRIGGERED[12]</description>
114701 <description>Read: Disabled</description>
114706 <description>Read: Enabled</description>
114714 <description>Enable</description>
114721 <description>Write '1' to enable interrupt for event TRIGGERED[13]</description>
114728 <description>Read: Disabled</description>
114733 <description>Read: Enabled</description>
114741 <description>Enable</description>
114748 <description>Write '1' to enable interrupt for event TRIGGERED[14]</description>
114755 <description>Read: Disabled</description>
114760 <description>Read: Enabled</description>
114768 <description>Enable</description>
114775 <description>Write '1' to enable interrupt for event TRIGGERED[15]</description>
114782 <description>Read: Disabled</description>
114787 <description>Read: Enabled</description>
114795 <description>Enable</description>
114804 <description>Disable interrupt</description>
114812 <description>Write '1' to disable interrupt for event TRIGGERED[0]</description>
114819 <description>Read: Disabled</description>
114824 <description>Read: Enabled</description>
114832 <description>Disable</description>
114839 <description>Write '1' to disable interrupt for event TRIGGERED[1]</description>
114846 <description>Read: Disabled</description>
114851 <description>Read: Enabled</description>
114859 <description>Disable</description>
114866 <description>Write '1' to disable interrupt for event TRIGGERED[2]</description>
114873 <description>Read: Disabled</description>
114878 <description>Read: Enabled</description>
114886 <description>Disable</description>
114893 <description>Write '1' to disable interrupt for event TRIGGERED[3]</description>
114900 <description>Read: Disabled</description>
114905 <description>Read: Enabled</description>
114913 <description>Disable</description>
114920 <description>Write '1' to disable interrupt for event TRIGGERED[4]</description>
114927 <description>Read: Disabled</description>
114932 <description>Read: Enabled</description>
114940 <description>Disable</description>
114947 <description>Write '1' to disable interrupt for event TRIGGERED[5]</description>
114954 <description>Read: Disabled</description>
114959 <description>Read: Enabled</description>
114967 <description>Disable</description>
114974 <description>Write '1' to disable interrupt for event TRIGGERED[6]</description>
114981 <description>Read: Disabled</description>
114986 <description>Read: Enabled</description>
114994 <description>Disable</description>
115001 <description>Write '1' to disable interrupt for event TRIGGERED[7]</description>
115008 <description>Read: Disabled</description>
115013 <description>Read: Enabled</description>
115021 <description>Disable</description>
115028 <description>Write '1' to disable interrupt for event TRIGGERED[8]</description>
115035 <description>Read: Disabled</description>
115040 <description>Read: Enabled</description>
115048 <description>Disable</description>
115055 <description>Write '1' to disable interrupt for event TRIGGERED[9]</description>
115062 <description>Read: Disabled</description>
115067 <description>Read: Enabled</description>
115075 <description>Disable</description>
115082 <description>Write '1' to disable interrupt for event TRIGGERED[10]</description>
115089 <description>Read: Disabled</description>
115094 <description>Read: Enabled</description>
115102 <description>Disable</description>
115109 <description>Write '1' to disable interrupt for event TRIGGERED[11]</description>
115116 <description>Read: Disabled</description>
115121 <description>Read: Enabled</description>
115129 <description>Disable</description>
115136 <description>Write '1' to disable interrupt for event TRIGGERED[12]</description>
115143 <description>Read: Disabled</description>
115148 <description>Read: Enabled</description>
115156 <description>Disable</description>
115163 <description>Write '1' to disable interrupt for event TRIGGERED[13]</description>
115170 <description>Read: Disabled</description>
115175 <description>Read: Enabled</description>
115183 <description>Disable</description>
115190 <description>Write '1' to disable interrupt for event TRIGGERED[14]</description>
115197 <description>Read: Disabled</description>
115202 <description>Read: Enabled</description>
115210 <description>Disable</description>
115217 <description>Write '1' to disable interrupt for event TRIGGERED[15]</description>
115224 <description>Read: Disabled</description>
115229 <description>Read: Enabled</description>
115237 <description>Disable</description>
115246 <description>Pending interrupts</description>
115254 <description>Read pending status of interrupt for event TRIGGERED[0]</description>
115261 <description>Read: Not pending</description>
115266 <description>Read: Pending</description>
115273 <description>Read pending status of interrupt for event TRIGGERED[1]</description>
115280 <description>Read: Not pending</description>
115285 <description>Read: Pending</description>
115292 <description>Read pending status of interrupt for event TRIGGERED[2]</description>
115299 <description>Read: Not pending</description>
115304 <description>Read: Pending</description>
115311 <description>Read pending status of interrupt for event TRIGGERED[3]</description>
115318 <description>Read: Not pending</description>
115323 <description>Read: Pending</description>
115330 <description>Read pending status of interrupt for event TRIGGERED[4]</description>
115337 <description>Read: Not pending</description>
115342 <description>Read: Pending</description>
115349 <description>Read pending status of interrupt for event TRIGGERED[5]</description>
115356 <description>Read: Not pending</description>
115361 <description>Read: Pending</description>
115368 <description>Read pending status of interrupt for event TRIGGERED[6]</description>
115375 <description>Read: Not pending</description>
115380 <description>Read: Pending</description>
115387 <description>Read pending status of interrupt for event TRIGGERED[7]</description>
115394 <description>Read: Not pending</description>
115399 <description>Read: Pending</description>
115406 <description>Read pending status of interrupt for event TRIGGERED[8]</description>
115413 <description>Read: Not pending</description>
115418 <description>Read: Pending</description>
115425 <description>Read pending status of interrupt for event TRIGGERED[9]</description>
115432 <description>Read: Not pending</description>
115437 <description>Read: Pending</description>
115444 <description>Read pending status of interrupt for event TRIGGERED[10]</description>
115451 <description>Read: Not pending</description>
115456 <description>Read: Pending</description>
115463 <description>Read pending status of interrupt for event TRIGGERED[11]</description>
115470 <description>Read: Not pending</description>
115475 <description>Read: Pending</description>
115482 <description>Read pending status of interrupt for event TRIGGERED[12]</description>
115489 <description>Read: Not pending</description>
115494 <description>Read: Pending</description>
115501 <description>Read pending status of interrupt for event TRIGGERED[13]</description>
115508 <description>Read: Not pending</description>
115513 <description>Read: Pending</description>
115520 <description>Read pending status of interrupt for event TRIGGERED[14]</description>
115527 <description>Read: Not pending</description>
115532 <description>Read: Pending</description>
115539 <description>Read pending status of interrupt for event TRIGGERED[15]</description>
115546 <description>Read: Not pending</description>
115551 <description>Read: Pending</description>
115562 <description>GPIO Port 0</description>
115578 <description>Write GPIO port</description>
115586 <description>Pin 0</description>
115592 <description>Pin driver is low</description>
115597 <description>Pin driver is high</description>
115604 <description>Pin 1</description>
115610 <description>Pin driver is low</description>
115615 <description>Pin driver is high</description>
115622 <description>Pin 2</description>
115628 <description>Pin driver is low</description>
115633 <description>Pin driver is high</description>
115640 <description>Pin 3</description>
115646 <description>Pin driver is low</description>
115651 <description>Pin driver is high</description>
115658 <description>Pin 4</description>
115664 <description>Pin driver is low</description>
115669 <description>Pin driver is high</description>
115676 <description>Pin 5</description>
115682 <description>Pin driver is low</description>
115687 <description>Pin driver is high</description>
115694 <description>Pin 6</description>
115700 <description>Pin driver is low</description>
115705 <description>Pin driver is high</description>
115712 <description>Pin 7</description>
115718 <description>Pin driver is low</description>
115723 <description>Pin driver is high</description>
115730 <description>Pin 8</description>
115736 <description>Pin driver is low</description>
115741 <description>Pin driver is high</description>
115748 <description>Pin 9</description>
115754 <description>Pin driver is low</description>
115759 <description>Pin driver is high</description>
115766 <description>Pin 10</description>
115772 <description>Pin driver is low</description>
115777 <description>Pin driver is high</description>
115784 <description>Pin 11</description>
115790 <description>Pin driver is low</description>
115795 <description>Pin driver is high</description>
115802 <description>Pin 12</description>
115808 <description>Pin driver is low</description>
115813 <description>Pin driver is high</description>
115820 <description>Pin 13</description>
115826 <description>Pin driver is low</description>
115831 <description>Pin driver is high</description>
115838 <description>Pin 14</description>
115844 <description>Pin driver is low</description>
115849 <description>Pin driver is high</description>
115856 <description>Pin 15</description>
115862 <description>Pin driver is low</description>
115867 <description>Pin driver is high</description>
115874 <description>Pin 16</description>
115880 <description>Pin driver is low</description>
115885 <description>Pin driver is high</description>
115892 <description>Pin 17</description>
115898 <description>Pin driver is low</description>
115903 <description>Pin driver is high</description>
115910 <description>Pin 18</description>
115916 <description>Pin driver is low</description>
115921 <description>Pin driver is high</description>
115928 <description>Pin 19</description>
115934 <description>Pin driver is low</description>
115939 <description>Pin driver is high</description>
115946 <description>Pin 20</description>
115952 <description>Pin driver is low</description>
115957 <description>Pin driver is high</description>
115964 <description>Pin 21</description>
115970 <description>Pin driver is low</description>
115975 <description>Pin driver is high</description>
115982 <description>Pin 22</description>
115988 <description>Pin driver is low</description>
115993 <description>Pin driver is high</description>
116000 <description>Pin 23</description>
116006 <description>Pin driver is low</description>
116011 <description>Pin driver is high</description>
116018 <description>Pin 24</description>
116024 <description>Pin driver is low</description>
116029 <description>Pin driver is high</description>
116036 <description>Pin 25</description>
116042 <description>Pin driver is low</description>
116047 <description>Pin driver is high</description>
116054 <description>Pin 26</description>
116060 <description>Pin driver is low</description>
116065 <description>Pin driver is high</description>
116072 <description>Pin 27</description>
116078 <description>Pin driver is low</description>
116083 <description>Pin driver is high</description>
116090 <description>Pin 28</description>
116096 <description>Pin driver is low</description>
116101 <description>Pin driver is high</description>
116108 <description>Pin 29</description>
116114 <description>Pin driver is low</description>
116119 <description>Pin driver is high</description>
116126 <description>Pin 30</description>
116132 <description>Pin driver is low</description>
116137 <description>Pin driver is high</description>
116144 <description>Pin 31</description>
116150 <description>Pin driver is low</description>
116155 <description>Pin driver is high</description>
116164 <description>Set individual bits in GPIO port</description>
116173 <description>Pin 0</description>
116180 <description>Read: pin driver is low</description>
116185 <description>Read: pin driver is high</description>
116193 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116200 <description>Pin 1</description>
116207 <description>Read: pin driver is low</description>
116212 <description>Read: pin driver is high</description>
116220 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116227 <description>Pin 2</description>
116234 <description>Read: pin driver is low</description>
116239 <description>Read: pin driver is high</description>
116247 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116254 <description>Pin 3</description>
116261 <description>Read: pin driver is low</description>
116266 <description>Read: pin driver is high</description>
116274 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116281 <description>Pin 4</description>
116288 <description>Read: pin driver is low</description>
116293 <description>Read: pin driver is high</description>
116301 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116308 <description>Pin 5</description>
116315 <description>Read: pin driver is low</description>
116320 <description>Read: pin driver is high</description>
116328 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116335 <description>Pin 6</description>
116342 <description>Read: pin driver is low</description>
116347 <description>Read: pin driver is high</description>
116355 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116362 <description>Pin 7</description>
116369 <description>Read: pin driver is low</description>
116374 <description>Read: pin driver is high</description>
116382 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116389 <description>Pin 8</description>
116396 <description>Read: pin driver is low</description>
116401 <description>Read: pin driver is high</description>
116409 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116416 <description>Pin 9</description>
116423 <description>Read: pin driver is low</description>
116428 <description>Read: pin driver is high</description>
116436 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116443 <description>Pin 10</description>
116450 <description>Read: pin driver is low</description>
116455 <description>Read: pin driver is high</description>
116463 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116470 <description>Pin 11</description>
116477 <description>Read: pin driver is low</description>
116482 <description>Read: pin driver is high</description>
116490 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116497 <description>Pin 12</description>
116504 <description>Read: pin driver is low</description>
116509 <description>Read: pin driver is high</description>
116517 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116524 <description>Pin 13</description>
116531 <description>Read: pin driver is low</description>
116536 <description>Read: pin driver is high</description>
116544 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116551 <description>Pin 14</description>
116558 <description>Read: pin driver is low</description>
116563 <description>Read: pin driver is high</description>
116571 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116578 <description>Pin 15</description>
116585 <description>Read: pin driver is low</description>
116590 <description>Read: pin driver is high</description>
116598 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116605 <description>Pin 16</description>
116612 <description>Read: pin driver is low</description>
116617 <description>Read: pin driver is high</description>
116625 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116632 <description>Pin 17</description>
116639 <description>Read: pin driver is low</description>
116644 <description>Read: pin driver is high</description>
116652 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116659 <description>Pin 18</description>
116666 <description>Read: pin driver is low</description>
116671 <description>Read: pin driver is high</description>
116679 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116686 <description>Pin 19</description>
116693 <description>Read: pin driver is low</description>
116698 <description>Read: pin driver is high</description>
116706 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116713 <description>Pin 20</description>
116720 <description>Read: pin driver is low</description>
116725 <description>Read: pin driver is high</description>
116733 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116740 <description>Pin 21</description>
116747 <description>Read: pin driver is low</description>
116752 <description>Read: pin driver is high</description>
116760 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116767 <description>Pin 22</description>
116774 <description>Read: pin driver is low</description>
116779 <description>Read: pin driver is high</description>
116787 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116794 <description>Pin 23</description>
116801 <description>Read: pin driver is low</description>
116806 <description>Read: pin driver is high</description>
116814 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116821 <description>Pin 24</description>
116828 <description>Read: pin driver is low</description>
116833 <description>Read: pin driver is high</description>
116841 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116848 <description>Pin 25</description>
116855 <description>Read: pin driver is low</description>
116860 <description>Read: pin driver is high</description>
116868 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116875 <description>Pin 26</description>
116882 <description>Read: pin driver is low</description>
116887 <description>Read: pin driver is high</description>
116895 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116902 <description>Pin 27</description>
116909 <description>Read: pin driver is low</description>
116914 <description>Read: pin driver is high</description>
116922 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116929 <description>Pin 28</description>
116936 <description>Read: pin driver is low</description>
116941 <description>Read: pin driver is high</description>
116949 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116956 <description>Pin 29</description>
116963 <description>Read: pin driver is low</description>
116968 <description>Read: pin driver is high</description>
116976 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
116983 <description>Pin 30</description>
116990 <description>Read: pin driver is low</description>
116995 <description>Read: pin driver is high</description>
117003 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
117010 <description>Pin 31</description>
117017 <description>Read: pin driver is low</description>
117022 <description>Read: pin driver is high</description>
117030 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
117039 <description>Clear individual bits in GPIO port</description>
117048 <description>Pin 0</description>
117055 <description>Read: pin driver is low</description>
117060 <description>Read: pin driver is high</description>
117068 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117075 <description>Pin 1</description>
117082 <description>Read: pin driver is low</description>
117087 <description>Read: pin driver is high</description>
117095 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117102 <description>Pin 2</description>
117109 <description>Read: pin driver is low</description>
117114 <description>Read: pin driver is high</description>
117122 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117129 <description>Pin 3</description>
117136 <description>Read: pin driver is low</description>
117141 <description>Read: pin driver is high</description>
117149 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117156 <description>Pin 4</description>
117163 <description>Read: pin driver is low</description>
117168 <description>Read: pin driver is high</description>
117176 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117183 <description>Pin 5</description>
117190 <description>Read: pin driver is low</description>
117195 <description>Read: pin driver is high</description>
117203 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117210 <description>Pin 6</description>
117217 <description>Read: pin driver is low</description>
117222 <description>Read: pin driver is high</description>
117230 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117237 <description>Pin 7</description>
117244 <description>Read: pin driver is low</description>
117249 <description>Read: pin driver is high</description>
117257 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117264 <description>Pin 8</description>
117271 <description>Read: pin driver is low</description>
117276 <description>Read: pin driver is high</description>
117284 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117291 <description>Pin 9</description>
117298 <description>Read: pin driver is low</description>
117303 <description>Read: pin driver is high</description>
117311 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117318 <description>Pin 10</description>
117325 <description>Read: pin driver is low</description>
117330 <description>Read: pin driver is high</description>
117338 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117345 <description>Pin 11</description>
117352 <description>Read: pin driver is low</description>
117357 <description>Read: pin driver is high</description>
117365 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117372 <description>Pin 12</description>
117379 <description>Read: pin driver is low</description>
117384 <description>Read: pin driver is high</description>
117392 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117399 <description>Pin 13</description>
117406 <description>Read: pin driver is low</description>
117411 <description>Read: pin driver is high</description>
117419 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117426 <description>Pin 14</description>
117433 <description>Read: pin driver is low</description>
117438 <description>Read: pin driver is high</description>
117446 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117453 <description>Pin 15</description>
117460 <description>Read: pin driver is low</description>
117465 <description>Read: pin driver is high</description>
117473 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117480 <description>Pin 16</description>
117487 <description>Read: pin driver is low</description>
117492 <description>Read: pin driver is high</description>
117500 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117507 <description>Pin 17</description>
117514 <description>Read: pin driver is low</description>
117519 <description>Read: pin driver is high</description>
117527 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117534 <description>Pin 18</description>
117541 <description>Read: pin driver is low</description>
117546 <description>Read: pin driver is high</description>
117554 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117561 <description>Pin 19</description>
117568 <description>Read: pin driver is low</description>
117573 <description>Read: pin driver is high</description>
117581 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117588 <description>Pin 20</description>
117595 <description>Read: pin driver is low</description>
117600 <description>Read: pin driver is high</description>
117608 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117615 <description>Pin 21</description>
117622 <description>Read: pin driver is low</description>
117627 <description>Read: pin driver is high</description>
117635 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117642 <description>Pin 22</description>
117649 <description>Read: pin driver is low</description>
117654 <description>Read: pin driver is high</description>
117662 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117669 <description>Pin 23</description>
117676 <description>Read: pin driver is low</description>
117681 <description>Read: pin driver is high</description>
117689 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117696 <description>Pin 24</description>
117703 <description>Read: pin driver is low</description>
117708 <description>Read: pin driver is high</description>
117716 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117723 <description>Pin 25</description>
117730 <description>Read: pin driver is low</description>
117735 <description>Read: pin driver is high</description>
117743 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117750 <description>Pin 26</description>
117757 <description>Read: pin driver is low</description>
117762 <description>Read: pin driver is high</description>
117770 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117777 <description>Pin 27</description>
117784 <description>Read: pin driver is low</description>
117789 <description>Read: pin driver is high</description>
117797 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117804 <description>Pin 28</description>
117811 <description>Read: pin driver is low</description>
117816 <description>Read: pin driver is high</description>
117824 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117831 <description>Pin 29</description>
117838 <description>Read: pin driver is low</description>
117843 <description>Read: pin driver is high</description>
117851 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117858 <description>Pin 30</description>
117865 <description>Read: pin driver is low</description>
117870 <description>Read: pin driver is high</description>
117878 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117885 <description>Pin 31</description>
117892 <description>Read: pin driver is low</description>
117897 <description>Read: pin driver is high</description>
117905 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
117914 <description>Read GPIO port</description>
117922 <description>Pin 0</description>
117928 <description>Pin input is low</description>
117933 <description>Pin input is high</description>
117940 <description>Pin 1</description>
117946 <description>Pin input is low</description>
117951 <description>Pin input is high</description>
117958 <description>Pin 2</description>
117964 <description>Pin input is low</description>
117969 <description>Pin input is high</description>
117976 <description>Pin 3</description>
117982 <description>Pin input is low</description>
117987 <description>Pin input is high</description>
117994 <description>Pin 4</description>
118000 <description>Pin input is low</description>
118005 <description>Pin input is high</description>
118012 <description>Pin 5</description>
118018 <description>Pin input is low</description>
118023 <description>Pin input is high</description>
118030 <description>Pin 6</description>
118036 <description>Pin input is low</description>
118041 <description>Pin input is high</description>
118048 <description>Pin 7</description>
118054 <description>Pin input is low</description>
118059 <description>Pin input is high</description>
118066 <description>Pin 8</description>
118072 <description>Pin input is low</description>
118077 <description>Pin input is high</description>
118084 <description>Pin 9</description>
118090 <description>Pin input is low</description>
118095 <description>Pin input is high</description>
118102 <description>Pin 10</description>
118108 <description>Pin input is low</description>
118113 <description>Pin input is high</description>
118120 <description>Pin 11</description>
118126 <description>Pin input is low</description>
118131 <description>Pin input is high</description>
118138 <description>Pin 12</description>
118144 <description>Pin input is low</description>
118149 <description>Pin input is high</description>
118156 <description>Pin 13</description>
118162 <description>Pin input is low</description>
118167 <description>Pin input is high</description>
118174 <description>Pin 14</description>
118180 <description>Pin input is low</description>
118185 <description>Pin input is high</description>
118192 <description>Pin 15</description>
118198 <description>Pin input is low</description>
118203 <description>Pin input is high</description>
118210 <description>Pin 16</description>
118216 <description>Pin input is low</description>
118221 <description>Pin input is high</description>
118228 <description>Pin 17</description>
118234 <description>Pin input is low</description>
118239 <description>Pin input is high</description>
118246 <description>Pin 18</description>
118252 <description>Pin input is low</description>
118257 <description>Pin input is high</description>
118264 <description>Pin 19</description>
118270 <description>Pin input is low</description>
118275 <description>Pin input is high</description>
118282 <description>Pin 20</description>
118288 <description>Pin input is low</description>
118293 <description>Pin input is high</description>
118300 <description>Pin 21</description>
118306 <description>Pin input is low</description>
118311 <description>Pin input is high</description>
118318 <description>Pin 22</description>
118324 <description>Pin input is low</description>
118329 <description>Pin input is high</description>
118336 <description>Pin 23</description>
118342 <description>Pin input is low</description>
118347 <description>Pin input is high</description>
118354 <description>Pin 24</description>
118360 <description>Pin input is low</description>
118365 <description>Pin input is high</description>
118372 <description>Pin 25</description>
118378 <description>Pin input is low</description>
118383 <description>Pin input is high</description>
118390 <description>Pin 26</description>
118396 <description>Pin input is low</description>
118401 <description>Pin input is high</description>
118408 <description>Pin 27</description>
118414 <description>Pin input is low</description>
118419 <description>Pin input is high</description>
118426 <description>Pin 28</description>
118432 <description>Pin input is low</description>
118437 <description>Pin input is high</description>
118444 <description>Pin 29</description>
118450 <description>Pin input is low</description>
118455 <description>Pin input is high</description>
118462 <description>Pin 30</description>
118468 <description>Pin input is low</description>
118473 <description>Pin input is high</description>
118480 <description>Pin 31</description>
118486 <description>Pin input is low</description>
118491 <description>Pin input is high</description>
118500 <description>Direction of GPIO pins</description>
118508 <description>Pin 0</description>
118514 <description>Pin set as input</description>
118519 <description>Pin set as output</description>
118526 <description>Pin 1</description>
118532 <description>Pin set as input</description>
118537 <description>Pin set as output</description>
118544 <description>Pin 2</description>
118550 <description>Pin set as input</description>
118555 <description>Pin set as output</description>
118562 <description>Pin 3</description>
118568 <description>Pin set as input</description>
118573 <description>Pin set as output</description>
118580 <description>Pin 4</description>
118586 <description>Pin set as input</description>
118591 <description>Pin set as output</description>
118598 <description>Pin 5</description>
118604 <description>Pin set as input</description>
118609 <description>Pin set as output</description>
118616 <description>Pin 6</description>
118622 <description>Pin set as input</description>
118627 <description>Pin set as output</description>
118634 <description>Pin 7</description>
118640 <description>Pin set as input</description>
118645 <description>Pin set as output</description>
118652 <description>Pin 8</description>
118658 <description>Pin set as input</description>
118663 <description>Pin set as output</description>
118670 <description>Pin 9</description>
118676 <description>Pin set as input</description>
118681 <description>Pin set as output</description>
118688 <description>Pin 10</description>
118694 <description>Pin set as input</description>
118699 <description>Pin set as output</description>
118706 <description>Pin 11</description>
118712 <description>Pin set as input</description>
118717 <description>Pin set as output</description>
118724 <description>Pin 12</description>
118730 <description>Pin set as input</description>
118735 <description>Pin set as output</description>
118742 <description>Pin 13</description>
118748 <description>Pin set as input</description>
118753 <description>Pin set as output</description>
118760 <description>Pin 14</description>
118766 <description>Pin set as input</description>
118771 <description>Pin set as output</description>
118778 <description>Pin 15</description>
118784 <description>Pin set as input</description>
118789 <description>Pin set as output</description>
118796 <description>Pin 16</description>
118802 <description>Pin set as input</description>
118807 <description>Pin set as output</description>
118814 <description>Pin 17</description>
118820 <description>Pin set as input</description>
118825 <description>Pin set as output</description>
118832 <description>Pin 18</description>
118838 <description>Pin set as input</description>
118843 <description>Pin set as output</description>
118850 <description>Pin 19</description>
118856 <description>Pin set as input</description>
118861 <description>Pin set as output</description>
118868 <description>Pin 20</description>
118874 <description>Pin set as input</description>
118879 <description>Pin set as output</description>
118886 <description>Pin 21</description>
118892 <description>Pin set as input</description>
118897 <description>Pin set as output</description>
118904 <description>Pin 22</description>
118910 <description>Pin set as input</description>
118915 <description>Pin set as output</description>
118922 <description>Pin 23</description>
118928 <description>Pin set as input</description>
118933 <description>Pin set as output</description>
118940 <description>Pin 24</description>
118946 <description>Pin set as input</description>
118951 <description>Pin set as output</description>
118958 <description>Pin 25</description>
118964 <description>Pin set as input</description>
118969 <description>Pin set as output</description>
118976 <description>Pin 26</description>
118982 <description>Pin set as input</description>
118987 <description>Pin set as output</description>
118994 <description>Pin 27</description>
119000 <description>Pin set as input</description>
119005 <description>Pin set as output</description>
119012 <description>Pin 28</description>
119018 <description>Pin set as input</description>
119023 <description>Pin set as output</description>
119030 <description>Pin 29</description>
119036 <description>Pin set as input</description>
119041 <description>Pin set as output</description>
119048 <description>Pin 30</description>
119054 <description>Pin set as input</description>
119059 <description>Pin set as output</description>
119066 <description>Pin 31</description>
119072 <description>Pin set as input</description>
119077 <description>Pin set as output</description>
119086 <description>DIR set register</description>
119095 <description>Set as output pin 0</description>
119102 <description>Read: pin set as input</description>
119107 <description>Read: pin set as output</description>
119115 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119122 <description>Set as output pin 1</description>
119129 <description>Read: pin set as input</description>
119134 <description>Read: pin set as output</description>
119142 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119149 <description>Set as output pin 2</description>
119156 <description>Read: pin set as input</description>
119161 <description>Read: pin set as output</description>
119169 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119176 <description>Set as output pin 3</description>
119183 <description>Read: pin set as input</description>
119188 <description>Read: pin set as output</description>
119196 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119203 <description>Set as output pin 4</description>
119210 <description>Read: pin set as input</description>
119215 <description>Read: pin set as output</description>
119223 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119230 <description>Set as output pin 5</description>
119237 <description>Read: pin set as input</description>
119242 <description>Read: pin set as output</description>
119250 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119257 <description>Set as output pin 6</description>
119264 <description>Read: pin set as input</description>
119269 <description>Read: pin set as output</description>
119277 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119284 <description>Set as output pin 7</description>
119291 <description>Read: pin set as input</description>
119296 <description>Read: pin set as output</description>
119304 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119311 <description>Set as output pin 8</description>
119318 <description>Read: pin set as input</description>
119323 <description>Read: pin set as output</description>
119331 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119338 <description>Set as output pin 9</description>
119345 <description>Read: pin set as input</description>
119350 <description>Read: pin set as output</description>
119358 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119365 <description>Set as output pin 10</description>
119372 <description>Read: pin set as input</description>
119377 <description>Read: pin set as output</description>
119385 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119392 <description>Set as output pin 11</description>
119399 <description>Read: pin set as input</description>
119404 <description>Read: pin set as output</description>
119412 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119419 <description>Set as output pin 12</description>
119426 <description>Read: pin set as input</description>
119431 <description>Read: pin set as output</description>
119439 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119446 <description>Set as output pin 13</description>
119453 <description>Read: pin set as input</description>
119458 <description>Read: pin set as output</description>
119466 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119473 <description>Set as output pin 14</description>
119480 <description>Read: pin set as input</description>
119485 <description>Read: pin set as output</description>
119493 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119500 <description>Set as output pin 15</description>
119507 <description>Read: pin set as input</description>
119512 <description>Read: pin set as output</description>
119520 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119527 <description>Set as output pin 16</description>
119534 <description>Read: pin set as input</description>
119539 <description>Read: pin set as output</description>
119547 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119554 <description>Set as output pin 17</description>
119561 <description>Read: pin set as input</description>
119566 <description>Read: pin set as output</description>
119574 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119581 <description>Set as output pin 18</description>
119588 <description>Read: pin set as input</description>
119593 <description>Read: pin set as output</description>
119601 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119608 <description>Set as output pin 19</description>
119615 <description>Read: pin set as input</description>
119620 <description>Read: pin set as output</description>
119628 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119635 <description>Set as output pin 20</description>
119642 <description>Read: pin set as input</description>
119647 <description>Read: pin set as output</description>
119655 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119662 <description>Set as output pin 21</description>
119669 <description>Read: pin set as input</description>
119674 <description>Read: pin set as output</description>
119682 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119689 <description>Set as output pin 22</description>
119696 <description>Read: pin set as input</description>
119701 <description>Read: pin set as output</description>
119709 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119716 <description>Set as output pin 23</description>
119723 <description>Read: pin set as input</description>
119728 <description>Read: pin set as output</description>
119736 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119743 <description>Set as output pin 24</description>
119750 <description>Read: pin set as input</description>
119755 <description>Read: pin set as output</description>
119763 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119770 <description>Set as output pin 25</description>
119777 <description>Read: pin set as input</description>
119782 <description>Read: pin set as output</description>
119790 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119797 <description>Set as output pin 26</description>
119804 <description>Read: pin set as input</description>
119809 <description>Read: pin set as output</description>
119817 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119824 <description>Set as output pin 27</description>
119831 <description>Read: pin set as input</description>
119836 <description>Read: pin set as output</description>
119844 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119851 <description>Set as output pin 28</description>
119858 <description>Read: pin set as input</description>
119863 <description>Read: pin set as output</description>
119871 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119878 <description>Set as output pin 29</description>
119885 <description>Read: pin set as input</description>
119890 <description>Read: pin set as output</description>
119898 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119905 <description>Set as output pin 30</description>
119912 <description>Read: pin set as input</description>
119917 <description>Read: pin set as output</description>
119925 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119932 <description>Set as output pin 31</description>
119939 <description>Read: pin set as input</description>
119944 <description>Read: pin set as output</description>
119952 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
119961 <description>DIR clear register</description>
119970 <description>Set as input pin 0</description>
119977 <description>Read: pin set as input</description>
119982 <description>Read: pin set as output</description>
119990 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
119997 <description>Set as input pin 1</description>
120004 <description>Read: pin set as input</description>
120009 <description>Read: pin set as output</description>
120017 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120024 <description>Set as input pin 2</description>
120031 <description>Read: pin set as input</description>
120036 <description>Read: pin set as output</description>
120044 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120051 <description>Set as input pin 3</description>
120058 <description>Read: pin set as input</description>
120063 <description>Read: pin set as output</description>
120071 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120078 <description>Set as input pin 4</description>
120085 <description>Read: pin set as input</description>
120090 <description>Read: pin set as output</description>
120098 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120105 <description>Set as input pin 5</description>
120112 <description>Read: pin set as input</description>
120117 <description>Read: pin set as output</description>
120125 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120132 <description>Set as input pin 6</description>
120139 <description>Read: pin set as input</description>
120144 <description>Read: pin set as output</description>
120152 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120159 <description>Set as input pin 7</description>
120166 <description>Read: pin set as input</description>
120171 <description>Read: pin set as output</description>
120179 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120186 <description>Set as input pin 8</description>
120193 <description>Read: pin set as input</description>
120198 <description>Read: pin set as output</description>
120206 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120213 <description>Set as input pin 9</description>
120220 <description>Read: pin set as input</description>
120225 <description>Read: pin set as output</description>
120233 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120240 <description>Set as input pin 10</description>
120247 <description>Read: pin set as input</description>
120252 <description>Read: pin set as output</description>
120260 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120267 <description>Set as input pin 11</description>
120274 <description>Read: pin set as input</description>
120279 <description>Read: pin set as output</description>
120287 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120294 <description>Set as input pin 12</description>
120301 <description>Read: pin set as input</description>
120306 <description>Read: pin set as output</description>
120314 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120321 <description>Set as input pin 13</description>
120328 <description>Read: pin set as input</description>
120333 <description>Read: pin set as output</description>
120341 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120348 <description>Set as input pin 14</description>
120355 <description>Read: pin set as input</description>
120360 <description>Read: pin set as output</description>
120368 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120375 <description>Set as input pin 15</description>
120382 <description>Read: pin set as input</description>
120387 <description>Read: pin set as output</description>
120395 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120402 <description>Set as input pin 16</description>
120409 <description>Read: pin set as input</description>
120414 <description>Read: pin set as output</description>
120422 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120429 <description>Set as input pin 17</description>
120436 <description>Read: pin set as input</description>
120441 <description>Read: pin set as output</description>
120449 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120456 <description>Set as input pin 18</description>
120463 <description>Read: pin set as input</description>
120468 <description>Read: pin set as output</description>
120476 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120483 <description>Set as input pin 19</description>
120490 <description>Read: pin set as input</description>
120495 <description>Read: pin set as output</description>
120503 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120510 <description>Set as input pin 20</description>
120517 <description>Read: pin set as input</description>
120522 <description>Read: pin set as output</description>
120530 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120537 <description>Set as input pin 21</description>
120544 <description>Read: pin set as input</description>
120549 <description>Read: pin set as output</description>
120557 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120564 <description>Set as input pin 22</description>
120571 <description>Read: pin set as input</description>
120576 <description>Read: pin set as output</description>
120584 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120591 <description>Set as input pin 23</description>
120598 <description>Read: pin set as input</description>
120603 <description>Read: pin set as output</description>
120611 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120618 <description>Set as input pin 24</description>
120625 <description>Read: pin set as input</description>
120630 <description>Read: pin set as output</description>
120638 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120645 <description>Set as input pin 25</description>
120652 <description>Read: pin set as input</description>
120657 <description>Read: pin set as output</description>
120665 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120672 <description>Set as input pin 26</description>
120679 <description>Read: pin set as input</description>
120684 <description>Read: pin set as output</description>
120692 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120699 <description>Set as input pin 27</description>
120706 <description>Read: pin set as input</description>
120711 <description>Read: pin set as output</description>
120719 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120726 <description>Set as input pin 28</description>
120733 <description>Read: pin set as input</description>
120738 <description>Read: pin set as output</description>
120746 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120753 <description>Set as input pin 29</description>
120760 <description>Read: pin set as input</description>
120765 <description>Read: pin set as output</description>
120773 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120780 <description>Set as input pin 30</description>
120787 <description>Read: pin set as input</description>
120792 <description>Read: pin set as output</description>
120800 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120807 <description>Set as input pin 31</description>
120814 <description>Read: pin set as input</description>
120819 <description>Read: pin set as output</description>
120827 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
120836 …<description>Latch register indicating what GPIO pins that have met the criteria set in the PIN_CN…
120844 …<description>Status on whether PIN0 has met criteria set in PIN_CNF[0].SENSE register. Write '1' t…
120850 <description>Criteria has not been met</description>
120855 <description>Criteria has been met</description>
120862 …<description>Status on whether PIN1 has met criteria set in PIN_CNF[1].SENSE register. Write '1' t…
120868 <description>Criteria has not been met</description>
120873 <description>Criteria has been met</description>
120880 …<description>Status on whether PIN2 has met criteria set in PIN_CNF[2].SENSE register. Write '1' t…
120886 <description>Criteria has not been met</description>
120891 <description>Criteria has been met</description>
120898 …<description>Status on whether PIN3 has met criteria set in PIN_CNF[3].SENSE register. Write '1' t…
120904 <description>Criteria has not been met</description>
120909 <description>Criteria has been met</description>
120916 …<description>Status on whether PIN4 has met criteria set in PIN_CNF[4].SENSE register. Write '1' t…
120922 <description>Criteria has not been met</description>
120927 <description>Criteria has been met</description>
120934 …<description>Status on whether PIN5 has met criteria set in PIN_CNF[5].SENSE register. Write '1' t…
120940 <description>Criteria has not been met</description>
120945 <description>Criteria has been met</description>
120952 …<description>Status on whether PIN6 has met criteria set in PIN_CNF[6].SENSE register. Write '1' t…
120958 <description>Criteria has not been met</description>
120963 <description>Criteria has been met</description>
120970 …<description>Status on whether PIN7 has met criteria set in PIN_CNF[7].SENSE register. Write '1' t…
120976 <description>Criteria has not been met</description>
120981 <description>Criteria has been met</description>
120988 …<description>Status on whether PIN8 has met criteria set in PIN_CNF[8].SENSE register. Write '1' t…
120994 <description>Criteria has not been met</description>
120999 <description>Criteria has been met</description>
121006 …<description>Status on whether PIN9 has met criteria set in PIN_CNF[9].SENSE register. Write '1' t…
121012 <description>Criteria has not been met</description>
121017 <description>Criteria has been met</description>
121024 …<description>Status on whether PIN10 has met criteria set in PIN_CNF[10].SENSE register. Write '1'…
121030 <description>Criteria has not been met</description>
121035 <description>Criteria has been met</description>
121042 …<description>Status on whether PIN11 has met criteria set in PIN_CNF[11].SENSE register. Write '1'…
121048 <description>Criteria has not been met</description>
121053 <description>Criteria has been met</description>
121060 …<description>Status on whether PIN12 has met criteria set in PIN_CNF[12].SENSE register. Write '1'…
121066 <description>Criteria has not been met</description>
121071 <description>Criteria has been met</description>
121078 …<description>Status on whether PIN13 has met criteria set in PIN_CNF[13].SENSE register. Write '1'…
121084 <description>Criteria has not been met</description>
121089 <description>Criteria has been met</description>
121096 …<description>Status on whether PIN14 has met criteria set in PIN_CNF[14].SENSE register. Write '1'…
121102 <description>Criteria has not been met</description>
121107 <description>Criteria has been met</description>
121114 …<description>Status on whether PIN15 has met criteria set in PIN_CNF[15].SENSE register. Write '1'…
121120 <description>Criteria has not been met</description>
121125 <description>Criteria has been met</description>
121132 …<description>Status on whether PIN16 has met criteria set in PIN_CNF[16].SENSE register. Write '1'…
121138 <description>Criteria has not been met</description>
121143 <description>Criteria has been met</description>
121150 …<description>Status on whether PIN17 has met criteria set in PIN_CNF[17].SENSE register. Write '1'…
121156 <description>Criteria has not been met</description>
121161 <description>Criteria has been met</description>
121168 …<description>Status on whether PIN18 has met criteria set in PIN_CNF[18].SENSE register. Write '1'…
121174 <description>Criteria has not been met</description>
121179 <description>Criteria has been met</description>
121186 …<description>Status on whether PIN19 has met criteria set in PIN_CNF[19].SENSE register. Write '1'…
121192 <description>Criteria has not been met</description>
121197 <description>Criteria has been met</description>
121204 …<description>Status on whether PIN20 has met criteria set in PIN_CNF[20].SENSE register. Write '1'…
121210 <description>Criteria has not been met</description>
121215 <description>Criteria has been met</description>
121222 …<description>Status on whether PIN21 has met criteria set in PIN_CNF[21].SENSE register. Write '1'…
121228 <description>Criteria has not been met</description>
121233 <description>Criteria has been met</description>
121240 …<description>Status on whether PIN22 has met criteria set in PIN_CNF[22].SENSE register. Write '1'…
121246 <description>Criteria has not been met</description>
121251 <description>Criteria has been met</description>
121258 …<description>Status on whether PIN23 has met criteria set in PIN_CNF[23].SENSE register. Write '1'…
121264 <description>Criteria has not been met</description>
121269 <description>Criteria has been met</description>
121276 …<description>Status on whether PIN24 has met criteria set in PIN_CNF[24].SENSE register. Write '1'…
121282 <description>Criteria has not been met</description>
121287 <description>Criteria has been met</description>
121294 …<description>Status on whether PIN25 has met criteria set in PIN_CNF[25].SENSE register. Write '1'…
121300 <description>Criteria has not been met</description>
121305 <description>Criteria has been met</description>
121312 …<description>Status on whether PIN26 has met criteria set in PIN_CNF[26].SENSE register. Write '1'…
121318 <description>Criteria has not been met</description>
121323 <description>Criteria has been met</description>
121330 …<description>Status on whether PIN27 has met criteria set in PIN_CNF[27].SENSE register. Write '1'…
121336 <description>Criteria has not been met</description>
121341 <description>Criteria has been met</description>
121348 …<description>Status on whether PIN28 has met criteria set in PIN_CNF[28].SENSE register. Write '1'…
121354 <description>Criteria has not been met</description>
121359 <description>Criteria has been met</description>
121366 …<description>Status on whether PIN29 has met criteria set in PIN_CNF[29].SENSE register. Write '1'…
121372 <description>Criteria has not been met</description>
121377 <description>Criteria has been met</description>
121384 …<description>Status on whether PIN30 has met criteria set in PIN_CNF[30].SENSE register. Write '1'…
121390 <description>Criteria has not been met</description>
121395 <description>Criteria has been met</description>
121402 …<description>Status on whether PIN31 has met criteria set in PIN_CNF[31].SENSE register. Write '1'…
121408 <description>Criteria has not been met</description>
121413 <description>Criteria has been met</description>
121422 <description>Select between default DETECT signal behavior and LDETECT mode</description>
121431 … <description>Select between default DETECT signal behavior and LDETECT mode</description>
121437 <description>DETECT directly connected to PIN DETECT signals</description>
121442 <description>Use the latched LDETECT behavior</description>
121451 <description>Enable retention for those GPIO registers marked as retained</description>
121459 <description>Enable retention for GPIO registers for Application domain</description>
121465 <description>Retention disabled</description>
121470 <description>Retention enabled</description>
121477 <description>Enable retention for GPIO registers for Radio core</description>
121483 <description>Retention disabled</description>
121488 <description>Retention enabled</description>
121497 <description>Unspecified</description>
121503 <description>Drive control for impedance matching of the pins in this port</description>
121512 <description>Enable 50 ohms impedance to the pins in this port</description>
121518 <description>Disabled</description>
121523 <description>Enable</description>
121530 <description>Enable 100 ohms impedance to the pins in this port</description>
121536 <description>Disabled</description>
121541 <description>Enable</description>
121548 <description>Enable 200 ohms impedance to the pins in this port</description>
121554 <description>Disabled</description>
121559 <description>Enable</description>
121566 <description>Enable 400 ohms impedance to the pins in this port</description>
121572 <description>Disabled</description>
121577 <description>Enable</description>
121584 <description>Enable 800 ohms impedance to the pins in this port</description>
121590 <description>Disabled</description>
121595 <description>Enable</description>
121602 <description>Enable 1600 ohms impedance to the pins in this port</description>
121608 <description>Disabled</description>
121613 <description>Enable</description>
121625 <description>Description collection: Pin n configuration of GPIO pin</description>
121633 <description>Pin direction. Same physical register as DIR register</description>
121639 <description>Configure pin as an input pin</description>
121644 <description>Configure pin as an output pin</description>
121651 <description>Connect or disconnect input buffer</description>
121657 <description>Connect input buffer</description>
121662 <description>Disconnect input buffer</description>
121669 <description>Pull configuration</description>
121675 <description>No pull</description>
121680 <description>Pull down on pin</description>
121685 <description>Pull up on pin</description>
121692 <description>Drive configuration for '0'</description>
121698 <description>Standard '0'</description>
121703 <description>High drive '0'</description>
121708 <description>Disconnect '0'(normally used for wired-or connections)</description>
121713 <description>Extra high drive '0'</description>
121720 <description>Drive configuration for '1'</description>
121726 <description>Standard '1'</description>
121731 <description>High drive '1'</description>
121736 <description>Disconnect '1'(normally used for wired-or connections)</description>
121741 <description>Extra high drive '1'</description>
121748 <description>Pin sensing mechanism</description>
121754 <description>Disabled</description>
121759 <description>Sense for high level</description>
121764 <description>Sense for low level</description>
121771 <description>Enable clock on the pin.</description>
121777 <description>Clock disabled</description>
121782 <description>Clock enabled</description>
121793 <description>GPIO Port 1</description>
121801 <description>GPIO Port 2</description>
121809 <description>GPIO Port 3</description>
121817 <description>GPIO Port 4</description>
121825 <description>GPIO Port 5</description>
121833 <description>GPIO Port 6</description>
121841 <description>GPIO Port 7</description>
121849 <description>GPIO Port 8</description>
121857 <description>GPIO Port 9</description>
121865 <description>Distributed programmable peripheral interconnect controller 2</description>
121873 <description>Analog to Digital Converter</description>
121891 <description>Start the ADC and prepare the result buffer in RAM</description>
121899 <description>Start the ADC and prepare the result buffer in RAM</description>
121905 <description>Trigger task</description>
121914 … <description>Take one ADC sample, if scan is enabled all channels are sampled</description>
121922 … <description>Take one ADC sample, if scan is enabled all channels are sampled</description>
121928 <description>Trigger task</description>
121937 <description>Stop the ADC and terminate any on-going conversion</description>
121945 <description>Stop the ADC and terminate any on-going conversion</description>
121951 <description>Trigger task</description>
121960 <description>Starts offset auto-calibration</description>
121968 <description>Starts offset auto-calibration</description>
121974 <description>Trigger task</description>
121983 <description>Subscribe configuration for task START</description>
121991 <description>DPPI channel that task START will subscribe to</description>
122002 <description>Disable subscription</description>
122007 <description>Enable subscription</description>
122016 <description>Subscribe configuration for task SAMPLE</description>
122024 <description>DPPI channel that task SAMPLE will subscribe to</description>
122035 <description>Disable subscription</description>
122040 <description>Enable subscription</description>
122049 <description>Subscribe configuration for task STOP</description>
122057 <description>DPPI channel that task STOP will subscribe to</description>
122068 <description>Disable subscription</description>
122073 <description>Enable subscription</description>
122082 <description>Subscribe configuration for task CALIBRATEOFFSET</description>
122090 <description>DPPI channel that task CALIBRATEOFFSET will subscribe to</description>
122101 <description>Disable subscription</description>
122106 <description>Enable subscription</description>
122115 <description>The ADC has started</description>
122123 <description>The ADC has started</description>
122129 <description>Event not generated</description>
122134 <description>Event generated</description>
122143 <description>The ADC has filled up the Result buffer</description>
122151 <description>The ADC has filled up the Result buffer</description>
122157 <description>Event not generated</description>
122162 <description>Event generated</description>
122171 …description>A conversion task has been completed. Depending on the mode, multiple conversions migh…
122179 …description>A conversion task has been completed. Depending on the mode, multiple conversions migh…
122185 <description>Event not generated</description>
122190 <description>Event generated</description>
122199 <description>A result is ready to get transferred to RAM.</description>
122207 <description>A result is ready to get transferred to RAM.</description>
122213 <description>Event not generated</description>
122218 <description>Event generated</description>
122227 <description>Calibration is complete</description>
122235 <description>Calibration is complete</description>
122241 <description>Event not generated</description>
122246 <description>Event generated</description>
122255 <description>The ADC has stopped</description>
122263 <description>The ADC has stopped</description>
122269 <description>Event not generated</description>
122274 <description>Event generated</description>
122285 <description>Peripheral events.</description>
122291 … <description>Description cluster: Last results is equal or above CH[n].LIMIT.HIGH</description>
122299 <description>Last results is equal or above CH[n].LIMIT.HIGH</description>
122305 <description>Event not generated</description>
122310 <description>Event generated</description>
122319 … <description>Description cluster: Last results is equal or below CH[n].LIMIT.LOW</description>
122327 <description>Last results is equal or below CH[n].LIMIT.LOW</description>
122333 <description>Event not generated</description>
122338 <description>Event generated</description>
122348 <description>Publish configuration for event STARTED</description>
122356 <description>DPPI channel that event STARTED will publish to</description>
122367 <description>Disable publishing</description>
122372 <description>Enable publishing</description>
122381 <description>Publish configuration for event END</description>
122389 <description>DPPI channel that event END will publish to</description>
122400 <description>Disable publishing</description>
122405 <description>Enable publishing</description>
122414 <description>Publish configuration for event DONE</description>
122422 <description>DPPI channel that event DONE will publish to</description>
122433 <description>Disable publishing</description>
122438 <description>Enable publishing</description>
122447 <description>Publish configuration for event RESULTDONE</description>
122455 <description>DPPI channel that event RESULTDONE will publish to</description>
122466 <description>Disable publishing</description>
122471 <description>Enable publishing</description>
122480 <description>Publish configuration for event CALIBRATEDONE</description>
122488 <description>DPPI channel that event CALIBRATEDONE will publish to</description>
122499 <description>Disable publishing</description>
122504 <description>Enable publishing</description>
122513 <description>Publish configuration for event STOPPED</description>
122521 <description>DPPI channel that event STOPPED will publish to</description>
122532 <description>Disable publishing</description>
122537 <description>Enable publishing</description>
122548 <description>Publish configuration for events</description>
122554 … <description>Description cluster: Publish configuration for event CH[n].LIMITH</description>
122562 <description>DPPI channel that event CH[n].LIMITH will publish to</description>
122573 <description>Disable publishing</description>
122578 <description>Enable publishing</description>
122587 … <description>Description cluster: Publish configuration for event CH[n].LIMITL</description>
122595 <description>DPPI channel that event CH[n].LIMITL will publish to</description>
122606 <description>Disable publishing</description>
122611 <description>Enable publishing</description>
122621 <description>Enable or disable interrupt</description>
122629 <description>Enable or disable interrupt for event STARTED</description>
122635 <description>Disable</description>
122640 <description>Enable</description>
122647 <description>Enable or disable interrupt for event END</description>
122653 <description>Disable</description>
122658 <description>Enable</description>
122665 <description>Enable or disable interrupt for event DONE</description>
122671 <description>Disable</description>
122676 <description>Enable</description>
122683 <description>Enable or disable interrupt for event RESULTDONE</description>
122689 <description>Disable</description>
122694 <description>Enable</description>
122701 <description>Enable or disable interrupt for event CALIBRATEDONE</description>
122707 <description>Disable</description>
122712 <description>Enable</description>
122719 <description>Enable or disable interrupt for event STOPPED</description>
122725 <description>Disable</description>
122730 <description>Enable</description>
122737 <description>Enable or disable interrupt for event CH0LIMITH</description>
122743 <description>Disable</description>
122748 <description>Enable</description>
122755 <description>Enable or disable interrupt for event CH0LIMITL</description>
122761 <description>Disable</description>
122766 <description>Enable</description>
122773 <description>Enable or disable interrupt for event CH1LIMITH</description>
122779 <description>Disable</description>
122784 <description>Enable</description>
122791 <description>Enable or disable interrupt for event CH1LIMITL</description>
122797 <description>Disable</description>
122802 <description>Enable</description>
122809 <description>Enable or disable interrupt for event CH2LIMITH</description>
122815 <description>Disable</description>
122820 <description>Enable</description>
122827 <description>Enable or disable interrupt for event CH2LIMITL</description>
122833 <description>Disable</description>
122838 <description>Enable</description>
122845 <description>Enable or disable interrupt for event CH3LIMITH</description>
122851 <description>Disable</description>
122856 <description>Enable</description>
122863 <description>Enable or disable interrupt for event CH3LIMITL</description>
122869 <description>Disable</description>
122874 <description>Enable</description>
122881 <description>Enable or disable interrupt for event CH4LIMITH</description>
122887 <description>Disable</description>
122892 <description>Enable</description>
122899 <description>Enable or disable interrupt for event CH4LIMITL</description>
122905 <description>Disable</description>
122910 <description>Enable</description>
122917 <description>Enable or disable interrupt for event CH5LIMITH</description>
122923 <description>Disable</description>
122928 <description>Enable</description>
122935 <description>Enable or disable interrupt for event CH5LIMITL</description>
122941 <description>Disable</description>
122946 <description>Enable</description>
122953 <description>Enable or disable interrupt for event CH6LIMITH</description>
122959 <description>Disable</description>
122964 <description>Enable</description>
122971 <description>Enable or disable interrupt for event CH6LIMITL</description>
122977 <description>Disable</description>
122982 <description>Enable</description>
122989 <description>Enable or disable interrupt for event CH7LIMITH</description>
122995 <description>Disable</description>
123000 <description>Enable</description>
123007 <description>Enable or disable interrupt for event CH7LIMITL</description>
123013 <description>Disable</description>
123018 <description>Enable</description>
123027 <description>Enable interrupt</description>
123035 <description>Write '1' to enable interrupt for event STARTED</description>
123042 <description>Read: Disabled</description>
123047 <description>Read: Enabled</description>
123055 <description>Enable</description>
123062 <description>Write '1' to enable interrupt for event END</description>
123069 <description>Read: Disabled</description>
123074 <description>Read: Enabled</description>
123082 <description>Enable</description>
123089 <description>Write '1' to enable interrupt for event DONE</description>
123096 <description>Read: Disabled</description>
123101 <description>Read: Enabled</description>
123109 <description>Enable</description>
123116 <description>Write '1' to enable interrupt for event RESULTDONE</description>
123123 <description>Read: Disabled</description>
123128 <description>Read: Enabled</description>
123136 <description>Enable</description>
123143 <description>Write '1' to enable interrupt for event CALIBRATEDONE</description>
123150 <description>Read: Disabled</description>
123155 <description>Read: Enabled</description>
123163 <description>Enable</description>
123170 <description>Write '1' to enable interrupt for event STOPPED</description>
123177 <description>Read: Disabled</description>
123182 <description>Read: Enabled</description>
123190 <description>Enable</description>
123197 <description>Write '1' to enable interrupt for event CH0LIMITH</description>
123204 <description>Read: Disabled</description>
123209 <description>Read: Enabled</description>
123217 <description>Enable</description>
123224 <description>Write '1' to enable interrupt for event CH0LIMITL</description>
123231 <description>Read: Disabled</description>
123236 <description>Read: Enabled</description>
123244 <description>Enable</description>
123251 <description>Write '1' to enable interrupt for event CH1LIMITH</description>
123258 <description>Read: Disabled</description>
123263 <description>Read: Enabled</description>
123271 <description>Enable</description>
123278 <description>Write '1' to enable interrupt for event CH1LIMITL</description>
123285 <description>Read: Disabled</description>
123290 <description>Read: Enabled</description>
123298 <description>Enable</description>
123305 <description>Write '1' to enable interrupt for event CH2LIMITH</description>
123312 <description>Read: Disabled</description>
123317 <description>Read: Enabled</description>
123325 <description>Enable</description>
123332 <description>Write '1' to enable interrupt for event CH2LIMITL</description>
123339 <description>Read: Disabled</description>
123344 <description>Read: Enabled</description>
123352 <description>Enable</description>
123359 <description>Write '1' to enable interrupt for event CH3LIMITH</description>
123366 <description>Read: Disabled</description>
123371 <description>Read: Enabled</description>
123379 <description>Enable</description>
123386 <description>Write '1' to enable interrupt for event CH3LIMITL</description>
123393 <description>Read: Disabled</description>
123398 <description>Read: Enabled</description>
123406 <description>Enable</description>
123413 <description>Write '1' to enable interrupt for event CH4LIMITH</description>
123420 <description>Read: Disabled</description>
123425 <description>Read: Enabled</description>
123433 <description>Enable</description>
123440 <description>Write '1' to enable interrupt for event CH4LIMITL</description>
123447 <description>Read: Disabled</description>
123452 <description>Read: Enabled</description>
123460 <description>Enable</description>
123467 <description>Write '1' to enable interrupt for event CH5LIMITH</description>
123474 <description>Read: Disabled</description>
123479 <description>Read: Enabled</description>
123487 <description>Enable</description>
123494 <description>Write '1' to enable interrupt for event CH5LIMITL</description>
123501 <description>Read: Disabled</description>
123506 <description>Read: Enabled</description>
123514 <description>Enable</description>
123521 <description>Write '1' to enable interrupt for event CH6LIMITH</description>
123528 <description>Read: Disabled</description>
123533 <description>Read: Enabled</description>
123541 <description>Enable</description>
123548 <description>Write '1' to enable interrupt for event CH6LIMITL</description>
123555 <description>Read: Disabled</description>
123560 <description>Read: Enabled</description>
123568 <description>Enable</description>
123575 <description>Write '1' to enable interrupt for event CH7LIMITH</description>
123582 <description>Read: Disabled</description>
123587 <description>Read: Enabled</description>
123595 <description>Enable</description>
123602 <description>Write '1' to enable interrupt for event CH7LIMITL</description>
123609 <description>Read: Disabled</description>
123614 <description>Read: Enabled</description>
123622 <description>Enable</description>
123631 <description>Disable interrupt</description>
123639 <description>Write '1' to disable interrupt for event STARTED</description>
123646 <description>Read: Disabled</description>
123651 <description>Read: Enabled</description>
123659 <description>Disable</description>
123666 <description>Write '1' to disable interrupt for event END</description>
123673 <description>Read: Disabled</description>
123678 <description>Read: Enabled</description>
123686 <description>Disable</description>
123693 <description>Write '1' to disable interrupt for event DONE</description>
123700 <description>Read: Disabled</description>
123705 <description>Read: Enabled</description>
123713 <description>Disable</description>
123720 <description>Write '1' to disable interrupt for event RESULTDONE</description>
123727 <description>Read: Disabled</description>
123732 <description>Read: Enabled</description>
123740 <description>Disable</description>
123747 <description>Write '1' to disable interrupt for event CALIBRATEDONE</description>
123754 <description>Read: Disabled</description>
123759 <description>Read: Enabled</description>
123767 <description>Disable</description>
123774 <description>Write '1' to disable interrupt for event STOPPED</description>
123781 <description>Read: Disabled</description>
123786 <description>Read: Enabled</description>
123794 <description>Disable</description>
123801 <description>Write '1' to disable interrupt for event CH0LIMITH</description>
123808 <description>Read: Disabled</description>
123813 <description>Read: Enabled</description>
123821 <description>Disable</description>
123828 <description>Write '1' to disable interrupt for event CH0LIMITL</description>
123835 <description>Read: Disabled</description>
123840 <description>Read: Enabled</description>
123848 <description>Disable</description>
123855 <description>Write '1' to disable interrupt for event CH1LIMITH</description>
123862 <description>Read: Disabled</description>
123867 <description>Read: Enabled</description>
123875 <description>Disable</description>
123882 <description>Write '1' to disable interrupt for event CH1LIMITL</description>
123889 <description>Read: Disabled</description>
123894 <description>Read: Enabled</description>
123902 <description>Disable</description>
123909 <description>Write '1' to disable interrupt for event CH2LIMITH</description>
123916 <description>Read: Disabled</description>
123921 <description>Read: Enabled</description>
123929 <description>Disable</description>
123936 <description>Write '1' to disable interrupt for event CH2LIMITL</description>
123943 <description>Read: Disabled</description>
123948 <description>Read: Enabled</description>
123956 <description>Disable</description>
123963 <description>Write '1' to disable interrupt for event CH3LIMITH</description>
123970 <description>Read: Disabled</description>
123975 <description>Read: Enabled</description>
123983 <description>Disable</description>
123990 <description>Write '1' to disable interrupt for event CH3LIMITL</description>
123997 <description>Read: Disabled</description>
124002 <description>Read: Enabled</description>
124010 <description>Disable</description>
124017 <description>Write '1' to disable interrupt for event CH4LIMITH</description>
124024 <description>Read: Disabled</description>
124029 <description>Read: Enabled</description>
124037 <description>Disable</description>
124044 <description>Write '1' to disable interrupt for event CH4LIMITL</description>
124051 <description>Read: Disabled</description>
124056 <description>Read: Enabled</description>
124064 <description>Disable</description>
124071 <description>Write '1' to disable interrupt for event CH5LIMITH</description>
124078 <description>Read: Disabled</description>
124083 <description>Read: Enabled</description>
124091 <description>Disable</description>
124098 <description>Write '1' to disable interrupt for event CH5LIMITL</description>
124105 <description>Read: Disabled</description>
124110 <description>Read: Enabled</description>
124118 <description>Disable</description>
124125 <description>Write '1' to disable interrupt for event CH6LIMITH</description>
124132 <description>Read: Disabled</description>
124137 <description>Read: Enabled</description>
124145 <description>Disable</description>
124152 <description>Write '1' to disable interrupt for event CH6LIMITL</description>
124159 <description>Read: Disabled</description>
124164 <description>Read: Enabled</description>
124172 <description>Disable</description>
124179 <description>Write '1' to disable interrupt for event CH7LIMITH</description>
124186 <description>Read: Disabled</description>
124191 <description>Read: Enabled</description>
124199 <description>Disable</description>
124206 <description>Write '1' to disable interrupt for event CH7LIMITL</description>
124213 <description>Read: Disabled</description>
124218 <description>Read: Enabled</description>
124226 <description>Disable</description>
124235 <description>Status</description>
124243 <description>Status</description>
124249 <description>ADC is ready. No on-going conversion.</description>
124254 <description>ADC is busy. Single conversion in progress.</description>
124263 <description>Unspecified</description>
124271 <description>Description collection: Linearity calibration coefficient</description>
124279 <description>value</description>
124288 <description>Enable or disable ADC</description>
124296 <description>Enable or disable ADC</description>
124302 <description>Disable ADC</description>
124307 <description>Enable ADC</description>
124318 <description>Unspecified</description>
124324 <description>Description cluster: Input positive pin selection for CH[n]</description>
124332 <description>Analog positive input pin select</description>
124338 <description>GPIO Port selection</description>
124344 <description>Connection</description>
124350 <description>Not connected</description>
124355 <description>Select analog input</description>
124364 <description>Description cluster: Input negative pin selection for CH[n]</description>
124372 <description>Analog negative input pin select</description>
124378 <description>GPIO Port selection</description>
124384 <description>Connection</description>
124390 <description>Not connected</description>
124395 <description>Select analog input</description>
124404 <description>Description cluster: Input configuration for CH[n]</description>
124412 <description>Positive channel resistor control</description>
124418 <description>Bypass resistor ladder</description>
124423 <description>Pull-down to GND</description>
124428 <description>Pull-up to VDD_AO_1V8</description>
124433 <description>Set input at VDD_AO_1V8/2</description>
124440 <description>Negative channel resistor control</description>
124446 <description>Bypass resistor ladder</description>
124451 <description>Pull-down to GND</description>
124456 <description>Pull-up to VDD_AO_1V8</description>
124461 <description>Set input at VDD_AO_1V8/2</description>
124468 <description>Gain control</description>
124474 <description>2/3</description>
124479 <description>1</description>
124484 <description>2</description>
124489 <description>4</description>
124496 <description>Enable burst mode</description>
124502 <description>Burst mode is disabled (normal operation)</description>
124507 …<description>Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, …
124514 <description>Reference control</description>
124520 <description>Internal reference (1.024 V)</description>
124525 <description>External reference given at PADC_EXT_REF_1V2</description>
124532 <description>Enable differential mode</description>
124538 …<description>Single ended, PSELN will be ignored, negative input to ADC shorted to GND</descriptio…
124543 <description>Differential</description>
124550 …<description>Acquisition time, the time the ADC uses to sample the input voltage. Resulting acquis…
124556 … <description>Conversion time. Resulting conversion time is ((TCONV+1) x 250 ns)</description>
124564 … <description>Description cluster: High/low limits for event monitoring a channel</description>
124572 <description>Low level limit</description>
124578 <description>High level limit</description>
124587 <description>Resolution configuration</description>
124595 <description>Set the resolution</description>
124601 <description>8 bit</description>
124606 <description>10 bit</description>
124611 <description>12 bit</description>
124616 <description>14 bit</description>
124625 …description>Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTIO…
124633 <description>Oversample control</description>
124639 <description>Bypass oversampling</description>
124644 <description>Oversample 2x</description>
124649 <description>Oversample 4x</description>
124654 <description>Oversample 8x</description>
124659 <description>Oversample 16x</description>
124664 <description>Oversample 32x</description>
124669 <description>Oversample 64x</description>
124674 <description>Oversample 128x</description>
124679 <description>Oversample 256x</description>
124688 <description>Controls normal or continuous sample rate</description>
124696 <description>Capture and compare value. Sample rate is 16 MHz/CC</description>
124702 <description>Select mode for sample rate control</description>
124708 <description>Rate is controlled from SAMPLE task</description>
124713 … <description>Rate is controlled from local timer (use CC to control the rate)</description>
124722 <description>RESULT EasyDMA channel</description>
124728 <description>Data pointer</description>
124736 <description>Data pointer</description>
124744 <description>Maximum number of buffer bytes to transfer</description>
124752 <description>Maximum number of buffer bytes to transfer</description>
124760 <description>Number of buffer bytes transferred since last START</description>
124768 …<description>Number of buffer bytes transferred since last START. This register can be read after …
124779 <description>Comparator</description>
124797 <description>Start comparator</description>
124805 <description>Start comparator</description>
124811 <description>Trigger task</description>
124820 <description>Stop comparator</description>
124828 <description>Stop comparator</description>
124834 <description>Trigger task</description>
124843 <description>Sample comparator value</description>
124851 <description>Sample comparator value</description>
124857 <description>Trigger task</description>
124866 <description>Subscribe configuration for task START</description>
124874 <description>DPPI channel that task START will subscribe to</description>
124885 <description>Disable subscription</description>
124890 <description>Enable subscription</description>
124899 <description>Subscribe configuration for task STOP</description>
124907 <description>DPPI channel that task STOP will subscribe to</description>
124918 <description>Disable subscription</description>
124923 <description>Enable subscription</description>
124932 <description>Subscribe configuration for task SAMPLE</description>
124940 <description>DPPI channel that task SAMPLE will subscribe to</description>
124951 <description>Disable subscription</description>
124956 <description>Enable subscription</description>
124965 <description>COMP is ready and output is valid</description>
124973 <description>COMP is ready and output is valid</description>
124979 <description>Event not generated</description>
124984 <description>Event generated</description>
124993 <description>Downward crossing</description>
125001 <description>Downward crossing</description>
125007 <description>Event not generated</description>
125012 <description>Event generated</description>
125021 <description>Upward crossing</description>
125029 <description>Upward crossing</description>
125035 <description>Event not generated</description>
125040 <description>Event generated</description>
125049 <description>Downward or upward crossing</description>
125057 <description>Downward or upward crossing</description>
125063 <description>Event not generated</description>
125068 <description>Event generated</description>
125077 <description>Publish configuration for event READY</description>
125085 <description>DPPI channel that event READY will publish to</description>
125096 <description>Disable publishing</description>
125101 <description>Enable publishing</description>
125110 <description>Publish configuration for event DOWN</description>
125118 <description>DPPI channel that event DOWN will publish to</description>
125129 <description>Disable publishing</description>
125134 <description>Enable publishing</description>
125143 <description>Publish configuration for event UP</description>
125151 <description>DPPI channel that event UP will publish to</description>
125162 <description>Disable publishing</description>
125167 <description>Enable publishing</description>
125176 <description>Publish configuration for event CROSS</description>
125184 <description>DPPI channel that event CROSS will publish to</description>
125195 <description>Disable publishing</description>
125200 <description>Enable publishing</description>
125209 <description>Shortcuts between local events and tasks</description>
125217 <description>Shortcut between event READY and task SAMPLE</description>
125223 <description>Disable shortcut</description>
125228 <description>Enable shortcut</description>
125235 <description>Shortcut between event READY and task STOP</description>
125241 <description>Disable shortcut</description>
125246 <description>Enable shortcut</description>
125253 <description>Shortcut between event DOWN and task STOP</description>
125259 <description>Disable shortcut</description>
125264 <description>Enable shortcut</description>
125271 <description>Shortcut between event UP and task STOP</description>
125277 <description>Disable shortcut</description>
125282 <description>Enable shortcut</description>
125289 <description>Shortcut between event CROSS and task STOP</description>
125295 <description>Disable shortcut</description>
125300 <description>Enable shortcut</description>
125309 <description>Enable or disable interrupt</description>
125317 <description>Enable or disable interrupt for event READY</description>
125323 <description>Disable</description>
125328 <description>Enable</description>
125335 <description>Enable or disable interrupt for event DOWN</description>
125341 <description>Disable</description>
125346 <description>Enable</description>
125353 <description>Enable or disable interrupt for event UP</description>
125359 <description>Disable</description>
125364 <description>Enable</description>
125371 <description>Enable or disable interrupt for event CROSS</description>
125377 <description>Disable</description>
125382 <description>Enable</description>
125391 <description>Enable interrupt</description>
125399 <description>Write '1' to enable interrupt for event READY</description>
125406 <description>Read: Disabled</description>
125411 <description>Read: Enabled</description>
125419 <description>Enable</description>
125426 <description>Write '1' to enable interrupt for event DOWN</description>
125433 <description>Read: Disabled</description>
125438 <description>Read: Enabled</description>
125446 <description>Enable</description>
125453 <description>Write '1' to enable interrupt for event UP</description>
125460 <description>Read: Disabled</description>
125465 <description>Read: Enabled</description>
125473 <description>Enable</description>
125480 <description>Write '1' to enable interrupt for event CROSS</description>
125487 <description>Read: Disabled</description>
125492 <description>Read: Enabled</description>
125500 <description>Enable</description>
125509 <description>Disable interrupt</description>
125517 <description>Write '1' to disable interrupt for event READY</description>
125524 <description>Read: Disabled</description>
125529 <description>Read: Enabled</description>
125537 <description>Disable</description>
125544 <description>Write '1' to disable interrupt for event DOWN</description>
125551 <description>Read: Disabled</description>
125556 <description>Read: Enabled</description>
125564 <description>Disable</description>
125571 <description>Write '1' to disable interrupt for event UP</description>
125578 <description>Read: Disabled</description>
125583 <description>Read: Enabled</description>
125591 <description>Disable</description>
125598 <description>Write '1' to disable interrupt for event CROSS</description>
125605 <description>Read: Disabled</description>
125610 <description>Read: Enabled</description>
125618 <description>Disable</description>
125627 <description>Pending interrupts</description>
125635 <description>Read pending status of interrupt for event READY</description>
125642 <description>Read: Not pending</description>
125647 <description>Read: Pending</description>
125654 <description>Read pending status of interrupt for event DOWN</description>
125661 <description>Read: Not pending</description>
125666 <description>Read: Pending</description>
125673 <description>Read pending status of interrupt for event UP</description>
125680 <description>Read: Not pending</description>
125685 <description>Read: Pending</description>
125692 <description>Read pending status of interrupt for event CROSS</description>
125699 <description>Read: Not pending</description>
125704 <description>Read: Pending</description>
125713 <description>Compare result</description>
125721 <description>Result of last compare. Decision point SAMPLE task.</description>
125727 … <description>Input voltage is below the threshold (VIN+ &lt; VIN-)</description>
125732 … <description>Input voltage is above the threshold (VIN+ &gt; VIN-)</description>
125741 <description>COMP enable</description>
125749 <description>Enable or disable COMP</description>
125755 <description>Disable</description>
125760 <description>Enable</description>
125769 <description>Pin select</description>
125777 <description>Analog pin select</description>
125783 <description>GPIO Port selection</description>
125791 <description>Reference source select for single-ended mode</description>
125799 <description>Reference select</description>
125805 … <description>VREF = internal 1.2 V reference (AVDD_AO_1V8 &gt;= 1.7 V)</description>
125810 <description>VREF = AVDD_AO_1V8</description>
125815 <description>VREF = AREF</description>
125824 <description>External reference select</description>
125832 <description>External analog reference pin select</description>
125838 <description>GPIO Port selection</description>
125846 <description>Threshold configuration for hysteresis unit</description>
125854 <description>VDOWN = (THDOWN+1)/64*VREF</description>
125860 <description>VUP = (THUP+1)/64*VREF</description>
125868 <description>Mode configuration</description>
125876 <description>Speed and power modes</description>
125882 <description>Low-power mode</description>
125887 <description>High-speed mode</description>
125894 <description>Main operation modes</description>
125900 <description>Single-ended mode</description>
125905 <description>Differential mode</description>
125914 <description>Comparator hysteresis enable</description>
125922 <description>Comparator hysteresis</description>
125928 <description>Comparator hysteresis disabled</description>
125933 <description>Comparator hysteresis enabled</description>
125942 <description>Current source select on analog input</description>
125950 <description>Current source select on analog input</description>
125956 <description>Current source disabled</description>
125961 <description>Current source enabled (+/- 2.5 uA)</description>
125966 <description>Current source enabled (+/- 5 uA)</description>
125971 <description>Current source enabled (+/- 10 uA)</description>
125982 <description>Low-power comparator</description>
126001 <description>Start comparator</description>
126009 <description>Start comparator</description>
126015 <description>Trigger task</description>
126024 <description>Stop comparator</description>
126032 <description>Stop comparator</description>
126038 <description>Trigger task</description>
126047 <description>Sample comparator value</description>
126055 <description>Sample comparator value</description>
126061 <description>Trigger task</description>
126070 <description>Subscribe configuration for task START</description>
126078 <description>DPPI channel that task START will subscribe to</description>
126089 <description>Disable subscription</description>
126094 <description>Enable subscription</description>
126103 <description>Subscribe configuration for task STOP</description>
126111 <description>DPPI channel that task STOP will subscribe to</description>
126122 <description>Disable subscription</description>
126127 <description>Enable subscription</description>
126136 <description>Subscribe configuration for task SAMPLE</description>
126144 <description>DPPI channel that task SAMPLE will subscribe to</description>
126155 <description>Disable subscription</description>
126160 <description>Enable subscription</description>
126169 <description>LPCOMP is ready and output is valid</description>
126177 <description>LPCOMP is ready and output is valid</description>
126183 <description>Event not generated</description>
126188 <description>Event generated</description>
126197 <description>Downward crossing</description>
126205 <description>Downward crossing</description>
126211 <description>Event not generated</description>
126216 <description>Event generated</description>
126225 <description>Upward crossing</description>
126233 <description>Upward crossing</description>
126239 <description>Event not generated</description>
126244 <description>Event generated</description>
126253 <description>Downward or upward crossing</description>
126261 <description>Downward or upward crossing</description>
126267 <description>Event not generated</description>
126272 <description>Event generated</description>
126281 <description>Publish configuration for event READY</description>
126289 <description>DPPI channel that event READY will publish to</description>
126300 <description>Disable publishing</description>
126305 <description>Enable publishing</description>
126314 <description>Publish configuration for event DOWN</description>
126322 <description>DPPI channel that event DOWN will publish to</description>
126333 <description>Disable publishing</description>
126338 <description>Enable publishing</description>
126347 <description>Publish configuration for event UP</description>
126355 <description>DPPI channel that event UP will publish to</description>
126366 <description>Disable publishing</description>
126371 <description>Enable publishing</description>
126380 <description>Publish configuration for event CROSS</description>
126388 <description>DPPI channel that event CROSS will publish to</description>
126399 <description>Disable publishing</description>
126404 <description>Enable publishing</description>
126413 <description>Shortcuts between local events and tasks</description>
126421 <description>Shortcut between event READY and task SAMPLE</description>
126427 <description>Disable shortcut</description>
126432 <description>Enable shortcut</description>
126439 <description>Shortcut between event READY and task STOP</description>
126445 <description>Disable shortcut</description>
126450 <description>Enable shortcut</description>
126457 <description>Shortcut between event DOWN and task STOP</description>
126463 <description>Disable shortcut</description>
126468 <description>Enable shortcut</description>
126475 <description>Shortcut between event UP and task STOP</description>
126481 <description>Disable shortcut</description>
126486 <description>Enable shortcut</description>
126493 <description>Shortcut between event CROSS and task STOP</description>
126499 <description>Disable shortcut</description>
126504 <description>Enable shortcut</description>
126513 <description>Enable or disable interrupt</description>
126521 <description>Enable or disable interrupt for event READY</description>
126527 <description>Disable</description>
126532 <description>Enable</description>
126539 <description>Enable or disable interrupt for event DOWN</description>
126545 <description>Disable</description>
126550 <description>Enable</description>
126557 <description>Enable or disable interrupt for event UP</description>
126563 <description>Disable</description>
126568 <description>Enable</description>
126575 <description>Enable or disable interrupt for event CROSS</description>
126581 <description>Disable</description>
126586 <description>Enable</description>
126595 <description>Enable interrupt</description>
126603 <description>Write '1' to enable interrupt for event READY</description>
126610 <description>Read: Disabled</description>
126615 <description>Read: Enabled</description>
126623 <description>Enable</description>
126630 <description>Write '1' to enable interrupt for event DOWN</description>
126637 <description>Read: Disabled</description>
126642 <description>Read: Enabled</description>
126650 <description>Enable</description>
126657 <description>Write '1' to enable interrupt for event UP</description>
126664 <description>Read: Disabled</description>
126669 <description>Read: Enabled</description>
126677 <description>Enable</description>
126684 <description>Write '1' to enable interrupt for event CROSS</description>
126691 <description>Read: Disabled</description>
126696 <description>Read: Enabled</description>
126704 <description>Enable</description>
126713 <description>Disable interrupt</description>
126721 <description>Write '1' to disable interrupt for event READY</description>
126728 <description>Read: Disabled</description>
126733 <description>Read: Enabled</description>
126741 <description>Disable</description>
126748 <description>Write '1' to disable interrupt for event DOWN</description>
126755 <description>Read: Disabled</description>
126760 <description>Read: Enabled</description>
126768 <description>Disable</description>
126775 <description>Write '1' to disable interrupt for event UP</description>
126782 <description>Read: Disabled</description>
126787 <description>Read: Enabled</description>
126795 <description>Disable</description>
126802 <description>Write '1' to disable interrupt for event CROSS</description>
126809 <description>Read: Disabled</description>
126814 <description>Read: Enabled</description>
126822 <description>Disable</description>
126831 <description>Pending interrupts</description>
126839 <description>Read pending status of interrupt for event READY</description>
126846 <description>Read: Not pending</description>
126851 <description>Read: Pending</description>
126858 <description>Read pending status of interrupt for event DOWN</description>
126865 <description>Read: Not pending</description>
126870 <description>Read: Pending</description>
126877 <description>Read pending status of interrupt for event UP</description>
126884 <description>Read: Not pending</description>
126889 <description>Read: Pending</description>
126896 <description>Read pending status of interrupt for event CROSS</description>
126903 <description>Read: Not pending</description>
126908 <description>Read: Pending</description>
126917 <description>Compare result</description>
126925 <description>Result of last compare. Decision point SAMPLE task.</description>
126931 … <description>Input voltage is below the reference threshold (VIN+ &lt; VIN-)</description>
126936 … <description>Input voltage is above the reference threshold (VIN+ &gt; VIN-)</description>
126945 <description>Enable LPCOMP</description>
126953 <description>Enable or disable LPCOMP</description>
126959 <description>Disable</description>
126964 <description>Enable</description>
126973 <description>Input pin select</description>
126981 <description>Analog pin select</description>
126987 <description>GPIO Port selection</description>
126995 <description>Reference select</description>
127003 <description>Reference select</description>
127009 <description>VDD * 1/8 selected as reference</description>
127014 <description>VDD * 2/8 selected as reference</description>
127019 <description>VDD * 3/8 selected as reference</description>
127024 <description>VDD * 4/8 selected as reference</description>
127029 <description>VDD * 5/8 selected as reference</description>
127034 <description>VDD * 6/8 selected as reference</description>
127039 <description>VDD * 7/8 selected as reference</description>
127044 <description>External analog reference selected</description>
127049 <description>VDD * 1/16 selected as reference</description>
127054 <description>VDD * 3/16 selected as reference</description>
127059 <description>VDD * 5/16 selected as reference</description>
127064 <description>VDD * 7/16 selected as reference</description>
127069 <description>VDD * 9/16 selected as reference</description>
127074 <description>VDD * 11/16 selected as reference</description>
127079 <description>VDD * 13/16 selected as reference</description>
127084 <description>VDD * 15/16 selected as reference</description>
127093 <description>External reference select</description>
127101 <description>External analog reference pin select</description>
127107 <description>GPIO Port selection</description>
127115 <description>Analog detect configuration</description>
127123 <description>Analog detect configuration</description>
127129 …<description>Generate ANADETECT on crossing, both upward crossing and downward crossing</descripti…
127134 <description>Generate ANADETECT on upward crossing only</description>
127139 <description>Generate ANADETECT on downward crossing only</description>
127148 <description>Comparator hysteresis enable</description>
127156 <description>Comparator hysteresis enable</description>
127162 <description>Comparator hysteresis disabled</description>
127167 <description>Comparator hysteresis enabled</description>
127178 <description>Temperature Sensor</description>
127196 <description>Start temperature measurement</description>
127204 <description>Start temperature measurement</description>
127210 <description>Trigger task</description>
127219 <description>Stop temperature measurement</description>
127227 <description>Stop temperature measurement</description>
127233 <description>Trigger task</description>
127242 <description>Subscribe configuration for task START</description>
127250 <description>DPPI channel that task START will subscribe to</description>
127261 <description>Disable subscription</description>
127266 <description>Enable subscription</description>
127275 <description>Subscribe configuration for task STOP</description>
127283 <description>DPPI channel that task STOP will subscribe to</description>
127294 <description>Disable subscription</description>
127299 <description>Enable subscription</description>
127308 <description>Temperature measurement complete, data ready</description>
127316 <description>Temperature measurement complete, data ready</description>
127322 <description>Event not generated</description>
127327 <description>Event generated</description>
127336 <description>Publish configuration for event DATARDY</description>
127344 <description>DPPI channel that event DATARDY will publish to</description>
127355 <description>Disable publishing</description>
127360 <description>Enable publishing</description>
127369 <description>Enable interrupt</description>
127377 <description>Write '1' to enable interrupt for event DATARDY</description>
127384 <description>Read: Disabled</description>
127389 <description>Read: Enabled</description>
127397 <description>Enable</description>
127406 <description>Disable interrupt</description>
127414 <description>Write '1' to disable interrupt for event DATARDY</description>
127421 <description>Read: Disabled</description>
127426 <description>Read: Enabled</description>
127434 <description>Disable</description>
127443 <description>Temperature in degC (0.25deg steps)</description>
127452 <description>Temperature in degC (0.25deg steps)</description>
127460 <description>Slope of 1st piece wise linear function</description>
127468 <description>Slope of 1st piece wise linear function</description>
127476 <description>Slope of 2nd piece wise linear function</description>
127484 <description>Slope of 2nd piece wise linear function</description>
127492 <description>Slope of 3rd piece wise linear function</description>
127500 <description>Slope of 3rd piece wise linear function</description>
127508 <description>Slope of 4th piece wise linear function</description>
127516 <description>Slope of 4th piece wise linear function</description>
127524 <description>Slope of 5th piece wise linear function</description>
127532 <description>Slope of 5th piece wise linear function</description>
127540 <description>Slope of 6th piece wise linear function</description>
127548 <description>Slope of 6th piece wise linear function</description>
127556 <description>Slope of 7th piece wise linear function</description>
127564 <description>Slope of 7th piece wise linear function</description>
127572 <description>y-intercept of 1st piece wise linear function</description>
127580 <description>y-intercept of 1st piece wise linear function</description>
127588 <description>y-intercept of 2nd piece wise linear function</description>
127596 <description>y-intercept of 2nd piece wise linear function</description>
127604 <description>y-intercept of 3rd piece wise linear function</description>
127612 <description>y-intercept of 3rd piece wise linear function</description>
127620 <description>y-intercept of 4th piece wise linear function</description>
127628 <description>y-intercept of 4th piece wise linear function</description>
127636 <description>y-intercept of 5th piece wise linear function</description>
127644 <description>y-intercept of 5th piece wise linear function</description>
127652 <description>y-intercept of 6th piece wise linear function</description>
127660 <description>y-intercept of 6th piece wise linear function</description>
127668 <description>y-intercept of 7th piece wise linear function</description>
127676 <description>y-intercept of 7th piece wise linear function</description>
127684 <description>End point of 1st piece wise linear function</description>
127692 <description>End point of 1st piece wise linear function</description>
127700 <description>End point of 2nd piece wise linear function</description>
127708 <description>End point of 2nd piece wise linear function</description>
127716 <description>End point of 3rd piece wise linear function</description>
127724 <description>End point of 3rd piece wise linear function</description>
127732 <description>End point of 4th piece wise linear function</description>
127740 <description>End point of 4th piece wise linear function</description>
127748 <description>End point of 5th piece wise linear function</description>
127756 <description>End point of 5th piece wise linear function</description>
127764 <description>End point of 6th piece wise linear function</description>
127772 <description>End point of 6th piece wise linear function</description>
127782 <description>Distributed programmable peripheral interconnect controller 3</description>
127790 <description>Inter-IC Sound 0</description>
127809 …<description>Starts continuous I2S transfer. Also starts MCK generator when this is enabled</descr…
127817 …<description>Starts continuous I2S transfer. Also starts MCK generator when this is enabled</descr…
127823 <description>Trigger task</description>
127832 …<description>Stops I2S transfer and MCK generator. Triggering this task will cause the event STOPP…
127840 …<description>Stops I2S transfer and MCK generator. Triggering this task will cause the event STOPP…
127846 <description>Trigger task</description>
127855 <description>Subscribe configuration for task START</description>
127863 <description>DPPI channel that task START will subscribe to</description>
127874 <description>Disable subscription</description>
127879 <description>Enable subscription</description>
127888 <description>Subscribe configuration for task STOP</description>
127896 <description>DPPI channel that task STOP will subscribe to</description>
127907 <description>Disable subscription</description>
127912 <description>Enable subscription</description>
127921 <description>The RXD.PTR register has been copied to internal double-buffers.
127922 …, this event will be generated for every RXTXD.MAXCNT words received on the SDIN pin.</description>
127930 <description>The RXD.PTR register has been copied to internal double-buffers.
127931 …, this event will be generated for every RXTXD.MAXCNT words received on the SDIN pin.</description>
127937 <description>Event not generated</description>
127942 <description>Event generated</description>
127951 <description>I2S transfer stopped.</description>
127959 <description>I2S transfer stopped.</description>
127965 <description>Event not generated</description>
127970 <description>Event generated</description>
127979 <description>The TDX.PTR register has been copied to internal double-buffers.
127980 … event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin.</description>
127988 <description>The TDX.PTR register has been copied to internal double-buffers.
127989 … event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin.</description>
127995 <description>Event not generated</description>
128000 <description>Event generated</description>
128009 <description>Frame start event, generated on the active edge of LRCK</description>
128017 <description>Frame start event, generated on the active edge of LRCK</description>
128023 <description>Event not generated</description>
128028 <description>Event generated</description>
128037 <description>Publish configuration for event RXPTRUPD</description>
128045 <description>DPPI channel that event RXPTRUPD will publish to</description>
128056 <description>Disable publishing</description>
128061 <description>Enable publishing</description>
128070 <description>Publish configuration for event STOPPED</description>
128078 <description>DPPI channel that event STOPPED will publish to</description>
128089 <description>Disable publishing</description>
128094 <description>Enable publishing</description>
128103 <description>Publish configuration for event TXPTRUPD</description>
128111 <description>DPPI channel that event TXPTRUPD will publish to</description>
128122 <description>Disable publishing</description>
128127 <description>Enable publishing</description>
128136 <description>Publish configuration for event FRAMESTART</description>
128144 <description>DPPI channel that event FRAMESTART will publish to</description>
128155 <description>Disable publishing</description>
128160 <description>Enable publishing</description>
128169 <description>Enable or disable interrupt</description>
128177 <description>Enable or disable interrupt for event RXPTRUPD</description>
128183 <description>Disable</description>
128188 <description>Enable</description>
128195 <description>Enable or disable interrupt for event STOPPED</description>
128201 <description>Disable</description>
128206 <description>Enable</description>
128213 <description>Enable or disable interrupt for event TXPTRUPD</description>
128219 <description>Disable</description>
128224 <description>Enable</description>
128231 <description>Enable or disable interrupt for event FRAMESTART</description>
128237 <description>Disable</description>
128242 <description>Enable</description>
128251 <description>Enable interrupt</description>
128259 <description>Write '1' to enable interrupt for event RXPTRUPD</description>
128266 <description>Read: Disabled</description>
128271 <description>Read: Enabled</description>
128279 <description>Enable</description>
128286 <description>Write '1' to enable interrupt for event STOPPED</description>
128293 <description>Read: Disabled</description>
128298 <description>Read: Enabled</description>
128306 <description>Enable</description>
128313 <description>Write '1' to enable interrupt for event TXPTRUPD</description>
128320 <description>Read: Disabled</description>
128325 <description>Read: Enabled</description>
128333 <description>Enable</description>
128340 <description>Write '1' to enable interrupt for event FRAMESTART</description>
128347 <description>Read: Disabled</description>
128352 <description>Read: Enabled</description>
128360 <description>Enable</description>
128369 <description>Disable interrupt</description>
128377 <description>Write '1' to disable interrupt for event RXPTRUPD</description>
128384 <description>Read: Disabled</description>
128389 <description>Read: Enabled</description>
128397 <description>Disable</description>
128404 <description>Write '1' to disable interrupt for event STOPPED</description>
128411 <description>Read: Disabled</description>
128416 <description>Read: Enabled</description>
128424 <description>Disable</description>
128431 <description>Write '1' to disable interrupt for event TXPTRUPD</description>
128438 <description>Read: Disabled</description>
128443 <description>Read: Enabled</description>
128451 <description>Disable</description>
128458 <description>Write '1' to disable interrupt for event FRAMESTART</description>
128465 <description>Read: Disabled</description>
128470 <description>Read: Enabled</description>
128478 <description>Disable</description>
128487 <description>Enable I2S module</description>
128495 <description>Enable I2S module</description>
128501 <description>Disable</description>
128506 <description>Enable</description>
128515 <description>Unspecified</description>
128521 <description>I2S mode</description>
128529 <description>I2S mode</description>
128535 …<description>Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pi…
128540 …<description>Slave mode. SCK and LRCK generated by external master and received on pins defined by…
128549 <description>Reception (RX) enable</description>
128557 <description>Reception (RX) enable</description>
128563 … <description>Reception disabled and now data will be written to the RXD.PTR address.</description>
128568 <description>Reception enabled.</description>
128577 <description>Transmission (TX) enable</description>
128585 <description>Transmission (TX) enable</description>
128591 …<description>Transmission disabled and now data will be read from the RXD.TXD address.</descriptio…
128596 <description>Transmission enabled.</description>
128605 <description>Master clock generator enable</description>
128613 <description>Master clock generator enable</description>
128619 …<description>Master clock generator disabled and PSEL.MCK not connected(available as GPIO).</descr…
128624 … <description>Master clock generator running and MCK output on PSEL.MCK.</description>
128633 <description>I2S clock generator control</description>
128641 …description>I2S MCK frequency configuration NOTE: Enumerations are deprecated, use MCKFREQ equatio…
128647 … <description>32 MHz / 2 = 16.0 MHz Deprecated, use MCKFREQ equation.</description>
128652 … <description>32 MHz / 3 = 10.6666667 MHz Deprecated, use MCKFREQ equation.</description>
128657 … <description>32 MHz / 4 = 8.0 MHz Deprecated, use MCKFREQ equation.</description>
128662 … <description>32 MHz / 5 = 6.4 MHz Deprecated, use MCKFREQ equation.</description>
128667 … <description>32 MHz / 6 = 5.3333333 MHz Deprecated, use MCKFREQ equation.</description>
128672 … <description>32 MHz / 8 = 4.0 MHz Deprecated, use MCKFREQ equation.</description>
128677 … <description>32 MHz / 10 = 3.2 MHz Deprecated, use MCKFREQ equation.</description>
128682 … <description>32 MHz / 11 = 2.9090909 MHz Deprecated, use MCKFREQ equation.</description>
128687 … <description>32 MHz / 15 = 2.1333333 MHz Deprecated, use MCKFREQ equation.</description>
128692 … <description>32 MHz / 16 = 2.0 MHz Deprecated, use MCKFREQ equation.</description>
128697 … <description>32 MHz / 21 = 1.5238095 MHz Deprecated, use MCKFREQ equation.</description>
128702 … <description>32 MHz / 23 = 1.3913043 MHz Deprecated, use MCKFREQ equation.</description>
128707 … <description>32 MHz / 30 = 1.0666667 MHz Deprecated, use MCKFREQ equation.</description>
128712 … <description>32 MHz / 31 = 1.0322581 MHz Deprecated, use MCKFREQ equation.</description>
128717 … <description>32 MHz / 32 = 1.0 MHz Deprecated, use MCKFREQ equation.</description>
128722 … <description>32 MHz / 42 = 0.7619048 MHz Deprecated, use MCKFREQ equation.</description>
128727 … <description>32 MHz / 63 = 0.5079365 MHz Deprecated, use MCKFREQ equation.</description>
128732 … <description>32 MHz / 125 = 0.256 MHz Deprecated, use MCKFREQ equation.</description>
128741 <description>MCK / LRCK ratio</description>
128749 <description>MCK / LRCK ratio</description>
128755 <description>LRCK = MCK / 32</description>
128760 <description>LRCK = MCK / 48</description>
128765 <description>LRCK = MCK / 64</description>
128770 <description>LRCK = MCK / 96</description>
128775 <description>LRCK = MCK / 128</description>
128780 <description>LRCK = MCK / 192</description>
128785 <description>LRCK = MCK / 256</description>
128790 <description>LRCK = MCK / 384</description>
128795 <description>LRCK = MCK / 512</description>
128804 <description>Sample width</description>
128812 <description>Sample and half-frame width</description>
128818 <description>8 bit sample.</description>
128823 <description>16 bit sample.</description>
128828 <description>24 bit sample.</description>
128833 <description>32 bit sample.</description>
128838 <description>8 bit sample in a 16-bit half-frame.</description>
128843 <description>8 bit sample in a 32-bit half-frame.</description>
128848 <description>16 bit sample in a 32-bit half-frame.</description>
128853 <description>24 bit sample in a 32-bit half-frame.</description>
128862 <description>Alignment of sample within a frame</description>
128870 <description>Alignment of sample within a frame</description>
128876 <description>Left-aligned.</description>
128881 <description>Right-aligned.</description>
128890 <description>Frame format</description>
128898 <description>Frame format</description>
128904 <description>Original I2S format.</description>
128909 <description>Alternate (left- or right-aligned) format.</description>
128918 <description>Enable channels</description>
128926 <description>Enable channels</description>
128932 <description>Stereo.</description>
128937 <description>Left only.</description>
128942 <description>Right only.</description>
128951 <description>Clock source selection for the I2S module</description>
128959 <description>Clock source selection</description>
128965 <description>32MHz peripheral clock</description>
128970 <description>Audio PLL clock</description>
128977 …<description>Bypass clock generator. MCK will be equal to source input. If bypass is enabled the M…
128983 <description>Disable bypass</description>
128988 <description>Enable bypass</description>
128998 <description>Unspecified</description>
129004 <description>Receive buffer RAM start address.</description>
129012 …description>Receive buffer Data RAM start address. When receiving, words containing samples will b…
129021 <description>Unspecified</description>
129027 <description>Transmit buffer RAM start address</description>
129035 …description>Transmit buffer Data RAM start address. When transmitting, words containing samples wi…
129044 <description>Unspecified</description>
129050 <description>Size of RXD and TXD buffers</description>
129058 <description>Size of RXD and TXD buffers in number of 32 bit words</description>
129067 <description>Unspecified</description>
129073 <description>Pin select for MCK signal</description>
129081 <description>Pin number</description>
129087 <description>Port number</description>
129093 <description>Connection</description>
129099 <description>Disconnect</description>
129104 <description>Connect</description>
129113 <description>Pin select for SCK signal</description>
129121 <description>Pin number</description>
129127 <description>Port number</description>
129133 <description>Connection</description>
129139 <description>Disconnect</description>
129144 <description>Connect</description>
129153 <description>Pin select for LRCK signal</description>
129161 <description>Pin number</description>
129167 <description>Port number</description>
129173 <description>Connection</description>
129179 <description>Disconnect</description>
129184 <description>Connect</description>
129193 <description>Pin select for SDIN signal</description>
129201 <description>Pin number</description>
129207 <description>Port number</description>
129213 <description>Connection</description>
129219 <description>Disconnect</description>
129224 <description>Connect</description>
129233 <description>Pin select for SDOUT signal</description>
129241 <description>Pin number</description>
129247 <description>Port number</description>
129253 <description>Connection</description>
129259 <description>Disconnect</description>
129264 <description>Connect</description>
129276 <description>Pulse Density Modulation (Digital Microphone) Interface</description>
129294 <description>Starts continuous PDM transfer</description>
129302 <description>Starts continuous PDM transfer</description>
129308 <description>Trigger task</description>
129317 <description>Stops PDM transfer</description>
129325 <description>Stops PDM transfer</description>
129331 <description>Trigger task</description>
129340 <description>Subscribe configuration for task START</description>
129348 <description>DPPI channel that task START will subscribe to</description>
129359 <description>Disable subscription</description>
129364 <description>Enable subscription</description>
129373 <description>Subscribe configuration for task STOP</description>
129381 <description>DPPI channel that task STOP will subscribe to</description>
129392 <description>Disable subscription</description>
129397 <description>Enable subscription</description>
129406 <description>PDM transfer has started</description>
129414 <description>PDM transfer has started</description>
129420 <description>Event not generated</description>
129425 <description>Event generated</description>
129434 <description>PDM transfer has finished</description>
129442 <description>PDM transfer has finished</description>
129448 <description>Event not generated</description>
129453 <description>Event generated</description>
129462 …description>The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample aft…
129470 …description>The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample aft…
129476 <description>Event not generated</description>
129481 <description>Event generated</description>
129490 <description>Publish configuration for event STARTED</description>
129498 <description>DPPI channel that event STARTED will publish to</description>
129509 <description>Disable publishing</description>
129514 <description>Enable publishing</description>
129523 <description>Publish configuration for event STOPPED</description>
129531 <description>DPPI channel that event STOPPED will publish to</description>
129542 <description>Disable publishing</description>
129547 <description>Enable publishing</description>
129556 <description>Publish configuration for event END</description>
129564 <description>DPPI channel that event END will publish to</description>
129575 <description>Disable publishing</description>
129580 <description>Enable publishing</description>
129589 <description>Enable or disable interrupt</description>
129597 <description>Enable or disable interrupt for event STARTED</description>
129603 <description>Disable</description>
129608 <description>Enable</description>
129615 <description>Enable or disable interrupt for event STOPPED</description>
129621 <description>Disable</description>
129626 <description>Enable</description>
129633 <description>Enable or disable interrupt for event END</description>
129639 <description>Disable</description>
129644 <description>Enable</description>
129653 <description>Enable interrupt</description>
129661 <description>Write '1' to enable interrupt for event STARTED</description>
129668 <description>Read: Disabled</description>
129673 <description>Read: Enabled</description>
129681 <description>Enable</description>
129688 <description>Write '1' to enable interrupt for event STOPPED</description>
129695 <description>Read: Disabled</description>
129700 <description>Read: Enabled</description>
129708 <description>Enable</description>
129715 <description>Write '1' to enable interrupt for event END</description>
129722 <description>Read: Disabled</description>
129727 <description>Read: Enabled</description>
129735 <description>Enable</description>
129744 <description>Disable interrupt</description>
129752 <description>Write '1' to disable interrupt for event STARTED</description>
129759 <description>Read: Disabled</description>
129764 <description>Read: Enabled</description>
129772 <description>Disable</description>
129779 <description>Write '1' to disable interrupt for event STOPPED</description>
129786 <description>Read: Disabled</description>
129791 <description>Read: Enabled</description>
129799 <description>Disable</description>
129806 <description>Write '1' to disable interrupt for event END</description>
129813 <description>Read: Disabled</description>
129818 <description>Read: Enabled</description>
129826 <description>Disable</description>
129835 <description>Pending interrupts</description>
129843 <description>Read pending status of interrupt for event STARTED</description>
129850 <description>Read: Not pending</description>
129855 <description>Read: Pending</description>
129862 <description>Read pending status of interrupt for event STOPPED</description>
129869 <description>Read: Not pending</description>
129874 <description>Read: Pending</description>
129881 <description>Read pending status of interrupt for event END</description>
129888 <description>Read: Not pending</description>
129893 <description>Read: Pending</description>
129902 <description>PDM module enable register</description>
129910 <description>Enable or disable PDM module</description>
129916 <description>Disable</description>
129921 <description>Enable</description>
129930 <description>PDM clock generator control</description>
129938 <description>PDM_CLK frequency configuration. Enumerations are deprecated, use
129940 register are ignored and shall be set to zero.</description>
129946 <description>PDM_CLK = 32 MHz / 32 = 1.000 MHz</description>
129951 … <description>PDM_CLK = 32 MHz / 31 = 1.032 MHz. Nominal clock for RATIO=Ratio64.</description>
129956 <description>PDM_CLK = 32 MHz / 30 = 1.067 MHz</description>
129961 <description>PDM_CLK = 32 MHz / 26 = 1.231 MHz</description>
129966 … <description>PDM_CLK = 32 MHz / 25 = 1.280 MHz. Nominal clock for RATIO=Ratio80.</description>
129971 <description>PDM_CLK = 32 MHz / 24 = 1.333 MHz</description>
129980 <description>Defines the routing of the connected PDM microphones' signals</description>
129988 <description>Mono or stereo operation</description>
129994 …<description>Sample and store one pair (left + right) of 16-bit samples per RAM word R=[31:16]; L=…
129999 …<description>Sample and store two successive left samples (16 bits each) per RAM word L1=[31:16]; …
130006 <description>Defines on which PDM_CLK edge left (or mono) is sampled.</description>
130012 <description>Left (or mono) is sampled on falling edge of PDM_CLK</description>
130017 <description>Left (or mono) is sampled on rising edge of PDM_CLK</description>
130026 <description>Left output gain adjustment</description>
130034 …description>Left output gain adjustment, in 0.5 dB steps, around the default module gain (see elec…
130040 <description>-20 dB gain adjustment (minimum)</description>
130045 <description>0 dB gain adjustment</description>
130050 <description>+20 dB gain adjustment (maximum)</description>
130059 <description>Right output gain adjustment</description>
130067 …<description>Right output gain adjustment, in 0.5 dB steps, around the default module gain (see el…
130073 <description>-20 dB gain adjustment (minimum)</description>
130078 <description>0 dB gain adjustment</description>
130083 <description>+20 dB gain adjustment (maximum)</description>
130092 …<description>Selects the decimation ratio between PDM_CLK and output sample rate. Change PDMCLKCTR…
130100 … <description>Selects the decimation ratio between PDM_CLK and output sample rate</description>
130106 <description>Ratio of 64</description>
130111 <description>Ratio of 80</description>
130120 <description>Unspecified</description>
130126 <description>Pin number configuration for PDM CLK signal</description>
130134 <description>Pin number</description>
130140 <description>Port number</description>
130146 <description>Connection</description>
130152 <description>Disconnect</description>
130157 <description>Connect</description>
130166 <description>Pin number configuration for PDM DIN signal</description>
130174 <description>Pin number</description>
130180 <description>Port number</description>
130186 <description>Connection</description>
130192 <description>Disconnect</description>
130197 <description>Connect</description>
130207 <description>Master clock generator configuration</description>
130215 <description>Master clock source selection</description>
130221 <description>32 MHz peripheral clock</description>
130226 <description>Audio PLL clock</description>
130235 <description>Unspecified</description>
130241 <description>RAM address pointer to write samples to with EasyDMA</description>
130249 <description>Address to write PDM samples to over DMA</description>
130257 <description>Number of samples to allocate memory for in EasyDMA mode</description>
130265 <description>Length of DMA RAM allocation in number of samples</description>
130274 <description>Unspecified</description>
130280 <description>Terminate the transaction if a BUSERROR event is detected.</description>
130293 <description>Disable</description>
130298 <description>Enable</description>
130307 … <description>Address of transaction that generated the last BUSERROR event.</description>
130325 <description>Quadrature Decoder 0</description>
130344 <description>Task starting the quadrature decoder</description>
130352 <description>Task starting the quadrature decoder</description>
130358 <description>Trigger task</description>
130367 <description>Task stopping the quadrature decoder</description>
130375 <description>Task stopping the quadrature decoder</description>
130381 <description>Trigger task</description>
130390 <description>Read and clear ACC and ACCDBL</description>
130398 <description>Read and clear ACC and ACCDBL</description>
130404 <description>Trigger task</description>
130413 <description>Read and clear ACC</description>
130421 <description>Read and clear ACC</description>
130427 <description>Trigger task</description>
130436 <description>Read and clear ACCDBL</description>
130444 <description>Read and clear ACCDBL</description>
130450 <description>Trigger task</description>
130459 <description>Subscribe configuration for task START</description>
130467 <description>DPPI channel that task START will subscribe to</description>
130478 <description>Disable subscription</description>
130483 <description>Enable subscription</description>
130492 <description>Subscribe configuration for task STOP</description>
130500 <description>DPPI channel that task STOP will subscribe to</description>
130511 <description>Disable subscription</description>
130516 <description>Enable subscription</description>
130525 <description>Subscribe configuration for task READCLRACC</description>
130533 <description>DPPI channel that task READCLRACC will subscribe to</description>
130544 <description>Disable subscription</description>
130549 <description>Enable subscription</description>
130558 <description>Subscribe configuration for task RDCLRACC</description>
130566 <description>DPPI channel that task RDCLRACC will subscribe to</description>
130577 <description>Disable subscription</description>
130582 <description>Enable subscription</description>
130591 <description>Subscribe configuration for task RDCLRDBL</description>
130599 <description>DPPI channel that task RDCLRDBL will subscribe to</description>
130610 <description>Disable subscription</description>
130615 <description>Enable subscription</description>
130624 …<description>Event being generated for every new sample value written to the SAMPLE register</desc…
130632 …<description>Event being generated for every new sample value written to the SAMPLE register</desc…
130638 <description>Event not generated</description>
130643 <description>Event generated</description>
130652 <description>Non-null report ready</description>
130660 <description>Non-null report ready</description>
130666 <description>Event not generated</description>
130671 <description>Event generated</description>
130680 <description>ACC or ACCDBL register overflow</description>
130688 <description>ACC or ACCDBL register overflow</description>
130694 <description>Event not generated</description>
130699 <description>Event generated</description>
130708 <description>Double displacement(s) detected</description>
130716 <description>Double displacement(s) detected</description>
130722 <description>Event not generated</description>
130727 <description>Event generated</description>
130736 <description>QDEC has been stopped</description>
130744 <description>QDEC has been stopped</description>
130750 <description>Event not generated</description>
130755 <description>Event generated</description>
130764 <description>Publish configuration for event SAMPLERDY</description>
130772 <description>DPPI channel that event SAMPLERDY will publish to</description>
130783 <description>Disable publishing</description>
130788 <description>Enable publishing</description>
130797 <description>Publish configuration for event REPORTRDY</description>
130805 <description>DPPI channel that event REPORTRDY will publish to</description>
130816 <description>Disable publishing</description>
130821 <description>Enable publishing</description>
130830 <description>Publish configuration for event ACCOF</description>
130838 <description>DPPI channel that event ACCOF will publish to</description>
130849 <description>Disable publishing</description>
130854 <description>Enable publishing</description>
130863 <description>Publish configuration for event DBLRDY</description>
130871 <description>DPPI channel that event DBLRDY will publish to</description>
130882 <description>Disable publishing</description>
130887 <description>Enable publishing</description>
130896 <description>Publish configuration for event STOPPED</description>
130904 <description>DPPI channel that event STOPPED will publish to</description>
130915 <description>Disable publishing</description>
130920 <description>Enable publishing</description>
130929 <description>Shortcuts between local events and tasks</description>
130937 <description>Shortcut between event REPORTRDY and task READCLRACC</description>
130943 <description>Disable shortcut</description>
130948 <description>Enable shortcut</description>
130955 <description>Shortcut between event SAMPLERDY and task STOP</description>
130961 <description>Disable shortcut</description>
130966 <description>Enable shortcut</description>
130973 <description>Shortcut between event REPORTRDY and task RDCLRACC</description>
130979 <description>Disable shortcut</description>
130984 <description>Enable shortcut</description>
130991 <description>Shortcut between event REPORTRDY and task STOP</description>
130997 <description>Disable shortcut</description>
131002 <description>Enable shortcut</description>
131009 <description>Shortcut between event DBLRDY and task RDCLRDBL</description>
131015 <description>Disable shortcut</description>
131020 <description>Enable shortcut</description>
131027 <description>Shortcut between event DBLRDY and task STOP</description>
131033 <description>Disable shortcut</description>
131038 <description>Enable shortcut</description>
131045 <description>Shortcut between event SAMPLERDY and task READCLRACC</description>
131051 <description>Disable shortcut</description>
131056 <description>Enable shortcut</description>
131065 <description>Enable interrupt</description>
131073 <description>Write '1' to enable interrupt for event SAMPLERDY</description>
131080 <description>Read: Disabled</description>
131085 <description>Read: Enabled</description>
131093 <description>Enable</description>
131100 <description>Write '1' to enable interrupt for event REPORTRDY</description>
131107 <description>Read: Disabled</description>
131112 <description>Read: Enabled</description>
131120 <description>Enable</description>
131127 <description>Write '1' to enable interrupt for event ACCOF</description>
131134 <description>Read: Disabled</description>
131139 <description>Read: Enabled</description>
131147 <description>Enable</description>
131154 <description>Write '1' to enable interrupt for event DBLRDY</description>
131161 <description>Read: Disabled</description>
131166 <description>Read: Enabled</description>
131174 <description>Enable</description>
131181 <description>Write '1' to enable interrupt for event STOPPED</description>
131188 <description>Read: Disabled</description>
131193 <description>Read: Enabled</description>
131201 <description>Enable</description>
131210 <description>Disable interrupt</description>
131218 <description>Write '1' to disable interrupt for event SAMPLERDY</description>
131225 <description>Read: Disabled</description>
131230 <description>Read: Enabled</description>
131238 <description>Disable</description>
131245 <description>Write '1' to disable interrupt for event REPORTRDY</description>
131252 <description>Read: Disabled</description>
131257 <description>Read: Enabled</description>
131265 <description>Disable</description>
131272 <description>Write '1' to disable interrupt for event ACCOF</description>
131279 <description>Read: Disabled</description>
131284 <description>Read: Enabled</description>
131292 <description>Disable</description>
131299 <description>Write '1' to disable interrupt for event DBLRDY</description>
131306 <description>Read: Disabled</description>
131311 <description>Read: Enabled</description>
131319 <description>Disable</description>
131326 <description>Write '1' to disable interrupt for event STOPPED</description>
131333 <description>Read: Disabled</description>
131338 <description>Read: Enabled</description>
131346 <description>Disable</description>
131355 <description>Enable the quadrature decoder</description>
131363 <description>Enable or disable the quadrature decoder</description>
131369 <description>Disable</description>
131374 <description>Enable</description>
131383 <description>LED output pin polarity</description>
131391 <description>LED output pin polarity</description>
131397 <description>Led active on output pin low</description>
131402 <description>Led active on output pin high</description>
131411 <description>Sample period</description>
131419 … <description>Sample period. The SAMPLE register will be updated for every new sample</description>
131425 <description>128 us</description>
131430 <description>256 us</description>
131435 <description>512 us</description>
131440 <description>1024 us</description>
131445 <description>2048 us</description>
131450 <description>4096 us</description>
131455 <description>8192 us</description>
131460 <description>16384 us</description>
131465 <description>32768 us</description>
131470 <description>65536 us</description>
131475 <description>131072 us</description>
131484 <description>Motion sample value</description>
131493 <description>Last motion sample</description>
131501 …<description>Number of samples to be taken before REPORTRDY and DBLRDY events can be generated</de…
131509 …<description>Specifies the number of samples to be accumulated in the ACC register before the REPO…
131515 <description>10 samples/report</description>
131520 <description>40 samples/report</description>
131525 <description>80 samples/report</description>
131530 <description>120 samples/report</description>
131535 <description>160 samples/report</description>
131540 <description>200 samples/report</description>
131545 <description>240 samples/report</description>
131550 <description>280 samples/report</description>
131555 <description>1 sample/report</description>
131564 <description>Register accumulating the valid transitions</description>
131573 …<description>Register accumulating all valid samples (not double transition) read from the SAMPLE …
131581 …<description>Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task</description>
131590 <description>Snapshot of the ACC register.</description>
131598 <description>Unspecified</description>
131604 <description>Pin select for LED signal</description>
131612 <description>Pin number</description>
131618 <description>Port number</description>
131624 <description>Connection</description>
131630 <description>Disconnect</description>
131635 <description>Connect</description>
131644 <description>Pin select for A signal</description>
131652 <description>Pin number</description>
131658 <description>Port number</description>
131664 <description>Connection</description>
131670 <description>Disconnect</description>
131675 <description>Connect</description>
131684 <description>Pin select for B signal</description>
131692 <description>Pin number</description>
131698 <description>Port number</description>
131704 <description>Connection</description>
131710 <description>Disconnect</description>
131715 <description>Connect</description>
131725 <description>Enable input debounce filters</description>
131733 <description>Enable input debounce filters</description>
131739 <description>Debounce input filters disabled</description>
131744 <description>Debounce input filters enabled</description>
131753 <description>Time period the LED is switched ON prior to sampling</description>
131761 <description>Period in us the LED is switched on prior to sampling</description>
131769 <description>Register accumulating the number of detected double transitions</description>
131777 …<description>Register accumulating the number of detected double or illegal transitions. ( SAMPLE …
131785 … <description>Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task</description>
131793 …<description>Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDB…
131803 <description>Quadrature Decoder 1</description>
131814 <description>Inter-IC Sound 1</description>
131825 <description>Distributed programmable peripheral interconnect controller 4</description>
131833 <description>Timer/Counter 2</description>
131844 <description>Timer/Counter 3</description>
131855 <description>Pulse width modulation unit 1</description>
131866 <description>Serial Peripheral Interface Master with EasyDMA 2</description>
131877 <description>SPI Slave 1</description>
131889 <description>I2C compatible Two-Wire Master Interface with EasyDMA 0</description>
131909 …<description>Stop TWI transaction. Must be issued while the TWI master is not suspended.</descript…
131917 …<description>Stop TWI transaction. Must be issued while the TWI master is not suspended.</descript…
131923 <description>Trigger task</description>
131932 <description>Suspend TWI transaction</description>
131940 <description>Suspend TWI transaction</description>
131946 <description>Trigger task</description>
131955 <description>Resume TWI transaction</description>
131963 <description>Resume TWI transaction</description>
131969 <description>Trigger task</description>
131978 <description>Peripheral tasks.</description>
131984 <description>Peripheral tasks.</description>
131990 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
131998 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
132004 <description>Trigger task</description>
132013 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
132021 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
132027 <description>Trigger task</description>
132038 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
132046 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
132052 <description>Trigger task</description>
132063 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
132071 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
132077 <description>Trigger task</description>
132087 <description>Peripheral tasks.</description>
132093 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
132101 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
132107 <description>Trigger task</description>
132116 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
132124 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
132130 <description>Trigger task</description>
132141 <description>Subscribe configuration for task STOP</description>
132149 <description>DPPI channel that task STOP will subscribe to</description>
132160 <description>Disable subscription</description>
132165 <description>Enable subscription</description>
132174 <description>Subscribe configuration for task SUSPEND</description>
132182 <description>DPPI channel that task SUSPEND will subscribe to</description>
132193 <description>Disable subscription</description>
132198 <description>Enable subscription</description>
132207 <description>Subscribe configuration for task RESUME</description>
132215 <description>DPPI channel that task RESUME will subscribe to</description>
132226 <description>Disable subscription</description>
132231 <description>Enable subscription</description>
132240 <description>Subscribe configuration for tasks</description>
132246 <description>Subscribe configuration for tasks</description>
132252 <description>Subscribe configuration for task START</description>
132260 <description>DPPI channel that task START will subscribe to</description>
132271 <description>Disable subscription</description>
132276 <description>Enable subscription</description>
132285 <description>Subscribe configuration for task STOP</description>
132293 <description>DPPI channel that task STOP will subscribe to</description>
132304 <description>Disable subscription</description>
132309 <description>Enable subscription</description>
132320 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
132328 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
132339 <description>Disable subscription</description>
132344 <description>Enable subscription</description>
132355 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
132363 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
132374 <description>Disable subscription</description>
132379 <description>Enable subscription</description>
132389 <description>Subscribe configuration for tasks</description>
132395 <description>Subscribe configuration for task START</description>
132403 <description>DPPI channel that task START will subscribe to</description>
132414 <description>Disable subscription</description>
132419 <description>Enable subscription</description>
132428 <description>Subscribe configuration for task STOP</description>
132436 <description>DPPI channel that task STOP will subscribe to</description>
132447 <description>Disable subscription</description>
132452 <description>Enable subscription</description>
132463 <description>TWI stopped</description>
132471 <description>TWI stopped</description>
132477 <description>Event not generated</description>
132482 <description>Event generated</description>
132491 <description>TWI error</description>
132499 <description>TWI error</description>
132505 <description>Event not generated</description>
132510 <description>Event generated</description>
132519 <description>SUSPEND task has been issued, TWI traffic is now suspended.</description>
132527 <description>SUSPEND task has been issued, TWI traffic is now suspended.</description>
132533 <description>Event not generated</description>
132538 <description>Event generated</description>
132547 <description>Byte boundary, starting to receive the last byte</description>
132555 <description>Byte boundary, starting to receive the last byte</description>
132561 <description>Event not generated</description>
132566 <description>Event generated</description>
132575 <description>Byte boundary, starting to transmit the last byte</description>
132583 <description>Byte boundary, starting to transmit the last byte</description>
132589 <description>Event not generated</description>
132594 <description>Event generated</description>
132603 <description>Peripheral events.</description>
132609 <description>Peripheral events.</description>
132615 <description>Generated after all MAXCNT bytes have been transferred</description>
132623 <description>Generated after all MAXCNT bytes have been transferred</description>
132629 <description>Event not generated</description>
132634 <description>Event generated</description>
132643 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
132651 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
132657 <description>Event not generated</description>
132662 <description>Event generated</description>
132671 <description>An error occured during the bus transfer.</description>
132679 <description>An error occured during the bus transfer.</description>
132685 <description>Event not generated</description>
132690 <description>Event generated</description>
132701 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
132709 <description>Pattern match is detected on the DMA data bus.</description>
132715 <description>Event not generated</description>
132720 <description>Event generated</description>
132730 <description>Peripheral events.</description>
132736 <description>Generated after all MAXCNT bytes have been transferred</description>
132744 <description>Generated after all MAXCNT bytes have been transferred</description>
132750 <description>Event not generated</description>
132755 <description>Event generated</description>
132764 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
132772 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
132778 <description>Event not generated</description>
132783 <description>Event generated</description>
132792 <description>An error occured during the bus transfer.</description>
132800 <description>An error occured during the bus transfer.</description>
132806 <description>Event not generated</description>
132811 <description>Event generated</description>
132822 <description>Publish configuration for event STOPPED</description>
132830 <description>DPPI channel that event STOPPED will publish to</description>
132841 <description>Disable publishing</description>
132846 <description>Enable publishing</description>
132855 <description>Publish configuration for event ERROR</description>
132863 <description>DPPI channel that event ERROR will publish to</description>
132874 <description>Disable publishing</description>
132879 <description>Enable publishing</description>
132888 <description>Publish configuration for event SUSPENDED</description>
132896 <description>DPPI channel that event SUSPENDED will publish to</description>
132907 <description>Disable publishing</description>
132912 <description>Enable publishing</description>
132921 <description>Publish configuration for event LASTRX</description>
132929 <description>DPPI channel that event LASTRX will publish to</description>
132940 <description>Disable publishing</description>
132945 <description>Enable publishing</description>
132954 <description>Publish configuration for event LASTTX</description>
132962 <description>DPPI channel that event LASTTX will publish to</description>
132973 <description>Disable publishing</description>
132978 <description>Enable publishing</description>
132987 <description>Publish configuration for events</description>
132993 <description>Publish configuration for events</description>
132999 <description>Publish configuration for event END</description>
133007 <description>DPPI channel that event END will publish to</description>
133018 <description>Disable publishing</description>
133023 <description>Enable publishing</description>
133032 <description>Publish configuration for event READY</description>
133040 <description>DPPI channel that event READY will publish to</description>
133051 <description>Disable publishing</description>
133056 <description>Enable publishing</description>
133065 <description>Publish configuration for event BUSERROR</description>
133073 <description>DPPI channel that event BUSERROR will publish to</description>
133084 <description>Disable publishing</description>
133089 <description>Enable publishing</description>
133100 … <description>Description collection: Publish configuration for event MATCH[n]</description>
133108 <description>DPPI channel that event MATCH[n] will publish to</description>
133119 <description>Disable publishing</description>
133124 <description>Enable publishing</description>
133134 <description>Publish configuration for events</description>
133140 <description>Publish configuration for event END</description>
133148 <description>DPPI channel that event END will publish to</description>
133159 <description>Disable publishing</description>
133164 <description>Enable publishing</description>
133173 <description>Publish configuration for event READY</description>
133181 <description>DPPI channel that event READY will publish to</description>
133192 <description>Disable publishing</description>
133197 <description>Enable publishing</description>
133206 <description>Publish configuration for event BUSERROR</description>
133214 <description>DPPI channel that event BUSERROR will publish to</description>
133225 <description>Disable publishing</description>
133230 <description>Enable publishing</description>
133241 <description>Shortcuts between local events and tasks</description>
133249 <description>Shortcut between event LASTTX and task DMA.RX.START</description>
133255 <description>Disable shortcut</description>
133260 <description>Enable shortcut</description>
133267 <description>Shortcut between event LASTTX and task SUSPEND</description>
133273 <description>Disable shortcut</description>
133278 <description>Enable shortcut</description>
133285 <description>Shortcut between event LASTTX and task STOP</description>
133291 <description>Disable shortcut</description>
133296 <description>Enable shortcut</description>
133303 <description>Shortcut between event LASTRX and task DMA.TX.START</description>
133309 <description>Disable shortcut</description>
133314 <description>Enable shortcut</description>
133321 <description>Shortcut between event LASTRX and task STOP</description>
133327 <description>Disable shortcut</description>
133332 <description>Enable shortcut</description>
133339 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
133345 <description>Disable shortcut</description>
133350 <description>Enable shortcut</description>
133357 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
133363 <description>Disable shortcut</description>
133368 <description>Enable shortcut</description>
133375 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
133381 <description>Disable shortcut</description>
133386 <description>Enable shortcut</description>
133393 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
133399 <description>Disable shortcut</description>
133404 <description>Enable shortcut</description>
133411 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
133417 <description>Disable shortcut</description>
133422 <description>Enable shortcut</description>
133429 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
133435 <description>Disable shortcut</description>
133440 <description>Enable shortcut</description>
133447 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
133453 <description>Disable shortcut</description>
133458 <description>Enable shortcut</description>
133465 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
133471 <description>Disable shortcut</description>
133476 <description>Enable shortcut</description>
133485 <description>Enable or disable interrupt</description>
133493 <description>Enable or disable interrupt for event STOPPED</description>
133499 <description>Disable</description>
133504 <description>Enable</description>
133511 <description>Enable or disable interrupt for event ERROR</description>
133517 <description>Disable</description>
133522 <description>Enable</description>
133529 <description>Enable or disable interrupt for event SUSPENDED</description>
133535 <description>Disable</description>
133540 <description>Enable</description>
133547 <description>Enable or disable interrupt for event LASTRX</description>
133553 <description>Disable</description>
133558 <description>Enable</description>
133565 <description>Enable or disable interrupt for event LASTTX</description>
133571 <description>Disable</description>
133576 <description>Enable</description>
133583 <description>Enable or disable interrupt for event DMARXEND</description>
133589 <description>Disable</description>
133594 <description>Enable</description>
133601 <description>Enable or disable interrupt for event DMARXREADY</description>
133607 <description>Disable</description>
133612 <description>Enable</description>
133619 <description>Enable or disable interrupt for event DMARXBUSERROR</description>
133625 <description>Disable</description>
133630 <description>Enable</description>
133637 <description>Enable or disable interrupt for event DMARXMATCH[0]</description>
133643 <description>Disable</description>
133648 <description>Enable</description>
133655 <description>Enable or disable interrupt for event DMARXMATCH[1]</description>
133661 <description>Disable</description>
133666 <description>Enable</description>
133673 <description>Enable or disable interrupt for event DMARXMATCH[2]</description>
133679 <description>Disable</description>
133684 <description>Enable</description>
133691 <description>Enable or disable interrupt for event DMARXMATCH[3]</description>
133697 <description>Disable</description>
133702 <description>Enable</description>
133709 <description>Enable or disable interrupt for event DMATXEND</description>
133715 <description>Disable</description>
133720 <description>Enable</description>
133727 <description>Enable or disable interrupt for event DMATXREADY</description>
133733 <description>Disable</description>
133738 <description>Enable</description>
133745 <description>Enable or disable interrupt for event DMATXBUSERROR</description>
133751 <description>Disable</description>
133756 <description>Enable</description>
133765 <description>Enable interrupt</description>
133773 <description>Write '1' to enable interrupt for event STOPPED</description>
133780 <description>Read: Disabled</description>
133785 <description>Read: Enabled</description>
133793 <description>Enable</description>
133800 <description>Write '1' to enable interrupt for event ERROR</description>
133807 <description>Read: Disabled</description>
133812 <description>Read: Enabled</description>
133820 <description>Enable</description>
133827 <description>Write '1' to enable interrupt for event SUSPENDED</description>
133834 <description>Read: Disabled</description>
133839 <description>Read: Enabled</description>
133847 <description>Enable</description>
133854 <description>Write '1' to enable interrupt for event LASTRX</description>
133861 <description>Read: Disabled</description>
133866 <description>Read: Enabled</description>
133874 <description>Enable</description>
133881 <description>Write '1' to enable interrupt for event LASTTX</description>
133888 <description>Read: Disabled</description>
133893 <description>Read: Enabled</description>
133901 <description>Enable</description>
133908 <description>Write '1' to enable interrupt for event DMARXEND</description>
133915 <description>Read: Disabled</description>
133920 <description>Read: Enabled</description>
133928 <description>Enable</description>
133935 <description>Write '1' to enable interrupt for event DMARXREADY</description>
133942 <description>Read: Disabled</description>
133947 <description>Read: Enabled</description>
133955 <description>Enable</description>
133962 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
133969 <description>Read: Disabled</description>
133974 <description>Read: Enabled</description>
133982 <description>Enable</description>
133989 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
133996 <description>Read: Disabled</description>
134001 <description>Read: Enabled</description>
134009 <description>Enable</description>
134016 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
134023 <description>Read: Disabled</description>
134028 <description>Read: Enabled</description>
134036 <description>Enable</description>
134043 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
134050 <description>Read: Disabled</description>
134055 <description>Read: Enabled</description>
134063 <description>Enable</description>
134070 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
134077 <description>Read: Disabled</description>
134082 <description>Read: Enabled</description>
134090 <description>Enable</description>
134097 <description>Write '1' to enable interrupt for event DMATXEND</description>
134104 <description>Read: Disabled</description>
134109 <description>Read: Enabled</description>
134117 <description>Enable</description>
134124 <description>Write '1' to enable interrupt for event DMATXREADY</description>
134131 <description>Read: Disabled</description>
134136 <description>Read: Enabled</description>
134144 <description>Enable</description>
134151 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
134158 <description>Read: Disabled</description>
134163 <description>Read: Enabled</description>
134171 <description>Enable</description>
134180 <description>Disable interrupt</description>
134188 <description>Write '1' to disable interrupt for event STOPPED</description>
134195 <description>Read: Disabled</description>
134200 <description>Read: Enabled</description>
134208 <description>Disable</description>
134215 <description>Write '1' to disable interrupt for event ERROR</description>
134222 <description>Read: Disabled</description>
134227 <description>Read: Enabled</description>
134235 <description>Disable</description>
134242 <description>Write '1' to disable interrupt for event SUSPENDED</description>
134249 <description>Read: Disabled</description>
134254 <description>Read: Enabled</description>
134262 <description>Disable</description>
134269 <description>Write '1' to disable interrupt for event LASTRX</description>
134276 <description>Read: Disabled</description>
134281 <description>Read: Enabled</description>
134289 <description>Disable</description>
134296 <description>Write '1' to disable interrupt for event LASTTX</description>
134303 <description>Read: Disabled</description>
134308 <description>Read: Enabled</description>
134316 <description>Disable</description>
134323 <description>Write '1' to disable interrupt for event DMARXEND</description>
134330 <description>Read: Disabled</description>
134335 <description>Read: Enabled</description>
134343 <description>Disable</description>
134350 <description>Write '1' to disable interrupt for event DMARXREADY</description>
134357 <description>Read: Disabled</description>
134362 <description>Read: Enabled</description>
134370 <description>Disable</description>
134377 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
134384 <description>Read: Disabled</description>
134389 <description>Read: Enabled</description>
134397 <description>Disable</description>
134404 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
134411 <description>Read: Disabled</description>
134416 <description>Read: Enabled</description>
134424 <description>Disable</description>
134431 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
134438 <description>Read: Disabled</description>
134443 <description>Read: Enabled</description>
134451 <description>Disable</description>
134458 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
134465 <description>Read: Disabled</description>
134470 <description>Read: Enabled</description>
134478 <description>Disable</description>
134485 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
134492 <description>Read: Disabled</description>
134497 <description>Read: Enabled</description>
134505 <description>Disable</description>
134512 <description>Write '1' to disable interrupt for event DMATXEND</description>
134519 <description>Read: Disabled</description>
134524 <description>Read: Enabled</description>
134532 <description>Disable</description>
134539 <description>Write '1' to disable interrupt for event DMATXREADY</description>
134546 <description>Read: Disabled</description>
134551 <description>Read: Enabled</description>
134559 <description>Disable</description>
134566 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
134573 <description>Read: Disabled</description>
134578 <description>Read: Enabled</description>
134586 <description>Disable</description>
134595 <description>Error source</description>
134604 <description>Overrun error</description>
134610 <description>Error did not occur</description>
134615 <description>Error occurred</description>
134622 … <description>NACK received after sending the address (write '1' to clear)</description>
134628 <description>Error did not occur</description>
134633 <description>Error occurred</description>
134640 … <description>NACK received after sending a data byte (write '1' to clear)</description>
134646 <description>Error did not occur</description>
134651 <description>Error occurred</description>
134660 <description>Enable TWIM</description>
134668 <description>Enable or disable TWIM</description>
134674 <description>Disable TWIM</description>
134679 <description>Enable TWIM</description>
134688 <description>TWI frequency. Accuracy depends on the HFCLK source selected.</description>
134696 <description>TWI master clock frequency</description>
134702 <description>100 kbps</description>
134707 <description>250 kbps</description>
134712 <description>400 kbps</description>
134717 <description>1000 kbps</description>
134726 <description>Address used in the TWI transfer</description>
134734 <description>Address used in the TWI transfer</description>
134742 <description>Unspecified</description>
134748 <description>Pin select for SCL signal</description>
134756 <description>Pin number</description>
134762 <description>Port number</description>
134768 <description>Connection</description>
134774 <description>Disconnect</description>
134779 <description>Connect</description>
134788 <description>Pin select for SDA signal</description>
134796 <description>Pin number</description>
134802 <description>Port number</description>
134808 <description>Connection</description>
134814 <description>Disconnect</description>
134819 <description>Connect</description>
134829 <description>Unspecified</description>
134835 <description>Unspecified</description>
134841 <description>RAM buffer start address</description>
134849 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
134857 <description>Maximum number of bytes in channel buffer</description>
134865 <description>Maximum number of bytes in channel buffer</description>
134873 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
134881 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
134889 <description>Number of bytes transferred in the current transaction</description>
134897 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
134905 <description>EasyDMA list type</description>
134913 <description>List type</description>
134919 <description>Disable EasyDMA list</description>
134924 <description>Use array list</description>
134933 <description>Terminate the transaction if a BUSERROR event is detected.</description>
134946 <description>Disable</description>
134951 <description>Enable</description>
134960 … <description>Address of transaction that generated the last BUSERROR event.</description>
134975 … <description>Registers to control the behavior of the pattern matcher engine</description>
134981 <description>Configure individual match events</description>
134989 <description>Enable match filter 0</description>
134995 <description>Match filter disabled</description>
135000 <description>Match filter enabled</description>
135007 <description>Enable match filter 1</description>
135013 <description>Match filter disabled</description>
135018 <description>Match filter enabled</description>
135025 <description>Enable match filter 2</description>
135031 <description>Match filter disabled</description>
135036 <description>Match filter enabled</description>
135043 <description>Enable match filter 3</description>
135049 <description>Match filter disabled</description>
135054 <description>Match filter enabled</description>
135061 <description>Configure match filter 0 as one-shot or sticky</description>
135067 <description>Match filter stays enabled until disabled by task</description>
135072 … <description>Match filter stays enabled until next data word is received</description>
135079 <description>Configure match filter 1 as one-shot or sticky</description>
135085 <description>Match filter stays enabled until disabled by task</description>
135090 … <description>Match filter stays enabled until next data word is received</description>
135097 <description>Configure match filter 2 as one-shot or sticky</description>
135103 <description>Match filter stays enabled until disabled by task</description>
135108 … <description>Match filter stays enabled until next data word is received</description>
135115 <description>Configure match filter 3 as one-shot or sticky</description>
135121 <description>Match filter stays enabled until disabled by task</description>
135126 … <description>Match filter stays enabled until next data word is received</description>
135137 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
135145 <description>Data to look for</description>
135155 <description>Unspecified</description>
135161 <description>RAM buffer start address</description>
135169 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
135177 <description>Maximum number of bytes in channel buffer</description>
135185 <description>Maximum number of bytes in channel buffer</description>
135193 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
135201 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
135209 <description>Number of bytes transferred in the current transaction</description>
135217 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
135225 <description>EasyDMA list type</description>
135233 <description>List type</description>
135239 <description>Disable EasyDMA list</description>
135244 <description>Use array list</description>
135253 <description>Terminate the transaction if a BUSERROR event is detected.</description>
135266 <description>Disable</description>
135271 <description>Enable</description>
135280 … <description>Address of transaction that generated the last BUSERROR event.</description>
135299 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 0</description>
135319 <description>Stop TWI transaction</description>
135327 <description>Stop TWI transaction</description>
135333 <description>Trigger task</description>
135342 <description>Suspend TWI transaction</description>
135350 <description>Suspend TWI transaction</description>
135356 <description>Trigger task</description>
135365 <description>Resume TWI transaction</description>
135373 <description>Resume TWI transaction</description>
135379 <description>Trigger task</description>
135388 <description>Prepare the TWI slave to respond to a write command</description>
135396 <description>Prepare the TWI slave to respond to a write command</description>
135402 <description>Trigger task</description>
135411 <description>Prepare the TWI slave to respond to a read command</description>
135419 <description>Prepare the TWI slave to respond to a read command</description>
135425 <description>Trigger task</description>
135434 <description>Peripheral tasks.</description>
135440 <description>Peripheral tasks.</description>
135448 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
135456 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
135462 <description>Trigger task</description>
135473 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
135481 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
135487 <description>Trigger task</description>
135498 <description>Subscribe configuration for task STOP</description>
135506 <description>DPPI channel that task STOP will subscribe to</description>
135517 <description>Disable subscription</description>
135522 <description>Enable subscription</description>
135531 <description>Subscribe configuration for task SUSPEND</description>
135539 <description>DPPI channel that task SUSPEND will subscribe to</description>
135550 <description>Disable subscription</description>
135555 <description>Enable subscription</description>
135564 <description>Subscribe configuration for task RESUME</description>
135572 <description>DPPI channel that task RESUME will subscribe to</description>
135583 <description>Disable subscription</description>
135588 <description>Enable subscription</description>
135597 <description>Subscribe configuration for task PREPARERX</description>
135605 <description>DPPI channel that task PREPARERX will subscribe to</description>
135616 <description>Disable subscription</description>
135621 <description>Enable subscription</description>
135630 <description>Subscribe configuration for task PREPARETX</description>
135638 <description>DPPI channel that task PREPARETX will subscribe to</description>
135649 <description>Disable subscription</description>
135654 <description>Enable subscription</description>
135663 <description>Subscribe configuration for tasks</description>
135669 <description>Subscribe configuration for tasks</description>
135677 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
135685 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
135696 <description>Disable subscription</description>
135701 <description>Enable subscription</description>
135712 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
135720 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
135731 <description>Disable subscription</description>
135736 <description>Enable subscription</description>
135747 <description>TWI stopped</description>
135755 <description>TWI stopped</description>
135761 <description>Event not generated</description>
135766 <description>Event generated</description>
135775 <description>TWI error</description>
135783 <description>TWI error</description>
135789 <description>Event not generated</description>
135794 <description>Event generated</description>
135803 <description>Write command received</description>
135811 <description>Write command received</description>
135817 <description>Event not generated</description>
135822 <description>Event generated</description>
135831 <description>Read command received</description>
135839 <description>Read command received</description>
135845 <description>Event not generated</description>
135850 <description>Event generated</description>
135859 <description>Peripheral events.</description>
135865 <description>Peripheral events.</description>
135871 <description>Generated after all MAXCNT bytes have been transferred</description>
135879 <description>Generated after all MAXCNT bytes have been transferred</description>
135885 <description>Event not generated</description>
135890 <description>Event generated</description>
135899 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
135907 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
135913 <description>Event not generated</description>
135918 <description>Event generated</description>
135927 <description>An error occured during the bus transfer.</description>
135935 <description>An error occured during the bus transfer.</description>
135941 <description>Event not generated</description>
135946 <description>Event generated</description>
135957 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
135965 <description>Pattern match is detected on the DMA data bus.</description>
135971 <description>Event not generated</description>
135976 <description>Event generated</description>
135986 <description>Peripheral events.</description>
135992 <description>Generated after all MAXCNT bytes have been transferred</description>
136000 <description>Generated after all MAXCNT bytes have been transferred</description>
136006 <description>Event not generated</description>
136011 <description>Event generated</description>
136020 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
136028 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
136034 <description>Event not generated</description>
136039 <description>Event generated</description>
136048 <description>An error occured during the bus transfer.</description>
136056 <description>An error occured during the bus transfer.</description>
136062 <description>Event not generated</description>
136067 <description>Event generated</description>
136078 <description>Publish configuration for event STOPPED</description>
136086 <description>DPPI channel that event STOPPED will publish to</description>
136097 <description>Disable publishing</description>
136102 <description>Enable publishing</description>
136111 <description>Publish configuration for event ERROR</description>
136119 <description>DPPI channel that event ERROR will publish to</description>
136130 <description>Disable publishing</description>
136135 <description>Enable publishing</description>
136144 <description>Publish configuration for event WRITE</description>
136152 <description>DPPI channel that event WRITE will publish to</description>
136163 <description>Disable publishing</description>
136168 <description>Enable publishing</description>
136177 <description>Publish configuration for event READ</description>
136185 <description>DPPI channel that event READ will publish to</description>
136196 <description>Disable publishing</description>
136201 <description>Enable publishing</description>
136210 <description>Publish configuration for events</description>
136216 <description>Publish configuration for events</description>
136222 <description>Publish configuration for event END</description>
136230 <description>DPPI channel that event END will publish to</description>
136241 <description>Disable publishing</description>
136246 <description>Enable publishing</description>
136255 <description>Publish configuration for event READY</description>
136263 <description>DPPI channel that event READY will publish to</description>
136274 <description>Disable publishing</description>
136279 <description>Enable publishing</description>
136288 <description>Publish configuration for event BUSERROR</description>
136296 <description>DPPI channel that event BUSERROR will publish to</description>
136307 <description>Disable publishing</description>
136312 <description>Enable publishing</description>
136323 … <description>Description collection: Publish configuration for event MATCH[n]</description>
136331 <description>DPPI channel that event MATCH[n] will publish to</description>
136342 <description>Disable publishing</description>
136347 <description>Enable publishing</description>
136357 <description>Publish configuration for events</description>
136363 <description>Publish configuration for event END</description>
136371 <description>DPPI channel that event END will publish to</description>
136382 <description>Disable publishing</description>
136387 <description>Enable publishing</description>
136396 <description>Publish configuration for event READY</description>
136404 <description>DPPI channel that event READY will publish to</description>
136415 <description>Disable publishing</description>
136420 <description>Enable publishing</description>
136429 <description>Publish configuration for event BUSERROR</description>
136437 <description>DPPI channel that event BUSERROR will publish to</description>
136448 <description>Disable publishing</description>
136453 <description>Enable publishing</description>
136464 <description>Shortcuts between local events and tasks</description>
136472 <description>Shortcut between event WRITE and task SUSPEND</description>
136478 <description>Disable shortcut</description>
136483 <description>Enable shortcut</description>
136490 <description>Shortcut between event READ and task SUSPEND</description>
136496 <description>Disable shortcut</description>
136501 <description>Enable shortcut</description>
136508 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
136514 <description>Disable shortcut</description>
136519 <description>Enable shortcut</description>
136526 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
136532 <description>Disable shortcut</description>
136537 <description>Enable shortcut</description>
136544 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
136550 <description>Disable shortcut</description>
136555 <description>Enable shortcut</description>
136562 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
136568 <description>Disable shortcut</description>
136573 <description>Enable shortcut</description>
136580 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
136586 <description>Disable shortcut</description>
136591 <description>Enable shortcut</description>
136598 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
136604 <description>Disable shortcut</description>
136609 <description>Enable shortcut</description>
136616 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
136622 <description>Disable shortcut</description>
136627 <description>Enable shortcut</description>
136634 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
136640 <description>Disable shortcut</description>
136645 <description>Enable shortcut</description>
136654 <description>Enable or disable interrupt</description>
136662 <description>Enable or disable interrupt for event STOPPED</description>
136668 <description>Disable</description>
136673 <description>Enable</description>
136680 <description>Enable or disable interrupt for event ERROR</description>
136686 <description>Disable</description>
136691 <description>Enable</description>
136698 <description>Enable or disable interrupt for event WRITE</description>
136704 <description>Disable</description>
136709 <description>Enable</description>
136716 <description>Enable or disable interrupt for event READ</description>
136722 <description>Disable</description>
136727 <description>Enable</description>
136734 <description>Enable or disable interrupt for event DMARXEND</description>
136740 <description>Disable</description>
136745 <description>Enable</description>
136752 <description>Enable or disable interrupt for event DMARXREADY</description>
136758 <description>Disable</description>
136763 <description>Enable</description>
136770 <description>Enable or disable interrupt for event DMARXBUSERROR</description>
136776 <description>Disable</description>
136781 <description>Enable</description>
136788 <description>Enable or disable interrupt for event DMARXMATCH[0]</description>
136794 <description>Disable</description>
136799 <description>Enable</description>
136806 <description>Enable or disable interrupt for event DMARXMATCH[1]</description>
136812 <description>Disable</description>
136817 <description>Enable</description>
136824 <description>Enable or disable interrupt for event DMARXMATCH[2]</description>
136830 <description>Disable</description>
136835 <description>Enable</description>
136842 <description>Enable or disable interrupt for event DMARXMATCH[3]</description>
136848 <description>Disable</description>
136853 <description>Enable</description>
136860 <description>Enable or disable interrupt for event DMATXEND</description>
136866 <description>Disable</description>
136871 <description>Enable</description>
136878 <description>Enable or disable interrupt for event DMATXREADY</description>
136884 <description>Disable</description>
136889 <description>Enable</description>
136896 <description>Enable or disable interrupt for event DMATXBUSERROR</description>
136902 <description>Disable</description>
136907 <description>Enable</description>
136916 <description>Enable interrupt</description>
136924 <description>Write '1' to enable interrupt for event STOPPED</description>
136931 <description>Read: Disabled</description>
136936 <description>Read: Enabled</description>
136944 <description>Enable</description>
136951 <description>Write '1' to enable interrupt for event ERROR</description>
136958 <description>Read: Disabled</description>
136963 <description>Read: Enabled</description>
136971 <description>Enable</description>
136978 <description>Write '1' to enable interrupt for event WRITE</description>
136985 <description>Read: Disabled</description>
136990 <description>Read: Enabled</description>
136998 <description>Enable</description>
137005 <description>Write '1' to enable interrupt for event READ</description>
137012 <description>Read: Disabled</description>
137017 <description>Read: Enabled</description>
137025 <description>Enable</description>
137032 <description>Write '1' to enable interrupt for event DMARXEND</description>
137039 <description>Read: Disabled</description>
137044 <description>Read: Enabled</description>
137052 <description>Enable</description>
137059 <description>Write '1' to enable interrupt for event DMARXREADY</description>
137066 <description>Read: Disabled</description>
137071 <description>Read: Enabled</description>
137079 <description>Enable</description>
137086 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
137093 <description>Read: Disabled</description>
137098 <description>Read: Enabled</description>
137106 <description>Enable</description>
137113 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
137120 <description>Read: Disabled</description>
137125 <description>Read: Enabled</description>
137133 <description>Enable</description>
137140 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
137147 <description>Read: Disabled</description>
137152 <description>Read: Enabled</description>
137160 <description>Enable</description>
137167 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
137174 <description>Read: Disabled</description>
137179 <description>Read: Enabled</description>
137187 <description>Enable</description>
137194 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
137201 <description>Read: Disabled</description>
137206 <description>Read: Enabled</description>
137214 <description>Enable</description>
137221 <description>Write '1' to enable interrupt for event DMATXEND</description>
137228 <description>Read: Disabled</description>
137233 <description>Read: Enabled</description>
137241 <description>Enable</description>
137248 <description>Write '1' to enable interrupt for event DMATXREADY</description>
137255 <description>Read: Disabled</description>
137260 <description>Read: Enabled</description>
137268 <description>Enable</description>
137275 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
137282 <description>Read: Disabled</description>
137287 <description>Read: Enabled</description>
137295 <description>Enable</description>
137304 <description>Disable interrupt</description>
137312 <description>Write '1' to disable interrupt for event STOPPED</description>
137319 <description>Read: Disabled</description>
137324 <description>Read: Enabled</description>
137332 <description>Disable</description>
137339 <description>Write '1' to disable interrupt for event ERROR</description>
137346 <description>Read: Disabled</description>
137351 <description>Read: Enabled</description>
137359 <description>Disable</description>
137366 <description>Write '1' to disable interrupt for event WRITE</description>
137373 <description>Read: Disabled</description>
137378 <description>Read: Enabled</description>
137386 <description>Disable</description>
137393 <description>Write '1' to disable interrupt for event READ</description>
137400 <description>Read: Disabled</description>
137405 <description>Read: Enabled</description>
137413 <description>Disable</description>
137420 <description>Write '1' to disable interrupt for event DMARXEND</description>
137427 <description>Read: Disabled</description>
137432 <description>Read: Enabled</description>
137440 <description>Disable</description>
137447 <description>Write '1' to disable interrupt for event DMARXREADY</description>
137454 <description>Read: Disabled</description>
137459 <description>Read: Enabled</description>
137467 <description>Disable</description>
137474 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
137481 <description>Read: Disabled</description>
137486 <description>Read: Enabled</description>
137494 <description>Disable</description>
137501 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
137508 <description>Read: Disabled</description>
137513 <description>Read: Enabled</description>
137521 <description>Disable</description>
137528 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
137535 <description>Read: Disabled</description>
137540 <description>Read: Enabled</description>
137548 <description>Disable</description>
137555 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
137562 <description>Read: Disabled</description>
137567 <description>Read: Enabled</description>
137575 <description>Disable</description>
137582 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
137589 <description>Read: Disabled</description>
137594 <description>Read: Enabled</description>
137602 <description>Disable</description>
137609 <description>Write '1' to disable interrupt for event DMATXEND</description>
137616 <description>Read: Disabled</description>
137621 <description>Read: Enabled</description>
137629 <description>Disable</description>
137636 <description>Write '1' to disable interrupt for event DMATXREADY</description>
137643 <description>Read: Disabled</description>
137648 <description>Read: Enabled</description>
137656 <description>Disable</description>
137663 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
137670 <description>Read: Disabled</description>
137675 <description>Read: Enabled</description>
137683 <description>Disable</description>
137692 <description>Error source</description>
137701 <description>RX buffer overflow detected, and prevented</description>
137707 <description>Error did not occur</description>
137712 <description>Error occurred</description>
137719 <description>NACK sent after receiving a data byte</description>
137725 <description>Error did not occur</description>
137730 <description>Error occurred</description>
137737 <description>TX buffer over-read detected, and prevented</description>
137743 <description>Error did not occur</description>
137748 <description>Error occurred</description>
137757 <description>Status register indicating which address had a match</description>
137765 …<description>Indication of which address in ADDRESS that matched the incoming address</description>
137773 <description>Enable TWIS</description>
137781 <description>Enable or disable TWIS</description>
137787 <description>Disable TWIS</description>
137792 <description>Enable TWIS</description>
137803 <description>Description collection: TWI slave address n</description>
137811 <description>TWI slave address</description>
137819 <description>Configuration register for the address match mechanism</description>
137827 <description>Enable or disable address matching on ADDRESS[0]</description>
137833 <description>Disabled</description>
137838 <description>Enabled</description>
137845 <description>Enable or disable address matching on ADDRESS[1]</description>
137851 <description>Disabled</description>
137856 <description>Enabled</description>
137865 …<description>Over-read character. Character sent out in case of an over-read of the transmit buffe…
137873 …<description>Over-read character. Character sent out in case of an over-read of the transmit buffe…
137881 <description>Unspecified</description>
137887 <description>Pin select for SCL signal</description>
137895 <description>Pin number</description>
137901 <description>Port number</description>
137907 <description>Connection</description>
137913 <description>Disconnect</description>
137918 <description>Connect</description>
137927 <description>Pin select for SDA signal</description>
137935 <description>Pin number</description>
137941 <description>Port number</description>
137947 <description>Connection</description>
137953 <description>Disconnect</description>
137958 <description>Connect</description>
137968 <description>Unspecified</description>
137974 <description>Unspecified</description>
137980 <description>RAM buffer start address</description>
137988 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
137996 <description>Maximum number of bytes in channel buffer</description>
138004 <description>Maximum number of bytes in channel buffer</description>
138012 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
138020 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
138028 <description>Number of bytes transferred in the current transaction</description>
138036 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
138044 <description>EasyDMA list type</description>
138052 <description>List type</description>
138058 <description>Disable EasyDMA list</description>
138063 <description>Use array list</description>
138072 <description>Terminate the transaction if a BUSERROR event is detected.</description>
138085 <description>Disable</description>
138090 <description>Enable</description>
138099 … <description>Address of transaction that generated the last BUSERROR event.</description>
138114 … <description>Registers to control the behavior of the pattern matcher engine</description>
138120 <description>Configure individual match events</description>
138128 <description>Enable match filter 0</description>
138134 <description>Match filter disabled</description>
138139 <description>Match filter enabled</description>
138146 <description>Enable match filter 1</description>
138152 <description>Match filter disabled</description>
138157 <description>Match filter enabled</description>
138164 <description>Enable match filter 2</description>
138170 <description>Match filter disabled</description>
138175 <description>Match filter enabled</description>
138182 <description>Enable match filter 3</description>
138188 <description>Match filter disabled</description>
138193 <description>Match filter enabled</description>
138200 <description>Configure match filter 0 as one-shot or sticky</description>
138206 <description>Match filter stays enabled until disabled by task</description>
138211 … <description>Match filter stays enabled until next data word is received</description>
138218 <description>Configure match filter 1 as one-shot or sticky</description>
138224 <description>Match filter stays enabled until disabled by task</description>
138229 … <description>Match filter stays enabled until next data word is received</description>
138236 <description>Configure match filter 2 as one-shot or sticky</description>
138242 <description>Match filter stays enabled until disabled by task</description>
138247 … <description>Match filter stays enabled until next data word is received</description>
138254 <description>Configure match filter 3 as one-shot or sticky</description>
138260 <description>Match filter stays enabled until disabled by task</description>
138265 … <description>Match filter stays enabled until next data word is received</description>
138276 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
138284 <description>Data to look for</description>
138294 <description>Unspecified</description>
138300 <description>RAM buffer start address</description>
138308 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
138316 <description>Maximum number of bytes in channel buffer</description>
138324 <description>Maximum number of bytes in channel buffer</description>
138332 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
138340 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
138348 <description>Number of bytes transferred in the current transaction</description>
138356 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
138364 <description>EasyDMA list type</description>
138372 <description>List type</description>
138378 <description>Disable EasyDMA list</description>
138383 <description>Use array list</description>
138392 <description>Terminate the transaction if a BUSERROR event is detected.</description>
138405 <description>Disable</description>
138410 <description>Enable</description>
138419 … <description>Address of transaction that generated the last BUSERROR event.</description>
138438 <description>UART with EasyDMA 1</description>
138450 <description>Serial Peripheral Interface Master with EasyDMA 3</description>
138461 <description>SPI Slave 2</description>
138473 <description>I2C compatible Two-Wire Master Interface with EasyDMA 1</description>
138485 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 1</description>
138497 <description>UART with EasyDMA 2</description>
138509 <description>Distributed programmable peripheral interconnect controller 5</description>
138517 <description>Timer/Counter 4</description>
138528 <description>Timer/Counter 5</description>
138539 <description>Pulse width modulation unit 2</description>
138550 <description>Serial Peripheral Interface Master with EasyDMA 4</description>
138561 <description>SPI Slave 3</description>
138573 <description>I2C compatible Two-Wire Master Interface with EasyDMA 2</description>
138585 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 2</description>
138597 <description>UART with EasyDMA 3</description>
138609 <description>Serial Peripheral Interface Master with EasyDMA 5</description>
138620 <description>SPI Slave 4</description>
138632 <description>I2C compatible Two-Wire Master Interface with EasyDMA 3</description>
138644 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 3</description>
138656 <description>UART with EasyDMA 4</description>
138668 <description>Distributed programmable peripheral interconnect controller 6</description>
138676 <description>Timer/Counter 6</description>
138687 <description>Timer/Counter 7</description>
138698 <description>Pulse width modulation unit 3</description>
138709 <description>Serial Peripheral Interface Master with EasyDMA 6</description>
138720 <description>SPI Slave 5</description>
138732 <description>I2C compatible Two-Wire Master Interface with EasyDMA 4</description>
138744 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 4</description>
138756 <description>UART with EasyDMA 5</description>
138768 <description>Serial Peripheral Interface Master with EasyDMA 7</description>
138779 <description>SPI Slave 6</description>
138791 <description>I2C compatible Two-Wire Master Interface with EasyDMA 5</description>
138803 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 5</description>
138815 <description>UART with EasyDMA 6</description>
138827 <description>Distributed programmable peripheral interconnect controller 7</description>
138835 <description>Timer/Counter 8</description>
138846 <description>Timer/Counter 9</description>
138857 <description>Pulse width modulation unit 4</description>
138868 <description>Serial Peripheral Interface Master with EasyDMA 8</description>
138879 <description>SPI Slave 7</description>
138891 <description>I2C compatible Two-Wire Master Interface with EasyDMA 6</description>
138903 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 6</description>
138915 <description>UART with EasyDMA 7</description>
138927 <description>Serial Peripheral Interface Master with EasyDMA 9</description>
138938 <description>SPI Slave 8</description>
138950 <description>I2C compatible Two-Wire Master Interface with EasyDMA 7</description>
138962 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 7</description>
138974 <description>UART with EasyDMA 8</description>