Lines Matching full:description
9 <description>System-on-chip with a 32-bit Arm Cortex-M33 microcontroller</description>
65 <description>Factory Information Configuration Registers</description>
80 <description>Device info</description>
86 <description>Configuration identifier</description>
94 <description>Identification number for the HW</description>
104 <description>Description collection: Device identifier</description>
112 <description>64 bit unique device identifier</description>
122 … <description>Description collection: 128-bit Universally Unique IDentifier (UUID).</description>
130 <description>Device UUID [n].</description>
138 <description>Part code</description>
146 <description>Part code</description>
152 <description>Unspecified</description>
161 <description>Part Variant, Hardware version and Production configuration</description>
169 …<description>Part Variant, Hardware version and Production configuration, encoded as ASCII</descri…
175 <description>Unspecified</description>
184 <description>Package option</description>
192 <description>Package option</description>
198 <description>Unspecified</description>
207 <description>RAM size (KB)</description>
215 <description>RAM size (KB)</description>
221 <description>256 kByte RAM</description>
226 <description>Unspecified</description>
235 <description>RRAM size (KB)</description>
243 <description>RRAM size (KB)</description>
249 <description>2036 KByte RRAM</description>
254 <description>Unspecified</description>
266 <description>Description collection: Common encryption root key, word n</description>
274 <description>Encryption Root, word n</description>
284 <description>Description collection: Common identity root key, word n</description>
292 <description>Identity Root, word n</description>
300 <description>Device address type</description>
308 <description>Device address type</description>
314 <description>Public address</description>
319 <description>Random address</description>
330 <description>Description collection: Device address n</description>
338 <description>48 bit device address</description>
348 <description>Unspecified</description>
354 … <description>Description cluster: Address of the register which will be written</description>
362 <description>Address</description>
370 <description>Description cluster: Data to be written into the register</description>
378 <description>Data</description>
387 <description>Unspecified</description>
393 …<description>Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAS…
401 … <description>Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F</description>
407 <description>Unique identifier byte 1</description>
413 <description>Unique identifier byte 2</description>
419 <description>Unique identifier byte 3</description>
427 …<description>Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAS…
435 <description>Unique identifier byte 4</description>
441 <description>Unique identifier byte 5</description>
447 <description>Unique identifier byte 6</description>
453 <description>Unique identifier byte 7</description>
461 …<description>Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAS…
469 <description>Unique identifier byte 8</description>
475 <description>Unique identifier byte 9</description>
481 <description>Unique identifier byte 10</description>
487 <description>Unique identifier byte 11</description>
495 …<description>Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAS…
503 <description>Unique identifier byte 12</description>
509 <description>Unique identifier byte 13</description>
515 <description>Unique identifier byte 14</description>
521 <description>Unique identifier byte 15</description>
530 <description>XOSC32M capacitor selection trim values</description>
538 <description>Slope trim factor on twos complement form</description>
544 <description>Offset trim factor on integer form</description>
552 <description>XOSC32K capacitor selection trim values</description>
560 <description>Slope trim factor on twos complement form</description>
566 <description>Offset trim factor on integer form</description>
576 <description>User Information Configuration Registers</description>
593 <description>Access Port Protection Registers</description>
599 <description>Description cluster: Access port protection</description>
612 …<description>Leaves TAMPC PROTECT.DOMAIN DBGEN and NIDEN signal protectors unlocked and under CPU …
621 <description>Description cluster: Access port protection</description>
634 …<description>Leaves TAMPC PROTECT.DOMAIN DBGEN and NIDEN signal protectors unlocked and under CPU …
646 <description>Access Port Protection Registers</description>
652 <description>Description cluster: Access port protection</description>
665 …<description>Leaves TAMPC PROTECT.DOMAIN SPIDEN and SPNIDEN signal protectors unlocked and under C…
674 <description>Description cluster: Access port protection register</description>
687 …<description>Leaves TAMPC PROTECT.DOMAIN SPIDEN and SPNIDEN signal protectors unlocked and under C…
699 <description>Access Port Protection Registers</description>
705 <description>Description cluster: Access port protection</description>
718 …<description>Leaves TAMPC PROTECT.AP DBGEN signal protector unlocked and under CPU control.</descr…
727 <description>Description cluster: Access port protection register</description>
740 …<description>Leaves TAMPC PROTECT.AP DBGEN signal protector unlocked and under CPU control.</descr…
752 <description>Erase Protection Registers</description>
758 <description>Description cluster: Erase protection</description>
771 …<description>The device can be erased using the CTRL-AP Erase all function and TAMPC PROTECT.ERASE…
780 <description>Description cluster: Erase protection</description>
793 …<description>The device can be erased using the CTRL-AP Erase all function and TAMPC PROTECT.ERASE…
803 <description>Immutable boot region configuration.</description>
811 <description>Read access</description>
817 <description>Reading from the region is not allowed</description>
822 <description>Reading from the region is allowed</description>
829 <description>Write access</description>
835 <description>Writing to the region is not allowed</description>
840 <description>Writing to the region is allowed</description>
847 <description>Execute access</description>
853 <description>Executing code from the region is not allowed</description>
858 <description>Executing code from the region is allowed</description>
865 <description>Secure access</description>
871 <description>Both secure and non-secure access to region is allowed</description>
876 <description>Only secure access to region is allowed</description>
883 <description>Write-once</description>
889 <description>Write-once disabled</description>
894 <description>Write-once enabled</description>
901 <description>Enable lock of configuration register</description>
907 … <description>Lock is disabled, and the RRAMC region configuration registers for the
908 immutable boot region are writable.</description>
913 <description>Lock is enabled, and the RRAMC configuration registers for the
914 immutable boot region are read-only.</description>
921 <description>Immutable boot region size</description>
929 <description>Unspecified</description>
935 … <description>Assets installed to establish initial Root of Trust in the device.</description>
943 <description>Unspecified</description>
951 …<description>Description collection: First 256 bits of SHA2-512 digest over RoT public key generat…
959 <description>Value for word [o] in the key digest [n].</description>
969 …<description>Description collection: Revocation status for RoT public key generation [n].</descrip…
977 <description>Revocation status.</description>
983 <description>Key not revoked.</description>
995 <description>Unspecified</description>
1003 …<description>Description collection: First 256 bits of SHA2-512 digest over RoT authenticated oper…
1011 <description>Value for word [o] in the key digest [n].</description>
1021 …<description>Description collection: Revocation status for RoT authenticated operation public key …
1029 <description>Revocation status.</description>
1035 <description>Key not revoked.</description>
1049 <description>Description collection: One time programmable memory</description>
1057 <description>OTP word</description>
1067 <description>Factory Information Configuration Registers</description>
1082 <description>Unused.</description>
1091 <description>CACHEDATA</description>
1108 <description>Unspecified</description>
1116 <description>Unspecified</description>
1124 <description>Unspecified</description>
1132 …<description>Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n], WA…
1140 <description>Data</description>
1154 <description>CACHEINFO</description>
1171 <description>Unspecified</description>
1179 <description>Unspecified</description>
1185 <description>Description cluster: Cache information for SET[n], WAY[o].</description>
1193 <description>Cache tag.</description>
1200 <description>Data unit valid info.</description>
1207 <description>Invalid data unit</description>
1212 <description>Valid data unit</description>
1219 <description>Data unit valid info.</description>
1226 <description>Invalid data unit</description>
1231 <description>Valid data unit</description>
1238 <description>Data unit valid info.</description>
1245 <description>Invalid data unit</description>
1250 <description>Valid data unit</description>
1257 <description>Data unit valid info.</description>
1264 <description>Invalid data unit</description>
1269 <description>Valid data unit</description>
1276 <description>Line valid bit.</description>
1283 <description>Invalid cache line</description>
1288 <description>Valid cache line</description>
1295 <description>Most recently used way.</description>
1302 <description>Way0 was most recently used</description>
1307 <description>Way1 was most recently used</description>
1320 <description>CRACENCORE</description>
1335 <description>Unspecified</description>
1341 <description>Fetch Address Least Significant Bit</description>
1356 <description>Fetch Address Most Significant Bit</description>
1371 <description>Fetch Length</description>
1401 <description>Fetch Tag</description>
1416 <description>Push Address Least Significant Bit</description>
1431 <description>Push Address Most Significant Bit</description>
1446 <description>Push Length</description>
1476 <description>Interrupt Enable</description>
1491 <description>Interrupt Set</description>
1507 <description>Interrupt Clear</description>
1523 <description>Interrupt Status Raw</description>
1539 <description>Interrupt Status</description>
1555 <description>Interrupt Status Clear</description>
1571 <description>Configuration</description>
1606 <description>Start</description>
1628 <description>Status</description>
1675 <description>Unspecified</description>
1681 <description>Incuded IPs Hardware configuration</description>
1689 <description>Generic g_IncludeAES value.</description>
1696 <description>Generic g_IncludeAESGCM value.</description>
1703 <description>Generic g_IncludeAESXTS value.</description>
1710 <description>Generic g_IncludeDES value.</description>
1717 <description>Generic g_IncludeHASH value.</description>
1724 <description>Generic g_IncludeChachaPoly value.</description>
1731 <description>Generic g_IncludeSHA3 value.</description>
1738 <description>Generic g_IncludeZUC value.</description>
1745 <description>Generic g_IncludeSM4 value.</description>
1752 <description>Generic g_IncludePKE value.</description>
1759 <description>Generic g_IncludeNDRNG value.</description>
1766 <description>Generic g_IncludeHPChachaPoly value.</description>
1773 <description>Generic g_IncludeSnow3G value.</description>
1780 <description>Generic g_IncludeKasumi value.</description>
1787 <description>Generic g_IncludeAria value.</description>
1796 <description>Generic g_AesModesPoss value.</description>
1804 <description>Generic g_AesModesPoss value.</description>
1811 <description>Generic g_CS value.</description>
1818 <description>Generic g_UseMasking value.</description>
1825 <description>Generic g_Keysize value.</description>
1832 <description>Generic g_CxSwitch value.</description>
1839 <description>Generic g_GlitchProtection value.</description>
1848 <description>Generic g_CtrSize value.</description>
1856 <description>Generic g_CtrSize value.</description>
1863 <description>Generic g_Ext_nb_AES_keys value.</description>
1870 <description>Generic g_IKG_nb_AES_keys value.</description>
1879 <description>Generic g_Hash value</description>
1887 <description>Generic g_HashMaskFunc value.</description>
1894 <description>Generic g_HashPadding value.</description>
1901 <description>Generic g_HMAC_enabled value.</description>
1908 <description>Generic g_HashVerifyDigest value.</description>
1915 <description>Generic g_Ext_nb_Hash_keys value.</description>
1922 <description>Generic g_IKG_nb_Hash_keys value.</description>
1931 <description>Generic g_Sha3CtxtEn value.</description>
1939 <description>Generic g_Sha3CtxtEn value.</description>
1946 <description>HMAC enabled.</description>
1953 <description>Support to digest verification.</description>
1960 <description>Number of SHA3 HW keys.</description>
1967 <description>Number of SHA3 IKG keys.</description>
1976 <description>Generic g_SM4ModesPoss value.</description>
1984 <description>Generic g_SM4ModesPoss value.</description>
1991 <description>Generic g_sm4UseMasking value.</description>
2000 <description>Generic g_aria_modePoss value.</description>
2008 <description>Generic g_aria_modePoss value.</description>
2018 <description>Unspecified</description>
2024 <description>Control register</description>
2032 <description>Start/enable the NDRNG.</description>
2038 …description>Select between the NDRNG with asynchronous free running oscillators (when 0) and the P…
2044 … <description>Select input for conditioning function and continuous tests:</description>
2050 <description>Noise source (normal mode).</description>
2055 <description>Test data register (test mode).</description>
2062 <description>Conditioning function bypass.</description>
2068 <description>the conditioning function is used (normal mode).</description>
2073 …<description>the conditioning function is bypassed (to observe entropy source directly).</descript…
2080 <description>Enable interrupt if any of the health test fails.</description>
2086 <description>Enable interrupt if FIFO is full.</description>
2092 <description>Datapath content flush and control FSM</description>
2098 <description>Force oscillators to run when FIFO is full.</description>
2104 …<description>Results of the health tests during start-up and online test do not affect the control…
2110 …<description>Number of 128 bit blocks used in conditioning (AES-CBC-MAC) post-processing.</descrip…
2116 <description>Enable write of the samples in the FIFO during start-up.</description>
2122 … <description>All repetition tests (each share) are disabled via this single bit.</description>
2128 … <description>All proportion tests (each share) are disabled via this single bit.</description>
2134 … <description>Disable specific delay(s) check in auto-correlation test - same RO:</description>
2140 … <description>Disable specific delay(s) check in correlation test - different ROs:</description>
2146 <description>Select blending method</description>
2152 <description>Concatenation</description>
2157 <description>XOR level 1</description>
2162 <description>XOR level 2</description>
2167 <description>VON-NEUMANN debiasing</description>
2176 <description>FIFO level register.</description>
2184 … <description>Number of 32 bits words of random values available in the FIFO.</description>
2192 <description>FIFO threshold register.</description>
2200 …<description>FIFO level below which the module leaves the idle state to refill the FIFO, expressed…
2208 <description>FIFO depth register.</description>
2216 … <description>Maximum number of 32 bits words that can be stored in the FIFO.</description>
2227 <description>Description collection: Key register.</description>
2235 <description>Key register.</description>
2243 <description>Test data register.</description>
2251 <description>Test data register.</description>
2260 <description>Repetition test cut-off register.</description>
2268 <description>Repetition Test cut-off value.</description>
2276 <description>Proportion test cut-off register.</description>
2284 <description>Proportion test cut-off value.</description>
2292 <description>LFSR seed register.</description>
2300 <description>LFSR initialization value.</description>
2306 … <description>Share index for which initialization value should be used.</description>
2315 <description>Status register.</description>
2323 … <description>High when data written to TestData register is being processed.</description>
2330 <description>State of the control FSM:</description>
2337 <description>Reset</description>
2342 <description>Startup</description>
2347 <description>Idle / FIFO full</description>
2352 <description>Fill FIFO</description>
2357 <description>Error</description>
2364 <description>NIST repetition test(s) failure.</description>
2370 <description>NIST proportion test(s) failure.</description>
2376 <description>Any of the enabled health tests is failing.</description>
2382 <description>FIFO full status.</description>
2388 <description>Start-up test(s) failure.</description>
2394 <description>NIST Repetition test failure per share.</description>
2401 <description>NIST Proportion test failure per share.</description>
2408 … <description>Conditioning consumes data slower than they are provided to it.</description>
2416 <description>Number of clock cycles in warm-up sequence.</description>
2424 <description>Number of clock cycles in warm-up sequence.</description>
2432 <description>DisableOsc register.</description>
2440 <description>Disable oscillator rings 0 to 7.</description>
2448 <description>Number of clock cycles between sampling moments.</description>
2456 <description>Number of clock cycles between sampling moments.</description>
2464 <description>Hardware configuration register.</description>
2472 <description>Generic g_NbOfInverters value.</description>
2479 <description>Generic g_Log2NbOfAutoCorrTestsPerShare value.</description>
2486 <description>Generic g_Log2FifoDepth value.</description>
2493 <description>Generic g_Log2NbOfShares value.</description>
2502 <description>Number of clock cycles in cool-down sequence.</description>
2510 <description>Number of clock cycles in cool-down sequence.</description>
2518 <description>AutoCorrTestCutoff register 0</description>
2526 … <description>Auto-correlation test cut-off value for delay of 0 samples.</description>
2532 … <description>Auto-correlation test cut-off value for delay of +1 sample.</description>
2540 <description>AutoCorrTestCutoff register 1</description>
2548 … <description>Auto-correlation test cut-off value for delay of +2 samples.</description>
2554 … <description>Auto-correlation test cut-off value for delay of +3 samples.</description>
2562 <description>CorrTestCutoff register 0</description>
2570 <description>Correlation test cut-off value for delay of 0 samples.</description>
2576 <description>Correlation test cut-off value for delay of +/-1 sample.</description>
2584 <description>CorrTestCutoff register 1</description>
2592 … <description>Correlation test cut-off value for delay of +/- 2 samples.</description>
2598 … <description>Correlation test cut-off value for delay of +/- 3 samples.</description>
2606 <description>Auto-correlation test failing ring(s).</description>
2614 <description>Auto-correlation test failing ring(s).</description>
2623 <description>Correlation test failing ring.</description>
2631 <description>Correlation test failing ring.</description>
2640 <description>Fixed to 1 for this version.</description>
2648 <description>Fixed to 1 for this version.</description>
2658 <description>Unspecified</description>
2664 <description>Pointers register.</description>
2672 …description>When executing primitive arithmetic operations, this pointer defines where operand A i…
2678 …description>When executing primitive arithmetic operations, this pointer defines where operand B i…
2684 …description>When executing primitive arithmetic operations, this pointer defines the location (0x0…
2690 …description>When executing primitive arithmetic operations, this pointer defines the location wher…
2698 <description>Command register.</description>
2706 <description>This field defines the operation to be performed.</description>
2712 <description>0: Field is GF(p) 1: Field is GF(2**m)</description>
2718 …<description>This field defines the size (= number of bytes minus one) of the operands for the cur…
2724 <description>Enable randomization of modulus (counter-measure).</description>
2730 <description>Enable accelerator for specific curve modulus:</description>
2736 <description>Unspecified</description>
2741 <description>Unspecified</description>
2746 <description>Unspecified</description>
2751 <description>Unspecified</description>
2756 <description>Unspecified</description>
2761 <description>Unspecified</description>
2766 <description>Unspecified</description>
2773 … <description>Enable randomization of exponent/scalar (counter-measure).</description>
2779 … <description>Enable randomization of projective coordinates (counter-measure).</description>
2785 <description>Enable Edwards curve.</description>
2791 <description>Swap the bytes on AHB interface:</description>
2797 <description>Native format (little endian).</description>
2802 <description>Byte swapped (big endian).</description>
2809 <description>Flag A.</description>
2815 <description>Flag B.</description>
2821 …<description>This bit indicates if the IP has to calculate R**2 mod N for the next operation.</des…
2827 <description>don't recalculate R² mod N</description>
2832 <description>re-calculate R² mod N</description>
2841 <description>Command register.</description>
2849 <description>Writing a 1 starts the processing.</description>
2856 <description>Writing a 1 clears the IRQ output.</description>
2865 <description>Status register.</description>
2873 <description>These bits indicate an error condition.</description>
2880 <description>This bit reflects the BUSY output value.</description>
2887 <description>This bit reflects the IRQ output value.</description>
2894 … <description>These bits indicate which data location generated the error flag.</description>
2903 <description>Timer register.</description>
2911 …<description>Number of clock cycles (as the number of core cycles is always even, register bit 0 i…
2919 <description>Hardware configuration register.</description>
2927 <description>Maximum operand size (number of bytes).</description>
2934 <description>Number of multipliers:</description>
2941 <description>1 multiplier</description>
2946 <description>4 multipliers</description>
2951 <description>16 multipliers</description>
2956 <description>64 multipliers</description>
2961 <description>256 multipliers</description>
2968 <description>Support prime field.</description>
2975 <description>Support binary field.</description>
2982 <description>Support data memory error correction.</description>
2989 <description>Support code memory error correction.</description>
2996 <description>Support ECC P256 acceleration.</description>
3003 <description>Support ECC P384 acceleration.</description>
3010 <description>Support ECC P521 acceleration.</description>
3017 <description>Support ECC P192 acceleration.</description>
3024 <description>Support Curve25519/Ed25519 acceleration.</description>
3031 <description>Memory access</description>
3038 … <description>Memory access through AHB Slave and internally in the PKE.</description>
3043 <description>Memory access through AHB Master, outside the PKE.</description>
3050 <description>Code memory</description>
3057 <description>Code memory is a ROM.</description>
3062 <description>Code memory is a RAM.</description>
3069 … <description>State of DisableSMx input (high when SM2/SM9 operations are disabled).</description>
3076 …<description>State of DisableClrMem input (high when automatic clear of the RAM after reset is dis…
3083 … <description>State of DisableCM input (high when counter-measures are disabled).</description>
3092 <description>Operand size register.</description>
3100 <description>Operand size (number of bytes):
3101 This register is used when the memory is accessed via AHB Master</description>
3107 <description>256 bytes.</description>
3112 <description>521 bytes.</description>
3117 <description>2048 bytes.</description>
3122 <description>4096 bytes.</description>
3131 <description>ECC Error bit position register.</description>
3139 <description>Position of error bit 1</description>
3145 <description>Position of error bit 2</description>
3153 <description>ECC Control and Status register.</description>
3161 <description>Data Memory Correction flag, clear on write</description>
3168 <description>Data Memory Failure flag, clear on write</description>
3175 <description>Code Memory Correction flag, clear on write</description>
3182 <description>Code Memory Failure flag, clear on write</description>
3191 <description>Microcode Format register.</description>
3199 <description>Microcode format number.</description>
3208 <description>Hardware Version register.</description>
3216 <description>Minor version number.</description>
3223 <description>Major version number.</description>
3233 <description>Unspecified</description>
3239 <description>Start register.</description>
3247 <description>Start the Isolated Key Generation.</description>
3256 <description>Status register.</description>
3264 <description>Seed Error during Isolated Key Generation.</description>
3271 <description>Entropy Error during Isolated Key Generation.</description>
3278 <description>Isolated Key Generation is okay.</description>
3285 … <description>CTR_DRBG health test is busy (only when g_hw_health_test = true).</description>
3292 …<description>Catastrophic error during CTR_DRBG health test (only when g_hw_health_test = true).</…
3299 <description>Symmetric Keys are stored.</description>
3306 <description>Private Keys are stored.</description>
3315 <description>InitData register.</description>
3323 …<description>Writing a 1 initialise Nonce and Personalisation_String registers counters, i.e. star…
3332 <description>Nonce register.</description>
3340 <description>Nonce (write/read value 32-bit by 32-bit).</description>
3348 <description>Personalisation String register.</description>
3356 … <description>Personalisation String (write/read value 32-bit by 32-bit).</description>
3364 <description>Reseed Interval LSB register.</description>
3372 <description>Reseed Interval LSB.</description>
3380 <description>Reseed Interval MSB register.</description>
3388 <description>Reseed Interval MSB.</description>
3396 <description>PKE Control register.</description>
3404 <description>Start the PKE operation or trigger for Secure mode exit.</description>
3411 <description>Clear the IRQ output.</description>
3420 <description>PKE Command register.</description>
3428 <description>Secure mode.</description>
3434 <description>Unspecified</description>
3439 <description>Unspecified</description>
3446 <description>Select Generated Private Key for PKE operation.</description>
3452 <description>Select PKE operation with Isolated Key</description>
3458 <description>Public Key Generation</description>
3463 <description>ECDSA Signature</description>
3468 <description>Point Multiplication</description>
3477 <description>PKE Status register.</description>
3485 …<description>Error because either Private Keys are not stored or the operation is not defined.</de…
3492 …<description>Error because a new operation is started while the previous one is still busy.</descr…
3499 …<description>Busy, set when the operation starts and cleared when the operation is finished.</desc…
3506 …description>IRQ, set when the operation is finished and cleared when the CPU writes the bit 1 of P…
3513 <description>The PKE Data RAM is being erased.</description>
3522 <description>SoftRst register.</description>
3530 <description>Software reset:</description>
3536 <description>Normal mode.</description>
3541 … <description>The Isolated Key Generation logic and the keys are reset.</description>
3550 <description>HwConfig register.</description>
3558 <description>Number of Symmetric Keys generated.</description>
3565 <description>Number of Private Keys generated.</description>
3572 … <description>Countermeasures for IKG operations are implemented when 1.</description>
3579 <description>CTR_DRBG health test is implemented when 1.</description>
3586 <description>ECC curve for IKG (input).</description>
3593 <description>P256.</description>
3598 <description>P384.</description>
3603 <description>P521.</description>
3610 … <description>Derivation function is implemented in the CTR_DRBG when 1.</description>
3617 … <description>AES Key Size support for the AES Core embedded in the CTR_DRBG.</description>
3624 <description>supports AES128</description>
3629 <description>supports AES192</description>
3634 <description>supports AES256</description>
3641 <description>Value of g_entropy_input_length/32.</description>
3648 <description>Value of g_nonce_length/32.</description>
3655 <description>Value of g_personalization_string_length/32.</description>
3662 <description>Value of g_additional_input_length/32.</description>
3674 <description>Trace Port Interface Unit</description>
3689 <description>Unused.</description>
3698 <description>Embedded Trace Macrocell</description>
3713 <description>Enables the trace unit.</description>
3721 <description>Trace unit enable bit</description>
3727 …<description>The trace unit is disabled. All trace resources are inactive and no trace is generate…
3732 <description>The trace unit is enabled.</description>
3741 …description>Controls which PE to trace. Might ignore writes when the trace unit is enabled or not …
3749 <description>PE select bits that select the PE to trace.</description>
3757 <description>Idle status bit</description>
3765 <description>Trace unit enable bit</description>
3771 <description>The trace unit is not idle.</description>
3776 <description>The trace unit is idle.</description>
3783 <description>Programmers' model stable bit</description>
3789 <description>The programmers' model is not stable.</description>
3794 <description>The programmers' model is stable.</description>
3803 …description>Controls the tracing options This register must always be programmed as part of trace …
3811 …<description>Instruction P0 load field. This field controls whether load instructions are traced a…
3817 <description>Do not trace load instructions as P0 instructions.</description>
3822 <description>Trace load instructions as P0 instructions.</description>
3829 …<description>Instruction P0 field. This field controls whether store instructions are traced as P0…
3835 <description>Do not trace store instructions as P0 instructions.</description>
3840 <description>Trace store instructions as P0 instructions.</description>
3847 <description>Branch broadcast mode bit.</description>
3853 <description>Branch broadcast mode is disabled.</description>
3858 <description>Branch broadcast mode is enabled.</description>
3865 <description>Cycle counting instruction trace bit.</description>
3871 <description>Cycle counting in the instruction trace is disabled.</description>
3876 <description>Cycle counting in the instruction trace is enabled.</description>
3883 <description>Context ID tracing bit.</description>
3889 <description>Context ID tracing is disabled.</description>
3894 <description>Context ID tracing is enabled.</description>
3901 <description>Virtual context identifier tracing bit.</description>
3907 <description>Virtual context identifier tracing is disabled.</description>
3912 <description>Virtual context identifier tracing is enabled.</description>
3919 <description>Conditional instruction tracing bit.</description>
3925 <description>Conditional instruction tracing is disabled.</description>
3930 <description>Conditional load instructions are traced.</description>
3935 <description>Conditional store instructions are traced.</description>
3940 <description>Conditional load and store instructions are traced.</description>
3945 <description>All conditional instructions are traced.</description>
3952 <description>Global timestamp tracing bit.</description>
3958 <description>Global timestamp tracing is disabled.</description>
3963 <description>Global timestamp tracing is enabled.</description>
3970 <description>Return stack enable bit.</description>
3976 <description>Return stack is disabled.</description>
3981 <description>Return stack is enabled.</description>
3988 <description>Q element enable field.</description>
3994 <description>Q elements are disabled.</description>
3999 …<description>Q elements with instruction counts are enabled. Q elements without instruction counts…
4004 … <description>Q elements with and without instruction counts are enabled.</description>
4011 …description>Control bit to select the Virtual context identifier value used by the trace unit, bot…
4017 <description>VTTBR_EL2.VMID is used. If the trace unit supports a Virtual context
4021 [15:8] of the trace unit Virtual context identifier are always zero.</description>
4026 <description>CONTEXTIDR_EL2 is used.</description>
4033 <description>Data address tracing bit.</description>
4039 <description>Data address tracing is disabled.</description>
4044 <description>Data address tracing is enabled.</description>
4051 <description>Data value tracing bit.</description>
4057 <description>Data value tracing is disabled.</description>
4062 <description>Data value tracing is enabled.</description>
4071 …description>Controls the tracing of arbitrary events. If the selected event occurs a trace element…
4079 <description>Select which event should generate trace elements.</description>
4087 …description>Controls the behavior of the events that TRCEVENTCTL0R selects. This register must alw…
4095 <description>Instruction event enable field.</description>
4101 <description>The trace unit does not generate an Event element.</description>
4106 …<description>The trace unit generates an Event element for event 0, in the instruction trace strea…
4113 <description>Instruction event enable field.</description>
4119 <description>The trace unit does not generate an Event element.</description>
4124 …<description>The trace unit generates an Event element for event 1, in the instruction trace strea…
4131 <description>Instruction event enable field.</description>
4137 <description>The trace unit does not generate an Event element.</description>
4142 …<description>The trace unit generates an Event element for event 2, in the instruction trace strea…
4149 <description>Instruction event enable field.</description>
4155 <description>The trace unit does not generate an Event element.</description>
4160 …<description>The trace unit generates an Event element for event 3, in the instruction trace strea…
4167 <description>Data event enable bit.</description>
4173 … <description>The trace unit does not generate an Event element if event 0 occurs.</description>
4178 …<description>The trace unit generates an Event element in the data trace stream if event 0 occurs.…
4185 <description>AMBA Trace Bus (ATB) trigger enable bit.</description>
4191 <description>ATB trigger is disabled.</description>
4196 …description>ATB trigger is enabled. If a CoreSight ATB interface is implemented then when event 0 …
4203 …<description>Low-power state behavior override bit. Controls how a trace unit behaves in low-power…
4209 …<description>Trace unit low-power state behavior is not affected. That is, the trace unit is enabl…
4214 …description>Trace unit low-power state behavior is overridden. That is, entry to a low-power state…
4223 …description>Enables trace unit functionality that prevents trace unit buffer overflows. Might igno…
4231 …description>Threshold level field. If LEVEL is nonzero then a trace unit might suppress the genera…
4237 … <description>Zero invasion. This setting has a greater risk of a FIFO overflow</description>
4242 … <description>Maximum invasion occurs but there is less risk of a FIFO overflow.</description>
4249 …<description>Instruction stall bit. Controls if a trace unit can stall the PE when the instruction…
4255 <description>The trace unit must not stall the PE.</description>
4260 <description>The trace unit can stall the PE.</description>
4267 …<description>Data stall bit. Controls if a trace unit can stall the PE when the data trace buffer …
4273 <description>The trace unit must not stall the PE.</description>
4278 <description>The trace unit can stall the PE.</description>
4285 …description>Prioritize instruction trace bit. Controls if a trace unit can prioritize instruction …
4291 <description>The trace unit must not prioritize instruction trace.</description>
4296 … <description>The trace unit can prioritize instruction trace. A trace unit might prioritize
4298 that the instruction trace has a higher priority than the data trace.</description>
4305 …description>Data discard field. Controls if a trace unit can discard data trace elements on a load…
4311 … <description>The trace unit must not discard any data trace elements.</description>
4316 …<description>The trace unit can discard P1 and P2 elements associated with data loads.</descriptio…
4323 …description>Data discard field. Controls if a trace unit can discard data trace elements on a stor…
4329 … <description>The trace unit must not discard any data trace elements.</description>
4334 …<description>The trace unit can discard P1 and P2 elements associated with data stores.</descripti…
4341 <description>Trace overflow prevention bit.</description>
4347 <description>Trace overflow prevention is disabled.</description>
4352 …<description>Trace overflow prevention is enabled. This might cause a significant performance impa…
4361 …description>Controls the insertion of global timestamps in the trace streams. When the selected ev…
4369 <description>Select which event should generate time stamps.</description>
4377 …description>Controls how often trace synchronization requests occur. Might ignore writes when the …
4385 …<description>Controls how many bytes of trace, the sum of instruction and data, that a trace unit …
4386 … request occurs. The number of bytes is always a power of two, calculated by 2^PERIOD</description>
4392 …<description>Trace synchronization requests are disabled. This setting does not disable other type…
4401 …description>Sets the threshold value for cycle counting. Might ignore writes when the trace unit i…
4409 … <description>Sets the threshold value for instruction trace cycle counting.</description>
4417 …description>Controls which regions in the memory map are enabled to use branch broadcasting. Might…
4425 …<description>Address range field. Selects which address range comparator pairs are in use with bra…
4426 …mparator pair, so field[0] controls the selection of address range comparator pair 0.</description>
4432 …<description>The address range that address range comparator pair 0 defines, is not selected.</des…
4437 …<description>The address range that address range comparator pair n defines, is selected.</descrip…
4444 …<description>Address range field. Selects which address range comparator pairs are in use with bra…
4445 …mparator pair, so field[1] controls the selection of address range comparator pair 1.</description>
4451 …<description>The address range that address range comparator pair 1 defines, is not selected.</des…
4456 …<description>The address range that address range comparator pair n defines, is selected.</descrip…
4463 …<description>Address range field. Selects which address range comparator pairs are in use with bra…
4464 …mparator pair, so field[2] controls the selection of address range comparator pair 2.</description>
4470 …<description>The address range that address range comparator pair 2 defines, is not selected.</des…
4475 …<description>The address range that address range comparator pair n defines, is selected.</descrip…
4482 …<description>Address range field. Selects which address range comparator pairs are in use with bra…
4483 …mparator pair, so field[3] controls the selection of address range comparator pair 3.</description>
4489 …<description>The address range that address range comparator pair 3 defines, is not selected.</des…
4494 …<description>The address range that address range comparator pair n defines, is selected.</descrip…
4501 …<description>Address range field. Selects which address range comparator pairs are in use with bra…
4502 …mparator pair, so field[4] controls the selection of address range comparator pair 4.</description>
4508 …<description>The address range that address range comparator pair 4 defines, is not selected.</des…
4513 …<description>The address range that address range comparator pair n defines, is selected.</descrip…
4520 …<description>Address range field. Selects which address range comparator pairs are in use with bra…
4521 …mparator pair, so field[5] controls the selection of address range comparator pair 5.</description>
4527 …<description>The address range that address range comparator pair 5 defines, is not selected.</des…
4532 …<description>The address range that address range comparator pair n defines, is selected.</descrip…
4539 …<description>Address range field. Selects which address range comparator pairs are in use with bra…
4540 …mparator pair, so field[6] controls the selection of address range comparator pair 6.</description>
4546 …<description>The address range that address range comparator pair 6 defines, is not selected.</des…
4551 …<description>The address range that address range comparator pair n defines, is selected.</descrip…
4558 …<description>Address range field. Selects which address range comparator pairs are in use with bra…
4559 …mparator pair, so field[7] controls the selection of address range comparator pair 7.</description>
4565 …<description>The address range that address range comparator pair 7 defines, is not selected.</des…
4570 …<description>The address range that address range comparator pair n defines, is selected.</descrip…
4579 …description>Sets the trace ID for instruction trace. If data trace is enabled then it also sets th…
4587 …description>Trace ID field. Sets the trace ID value for instruction trace. Bit[0] must be zero if …
4595 …description>Controls when Q elements are enabled. Might ignore writes when the trace unit is enabl…
4603 …<description>Specifies the address range comparators to be used for controlling Q elements.</descr…
4609 <description>Address range comparator 0 is disabled.</description>
4614 <description>Address range comparator 0 is selected for use.</description>
4621 …<description>Specifies the address range comparators to be used for controlling Q elements.</descr…
4627 <description>Address range comparator 1 is disabled.</description>
4632 <description>Address range comparator 1 is selected for use.</description>
4639 …<description>Specifies the address range comparators to be used for controlling Q elements.</descr…
4645 <description>Address range comparator 2 is disabled.</description>
4650 <description>Address range comparator 2 is selected for use.</description>
4657 …<description>Specifies the address range comparators to be used for controlling Q elements.</descr…
4663 <description>Address range comparator 3 is disabled.</description>
4668 <description>Address range comparator 3 is selected for use.</description>
4675 …<description>Specifies the address range comparators to be used for controlling Q elements.</descr…
4681 <description>Address range comparator 4 is disabled.</description>
4686 <description>Address range comparator 4 is selected for use.</description>
4693 …<description>Specifies the address range comparators to be used for controlling Q elements.</descr…
4699 <description>Address range comparator 5 is disabled.</description>
4704 <description>Address range comparator 5 is selected for use.</description>
4711 …<description>Specifies the address range comparators to be used for controlling Q elements.</descr…
4717 <description>Address range comparator 6 is disabled.</description>
4722 <description>Address range comparator 6 is selected for use.</description>
4729 …<description>Specifies the address range comparators to be used for controlling Q elements.</descr…
4735 <description>Address range comparator 7 is disabled.</description>
4740 <description>Address range comparator 7 is selected for use.</description>
4747 … <description>Selects whether the address range comparators selected by the RANGE field indicate
4749 where the trace unit is not permitted to generate Q elements:</description>
4755 … <description>Exclude mode. The address range comparators selected by the RANGE field
4757 ranges are selected, Q elements are permitted across the entire memory map.</description>
4762 … <description>Include mode. The address range comparators selected by the RANGE field
4764 implemented bits in RANGE are set to 0 then Q elements are disabled.</description>
4773 …description>Controls instruction trace filtering. Might ignore writes when the trace unit is enabl…
4781 <description>Select which resource number should be filtered.</description>
4787 <description>This event is not filtered.</description>
4792 <description>This event is filtered.</description>
4799 …<description>When TRCIDR4.NUMACPAIRS &gt; 0 or TRCIDR4.NUMPC &gt; 0, this bit returns the …
4805 <description>The start/stop logic is in the stopped state.</description>
4810 <description>The start/stop logic is in the started state.</description>
4817 <description>Controls whether a trace unit must trace a Reset exception.</description>
4823 …description>The trace unit does not trace a Reset exception unless it traces the exception or inst…
4828 <description>The trace unit always traces a Reset exception.</description>
4835 …<description>When TRCIDR3.TRCERR==1, this bit controls whether a trace unit must trace a System er…
4841 …description>The trace unit does not trace a System error exception unless it traces the exception …
4846 …<description>The trace unit always traces a System error exception, regardless of the value of Vie…
4853 …<description>In Secure state, each bit controls whether instruction tracing is enabled for the cor…
4859 …<description>The trace unit does not generate instruction trace, in Secure state, for Exception le…
4864 …<description>The trace unit generates instruction trace, in Secure state, for Exception level 0.</…
4871 …<description>In Secure state, each bit controls whether instruction tracing is enabled for the cor…
4877 …<description>The trace unit does not generate instruction trace, in Secure state, for Exception le…
4882 …<description>The trace unit generates instruction trace, in Secure state, for Exception level 1.</…
4889 …<description>In Secure state, each bit controls whether instruction tracing is enabled for the cor…
4895 …<description>The trace unit does not generate instruction trace, in Secure state, for Exception le…
4900 …<description>The trace unit generates instruction trace, in Secure state, for Exception level 2.</…
4907 …<description>In Secure state, each bit controls whether instruction tracing is enabled for the cor…
4913 …<description>The trace unit does not generate instruction trace, in Secure state, for Exception le…
4918 …<description>The trace unit generates instruction trace, in Secure state, for Exception level 3.</…
4925 …<description>In Non-secure state, each bit controls whether instruction tracing is enabled for the…
4931 …<description>The trace unit does not generate instruction trace, in Non-secure state, for Exceptio…
4936 …<description>The trace unit generates instruction trace, in Non-secure state, for Exception level …
4943 …<description>In Non-secure state, each bit controls whether instruction tracing is enabled for the…
4949 …<description>The trace unit does not generate instruction trace, in Non-secure state, for Exceptio…
4954 …<description>The trace unit generates instruction trace, in Non-secure state, for Exception level …
4961 …<description>In Non-secure state, each bit controls whether instruction tracing is enabled for the…
4967 …<description>The trace unit does not generate instruction trace, in Non-secure state, for Exceptio…
4972 …<description>The trace unit generates instruction trace, in Non-secure state, for Exception level …
4979 …<description>In Non-secure state, each bit controls whether instruction tracing is enabled for the…
4985 …<description>The trace unit does not generate instruction trace, in Non-secure state, for Exceptio…
4990 …<description>The trace unit generates instruction trace, in Non-secure state, for Exception level …
4999 …description>ViewInst exclude control. Might ignore writes when the trace unit is enabled or not id…
5007 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
5013 …<description>The address range that address range comparator pair 0 defines, is not selected for V…
5018 …<description>The address range that address range comparator pair 0 defines, is selected for ViewI…
5025 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
5031 …<description>The address range that address range comparator pair 1 defines, is not selected for V…
5036 …<description>The address range that address range comparator pair 1 defines, is selected for ViewI…
5043 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
5049 …<description>The address range that address range comparator pair 2 defines, is not selected for V…
5054 …<description>The address range that address range comparator pair 2 defines, is selected for ViewI…
5061 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
5067 …<description>The address range that address range comparator pair 3 defines, is not selected for V…
5072 …<description>The address range that address range comparator pair 3 defines, is selected for ViewI…
5079 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
5085 …<description>The address range that address range comparator pair 4 defines, is not selected for V…
5090 …<description>The address range that address range comparator pair 4 defines, is selected for ViewI…
5097 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
5103 …<description>The address range that address range comparator pair 5 defines, is not selected for V…
5108 …<description>The address range that address range comparator pair 5 defines, is selected for ViewI…
5115 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
5121 …<description>The address range that address range comparator pair 6 defines, is not selected for V…
5126 …<description>The address range that address range comparator pair 6 defines, is selected for ViewI…
5133 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
5139 …<description>The address range that address range comparator pair 7 defines, is not selected for V…
5144 …<description>The address range that address range comparator pair 7 defines, is selected for ViewI…
5151 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
5157 …<description>The address range that address range comparator pair 0 defines, is not selected for V…
5162 …<description>The address range that address range comparator pair 0 defines, is selected for ViewI…
5169 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
5175 …<description>The address range that address range comparator pair 1 defines, is not selected for V…
5180 …<description>The address range that address range comparator pair 1 defines, is selected for ViewI…
5187 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
5193 …<description>The address range that address range comparator pair 2 defines, is not selected for V…
5198 …<description>The address range that address range comparator pair 2 defines, is selected for ViewI…
5205 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
5211 …<description>The address range that address range comparator pair 3 defines, is not selected for V…
5216 …<description>The address range that address range comparator pair 3 defines, is selected for ViewI…
5223 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
5229 …<description>The address range that address range comparator pair 4 defines, is not selected for V…
5234 …<description>The address range that address range comparator pair 4 defines, is selected for ViewI…
5241 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
5247 …<description>The address range that address range comparator pair 5 defines, is not selected for V…
5252 …<description>The address range that address range comparator pair 5 defines, is selected for ViewI…
5259 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
5265 …<description>The address range that address range comparator pair 6 defines, is not selected for V…
5270 …<description>The address range that address range comparator pair 6 defines, is selected for ViewI…
5277 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
5283 …<description>The address range that address range comparator pair 7 defines, is not selected for V…
5288 …<description>The address range that address range comparator pair 7 defines, is selected for ViewI…
5297 …<description>Use this to set, or read, the single address comparators that control the ViewInst st…
5300 …ce unit is enabled or not idle. If implemented then this register must be programmed.</description>
5308 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5314 … <description>The single address comparator 0, is not selected as a start resource.</description>
5319 … <description>The single address comparator 0, is selected as a start resource.</description>
5326 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5332 … <description>The single address comparator 1, is not selected as a start resource.</description>
5337 … <description>The single address comparator 1, is selected as a start resource.</description>
5344 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5350 … <description>The single address comparator 2, is not selected as a start resource.</description>
5355 … <description>The single address comparator 2, is selected as a start resource.</description>
5362 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5368 … <description>The single address comparator 3, is not selected as a start resource.</description>
5373 … <description>The single address comparator 3, is selected as a start resource.</description>
5380 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5386 … <description>The single address comparator 4, is not selected as a start resource.</description>
5391 … <description>The single address comparator 4, is selected as a start resource.</description>
5398 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5404 … <description>The single address comparator 5, is not selected as a start resource.</description>
5409 … <description>The single address comparator 5, is selected as a start resource.</description>
5416 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5422 … <description>The single address comparator 6, is not selected as a start resource.</description>
5427 … <description>The single address comparator 6, is selected as a start resource.</description>
5434 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5440 … <description>The single address comparator 7, is not selected as a start resource.</description>
5445 … <description>The single address comparator 7, is selected as a start resource.</description>
5452 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5458 … <description>The single address comparator 0, is not selected as a stop resource.</description>
5463 … <description>The single address comparator 0, is selected as a stop resource.</description>
5470 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5476 … <description>The single address comparator 1, is not selected as a stop resource.</description>
5481 … <description>The single address comparator 1, is selected as a stop resource.</description>
5488 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5494 … <description>The single address comparator 2, is not selected as a stop resource.</description>
5499 … <description>The single address comparator 2, is selected as a stop resource.</description>
5506 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5512 … <description>The single address comparator 3, is not selected as a stop resource.</description>
5517 … <description>The single address comparator 3, is selected as a stop resource.</description>
5524 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5530 … <description>The single address comparator 4, is not selected as a stop resource.</description>
5535 … <description>The single address comparator 4, is selected as a stop resource.</description>
5542 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5548 … <description>The single address comparator 5, is not selected as a stop resource.</description>
5553 … <description>The single address comparator 5, is selected as a stop resource.</description>
5560 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5566 … <description>The single address comparator 6, is not selected as a stop resource.</description>
5571 … <description>The single address comparator 6, is selected as a stop resource.</description>
5578 …<description>Selects which single address comparators are in use with ViewInst start/stop control,…
5584 … <description>The single address comparator 7, is not selected as a stop resource.</description>
5589 … <description>The single address comparator 7, is selected as a stop resource.</description>
5598 …description>Use this to set, or read, which PE comparator inputs can control the ViewInst start/st…
5606 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5612 … <description>The single PE comparator input 0, is not selected as a start resource.</description>
5617 … <description>The single PE comparator input 0, is selected as a start resource.</description>
5624 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5630 … <description>The single PE comparator input 1, is not selected as a start resource.</description>
5635 … <description>The single PE comparator input 1, is selected as a start resource.</description>
5642 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5648 … <description>The single PE comparator input 2, is not selected as a start resource.</description>
5653 … <description>The single PE comparator input 2, is selected as a start resource.</description>
5660 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5666 … <description>The single PE comparator input 3, is not selected as a start resource.</description>
5671 … <description>The single PE comparator input 3, is selected as a start resource.</description>
5678 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5684 … <description>The single PE comparator input 4, is not selected as a start resource.</description>
5689 … <description>The single PE comparator input 4, is selected as a start resource.</description>
5696 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5702 … <description>The single PE comparator input 5, is not selected as a start resource.</description>
5707 … <description>The single PE comparator input 5, is selected as a start resource.</description>
5714 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5720 … <description>The single PE comparator input 6, is not selected as a start resource.</description>
5725 … <description>The single PE comparator input 6, is selected as a start resource.</description>
5732 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5738 … <description>The single PE comparator input 7, is not selected as a start resource.</description>
5743 … <description>The single PE comparator input 7, is selected as a start resource.</description>
5750 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5756 … <description>The single PE comparator input 0, is not selected as a stop resource.</description>
5761 … <description>The single PE comparator input 0, is selected as a stop resource.</description>
5768 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5774 … <description>The single PE comparator input 1, is not selected as a stop resource.</description>
5779 … <description>The single PE comparator input 1, is selected as a stop resource.</description>
5786 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5792 … <description>The single PE comparator input 2, is not selected as a stop resource.</description>
5797 … <description>The single PE comparator input 2, is selected as a stop resource.</description>
5804 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5810 … <description>The single PE comparator input 3, is not selected as a stop resource.</description>
5815 … <description>The single PE comparator input 3, is selected as a stop resource.</description>
5822 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5828 … <description>The single PE comparator input 4, is not selected as a stop resource.</description>
5833 … <description>The single PE comparator input 4, is selected as a stop resource.</description>
5840 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5846 … <description>The single PE comparator input 5, is not selected as a stop resource.</description>
5851 … <description>The single PE comparator input 5, is selected as a stop resource.</description>
5858 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5864 … <description>The single PE comparator input 6, is not selected as a stop resource.</description>
5869 … <description>The single PE comparator input 6, is selected as a stop resource.</description>
5876 …<description>Selects which PE comparator inputs are in use with ViewInst start/stop control, for t…
5882 … <description>The single PE comparator input 7, is not selected as a stop resource.</description>
5887 … <description>The single PE comparator input 7, is selected as a stop resource.</description>
5896 …description>Controls data trace filtering. Might ignore writes when the trace unit is enabled or n…
5904 <description>Event unit enable bit.</description>
5910 <description>The trace event is not selected for trace filtering.</description>
5915 <description>The trace event is selected for trace filtering.</description>
5922 <description>Event unit enable bit.</description>
5928 <description>The trace event is not selected for trace filtering.</description>
5933 <description>The trace event is selected for trace filtering.</description>
5940 <description>Event unit enable bit.</description>
5946 <description>The trace event is not selected for trace filtering.</description>
5951 <description>The trace event is selected for trace filtering.</description>
5958 <description>Event unit enable bit.</description>
5964 <description>The trace event is not selected for trace filtering.</description>
5969 <description>The trace event is selected for trace filtering.</description>
5976 <description>Event unit enable bit.</description>
5982 <description>The trace event is not selected for trace filtering.</description>
5987 <description>The trace event is selected for trace filtering.</description>
5994 <description>Event unit enable bit.</description>
6000 <description>The trace event is not selected for trace filtering.</description>
6005 <description>The trace event is selected for trace filtering.</description>
6012 <description>Event unit enable bit.</description>
6018 <description>The trace event is not selected for trace filtering.</description>
6023 <description>The trace event is selected for trace filtering.</description>
6030 <description>Event unit enable bit.</description>
6036 <description>The trace event is not selected for trace filtering.</description>
6041 <description>The trace event is selected for trace filtering.</description>
6048 …<description>Controls whether a trace unit traces data for transfers that are relative to the Stac…
6054 … <description>The trace unit does not affect the tracing of SP-relative transfers.</description>
6059 …description>The trace unit does not trace the address portion of SP-relative transfers. If data va…
6064 …<description>The trace unit does not trace the address or value portions of SP-relative transfers.…
6071 …<description>Controls whether a trace unit traces data for transfers that are relative to the Prog…
6077 … <description>The trace unit does not affect the tracing of PC-relative transfers.</description>
6082 …<description>The trace unit does not trace the address or value portions of PC-relative transfers.…
6089 …<description>Controls which information a trace unit populates in bits[63:56] of the data address.…
6095 …<description>The trace unit assigns bits[63:56] to have the same value as bit[55] of the data addr…
6100 …<description>The trace unit assigns bits[63:56] to have the same value as bits[63:56] of the data …
6107 …<description>Controls the tracing of data transfers for exceptions and exception returns on Armv6-…
6113 … <description>Exception and exception return data transfers are not traced.</description>
6118 …description>Exception and exception return data transfers are traced if the other aspects of ViewD…
6127 …description>ViewData include / exclude control. Might ignore writes when the trace unit is enabled…
6135 …<description>Selects which single address comparators are in use with ViewData include control.</d…
6141 …<description>The single address comparator 0, is not selected for ViewData include control.</descr…
6146 …<description>The single address comparator 0, is selected for ViewData include control.</descripti…
6153 …<description>Selects which single address comparators are in use with ViewData include control.</d…
6159 …<description>The single address comparator 1, is not selected for ViewData include control.</descr…
6164 …<description>The single address comparator 1, is selected for ViewData include control.</descripti…
6171 …<description>Selects which single address comparators are in use with ViewData include control.</d…
6177 …<description>The single address comparator 2, is not selected for ViewData include control.</descr…
6182 …<description>The single address comparator 2, is selected for ViewData include control.</descripti…
6189 …<description>Selects which single address comparators are in use with ViewData include control.</d…
6195 …<description>The single address comparator 3, is not selected for ViewData include control.</descr…
6200 …<description>The single address comparator 3, is selected for ViewData include control.</descripti…
6207 …<description>Selects which single address comparators are in use with ViewData include control.</d…
6213 …<description>The single address comparator 4, is not selected for ViewData include control.</descr…
6218 …<description>The single address comparator 4, is selected for ViewData include control.</descripti…
6225 …<description>Selects which single address comparators are in use with ViewData include control.</d…
6231 …<description>The single address comparator 5, is not selected for ViewData include control.</descr…
6236 …<description>The single address comparator 5, is selected for ViewData include control.</descripti…
6243 …<description>Selects which single address comparators are in use with ViewData include control.</d…
6249 …<description>The single address comparator 6, is not selected for ViewData include control.</descr…
6254 …<description>The single address comparator 6, is selected for ViewData include control.</descripti…
6261 …<description>Selects which single address comparators are in use with ViewData include control.</d…
6267 …<description>The single address comparator 7, is not selected for ViewData include control.</descr…
6272 …<description>The single address comparator 7, is selected for ViewData include control.</descripti…
6279 …<description>Selects which single address comparators are in use with ViewData exclude control.</d…
6285 …<description>The single address comparator 0, is not selected for ViewData exclude control.</descr…
6290 …<description>The single address comparator 0, s selected for ViewData exclude control.</descriptio…
6297 …<description>Selects which single address comparators are in use with ViewData exclude control.</d…
6303 …<description>The single address comparator 1, is not selected for ViewData exclude control.</descr…
6308 …<description>The single address comparator 1, s selected for ViewData exclude control.</descriptio…
6315 …<description>Selects which single address comparators are in use with ViewData exclude control.</d…
6321 …<description>The single address comparator 2, is not selected for ViewData exclude control.</descr…
6326 …<description>The single address comparator 2, s selected for ViewData exclude control.</descriptio…
6333 …<description>Selects which single address comparators are in use with ViewData exclude control.</d…
6339 …<description>The single address comparator 3, is not selected for ViewData exclude control.</descr…
6344 …<description>The single address comparator 3, s selected for ViewData exclude control.</descriptio…
6351 …<description>Selects which single address comparators are in use with ViewData exclude control.</d…
6357 …<description>The single address comparator 4, is not selected for ViewData exclude control.</descr…
6362 …<description>The single address comparator 4, s selected for ViewData exclude control.</descriptio…
6369 …<description>Selects which single address comparators are in use with ViewData exclude control.</d…
6375 …<description>The single address comparator 5, is not selected for ViewData exclude control.</descr…
6380 …<description>The single address comparator 5, s selected for ViewData exclude control.</descriptio…
6387 …<description>Selects which single address comparators are in use with ViewData exclude control.</d…
6393 …<description>The single address comparator 6, is not selected for ViewData exclude control.</descr…
6398 …<description>The single address comparator 6, s selected for ViewData exclude control.</descriptio…
6405 …<description>Selects which single address comparators are in use with ViewData exclude control.</d…
6411 …<description>The single address comparator 7, is not selected for ViewData exclude control.</descr…
6416 …<description>The single address comparator 7, s selected for ViewData exclude control.</descriptio…
6425 …description>ViewData include / exclude control. Might ignore writes when the trace unit is enabled…
6433 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
6439 …<description>The address range that address range comparator 0 defines, is not selected for ViewDa…
6444 …<description>The address range that address range comparator 0 defines, is selected for ViewData i…
6451 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
6457 …<description>The address range that address range comparator 1 defines, is not selected for ViewDa…
6462 …<description>The address range that address range comparator 1 defines, is selected for ViewData i…
6469 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
6475 …<description>The address range that address range comparator 2 defines, is not selected for ViewDa…
6480 …<description>The address range that address range comparator 2 defines, is selected for ViewData i…
6487 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
6493 …<description>The address range that address range comparator 3 defines, is not selected for ViewDa…
6498 …<description>The address range that address range comparator 3 defines, is selected for ViewData i…
6505 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
6511 …<description>The address range that address range comparator 4 defines, is not selected for ViewDa…
6516 …<description>The address range that address range comparator 4 defines, is selected for ViewData i…
6523 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
6529 …<description>The address range that address range comparator 5 defines, is not selected for ViewDa…
6534 …<description>The address range that address range comparator 5 defines, is selected for ViewData i…
6541 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
6547 …<description>The address range that address range comparator 6 defines, is not selected for ViewDa…
6552 …<description>The address range that address range comparator 6 defines, is selected for ViewData i…
6559 …<description>Include range field. Selects which address range comparator pairs are in use with Vie…
6565 …<description>The address range that address range comparator 7 defines, is not selected for ViewDa…
6570 …<description>The address range that address range comparator 7 defines, is selected for ViewData i…
6577 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
6583 …<description>The address range that address range comparator 0 defines, is not selected for ViewDa…
6588 …<description>The address range that address range comparator 0 defines, s selected for ViewData ex…
6595 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
6601 …<description>The address range that address range comparator 1 defines, is not selected for ViewDa…
6606 …<description>The address range that address range comparator 1 defines, s selected for ViewData ex…
6613 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
6619 …<description>The address range that address range comparator 2 defines, is not selected for ViewDa…
6624 …<description>The address range that address range comparator 2 defines, s selected for ViewData ex…
6631 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
6637 …<description>The address range that address range comparator 3 defines, is not selected for ViewDa…
6642 …<description>The address range that address range comparator 3 defines, s selected for ViewData ex…
6649 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
6655 …<description>The address range that address range comparator 4 defines, is not selected for ViewDa…
6660 …<description>The address range that address range comparator 4 defines, s selected for ViewData ex…
6667 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
6673 …<description>The address range that address range comparator 5 defines, is not selected for ViewDa…
6678 …<description>The address range that address range comparator 5 defines, s selected for ViewData ex…
6685 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
6691 …<description>The address range that address range comparator 6 defines, is not selected for ViewDa…
6696 …<description>The address range that address range comparator 6 defines, s selected for ViewData ex…
6703 …<description>Exclude range field. Selects which address range comparator pairs are in use with Vie…
6709 …<description>The address range that address range comparator 7 defines, is not selected for ViewDa…
6714 …<description>The address range that address range comparator 7 defines, s selected for ViewData ex…
6725 …description>Description collection: Moves the sequencer state according to programmed events. Migh…
6733 <description>Forward field.</description>
6739 <description>The trace event does not affect the sequencer.</description>
6744 …<description>When the event occurs then the sequencer state moves from state n to state n+1.</desc…
6751 <description>Forward field.</description>
6757 <description>The trace event does not affect the sequencer.</description>
6762 …<description>When the event occurs then the sequencer state moves from state n to state n+1.</desc…
6769 <description>Forward field.</description>
6775 <description>The trace event does not affect the sequencer.</description>
6780 …<description>When the event occurs then the sequencer state moves from state n to state n+1.</desc…
6787 <description>Forward field.</description>
6793 <description>The trace event does not affect the sequencer.</description>
6798 …<description>When the event occurs then the sequencer state moves from state n to state n+1.</desc…
6805 <description>Forward field.</description>
6811 <description>The trace event does not affect the sequencer.</description>
6816 …<description>When the event occurs then the sequencer state moves from state n to state n+1.</desc…
6823 <description>Forward field.</description>
6829 <description>The trace event does not affect the sequencer.</description>
6834 …<description>When the event occurs then the sequencer state moves from state n to state n+1.</desc…
6841 <description>Forward field.</description>
6847 <description>The trace event does not affect the sequencer.</description>
6852 …<description>When the event occurs then the sequencer state moves from state n to state n+1.</desc…
6859 <description>Forward field.</description>
6865 <description>The trace event does not affect the sequencer.</description>
6870 …<description>When the event occurs then the sequencer state moves from state n to state n+1.</desc…
6877 <description>Backward field.</description>
6883 <description>The trace event does not affect the sequencer.</description>
6888 …<description>When the event occurs then the sequencer state moves from state n+1 to state n.</desc…
6895 <description>Backward field.</description>
6901 <description>The trace event does not affect the sequencer.</description>
6906 …<description>When the event occurs then the sequencer state moves from state n+1 to state n.</desc…
6913 <description>Backward field.</description>
6919 <description>The trace event does not affect the sequencer.</description>
6924 …<description>When the event occurs then the sequencer state moves from state n+1 to state n.</desc…
6931 <description>Backward field.</description>
6937 <description>The trace event does not affect the sequencer.</description>
6942 …<description>When the event occurs then the sequencer state moves from state n+1 to state n.</desc…
6949 <description>Backward field.</description>
6955 <description>The trace event does not affect the sequencer.</description>
6960 …<description>When the event occurs then the sequencer state moves from state n+1 to state n.</desc…
6967 <description>Backward field.</description>
6973 <description>The trace event does not affect the sequencer.</description>
6978 …<description>When the event occurs then the sequencer state moves from state n+1 to state n.</desc…
6985 <description>Backward field.</description>
6991 <description>The trace event does not affect the sequencer.</description>
6996 …<description>When the event occurs then the sequencer state moves from state n+1 to state n.</desc…
7003 <description>Backward field.</description>
7009 <description>The trace event does not affect the sequencer.</description>
7014 …<description>When the event occurs then the sequencer state moves from state n+1 to state n.</desc…
7023 …description>Moves the sequencer to state 0 when a programmed event occurs. Might ignore writes whe…
7031 <description>Select which event should reset the sequencer.</description>
7039 …description>Use this to set, or read, the sequencer state. Might ignore writes when the trace unit…
7047 <description>Sets or returns the state of the sequencer.</description>
7053 <description>The sequencer is in state 0.</description>
7058 <description>The sequencer is in state 1.</description>
7063 <description>The sequencer is in state 2.</description>
7068 <description>The sequencer is in state 3.</description>
7077 …description>Use this to set, or read, which external inputs are resources to the trace unit. Might…
7085 …<description>Each field in this collection selects an external input as a resource for the trace u…
7091 …<description>Each field in this collection selects an external input as a resource for the trace u…
7097 …<description>Each field in this collection selects an external input as a resource for the trace u…
7103 …<description>Each field in this collection selects an external input as a resource for the trace u…
7113 …description>Description collection: This sets or returns the reload count value for counter n. Mig…
7121 …description>Contains the reload value for counter n. When a reload event occurs for counter n then…
7131 …<description>Description collection: Controls the operation of counter n. Might ignore writes when…
7139 … <description>Selects an event, that when it occurs causes counter n to decrement.</description>
7145 …<description>Selects an event, that when it occurs causes a reload event for counter n.</descripti…
7151 …<description>Controls whether a reload event occurs for counter n, when counter n reaches zero.</d…
7157 <description>The counter is in Normal mode.</description>
7162 <description>The counter is in Self-reload mode.</description>
7169 …<description>For TRCCNTCTLR3 and TRCCNTCTLR1, this bit controls whether counter n decrements when …
7175 …<description>Counter n does not decrement when a reload event for counter n-1 occurs.</description>
7180 …description>Counter n decrements when a reload event for counter n-1 occurs. This concatenates cou…
7191 …description>Description collection: This sets or returns the value of counter n. The count value i…
7199 <description>Contains the count value of counter n.</description>
7209 …<description>Description collection: Controls the selection of the resources in the trace unit. Mi…
7211 unexpectedly or might not fire. Reads of the TRCRSCTLRn might return UNKNOWN.</description>
7219 <description>Trace unit enable bit</description>
7225 …<description>The trace unit is disabled. All trace resources are inactive and no trace is generate…
7230 <description>The trace unit is enabled.</description>
7239 <description>Controls the single-shot comparator.</description>
7247 …<description>Enables the single-shot comparator resource to be reset when it occurs, to enable ano…
7253 <description>Multiple matches can not be detected.</description>
7258 <description>Multiple matches can occur.</description>
7267 …<description>Indicates the status of the single-shot comparators. TRCSSCSR0 is sensitive toinstruc…
7275 <description>Instruction address comparator support</description>
7281 … <description>Single-shot instruction address comparisons not supported.</description>
7286 <description>Single-shot instruction address comparisons supported.</description>
7293 <description>Data address comparator support</description>
7299 <description>Data address comparisons not supported.</description>
7304 <description>Data address comparisons supported.</description>
7311 <description>Data value comparator support</description>
7317 <description>Data value comparisons not supported.</description>
7322 <description>Data value comparisons supported.</description>
7329 <description>Process counter value comparator support</description>
7335 <description>Process counter value comparisons not supported.</description>
7340 <description>Process counter value comparisons supported.</description>
7347 …<description>Single-shot status. This indicates whether any of the selected comparators have match…
7353 <description>Match has not occurred.</description>
7358 <description>Match has occurred at least once.</description>
7367 … <description>Selects the processor comparator inputs for Single-shot control.</description>
7375 … <description>Selects processor comparator 0 inputs for Single-shot control</description>
7381 … <description>Processor comparator 0 is not selected for Single-shot control.</description>
7386 … <description>Processor comparator 0 is selected for Single-shot control.</description>
7393 … <description>Selects processor comparator 1 inputs for Single-shot control</description>
7399 … <description>Processor comparator 1 is not selected for Single-shot control.</description>
7404 … <description>Processor comparator 1 is selected for Single-shot control.</description>
7411 … <description>Selects processor comparator 2 inputs for Single-shot control</description>
7417 … <description>Processor comparator 2 is not selected for Single-shot control.</description>
7422 … <description>Processor comparator 2 is selected for Single-shot control.</description>
7429 … <description>Selects processor comparator 3 inputs for Single-shot control</description>
7435 … <description>Processor comparator 3 is not selected for Single-shot control.</description>
7440 … <description>Processor comparator 3 is selected for Single-shot control.</description>
7449 <description>Controls the single-shot comparator.</description>
7457 …<description>Power up request, to request that power to ETM and access to the trace registers is m…
7463 <description>Power not requested.</description>
7468 <description>Power requested.</description>
7477 <description>Indicates the power down status of the ETM.</description>
7485 <description>Indicates ETM is powered up</description>
7491 … <description>ETM is not powered up. All registers are not accessible.</description>
7496 <description>ETM is powered up. All registers are accessible.</description>
7503 …description>Sticky power down state. This bit is set to 1 when power to the ETM registers is remov…
7509 …<description>Trace register power has not been removed since the TRCPDSR was last read.</descripti…
7514 … <description>Trace register power has been removed since the TRCPDSR was last read.</description>
7523 <description>Sets the state of output pins.</description>
7531 <description>Drives the ATIDMI[0] output pin.</description>
7537 <description>Drives the ATIDMI[1] output pin.</description>
7543 <description>Drives the ATIDMI[2] output pin.</description>
7549 <description>Drives the ATIDMI[3] output pin.</description>
7555 <description>Drives the ATIDMI[4] output pin.</description>
7561 <description>Drives the ATIDMI[5] output pin.</description>
7567 <description>Drives the ATIDMI[6] output pin.</description>
7575 <description>Reads the state of the input pins.</description>
7583 <description>Returns the value of the ATVALIDMI input pin.</description>
7589 <description>Returns the value of the AFREADYMI input pin.</description>
7597 <description>Sets the state of the output pins.</description>
7605 <description>Drives the ATVALIDMI output pin.</description>
7611 <description>Drives the AFREADYMI output pin.</description>
7619 …<description>Enables topology detection or integration testing, by putting ETM-M33 into integratio…
7627 <description>Integration mode enable</description>
7633 <description>ETM is not in integration mode.</description>
7638 <description>ETM is in integration mode.</description>
7647 …<description>Sets bits in the claim tag and determines the number of claim tag bits implemented.</…
7655 <description>Claim tag set register</description>
7662 <description>Claim tag 0 is not set.</description>
7667 <description>Claim tag 0 is set.</description>
7675 <description>Set claim tag 0.</description>
7682 <description>Claim tag set register</description>
7689 <description>Claim tag 1 is not set.</description>
7694 <description>Claim tag 1 is set.</description>
7702 <description>Set claim tag 1.</description>
7709 <description>Claim tag set register</description>
7716 <description>Claim tag 2 is not set.</description>
7721 <description>Claim tag 2 is set.</description>
7729 <description>Set claim tag 2.</description>
7736 <description>Claim tag set register</description>
7743 <description>Claim tag 3 is not set.</description>
7748 <description>Claim tag 3 is set.</description>
7756 <description>Set claim tag 3.</description>
7765 …<description>Clears bits in the claim tag and determines the current value of the claim tag.</desc…
7773 <description>Claim tag clear register</description>
7780 <description>Claim tag 0 is not set.</description>
7785 <description>Claim tag 0 is set.</description>
7793 <description>Clear claim tag 0.</description>
7800 <description>Claim tag clear register</description>
7807 <description>Claim tag 1 is not set.</description>
7812 <description>Claim tag 1 is set.</description>
7820 <description>Clear claim tag 1.</description>
7827 <description>Claim tag clear register</description>
7834 <description>Claim tag 2 is not set.</description>
7839 <description>Claim tag 2 is set.</description>
7847 <description>Clear claim tag 2.</description>
7854 <description>Claim tag clear register</description>
7861 <description>Claim tag 3 is not set.</description>
7866 <description>Claim tag 3 is set.</description>
7874 <description>Clear claim tag 3.</description>
7883 <description>Indicates the current level of tracing permitted by the system</description>
7891 <description>Non-secure Invasive Debug</description>
7897 <description>The feature is not implemented.</description>
7902 <description>The feature is implemented.</description>
7909 <description>Non-secure Non-Invasive Debug</description>
7915 <description>The feature is not implemented.</description>
7920 <description>The feature is implemented.</description>
7927 <description>Secure Invasive Debug</description>
7933 <description>The feature is not implemented.</description>
7938 <description>The feature is implemented.</description>
7945 <description>Secure Non-Invasive Debug</description>
7951 <description>The feature is not implemented.</description>
7956 <description>The feature is implemented.</description>
7965 <description>The TRCDEVARCH identifies ETM-M33 as an ETMv4.2 component</description>
7973 <description>Architecture ID</description>
7979 <description>Component is an ETMv4 component</description>
7986 <description>Architecture revision</description>
7992 <description>Component is part of architecture 4.2</description>
7999 <description>This register is implemented</description>
8005 <description>The register is not implemented.</description>
8010 <description>The register is implemented.</description>
8017 <description>Defines the architect of the component</description>
8023 <description>This peripheral was architected by Arm.</description>
8032 <description>Controls the single-shot comparator.</description>
8040 <description>The main type of the component</description>
8046 <description>Peripheral is a trace source.</description>
8053 <description>The sub-type of the component</description>
8059 <description>Peripheral is a processor trace source.</description>
8070 … <description>Description collection: Coresight peripheral identification registers.</description>
8080 … <description>Description collection: Coresight component identification registers.</description>
8090 <description>CPU control</description>
8105 <description>An invalid operation exception has occurred in the FPU.</description>
8113 <description>An invalid operation exception has occurred in the FPU.</description>
8119 <description>Event not generated</description>
8124 <description>Event generated</description>
8133 … <description>A floating-point divide-by-zero exception has occurred in the FPU.</description>
8141 … <description>A floating-point divide-by-zero exception has occurred in the FPU.</description>
8147 <description>Event not generated</description>
8152 <description>Event generated</description>
8161 <description>A floating-point overflow exception has occurred in the FPU.</description>
8169 … <description>A floating-point overflow exception has occurred in the FPU.</description>
8175 <description>Event not generated</description>
8180 <description>Event generated</description>
8189 <description>A floating-point underflow exception has occurred in the FPU.</description>
8197 … <description>A floating-point underflow exception has occurred in the FPU.</description>
8203 <description>Event not generated</description>
8208 <description>Event generated</description>
8217 <description>A floating-point inexact exception has occurred in the FPU.</description>
8225 <description>A floating-point inexact exception has occurred in the FPU.</description>
8231 <description>Event not generated</description>
8236 <description>Event generated</description>
8245 … <description>A floating-point input denormal exception has occurred in the FPU.</description>
8253 … <description>A floating-point input denormal exception has occurred in the FPU.</description>
8259 <description>Event not generated</description>
8264 <description>Event generated</description>
8273 <description>Enable or disable interrupt</description>
8281 <description>Enable or disable interrupt for event FPUIOC</description>
8287 <description>Disable</description>
8292 <description>Enable</description>
8299 <description>Enable or disable interrupt for event FPUDZC</description>
8305 <description>Disable</description>
8310 <description>Enable</description>
8317 <description>Enable or disable interrupt for event FPUOFC</description>
8323 <description>Disable</description>
8328 <description>Enable</description>
8335 <description>Enable or disable interrupt for event FPUUFC</description>
8341 <description>Disable</description>
8346 <description>Enable</description>
8353 <description>Enable or disable interrupt for event FPUIXC</description>
8359 <description>Disable</description>
8364 <description>Enable</description>
8371 <description>Enable or disable interrupt for event FPUIDC</description>
8377 <description>Disable</description>
8382 <description>Enable</description>
8391 <description>Enable interrupt</description>
8399 <description>Write '1' to enable interrupt for event FPUIOC</description>
8406 <description>Read: Disabled</description>
8411 <description>Read: Enabled</description>
8419 <description>Enable</description>
8426 <description>Write '1' to enable interrupt for event FPUDZC</description>
8433 <description>Read: Disabled</description>
8438 <description>Read: Enabled</description>
8446 <description>Enable</description>
8453 <description>Write '1' to enable interrupt for event FPUOFC</description>
8460 <description>Read: Disabled</description>
8465 <description>Read: Enabled</description>
8473 <description>Enable</description>
8480 <description>Write '1' to enable interrupt for event FPUUFC</description>
8487 <description>Read: Disabled</description>
8492 <description>Read: Enabled</description>
8500 <description>Enable</description>
8507 <description>Write '1' to enable interrupt for event FPUIXC</description>
8514 <description>Read: Disabled</description>
8519 <description>Read: Enabled</description>
8527 <description>Enable</description>
8534 <description>Write '1' to enable interrupt for event FPUIDC</description>
8541 <description>Read: Disabled</description>
8546 <description>Read: Enabled</description>
8554 <description>Enable</description>
8563 <description>Disable interrupt</description>
8571 <description>Write '1' to disable interrupt for event FPUIOC</description>
8578 <description>Read: Disabled</description>
8583 <description>Read: Enabled</description>
8591 <description>Disable</description>
8598 <description>Write '1' to disable interrupt for event FPUDZC</description>
8605 <description>Read: Disabled</description>
8610 <description>Read: Enabled</description>
8618 <description>Disable</description>
8625 <description>Write '1' to disable interrupt for event FPUOFC</description>
8632 <description>Read: Disabled</description>
8637 <description>Read: Enabled</description>
8645 <description>Disable</description>
8652 <description>Write '1' to disable interrupt for event FPUUFC</description>
8659 <description>Read: Disabled</description>
8664 <description>Read: Enabled</description>
8672 <description>Disable</description>
8679 <description>Write '1' to disable interrupt for event FPUIXC</description>
8686 <description>Read: Disabled</description>
8691 <description>Read: Enabled</description>
8699 <description>Disable</description>
8706 <description>Write '1' to disable interrupt for event FPUIDC</description>
8713 <description>Read: Disabled</description>
8718 <description>Read: Enabled</description>
8726 <description>Disable</description>
8735 … <description>Register to lock the certain parts of the CPU from being modified.</description>
8743 <description>Locks both the Vector table Offset Register (VTOR) and
8744 Application Interrupt and Reset Control Register (AIRCR) for secure mode.</description>
8750 <description>Both VTOR and AIRCR can be changed.</description>
8755 <description>Prevents changes to both VTOR and AIRCR.</description>
8762 … <description>Locks the Vector table Offset Register (VTOR) for non-secure mode.</description>
8768 <description>VTOR can be changed.</description>
8773 <description>Prevents changes to VTOR.</description>
8780 <description>Locks the Memory Protection Unit (MPU) for secure mode.</description>
8786 <description>MPU registers can be changed.</description>
8791 <description>Prevents changes to MPU registers.</description>
8798 <description>Locks the Memory Protection Unit (MPU) for non secure mode.</description>
8804 <description>MPU registers can be changed.</description>
8809 <description>Prevents changes to MPU registers.</description>
8816 <description>Locks the Security Attribution Unit (SAU)</description>
8822 <description>SAU registers can be changed.</description>
8827 <description>Prevents changes to SAU registers.</description>
8836 <description>The identifier for the CPU in this subsystem.</description>
8844 <description>The CPU identifier.</description>
8854 <description>Cache</description>
8869 <description>Invalidate the cache.</description>
8877 <description>Invalidate the cache.</description>
8883 <description>Trigger task</description>
8892 <description>Invalidate the line.</description>
8900 <description>Invalidate the line.</description>
8906 <description>Trigger task</description>
8915 <description>Erase the cache.</description>
8923 <description>Erase the cache.</description>
8929 <description>Trigger task</description>
8938 <description>Status of the cache activities.</description>
8946 <description>Ready status.</description>
8952 <description>Activity is done and ready for the next activity.</description>
8957 <description>Activity is in progress.</description>
8966 <description>Enable cache.</description>
8974 <description>Enable cache</description>
8980 <description>Disable cache</description>
8985 <description>Enable cache</description>
8994 <description>Memory address covered by the line to be maintained.</description>
9002 <description>Address.</description>
9010 <description>Unspecified</description>
9016 <description>Enable the profiling counters.</description>
9024 <description>Enable the profiling counters</description>
9030 <description>Disable profiling</description>
9035 <description>Enable profiling</description>
9044 <description>Clear the profiling counters.</description>
9052 <description>Clearing the profiling counters</description>
9058 <description>Clear the profiling counters</description>
9067 <description>The cache hit counter for cache region.</description>
9075 <description>Number of cache hits</description>
9083 <description>The cache miss counter for cache region.</description>
9091 <description>Number of cache misses</description>
9099 <description>The cache line miss counter for cache region.</description>
9107 <description>Number of cache line misses</description>
9115 <description>Number of reads for cache region.</description>
9123 <description>Number of reads for cache region.</description>
9131 <description>Number of writes for cache region.</description>
9139 <description>Number of writes for cache region.</description>
9148 <description>Lock debug mode.</description>
9156 <description>Lock debug mode</description>
9162 <description>Debug mode unlocked</description>
9167 <description>Debug mode locked. Ignores any other value written.</description>
9176 <description>Lock cache updates.</description>
9184 <description>Lock cache updates</description>
9190 <description>Cache updates unlocked</description>
9195 <description>Cache updates locked</description>
9206 <description>Software interrupt 0</description>
9225 <description>Unused.</description>
9234 <description>Software interrupt 1</description>
9245 <description>Software interrupt 2</description>
9256 <description>Software interrupt 3</description>
9267 <description>USBHSCORE 0</description>
9282 <description>Control and Status Register</description>
9290 <description>Mode: Host only. VBUS Valid Override Enable (VbvalidOvEn)</description>
9296 …<description>Override is disabled and bvalid signal from the respective PHY selected is used inter…
9301 …<description>The vbus-valid signal received from the PHY is overridden with GOTGCTL.VbvalidOvVal</…
9308 <description>Mode: Host only. VBUS Valid OverrideValue (VbvalidOvVal)</description>
9314 <description>vbusvalid value when GOTGCTL.VbvalidOvEn = 1</description>
9319 <description>vbusvalid value when GOTGCTL.VbvalidOvEn is 1</description>
9326 …<description>Mode: Host only. A-Peripheral Session Valid Override Enable (AvalidOvEn)</description>
9332 <description>Derive AValid from PHY</description>
9337 <description>Derive Avalid from GOTGCTL.AvalidOvVal</description>
9344 … <description>Mode: Host only. A-Peripheral Session Valid OverrideValue (AvalidOvVal)</description>
9350 <description>Avalid value is 1'b0 when GOTGCTL.AvalidOvEn =1</description>
9355 <description>Avalid value is 1'b1 when GOTGCTL.AvalidOvEn =1</description>
9362 …<description>Mode: Device only. B-Peripheral Session Valid Override Value (BvalidOvEn)</descriptio…
9368 …<description>Override is disabled and bvalid signal from the respective PHY selected is used inter…
9373 …<description>Internally Bvalid received from the PHY is overridden with GOTGCTL.BvalidOvVal</descr…
9380 …<description>Mode: Device only. B-Peripheral Session Valid OverrideValue (BvalidOvVal)</descriptio…
9386 <description>Bvalid value when GOTGCTL.BvalidOvEn =1</description>
9391 <description>Bvalid value when GOTGCTL.BvalidOvEn =1</description>
9398 <description>Mode: Host and Device. Debounce Filter Bypass</description>
9404 <description>Debounce Filter Bypass is disabled.</description>
9409 <description>Debounce Filter Bypass is enabled.</description>
9416 <description>Mode: Host and Device. Connector ID Status (ConIDSts)</description>
9423 <description>The core is in A-Device mode.</description>
9428 <description>The core is in B-Device mode.</description>
9435 <description>Mode: Host only. Long/Short Debounce Time (DbncTime)</description>
9442 …<description>Long debounce time, used for physical connections (100 ms + 2.5 micro-sec)</descripti…
9447 … <description>Short debounce time, used for soft connections (2.5 micro-sec)</description>
9454 <description>Mode: Host only. A-Session Valid (ASesVld)</description>
9461 <description>A-session is not valid.</description>
9466 <description>A-session is valid.</description>
9473 <description>Mode: Device only. B-Session Valid (BSesVld)</description>
9480 <description>B-session is not valid.</description>
9485 <description>B-session is valid.</description>
9492 <description>OTG Version (OTGVer)</description>
9498 <description>Supports OTG Version 1.3</description>
9503 <description>Supports OTG Version 2.0</description>
9510 <description>Current Mode of Operation (CurMod)</description>
9517 <description>Current mode is device mode.</description>
9522 <description>Current mode is host mode.</description>
9529 <description>Mode: Host and Device. Multi Valued ID pin (MultValIdBC)</description>
9536 <description>B-Device connected to ACA. VBUS is on.</description>
9541 <description>B-Device connected to ACA. VBUS is off.</description>
9546 <description>A-Device connected to ACA</description>
9551 <description>A-Device not connected to ACA</description>
9556 <description>B-Device not connected to ACA</description>
9563 …description>Mode: Device Only. This bit when programmed to 1'b1 results in the core asserting chir…
9569 …<description>The controller does not assert chirp_on before sending an actual Chirp 'K' signal on …
9574 …<description>The controller asserts chirp_on before sending an actual Chirp 'K' signal on USB.</de…
9583 <description>Interrupt Register</description>
9591 <description>Mode: Host and Device. Session End Detected (SesEndDet)</description>
9597 <description>Session is Active</description>
9602 <description>SessionEnd utmiotg_bvalid signal is deasserted</description>
9609 …<description>Mode: Host and Device. Session Request Success Status Change (SesReqSucStsChng)</desc…
9615 <description>No Change in Session Request Status</description>
9620 <description>Session Request Status has changed</description>
9627 …<description>Mode: Host and Device. Host Negotiation Success Status Change (HstNegSucStsChng)</des…
9633 <description>No Change</description>
9638 <description>Host Negotiation Status Change</description>
9645 <description>Mode:Host and Device. Host Negotiation Detected (HstNegDet)</description>
9651 <description>No Active HNP Request</description>
9656 <description>Active HNP request detected</description>
9663 … <description>Mode: Host and Device. A-Device Timeout Change (ADevTOUTChg)</description>
9669 <description>No A-Device Timeout</description>
9674 <description>A-Device Timeout</description>
9681 <description>Mode: Host only. Debounce Done (DbnceDone)</description>
9687 <description>After Connect waiting for Debounce to complete</description>
9692 <description>Debounce completed</description>
9699 …<description>This bit when set indicates that there is a change in the value of at least one ACA p…
9705 <description>Indicates there is no change in ACA pin value</description>
9710 <description>Indicates there is a change in ACA pin value</description>
9719 <description>AHB Configuration Register</description>
9727 <description>Mode: Host and device. Global Interrupt Mask (GlblIntrMsk)</description>
9733 <description>Mask the interrupt assertion to the application</description>
9738 <description>Unmask the interrupt assertion to the application.</description>
9745 <description>Mode: Host and device. Burst Length/Type (HBstLen)</description>
9751 <description>1 word or single</description>
9756 <description>4 words or INCR</description>
9761 <description>8 words</description>
9766 <description>16 words or INCR4</description>
9771 <description>32 words</description>
9776 <description>64 words or INCR8</description>
9781 <description>128 words</description>
9786 <description>256 words or INCR16</description>
9791 <description>Others reserved</description>
9798 <description>Mode: Host and device. DMA Enable (DMAEn)</description>
9804 <description>Core operates in Slave mode</description>
9809 <description>Core operates in a DMA mode</description>
9816 … <description>Mode: Host and device. Non-Periodic TxFIFO Empty Level (NPTxFEmpLvl)</description>
9822 …<description>DIEPINTn.TxFEmp interrupt indicates that the Non-Periodic TxFIFO is half empty or tha…
9827 …description>GINTSTS.NPTxFEmp interrupt indicates that the Non-Periodic TxFIFO is completely empty …
9834 <description>Mode: Host and Device. Remote Memory Support (RemMemSupp)</description>
9840 <description>Remote Memory Support Feature disabled</description>
9845 <description>Remote Memory Support Feature enabled</description>
9852 …<description>Mode: Host and Device. Notify All DMA Write Transactions (NotiAllDmaWrit)</descriptio…
9858 <description>Unspecified</description>
9863 …description>The core asserts int_dma_req for all the DMA write transactions on the AHB interface a…
9870 <description>Mode: Host and Device. AHB Single Support (AHBSingle)</description>
9876 … <description>The remaining data in the transfer is sent using INCR burst size</description>
9881 … <description>The remaining data in the transfer is sent using Single burst size</description>
9890 <description>USB Configuration Register</description>
9898 <description>Mode: Host and Device. HS/FS Timeout Calibration (TOutCal)</description>
9904 <description>Add 0 PHY clocks</description>
9909 <description>Add 1 PHY clocks</description>
9914 <description>Add 2 PHY clocks</description>
9919 <description>Add 3 PHY clocks</description>
9924 <description>Add 4 PHY clocks</description>
9929 <description>Add 5 PHY clocks</description>
9934 <description>Add 6 PHY clocks</description>
9939 <description>Add 7 PHY clocks</description>
9946 <description>Mode: Host and Device. PHY Interface (PHYIf)</description>
9952 <description>PHY 8bit Mode</description>
9957 <description>PHY 16bit Mode</description>
9964 <description>Mode: Host and Device. ULPI or UTMI+ Select (ULPI_UTMI_Sel)</description>
9971 <description>UTMI+ Interface</description>
9976 <description>ULPI Interface</description>
9983 … <description>Mode: Host and Device. Full-Speed Serial Interface Select (FSIntf)</description>
9990 <description>6-pin unidirectional full-speed serial interface</description>
9995 <description>3-pin bidirectional full-speed serial interface</description>
10002 <description>PHYSel</description>
10009 <description>USB 2.0 high-speed UTMI+ or ULPI PHY is selected</description>
10014 <description>USB 1.1 full-speed serial transceiver is selected</description>
10021 <description>Mode: Device only. USB Turnaround Time (USBTrdTim)</description>
10027 <description>MAC interface is 16-bit UTMI+.</description>
10032 <description>MAC interface is 8-bit UTMI+.</description>
10039 <description>PHY Low-Power Clock Select (PhyLPwrClkSel)</description>
10045 <description>480-MHz Internal PLL clock</description>
10050 <description>48-MHz External Clock</description>
10057 … <description>Mode: Device only. TermSel DLine Pulsing Selection (TermSelDLPulse)</description>
10063 <description>Data line pulsing using utmi_txvalid</description>
10068 <description>Data line pulsing using utmi_termsel</description>
10075 <description>Mode: Host and Device. IC_USB-Capable (IC_USBCap)</description>
10082 <description>IC_USB PHY Interface is not selected</description>
10087 <description>IC_USB PHY Interface is selected</description>
10094 <description>Mode: Device only. Tx End Delay (TxEndDelay)</description>
10100 <description>Normal Mode</description>
10105 <description>Tx End delay</description>
10112 <description>Mode: Host and device. Force Host Mode (ForceHstMode)</description>
10118 <description>Normal Mode</description>
10123 <description>Force Host Mode</description>
10130 <description>Mode:Host and device. Force Device Mode (ForceDevMode)</description>
10136 <description>Normal Mode</description>
10141 <description>Force Device Mode</description>
10148 <description>Mode: Host and device. Corrupt Tx packet (CorruptTxPkt)</description>
10155 <description>Normal Mode</description>
10160 <description>Debug Mode</description>
10169 <description>Reset Register</description>
10177 <description>Mode: Host and Device. Core Soft Reset (CSftRst)</description>
10183 <description>No reset</description>
10188 <description>Resets hclk and phy_clock domains</description>
10195 …<description>Mode: Host and Device. PIU FS Dedicated Controller Soft Reset (PIUFSSftRst)</descript…
10201 <description>No Reset</description>
10206 <description>PIU FS Dedicated Controller Soft Reset</description>
10213 <description>Mode: Host only. Host Frame Counter Reset (FrmCntrRst)</description>
10219 <description>No reset</description>
10224 <description>Host Frame Counter Reset</description>
10231 <description>Mode: Host and Device. RxFIFO Flush (RxFFlsh)</description>
10237 <description>Does not flush the entire RxFIFO</description>
10242 <description>Flushes the entire RxFIFO</description>
10249 <description>Mode: Host and Device. TxFIFO Flush (TxFFlsh)</description>
10255 <description>No Flush</description>
10260 <description>Selectively flushes a single or all transmit FIFOs</description>
10267 <description>Mode: Host and Device. TxFIFO Number (TxFNum)</description>
10273 …description>-Periodic TxFIFO flush in host mode -Periodic TxFIFO 0 flush in device mode when in sh…
10278 …description>-Periodic TxFIFO flush in host mode -Periodic TxFIFO 1 flush in device mode when in sh…
10283 …description>-Periodic TxFIFO 2 flush in device mode when in shared FIFO operation -TXFIFO 2 flush …
10288 …description>-Periodic TxFIFO 3 flush in device mode when in shared FIFO operation -TXFIFO 3 flush …
10293 …description>-Periodic TxFIFO 4 flush in device mode when in shared FIFO operation -TXFIFO 4 flush …
10298 …description>-Periodic TxFIFO 5 flush in device mode when in shared FIFO operation -TXFIFO 5 flush …
10303 …description>-Periodic TxFIFO 6 flush in device mode when in shared FIFO operation -TXFIFO 6 flush …
10308 …description>-Periodic TxFIFO 7 flush in device mode when in shared FIFO operation -TXFIFO 7 flush …
10313 …description>-Periodic TxFIFO 8 flush in device mode when in shared FIFO operation -TXFIFO 8 flush …
10318 …description>-Periodic TxFIFO 9 flush in device mode when in shared FIFO operation -TXFIFO 9 flush …
10323 …description>-Periodic TxFIFO 10 flush in device mode when in shared FIFO operation -TXFIFO 10 flus…
10328 …description>-Periodic TxFIFO 11 flush in device mode when in shared FIFO operation -TXFIFO 11 flus…
10333 …description>-Periodic TxFIFO 12 flush in device mode when in shared FIFO operation -TXFIFO 12 flus…
10338 …description>-Periodic TxFIFO 13 flush in Device mode when in shared FIFO operation -TXFIFO 13 flus…
10343 …description>-Periodic TxFIFO 14 flush in Device mode when in shared FIFO operation -TXFIFO 14 flus…
10348 …description>-Periodic TxFIFO 15 flush in Device mode when in shared FIFO operation - TXFIFO 15 flu…
10353 <description>Flush all the transmit FIFOs in device or host mode</description>
10360 <description>Mode: Host and Device. Core Soft Reset Done (CSftRstDone)</description>
10366 <description>No reset</description>
10371 <description>Core Soft Reset is done</description>
10378 <description>Mode: Host and Device. DMA Request Signal (DMAReq)</description>
10385 <description>No DMA request</description>
10390 <description>DMA request is in progress</description>
10397 <description>Mode: Host and Device. AHB Master Idle (AHBIdle)</description>
10404 <description>Not Idle</description>
10409 <description>AHB Master Idle</description>
10418 <description>Interrupt Register</description>
10426 <description>Mode: Host and Device. Current Mode of Operation (CurMod)</description>
10433 <description>Device mode</description>
10438 <description>Host mode</description>
10445 <description>Mode: Host and Device. Mode Mismatch Interrupt (ModeMis)</description>
10451 <description>No Mode Mismatch Interrupt</description>
10456 <description>Mode Mismatch Interrupt</description>
10463 <description>Mode: Host and Device. OTG Interrupt (OTGInt)</description>
10470 <description>No Interrupt</description>
10475 <description>OTG Interrupt</description>
10482 <description>Mode: Host and Device. Start of (micro)Frame (Sof)</description>
10488 <description>No Start of Frame</description>
10493 <description>Start of Frame</description>
10500 <description>Mode: Host and Device. RxFIFO Non-Empty (RxFLvl)</description>
10507 <description>Rx Fifo is empty</description>
10512 <description>Rx Fifo is not empty</description>
10519 <description>Mode: Host and Device. Non-periodic TxFIFO Empty (NPTxFEmp)</description>
10526 <description>Non-periodic TxFIFO is not empty</description>
10531 <description>Non-periodic TxFIFO is empty</description>
10538 … <description>Mode: Device only. Global IN Non-periodic NAK Effective (GINNakEff)</description>
10545 <description>Global Non-periodic IN NAK not active</description>
10550 <description>Set Global Non-periodic IN NAK bit</description>
10557 <description>Mode: Device only. Global OUT NAK Effective (GOUTNakEff)</description>
10564 <description>Not Active</description>
10569 <description>Global OUT NAK Effective</description>
10576 <description>Mode: Device only. Early Suspend (ErlySusp)</description>
10582 <description>No Idle state detected</description>
10587 <description>3ms of Idle state detected</description>
10594 <description>Mode: Device only. USB Suspend (USBSusp)</description>
10600 <description>Not Active</description>
10605 <description>USB Suspend</description>
10612 <description>Mode: Device only. USB Reset (USBRst)</description>
10618 <description>Not active</description>
10623 <description>USB Reset</description>
10630 <description>Mode: Device only. Enumeration Done (EnumDone)</description>
10636 <description>Not active</description>
10641 <description>Enumeration Done</description>
10648 …<description>Mode: Device only. Isochronous OUT Packet Dropped Interrupt (ISOOutDrop)</description>
10654 <description>Not active</description>
10659 <description>Isochronous OUT Packet Dropped Interrupt</description>
10666 <description>Mode: Device only. End of Periodic Frame Interrupt (EOPF)</description>
10672 <description>Not active</description>
10677 <description>End of Periodic Frame Interrupt</description>
10684 <description>Mode: Device only. Restore Done Interrupt (RstrDoneInt)</description>
10690 <description>Not active</description>
10695 <description>Restore Done Interrupt</description>
10702 <description>Mode: Device only. Endpoint Mismatch Interrupt (EPMis)</description>
10708 <description>Not active</description>
10713 <description>Endpoint Mismatch Interrupt</description>
10720 <description>Mode: Device only. IN Endpoints Interrupt (IEPInt)</description>
10727 <description>Not active</description>
10732 <description>IN Endpoints Interrupt</description>
10739 <description>Mode: Device only. OUT Endpoints Interrupt (OEPInt)</description>
10746 <description>Not active</description>
10751 <description>OUT Endpoints Interrupt</description>
10758 … <description>Mode: Device only. Incomplete Isochronous IN Transfer (incompISOIN)</description>
10764 <description>Not active</description>
10769 <description>Incomplete Isochronous IN Transfer</description>
10776 <description>Incomplete Periodic Transfer (incomplP)</description>
10782 <description>Not active</description>
10787 <description>Incomplete Periodic Transfer</description>
10794 <description>Mode: Device only. Data Fetch Suspended (FetSusp)</description>
10800 <description>Not active</description>
10805 <description>Data Fetch Suspended</description>
10812 <description>Mode: Device only. Reset detected Interrupt (ResetDet)</description>
10818 <description>Not active</description>
10823 <description>Reset detected Interrupt</description>
10830 <description>Mode: Host only. Host Port Interrupt (PrtInt)</description>
10837 <description>Not active</description>
10842 <description>Host Port Interrupt</description>
10849 <description>Mode: Host only. Host Channels Interrupt (HChInt)</description>
10856 <description>Not active</description>
10861 <description>Host Channels Interrupt</description>
10868 … <description>Mode: Host and Device. LPM Transaction Received Interrupt (LPM_Int).</description>
10874 <description>Not Active</description>
10879 <description>LPM Transaction Received Interrupt</description>
10886 … <description>Mode: Host and Device. Connector ID Status Change (ConIDStsChng)</description>
10892 <description>Not Active</description>
10897 <description>Connector ID Status Change</description>
10904 <description>Mode: Host only. Disconnect Detected Interrupt (DisconnInt)</description>
10910 <description>Not active</description>
10915 <description>Disconnect Detected Interrupt</description>
10922 …<description>Mode: Host and Device. Session Request/New Session Detected Interrupt (SessReqInt)</d…
10928 <description>Not active</description>
10933 <description>Session Request New Session Detected Interrupt</description>
10940 …<description>Mode: Host and Device. Resume/Remote Wakeup Detected Interrupt (WkUpInt)</description>
10946 <description>Not active</description>
10951 <description>Resume or Remote Wakeup Detected Interrupt</description>
10960 <description>Interrupt Mask Register</description>
10968 … <description>Mode: Host and Device. Mode Mismatch Interrupt Mask (ModeMisMsk)</description>
10974 <description>Mode Mismatch Interrupt Mask</description>
10979 <description>No Mode Mismatch Interrupt Mask</description>
10986 <description>Mode: Host and Device. OTG Interrupt Mask (OTGIntMsk)</description>
10992 <description>OTG Interrupt Mask</description>
10997 <description>No OTG Interrupt Mask</description>
11004 <description>Mode: Host and Device. Start of (micro)Frame Mask (SofMsk)</description>
11010 <description>Start of Frame Mask</description>
11015 <description>No Start of Frame Mask</description>
11022 … <description>Mode: Host and Device. Receive FIFO Non-Empty Mask (RxFLvlMsk)</description>
11028 <description>Receive FIFO Non-Empty Mask</description>
11033 <description>No Receive FIFO Non-Empty Mask</description>
11040 … <description>Mode: Host and Device. Non-periodic TxFIFO Empty Mask (NPTxFEmpMsk)</description>
11046 <description>Non-periodic TxFIFO Empty Mask</description>
11051 <description>No Non-periodic TxFIFO Empty Mask</description>
11058 …<description>Mode: Device only,. Global Non-periodic IN NAK Effective Mask (GINNakEffMsk)</descrip…
11064 <description>Global Non-periodic IN NAK Effective Mask</description>
11069 <description>No Global Non-periodic IN NAK Effective Mask</description>
11076 … <description>Mode: Device only. Global OUT NAK Effective Mask (GOUTNakEffMsk)</description>
11082 <description>Global OUT NAK Effective Mask</description>
11087 <description>No Global OUT NAK Effective Mask</description>
11094 <description>Mode: Device only. Early Suspend Mask (ErlySuspMsk)</description>
11100 <description>Early Suspend Mask</description>
11105 <description>No Early Suspend Mask</description>
11112 <description>Mode: Device only. USB Suspend Mask (USBSuspMsk)</description>
11118 <description>USB Suspend Mask</description>
11123 <description>No USB Suspend Mask</description>
11130 <description>Mode: Device only. USB Reset Mask (USBRstMsk)</description>
11136 <description>USB Reset Mask</description>
11141 <description>No USB Reset Mask</description>
11148 <description>Mode: Device only. Enumeration Done Mask (EnumDoneMsk)</description>
11154 <description>Enumeration Done Mask</description>
11159 <description>No Enumeration Done Mask</description>
11166 …<description>Mode: Device only. Isochronous OUT Packet Dropped Interrupt Mask (ISOOutDropMsk)</des…
11172 <description>Isochronous OUT Packet Dropped Interrupt Mask</description>
11177 <description>No Isochronous OUT Packet Dropped Interrupt Mask</description>
11184 … <description>Mode: Device only. End of Periodic Frame Interrupt Mask (EOPFMsk)</description>
11190 <description>End of Periodic Frame Interrupt Mask</description>
11195 <description>No End of Periodic Frame Interrupt Mask</description>
11202 … <description>Mode: Host and Device. Restore Done Interrupt Mask (RstrDoneIntMsk)</description>
11208 <description>Restore Done Interrupt Mask</description>
11213 <description>No Restore Done Interrupt Mask</description>
11220 … <description>Mode: Device only. Endpoint Mismatch Interrupt Mask (EPMisMsk)</description>
11226 <description>Endpoint Mismatch Interrupt Mask</description>
11231 <description>No Endpoint Mismatch Interrupt Mask</description>
11238 <description>Mode: Device only. IN Endpoints Interrupt Mask (IEPIntMsk)</description>
11244 <description>IN Endpoints Interrupt Mask</description>
11249 <description>No IN Endpoints Interrupt Mask</description>
11256 <description>Mode: Device only. OUT Endpoints Interrupt Mask (OEPIntMsk)</description>
11262 <description>OUT Endpoints Interrupt Mask</description>
11267 <description>No OUT Endpoints Interrupt Mask</description>
11274 <description>Incomplete Periodic Transfer Mask (incomplPMsk)</description>
11280 …<description>Host mode: Incomplete Periodic Transfer MaskDevice mode: Incomplete Isochronous OUT T…
11285 …<description>Host mode: No Incomplete Periodic Transfer MaskDevice mode: No Incomplete Isochronous…
11292 <description>Mode: Device only. Data Fetch Suspended Mask (FetSuspMsk)</description>
11298 <description>Data Fetch Suspended Mask</description>
11303 <description>No Data Fetch Suspended Mask</description>
11310 … <description>Mode: Device only. Reset detected Interrupt Mask (ResetDetMsk)</description>
11316 <description>Reset detected Interrupt Mask</description>
11321 <description>No Reset detected Interrupt Mask</description>
11328 <description>Mode: Host only. Host Port Interrupt Mask (PrtIntMsk)</description>
11334 <description>Host Port Interrupt Mask</description>
11339 <description>No Host Port Interrupt Mask</description>
11346 <description>Mode: Host only. Host Channels Interrupt Mask (HChIntMsk)</description>
11352 <description>Host Channels Interrupt Mask</description>
11357 <description>No Host Channels Interrupt Mask</description>
11364 … <description>Mode: Host and Device. LPM Transaction Received Interrupt (LPM_Int)</description>
11370 <description>LPM Transaction received interrupt Mask</description>
11375 <description>No LPM Transaction received interrupt Mask</description>
11382 …<description>Mode: Host and Device. Connector ID Status Change Mask (ConIDStsChngMsk)</description>
11388 <description>Connector ID Status Change Mask</description>
11393 <description>No Connector ID Status Change Mask</description>
11400 …<description>Mode: Host and Device. Disconnect Detected Interrupt Mask (DisconnIntMsk)</descriptio…
11406 <description>Disconnect Detected Interrupt Mask</description>
11411 <description>No Disconnect Detected Interrupt Mask</description>
11418 …<description>Mode: Host and Device. Session Request/New Session Detected Interrupt Mask (SessReqIn…
11424 <description>Session Request or New Session Detected Interrupt Mask</description>
11429 … <description>No Session Request or New Session Detected Interrupt Mask</description>
11436 …<description>Mode: Host and Device. Resume/Remote Wakeup Detected Interrupt Mask (WkUpIntMsk)</des…
11442 <description>Resume or Remote Wakeup Detected Interrupt Mask</description>
11447 <description>Unmask Resume Remote Wakeup Detected Interrupt</description>
11456 <description>Receive Status Debug Read Register</description>
11464 <description>Channel Number (ChNum)</description>
11471 <description>Channel or EndPoint 0</description>
11476 <description>Channel or EndPoint 1</description>
11481 <description>Channel or EndPoint 2</description>
11486 <description>Channel or EndPoint 3</description>
11491 <description>Channel or EndPoint 4</description>
11496 <description>Channel or EndPoint 5</description>
11501 <description>Channel or EndPoint 6</description>
11506 <description>Channel or EndPoint 7</description>
11511 <description>Channel or EndPoint 8</description>
11516 <description>Channel or EndPoint 9</description>
11521 <description>Channel or EndPoint 10</description>
11526 <description>Channel or EndPoint 11</description>
11531 <description>Channel or EndPoint 12</description>
11536 <description>Channel or EndPoint 13</description>
11541 <description>Channel or EndPoint 14</description>
11546 <description>Channel or EndPoint 15</description>
11553 <description>Byte Count (BCnt)</description>
11560 <description>Data PID (DPID)</description>
11567 <description>DATA0</description>
11572 <description>DATA2</description>
11577 <description>DATA1</description>
11582 <description>MDATA</description>
11589 … <description>Packet Status (PktSts) indicates the status of the received packet.</description>
11596 <description>Global OUT NAK in device mode (triggers an interrupt)</description>
11601 …<description>IN data packet received in host mode and OUT data packet received in device mode</des…
11606 …<description>IN or OUT transfer completed in both host and device mode (triggers an interrupt)</de…
11611 … <description>SETUP transaction completed in device mode (triggers an interrupt)</description>
11616 <description>Data toggle error (triggers an interrupt) in host mode</description>
11621 <description>SETUP data packet received in device mode</description>
11626 <description>Channel halted in host mode (triggers an interrupt)</description>
11633 <description>Mode: Device only. Frame Number (FN)</description>
11642 <description>Receive Status Read/Pop Register</description>
11650 <description>Channel Number (ChNum)</description>
11657 <description>Channel or EndPoint 0</description>
11662 <description>Channel or EndPoint 1</description>
11667 <description>Channel or EndPoint 2</description>
11672 <description>Channel or EndPoint 3</description>
11677 <description>Channel or EndPoint 4</description>
11682 <description>Channel or EndPoint 5</description>
11687 <description>Channel or EndPoint 6</description>
11692 <description>Channel or EndPoint 7</description>
11697 <description>Channel or EndPoint 8</description>
11702 <description>Channel or EndPoint 9</description>
11707 <description>Channel or EndPoint 10</description>
11712 <description>Channel or EndPoint 11</description>
11717 <description>Channel or EndPoint 12</description>
11722 <description>Channel or EndPoint 13</description>
11727 <description>Channel or EndPoint 14</description>
11732 <description>Channel or EndPoint 15</description>
11739 <description>Byte Count (BCnt)</description>
11746 <description>Data PID (DPID)</description>
11753 <description>DATA0</description>
11758 <description>DATA2</description>
11763 <description>DATA1</description>
11768 <description>MDATA</description>
11775 … <description>Packet Status (PktSts) indicates the status of the received packet.</description>
11782 <description>Global OUT NAK in device mode (triggers an interrupt)</description>
11787 …<description>IN data packet received in host mode and OUT data packet received in device mode</des…
11792 …<description>IN or OUT transfer completed in both host and device mode (triggers an interrupt)</de…
11797 … <description>SETUP transaction completed in device mode (triggers an interrupt)</description>
11802 <description>Data toggle error (triggers an interrupt) in host mode</description>
11809 <description>Mode: Device only. Frame Number (FN)</description>
11818 <description>Receive FIFO Size Register</description>
11826 <description>Mode: Host and Device. RxFIFO Depth (RxFDep)</description>
11834 <description>Non-periodic Transmit FIFO Size Register</description>
11842 <description>Non-periodic Transmit RAM Start Address (NPTxFStAddr)</description>
11848 <description>Mode: Host only. Non-periodic TxFIFO Depth (NPTxFDep)</description>
11856 <description>Non-periodic Transmit FIFO/Queue Status Register</description>
11864 <description>Non-periodic TxFIFO Space Avail (NPTxFSpcAvail)</description>
11871 … <description>Non-periodic Transmit Request Queue Space Available (NPTxQSpcAvail)</description>
11878 <description>Non-periodic Transmit Request Queue is full</description>
11883 <description>1 location available</description>
11888 <description>2 locations available</description>
11893 <description>3 locations available</description>
11898 <description>4 locations available</description>
11903 <description>5 locations available</description>
11908 <description>6 locations available</description>
11913 <description>7 locations available</description>
11918 <description>8 locations available</description>
11925 <description>Top of the Non-periodic Transmit Request Queue (NPTxQTop)</description>
11932 <description>IN/OUT token</description>
11937 <description>Zero-length transmit packet (device IN/host OUT)</description>
11942 <description>PING/CSPLIT token</description>
11947 <description>Channel halt command</description>
11956 <description>General Purpose Input/Output Register</description>
11977 <description>User ID Register</description>
11985 <description>User ID (UserID) Application-programmable ID field.</description>
11993 <description>Synopsys ID Register</description>
12001 <description>Release number of the controller being used currently.</description>
12010 <description>User Hardware Configuration 1 Register</description>
12018 <description>This 32-bit field uses two bits per</description>
12027 <description>User Hardware Configuration 2 Register</description>
12035 <description>Mode of Operation (OtgMode)</description>
12042 <description>HNP- and SRP-Capable OTG (Host and Device)</description>
12047 <description>SRP-Capable OTG (Host and Device)</description>
12052 <description>Non-HNP and Non-SRP Capable OTG (Host and Device)</description>
12057 <description>SRP-Capable Device</description>
12062 <description>Non-OTG Device</description>
12067 <description>SRP-Capable Host</description>
12072 <description>Non-OTG Host</description>
12079 <description>Architecture (OtgArch)</description>
12086 <description>Slave Mode</description>
12091 <description>External DMA Mode</description>
12096 <description>Internal DMA Mode</description>
12103 <description>Point-to-Point (SingPnt)</description>
12110 <description>Multi-point application (hub and split support)</description>
12115 <description>Single-point application (no hub and split support)</description>
12122 <description>High-Speed PHY Interface Type (HSPhyType)</description>
12129 <description>High-Speed interface not supported</description>
12134 <description>High Speed Interface UTMI+ is supported</description>
12139 <description>High Speed Interface ULPI is supported</description>
12144 <description>High Speed Interfaces UTMI+ and ULPI is supported</description>
12151 <description>Full-Speed PHY Interface Type (FSPhyType)</description>
12158 <description>Full-speed interface not supported</description>
12163 <description>Dedicated full-speed interface is supported</description>
12168 <description>FS pins shared with UTMI+ pins is supported</description>
12173 <description>FS pins shared with ULPI pins is supported</description>
12180 <description>Number of Device Endpoints (NumDevEps)</description>
12187 <description>End point 0</description>
12192 <description>End point 1</description>
12197 <description>End point 2</description>
12202 <description>End point 3</description>
12207 <description>End point 4</description>
12212 <description>End point 5</description>
12217 <description>End point 6</description>
12222 <description>End point 7</description>
12227 <description>End point 8</description>
12232 <description>End point 9</description>
12237 <description>End point 10</description>
12242 <description>End point 11</description>
12247 <description>End point 12</description>
12252 <description>End point 13</description>
12257 <description>End point 14</description>
12262 <description>End point 15</description>
12269 <description>Number of Host Channels (NumHstChnl)</description>
12276 <description>Host Channel 1</description>
12281 <description>Host Channel 2</description>
12286 <description>Host Channel 3</description>
12291 <description>Host Channel 4</description>
12296 <description>Host Channel 5</description>
12301 <description>Host Channel 6</description>
12306 <description>Host Channel 7</description>
12311 <description>Host Channel 8</description>
12316 <description>Host Channel 9</description>
12321 <description>Host Channel 10</description>
12326 <description>Host Channel 11</description>
12331 <description>Host Channel 12</description>
12336 <description>Host Channel 13</description>
12341 <description>Host Channel 14</description>
12346 <description>Host Channel 15</description>
12351 <description>Host Channel 16</description>
12358 <description>Periodic OUT Channels Supported in Host Mode (PerioSupport)</description>
12365 <description>Periodic OUT Channels is not supported in Host Mode</description>
12370 <description>Periodic OUT Channels Supported in Host Mode Supported</description>
12377 <description>Dynamic FIFO Sizing Enabled (DynFifoSizing)</description>
12384 <description>Dynamic FIFO Sizing Disabled</description>
12389 <description>Dynamic FIFO Sizing Enabled</description>
12396 <description>Multi Processor Interrupt Enabled (MultiProcIntrpt)</description>
12403 <description>No Multi Processor Interrupt Enabled</description>
12408 <description>Multi Processor Interrupt Enabled</description>
12415 <description>Non-periodic Request Queue Depth (NPTxQDepth)</description>
12422 <description>Queue size 2</description>
12427 <description>Queue size 4</description>
12432 <description>Queue size 8</description>
12439 <description>Host Mode Periodic Request Queue Depth (PTxQDepth)</description>
12446 <description>Queue Depth 2</description>
12451 <description>Queue Depth 4</description>
12456 <description>Queue Depth 8</description>
12461 <description>Queue Depth 16</description>
12468 … <description>Device Mode IN Token Sequence Learning Queue Depth (TknQDepth)</description>
12477 <description>User Hardware Configuration 3 Register</description>
12485 <description>Width of Transfer Size Counters (XferSizeWidth)</description>
12492 <description>Width of Transfer Size Counter 11 bits</description>
12497 <description>Width of Transfer Size Counter 12 bits</description>
12502 <description>Width of Transfer Size Counter 13 bits</description>
12507 <description>Width of Transfer Size Counter 14 bits</description>
12512 <description>Width of Transfer Size Counter 15 bits</description>
12517 <description>Width of Transfer Size Counter 16 bits</description>
12522 <description>Width of Transfer Size Counter 17 bits</description>
12527 <description>Width of Transfer Size Counter 18 bits</description>
12532 <description>Width of Transfer Size Counter 19 bits</description>
12539 <description>Width of Packet Size Counters (PktSizeWidth)</description>
12546 <description>Width of Packet Size Counter 4</description>
12551 <description>Width of Packet Size Counter 5</description>
12556 <description>Width of Packet Size Counter 6</description>
12561 <description>Width of Packet Size Counter 7</description>
12566 <description>Width of Packet Size Counter 8</description>
12571 <description>Width of Packet Size Counter 9</description>
12576 <description>Width of Packet Size Counter 10</description>
12583 <description>OTG Function Enabled (OtgEn)</description>
12590 <description>Not OTG Capable</description>
12595 <description>OTG Capable</description>
12602 <description>I2C Selection (I2CIntSel)</description>
12609 <description>I2C Interface is not available</description>
12614 <description>I2C Interface is available</description>
12621 <description>Vendor Control Interface Support (VndctlSupt)</description>
12628 <description>Vendor Control Interface is not available.</description>
12633 <description>Vendor Control Interface is available.</description>
12640 <description>Optional Features Removed (OptFeature)</description>
12647 <description>Optional features were not Removed</description>
12652 <description>Optional Features have been Removed</description>
12659 <description>Reset Style for Clocked always Blocks in RTL (RstType)</description>
12666 <description>Asynchronous reset is used in the core</description>
12671 <description>Synchronous reset is used in the core</description>
12678 …<description>This bit indicates whether ADP logic is present within or external to the controller<…
12685 <description>ADP logic is not present along with the controller</description>
12690 <description>ADP logic is present along with the controller</description>
12697 <description>HSIC mode specified for Mode of Operation</description>
12704 <description>No HSIC capability</description>
12709 <description>HSIC-capable with shared UTMI PHY interface</description>
12716 … <description>This bit indicates the controller support for Battery Charger.</description>
12723 <description>No Battery Charger Support</description>
12728 <description>Battery Charger Support present</description>
12735 <description>LPM mode specified for Mode of Operation.</description>
12742 <description>LPM disabled</description>
12747 <description>LPM enabled</description>
12754 <description>DFIFO Depth (DfifoDepth - EP_LOC_CNT)</description>
12763 <description>User Hardware Configuration 4 Register</description>
12771 … <description>Number of Device Mode Periodic IN Endpoints (NumDevPerioEps)</description>
12778 <description>Number of Periodic IN EPs is 0</description>
12783 <description>Number of Periodic IN EPs is 1</description>
12788 <description>Number of Periodic IN EPs is 2</description>
12793 <description>Number of Periodic IN EPs is 3</description>
12798 <description>Number of Periodic IN EPs is 4</description>
12803 <description>Number of Periodic IN EPs is 5</description>
12808 <description>Number of Periodic IN EPs is 6</description>
12813 <description>Number of Periodic IN EPs is 7</description>
12818 <description>Number of Periodic IN EPs is 8</description>
12823 <description>Number of Periodic IN EPs is 9</description>
12828 <description>Number of Periodic IN EPs is 10</description>
12833 <description>Number of Periodic IN EPs is 11</description>
12838 <description>Number of Periodic IN EPs is 12</description>
12843 <description>Number of Periodic IN EPs is 13</description>
12848 <description>Number of Periodic IN EPs is 14</description>
12853 <description>Number of Periodic IN EPs is 15</description>
12860 <description>Enable Partial Power Down (PartialPwrDn)</description>
12867 <description>Partial Power Down disabled</description>
12872 <description>Partial Power Down enabled</description>
12879 <description>Minimum AHB Frequency Less Than 60 MHz (AhbFreq)</description>
12886 <description>Minimum AHB Frequency More Than 60 MHz</description>
12891 <description>Minimum AHB Frequency Less Than 60 MHz</description>
12898 <description>Enable Hibernation (Hibernation)</description>
12905 <description>Hibernation feature disabled</description>
12910 <description>Hibernation feature enabled</description>
12917 <description>Enable Hibernation</description>
12924 <description>Extended Hibernation feature not enabled</description>
12929 <description>Extended Hibernation feature enabled</description>
12936 <description>Enhanced LPM Support1 (EnhancedLPMSupt1)</description>
12943 …<description>Reject L1 Request even if Non-Periodic (Bulk/Interrupt) TxFIFO is not empty.</descrip…
12948 …<description>Accept L1 Request even if Non-Periodic (Bulk/Interrupt) TxFIFO is not empty</descript…
12955 <description>Service Interval Flow</description>
12962 <description>Service Interval Flow not supported</description>
12967 <description>Service Interval Flow supported</description>
12974 <description>Interpacket Gap ISOC OUT Worst-case Support (ipgisocSupt)</description>
12981 <description>Interpacket Gap ISOC OUT Worst-case Support is Disabled</description>
12986 … <description>Interpacket Gap ISOC OUT Worst-case Support is Enabled (Default)</description>
12993 <description>Active Clock Gating Support</description>
13000 <description>Unspecified</description>
13005 <description>Active Clock Gating Support</description>
13012 <description>Enhanced LPM Support (EnhancedLPMSupt)</description>
13019 <description>Enhanced LPM Support is enabled</description>
13026 <description>UTMI+ PHY/ULPI-to-Internal UTMI+ Wrapper Data Width</description>
13033 <description>8 bits</description>
13038 <description>16 bits</description>
13043 <description>8/16 bits, software selectable</description>
13050 <description>Number of Device Mode Control Endpoints in Addition to</description>
13057 <description>End point 0</description>
13062 <description>End point 1</description>
13067 <description>End point 2</description>
13072 <description>End point 3</description>
13077 <description>End point 4</description>
13082 <description>End point 5</description>
13087 <description>End point 6</description>
13092 <description>End point 7</description>
13097 <description>End point 8</description>
13102 <description>End point 9</description>
13107 <description>End point 10</description>
13112 <description>End point 11</description>
13117 <description>End point 12</description>
13122 <description>End point 13</description>
13127 <description>End point 14</description>
13132 <description>End point 15</description>
13139 <description>IDDIG Filter Enable (IddgFltr)</description>
13146 <description>Iddig Filter Disabled</description>
13151 <description>Iddig Filter Enabled</description>
13158 <description>VBUS Valid Filter Enabled (VBusValidFltr)</description>
13165 <description>Vbus Valid Filter Disabled</description>
13170 <description>Vbus Valid Filter Enabled</description>
13177 <description>a_valid Filter Enabled (AValidFltr)</description>
13184 <description>No filter</description>
13189 <description>Filter</description>
13196 <description>b_valid Filter Enabled (BValidFltr)</description>
13203 <description>No Filter</description>
13208 <description>Filter</description>
13215 <description>session_end Filter Enabled (SessEndFltr)</description>
13222 <description>No filter</description>
13227 <description>Filter</description>
13234 <description>Enable Dedicated Transmit FIFO for device IN Endpoints</description>
13241 <description>Dedicated Transmit FIFO Operation not enabled</description>
13246 <description>Dedicated Transmit FIFO Operation enabled</description>
13253 … <description>Number of Device Mode IN Endpoints Including Control Endpoints (INEps)</description>
13260 <description>1 IN Endpoint</description>
13265 <description>2 IN Endpoints</description>
13270 <description>3 IN Endpoints</description>
13275 <description>4 IN Endpoints</description>
13280 <description>5 IN Endpoints</description>
13285 <description>6 IN Endpoints</description>
13290 <description>7 IN Endpoints</description>
13295 <description>8 IN Endpoints</description>
13300 <description>9 IN Endpoints</description>
13305 <description>10 IN Endpoints</description>
13310 <description>11 IN Endpoints</description>
13315 <description>12 IN Endpoints</description>
13320 <description>13 IN Endpoints</description>
13325 <description>14 IN Endpoints</description>
13330 <description>15 IN Endpoints</description>
13335 <description>16 IN Endpoints</description>
13342 <description>Scatter/Gather DMA configuration</description>
13349 <description>Non-Scatter/Gather DMA configuration</description>
13354 <description>Scatter/Gather DMA configuration</description>
13361 <description>Scatter/Gather DMA configuration</description>
13368 <description>Non Dynamic configuration</description>
13373 <description>Dynamic configuration</description>
13382 <description>LPM Config Register</description>
13390 <description>LPM-Capable (LPMCap)</description>
13396 <description>LPM capability is not enabled</description>
13401 <description>LPM capability is enabled</description>
13408 … <description>Mode: Device only. LPM response programmed by application (AppL1Res)</description>
13414 …<description>The core responds with a NYET when an error is detected in either of the LPM token pa…
13419 … <description>The core responds with an ACK only on a successful LPM transaction</description>
13426 <description>Host-Initiated Resume Duration (HIRD)</description>
13432 <description>RemoteWakeEnable (bRemoteWake)</description>
13438 <description>Remote Wakeup is disabled</description>
13443 … <description>In Host or device mode, this field takes the value of remote wake up</description>
13450 <description>Enable utmi_sleep_n (EnblSlpM)</description>
13456 …<description>utmi_sleep_n assertion from the core is not transferred to the external PHY</descript…
13461 …<description>utmi_sleep_n assertion from the core is transferred to the external PHY when utmi_l1_…
13468 <description>BESL/HIRD Threshold (HIRD_Thres)</description>
13474 <description>LPM Response (CoreL1Res)</description>
13481 <description>ERROR : No handshake response</description>
13486 <description>STALL response</description>
13491 <description>NYET response</description>
13496 <description>ACK response</description>
13503 <description>Port Sleep Status (SlpSts)</description>
13510 … <description>In Host or Device mode, this bit indicates core is not in L1</description>
13515 …description>In Host mode, this bit indicates the core transitions to Sleep state as a successful L…
13522 <description>Sleep State Resume OK (L1ResumeOK)</description>
13529 … <description>The application/core cannot start Resume from Sleep state</description>
13534 <description>The application/core can start Resume from Sleep state</description>
13541 <description>LPM Channel Index</description>
13547 <description>Channel 0</description>
13552 <description>Channel 1</description>
13557 <description>Channel 2</description>
13562 <description>Channel 3</description>
13567 <description>Channel 4</description>
13572 <description>Channel 5</description>
13577 <description>Channel 6</description>
13582 <description>Channel 7</description>
13587 <description>Channel 8</description>
13592 <description>Channel 9</description>
13597 <description>Channel 10</description>
13602 <description>Channel 11</description>
13607 <description>Channel 12</description>
13612 <description>Channel 13</description>
13617 <description>Channel 14</description>
13622 <description>Channel15</description>
13629 <description>LPM Retry Count (LPM_Retry_Cnt)</description>
13635 <description>Zero LPM retries</description>
13640 <description>One LPM retry</description>
13645 <description>Two LPM retries</description>
13650 <description>Three LPM retries</description>
13655 <description>Four LPM retries</description>
13660 <description>Five LPM retries</description>
13665 <description>Six LPM retries</description>
13670 <description>Seven LPM retries</description>
13677 <description>Send LPM Transaction (SndLPM)</description>
13683 …<description>In host-only mode: Received the response from the device for the LPM transaction</des…
13688 …<description>In host-only mode: Sending LPM transaction containing EXT and LPM tokens</description>
13695 <description>LPM Retry Count Status (LPM_RetryCnt_Sts)</description>
13702 <description>Zero LPM retries remaining</description>
13707 <description>One LPM retry remaining</description>
13712 <description>Two LPM retries remaining</description>
13717 <description>Three LPM retries remaining</description>
13722 <description>Four LPM retries remaining</description>
13727 <description>Five LPM retries remaining</description>
13732 <description>Six LPM retries remaining</description>
13737 <description>Seven LPM retries remaining</description>
13744 <description>LPM Enable BESL (LPM_EnBESL)</description>
13750 <description>BESL is disabled</description>
13755 <description>BESL is enabled as defined in LPM Errata</description>
13762 <description>LPM Restore Sleep Status (LPM_RestoreSlpSts)</description>
13768 …<description>Puts the core in Shallow Sleep mode based on the BESL value from the Host</descriptio…
13773 … <description>Puts the core in Deep Sleep mode based on the BESL value from the Host</description>
13782 <description>Global Power Down Register</description>
13790 <description>PMU Interrupt Select (PMUIntSel)</description>
13796 <description>Internal DWC_otg_core interrupt is selected</description>
13801 <description>External DWC_otg_pmu interrupt is selected</description>
13808 <description>PMU Active (PMUActv)</description>
13814 <description>Disable PMU module</description>
13819 <description>Enable PMU module</description>
13826 <description>Restore</description>
13832 <description>The controller in normal mode of operation</description>
13837 <description>The controller in Restore mode</description>
13844 <description>Power Down Clamp (PwrDnClmp)</description>
13850 <description>Disable PMU power clamp</description>
13855 <description>Enable PMU power clamp</description>
13862 <description>Power Down ResetN (PwrDnRst_n)</description>
13868 <description>Reset the controller</description>
13873 <description>The controller is in normal operation</description>
13880 <description>Power Down Switch (PwrDnSwtch)</description>
13886 <description>The controller is in ON state</description>
13891 <description>The controller is in OFF state</description>
13898 <description>DisableVBUS</description>
13904 …<description>Host mode:HPRT0.PrtPwr was not programmed to 0, and in Device mode:Session Valid</des…
13909 …<description>Host mode:HPRT0.PrtPwr was programmed to 0 and in Device mode:Session End</descriptio…
13916 <description>Line State Change (LnStsChng)</description>
13922 <description>No LineState change on USB</description>
13927 <description>LineState change on USB</description>
13934 <description>LineStageChangeMsk</description>
13940 <description>No LineStateChange Interrupt Mask</description>
13945 <description>Mask for LineStateChange Interrupt</description>
13952 <description>ResetDetected</description>
13958 <description>Reset not detected</description>
13963 <description>Reset detected</description>
13970 <description>ResetDetMsk</description>
13976 <description>No ResetDetect Interrupt Mask</description>
13981 <description>Mask for ResetDetect Interrupt</description>
13988 <description>DisconnectDetect</description>
13994 <description>Disconnect not detected</description>
13999 <description>Disconnect detected</description>
14006 <description>DisconnectDetectMsk</description>
14012 <description>No DisconnectDetect Interrupt Mask</description>
14017 <description>Mask for DisconnectDetect Interrupt</description>
14024 <description>ConnectDet</description>
14030 <description>Connect not detected</description>
14035 <description>Connect detected</description>
14042 <description>ConnDetMsk</description>
14048 <description>No ConnectDet Interrupt Mask</description>
14053 <description>Mask for ConnectDet Interrupt</description>
14060 <description>SRPDetect</description>
14066 <description>SRP not detected</description>
14071 <description>SRP detected</description>
14078 <description>SRPDetectMsk</description>
14084 <description>No SRPDetect Interrupt Mask</description>
14089 <description>Mask for SRPDetect Interrupt</description>
14096 <description>Status Change Interrupt (StsChngInt)</description>
14102 <description>No Status change</description>
14107 <description>Status change detected</description>
14114 <description>StsChngIntMsk</description>
14120 <description>No Status Change Interrupt Mask</description>
14125 <description>Mask for Status Change Interrupt</description>
14132 <description>LineState</description>
14139 <description>Linestate on USB: DM = 0, DP = 0</description>
14144 <description>Linestate on USB: DM = 0, DP = 1</description>
14149 <description>Linestate on USB: DM = 1, DP = 0</description>
14154 <description>Linestate on USB: Not-defined</description>
14161 …description>This bit indicates the status of the signal IDDIG. The application must read this bit …
14168 <description>Host Mode</description>
14173 <description>Device Mode</description>
14180 <description>B Session Valid (BSessVld)</description>
14187 <description>B_Valid is 0</description>
14192 <description>B_Valid is 1</description>
14199 <description>MultValIdBC</description>
14206 <description>OTG device as B-device</description>
14211 <description>OTG device as B-device, can connect</description>
14216 <description>OTG device as B-device, cannot connect</description>
14221 <description>OTG device as A-device</description>
14226 <description>ID_OTG pin is grounded</description>
14231 <description>OTG device as A-device, RID_A=1 and RID_GND=1</description>
14236 <description>ID pull down when ID_OTG is floating</description>
14241 … <description>OTG device as B-device, can connect, RID_C=1 and RID_FLOAT=1</description>
14246 … <description>OTG device as B-device, cannot connect, RID_B=1 and RID_FLOAT=1</description>
14251 <description>OTG device as A-device</description>
14260 <description>Global DFIFO Configuration Register</description>
14268 <description>GDFIFOCfg</description>
14274 … <description>This field provides the start address of the EP info controller.</description>
14282 <description>Interrupt Mask Register 2</description>
14297 <description>Interrupt Register 2</description>
14312 <description>Host Periodic Transmit FIFO Size Register</description>
14320 <description>Host Periodic TxFIFO Start Address (PTxFStAddr)</description>
14326 <description>Host Periodic TxFIFO Depth (PTxFSize)</description>
14336 … <description>Description collection: Device IN Endpoint Transmit FIFO Size Register</description>
14344 … <description>IN Endpoint FIFOn Transmit RAM Start Address (INEPnTxFStAddr)</description>
14350 <description>IN Endpoint TxFIFO Depth (INEPnTxFDep)</description>
14358 <description>Host Configuration Register</description>
14366 <description>FS/LS PHY Clock Select (FSLSPclkSel)</description>
14372 <description>PHY clock is running at 30/60 MHz</description>
14377 <description>PHY clock is running at 48 MHz</description>
14382 <description>PHY clock is running at 6 MHz</description>
14389 <description>FS- and LS-Only Support (FSLSSupp)</description>
14395 … <description>HS/FS/LS, based on the maximum speed supported by the connected device</description>
14400 <description>FS/LS-only, even if the connected device can support HS</description>
14407 <description>Enable 32 KHz Suspend mode (Ena32KHzS)</description>
14413 <description>32 KHz Suspend mode disabled</description>
14418 <description>32 KHz Suspend mode enabled</description>
14425 <description>Resume Validation Period (ResValid)</description>
14431 <description>Mode Change Ready Timer Enable (ModeChTimEn)</description>
14437 …description>The Host core waits for either 200 PHY clock cycles or a linestate of SE0 at the end o…
14442 …<description>The Host core waits only for a linestate of SE0 at the end of resume to change the op…
14451 <description>Host Frame Interval Register</description>
14459 <description>Frame Interval (FrInt)</description>
14465 <description>Reload Control (HFIRRldCtrl)</description>
14471 <description>The HFIR cannot be reloaded dynamically</description>
14476 <description>The HFIR can be dynamically reloaded during runtime</description>
14485 <description>Host Frame Number/Frame Time Remaining Register</description>
14493 <description>Frame Number (FrNum)</description>
14500 <description>No SOF is transmitted</description>
14505 <description>SOF is transmitted</description>
14512 <description>Frame Time Remaining (FrRem)</description>
14521 <description>Host All Channels Interrupt Register</description>
14535 <description>Not active</description>
14540 <description>Host Channel Interrupt</description>
14549 <description>Host All Channels Interrupt Mask Register</description>
14557 <description>Channel Interrupt Mask (HAINTMsk)</description>
14563 <description>Unmask Channel interrupt</description>
14568 <description>Mask Channel interrupt</description>
14577 <description>Host Port Control and Status Register</description>
14585 <description>Port Connect Status (PrtConnSts)</description>
14592 <description>No device is attached to the port</description>
14597 <description>A device is attached to the port</description>
14604 <description>Port Connect Detected (PrtConnDet)</description>
14610 <description>No device connection detected</description>
14615 <description>Device connection detected</description>
14622 <description>Port Enable (PrtEna)</description>
14628 <description>Port disabled</description>
14633 <description>Port enabled</description>
14640 <description>Port Enable/Disable Change (PrtEnChng)</description>
14646 <description>Port Enable bit 2 has not changed</description>
14651 <description>Port Enable bit 2 changed</description>
14658 <description>Port Overcurrent Active (PrtOvrCurrAct)</description>
14665 <description>No overcurrent condition</description>
14670 <description>Overcurrent condition</description>
14677 <description>Port Overcurrent Change (PrtOvrCurrChng)</description>
14683 <description>Status of port overcurrent status is not changed</description>
14688 <description>Status of port overcurrent changed</description>
14695 <description>Port Resume (PrtRes)</description>
14701 <description>No resume driven</description>
14706 <description>Resume driven</description>
14713 <description>Port Suspend (PrtSusp)</description>
14719 <description>Port not in Suspend mode</description>
14724 <description>Port in Suspend mode</description>
14731 <description>Port Reset (PrtRst)</description>
14737 <description>Port not in reset</description>
14742 <description>Port in reset</description>
14749 <description>Port Line Status (PrtLnSts)</description>
14756 <description>Logic level of D+</description>
14761 <description>Logic level of D-</description>
14768 <description>Port Power (PrtPwr)</description>
14774 <description>Power off</description>
14779 <description>Power on</description>
14786 <description>Port Test Control (PrtTstCtl)</description>
14792 <description>Test mode disabled</description>
14797 <description>Test_J mode</description>
14802 <description>Test_K mode</description>
14807 <description>Test_SE0_NAK mode</description>
14812 <description>Test_Packet mode</description>
14817 <description>Test_force_Enable</description>
14824 <description>Port Speed (PrtSpd)</description>
14831 <description>High speed</description>
14836 <description>Full speed</description>
14841 <description>Low speed</description>
14852 <description>Unspecified</description>
14858 <description>Description cluster: Host Channel Characteristics Register</description>
14866 <description>Maximum Packet Size (MPS)</description>
14872 <description>Endpoint Number (EPNum)</description>
14878 <description>End point 0</description>
14883 <description>End point 1</description>
14888 <description>End point 2</description>
14893 <description>End point 3</description>
14898 <description>End point 4</description>
14903 <description>End point 5</description>
14908 <description>End point 6</description>
14913 <description>End point 7</description>
14918 <description>End point 8</description>
14923 <description>End point 9</description>
14928 <description>End point 10</description>
14933 <description>End point 11</description>
14938 <description>End point 12</description>
14943 <description>End point 13</description>
14948 <description>End point 14</description>
14953 <description>End point 15</description>
14960 <description>Endpoint Direction (EPDir)</description>
14966 <description>OUT Direction</description>
14971 <description>IN Direction</description>
14978 <description>Low-Speed Device (LSpdDev)</description>
14984 <description>Not Communicating with low speed device</description>
14989 <description>Communicating with low speed device</description>
14996 <description>Endpoint Type (EPType)</description>
15002 <description>Control</description>
15007 <description>Isochronous</description>
15012 <description>Bulk</description>
15017 <description>Interrupt</description>
15024 <description>Multi Count (MC) / Error Count (EC)</description>
15030 <description>1 transaction</description>
15035 … <description>2 transactions to be issued for this endpoint per microframe</description>
15040 … <description>3 transactions to be issued for this endpoint per microframe</description>
15047 <description>Device Address (DevAddr)</description>
15053 <description>Odd Frame (OddFrm)</description>
15059 <description>Even Frame Transfer</description>
15064 <description>Odd Frame Transfer</description>
15071 <description>Channel Disable (ChDis)</description>
15077 <description>Transmit/Recieve normal</description>
15082 <description>Stop transmitting/receiving data on channel</description>
15089 <description>Channel Enable (ChEna)</description>
15095 …description>If Scatter/Gather mode is enabled, indicates that the descriptor structure is not yet …
15100 …description>If Scatter/Gather mode is enabled, indicates that the descriptor structure and data bu…
15109 <description>Description cluster: Host Channel Interrupt Register</description>
15117 <description>Transfer Completed (XferCompl)</description>
15123 <description>Transfer in progress or No Active Transfer</description>
15128 <description>Transfer completed normally without any errors</description>
15135 <description>Channel Halted (ChHltd)</description>
15141 <description>Channel not halted</description>
15146 <description>Channel Halted</description>
15153 <description>AHB Error (AHBErr)</description>
15159 <description>No AHB error</description>
15164 <description>AHB error during AHB read/write</description>
15171 <description>STALL Response Received Interrupt (STALL)</description>
15177 <description>No Stall Response Received Interrupt</description>
15182 <description>Stall Response Received Interrupt</description>
15189 <description>NAK Response Received Interrupt (NAK)</description>
15195 <description>No NAK Response Received Interrupt</description>
15200 <description>NAK Response Received Interrupt</description>
15207 <description>ACK Response Received/Transmitted Interrupt (ACK)</description>
15213 <description>No ACK Response Received or Transmitted Interrupt</description>
15218 <description>ACK Response Received or Transmitted Interrup</description>
15225 <description>NYET Response Received Interrupt (NYET)</description>
15231 <description>No NYET Response Received Interrupt</description>
15236 <description>NYET Response Received Interrupt</description>
15243 <description>Transaction Error (XactErr)</description>
15249 <description>No Transaction Error</description>
15254 <description>Transaction Error</description>
15261 <description>Babble Error (BblErr)</description>
15267 <description>No Babble Error</description>
15272 <description>Babble Error</description>
15279 <description>Frame Overrun (FrmOvrun).</description>
15285 <description>No Frame Overrun</description>
15290 <description>Frame Overrun</description>
15302 <description>No Data Toggle Error</description>
15307 <description>Data Toggle Error</description>
15316 <description>Description cluster: Host Channel Interrupt Mask Register</description>
15329 <description>Transfer Completed Mask</description>
15334 <description>No Transfer Completed Mask</description>
15346 <description>Channel Halted Mask</description>
15351 <description>No Channel Halted Mask</description>
15363 <description>AHB Error Mask</description>
15368 <description>No AHB Error Mask</description>
15380 <description>Mask STALL Response Received Interrupt</description>
15385 <description>No STALL Response Received Interrupt Mask</description>
15397 <description>Mask NAK Response Received Interrupt</description>
15402 <description>No NAK Response Received Interrupt Mask</description>
15414 <description>Mask ACK Response Received/Transmitted Interrupt</description>
15419 <description>No ACK Response Received/Transmitted Interrupt Mask</description>
15431 <description>Mask NYET Response Received Interrupt</description>
15436 <description>No NYET Response Received Interrupt Mask</description>
15448 <description>Mask Transaction Error</description>
15453 <description>No Transaction Error Mask</description>
15465 <description>Mask Babble Error</description>
15470 <description>No Babble Error Mask</description>
15482 <description>Mask Overrun Mask</description>
15487 <description>No Frame Overrun Mask</description>
15499 <description>Mask Data Toggle Error</description>
15504 <description>No Data Toggle Error Mask</description>
15513 <description>Description cluster: Host Channel Transfer Size Register</description>
15521 <description>Non-Scatter/Gather DMA Mode:</description>
15527 <description>Non-Scatter/Gather DMA Mode:</description>
15533 <description>PID (Pid)</description>
15539 <description>DATA0</description>
15544 <description>DATA2</description>
15549 <description>DATA1</description>
15554 <description>MDATA (non-control)/SETUP (control)</description>
15561 <description>Do Ping (DoPng)</description>
15567 <description>No ping protocol</description>
15572 <description>Ping protocol</description>
15581 <description>Description cluster: Host Channel DMA Address Register</description>
15589 <description>In Buffer DMA Mode:</description>
15598 <description>Device Configuration Register</description>
15606 <description>Device Speed (DevSpd)</description>
15612 <description>High speed USB 2.0 PHY clock is 30 MHz or 60 MHz</description>
15617 <description>Full speed USB 2.0 PHY clock is 30 MHz or 60 MHz</description>
15622 <description>Low speed USB 1.1 transceiver clock is 6 MHz</description>
15627 <description>Full speed USB 1.1 transceiver clock is 48 MHz</description>
15634 <description>Non-Zero-Length Status OUT Handshake (NZStsOUTHShk)</description>
15640 …description>Send the received OUT packet to the application (zero-length or non-zero length) and s…
15645 …<description>Send a STALL handshake on a nonzero-length status OUT transaction and do not send the…
15652 <description>Enable 32 KHz Suspend mode (Ena32KHzSusp)</description>
15658 <description>USB 1.1 Full-Speed Serial Transceiver not selected</description>
15663 … <description>USB 1.1 Full-Speed Serial Transceiver Interface selected</description>
15670 <description>Device Address (DevAddr)</description>
15676 <description>Periodic Frame Interval (PerFrInt)</description>
15682 <description>80 percent of the (micro)Frame interval</description>
15687 <description>85 percent of the (micro)Frame interval</description>
15692 <description>90 percent of the (micro)Frame interval</description>
15697 <description>95 percent of the (micro)Frame interval</description>
15704 <description>XCVRDLY</description>
15710 … <description>No delay between xcvr_sel and txvalid during Device chirp</description>
15715 … <description>Enable delay between xcvr_sel and txvalid during Device chirp</description>
15722 <description>Erratic Error Interrupt Mask</description>
15728 <description>Early suspend interrupt is generated on erratic error</description>
15733 <description>Mask early suspend interrupt on erratic error</description>
15740 <description>Worst-Case Inter-Packet Gap ISOC OUT Support (ipgisocSupt)</description>
15746 … <description>Worst-Case Inter-Packet Gap ISOC OUT Support is disabled</description>
15751 <description>Worst-Case Inter-Packet Gap ISOC OUT Support is enabled</description>
15758 <description>Periodic Scheduling Interval (PerSchIntvl)</description>
15764 <description>25 percent of (micro)Frame</description>
15769 <description>50 percent of (micro)Frame</description>
15774 <description>75 percent of (micro)Frame</description>
15781 <description>Resume Validation Period (ResValid)</description>
15789 <description>Device Control Register</description>
15797 <description>Remote Wakeup Signaling (RmtWkUpSig)</description>
15803 <description>Core does not send Remote Wakeup Signaling</description>
15808 <description>Core sends Remote Wakeup Signaling</description>
15815 <description>Soft Disconnect (SftDiscon)</description>
15821 …<description>The core drives the phy_opmode_o signal on the UTMI+ to 2'b00, which generates a devi…
15826 …<description>The core drives the phy_opmode_o signal on the UTMI+ to 2'b01, which generates a devi…
15833 <description>Global Non-periodic IN NAK Status (GNPINNakSts)</description>
15840 …<description>A handshake is sent out based on the data availability in the transmit FIFO</descript…
15845 …<description>A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the dat…
15852 <description>Global OUT NAK Status (GOUTNakSts)</description>
15859 …<description>A handshake is sent based on the FIFO Status and the NAK and STALL bit settings.</des…
15864 …description>No data is written to the RxFIFO, irrespective of space availability. Sends a NAK hand…
15871 <description>Test Control (TstCtl)</description>
15877 <description>Test mode disabled</description>
15882 <description>Test_J mode</description>
15887 <description>Test_K mode</description>
15892 <description>Test_SE0_NAK mode</description>
15897 <description>Test_Packet mode</description>
15902 <description>Test_force_Enable</description>
15909 <description>Set Global Non-periodic IN NAK (SGNPInNak)</description>
15916 <description>Disable Global Non-periodic IN NAK</description>
15921 <description>Set Global Non-periodic IN NAK</description>
15928 <description>Clear Global Non-periodic IN NAK (CGNPInNak)</description>
15935 <description>Disable Global Non-periodic IN NAK</description>
15940 <description>Clear Global Non-periodic IN NAK</description>
15947 <description>Set Global OUT NAK (SGOUTNak)</description>
15954 <description>Disable Global OUT NAK</description>
15959 <description>Set Global OUT NAK</description>
15966 <description>Clear Global OUT NAK (CGOUTNak)</description>
15973 <description>Disable Clear Global OUT NAK</description>
15978 <description>Clear Global OUT NAK</description>
15985 <description>Power-On Programming Done (PWROnPrgDone)</description>
15991 <description>Power-On Programming not done</description>
15996 <description>Power-On Programming Done</description>
16003 … <description>Ignore Frame Number Feature for Isochronous Endpoints (IgnrFrmNum)</description>
16009 …description>Scatter/Gather DMA Mode: The core transmits the packets only in the frame number in wh…
16014 …description>Scatter/Gather DMA Mode: The core ignores the frame number, sending packets immediatel…
16021 <description>NAK on Babble Error (NakOnBble)</description>
16027 <description>Disable NAK on Babble Error</description>
16032 <description>NAK on Babble Error</description>
16039 <description>DeepSleepBESLReject</description>
16045 <description>Deep Sleep BESL Reject feature is disabled</description>
16050 <description>Deep Sleep BESL Reject feature is enabled</description>
16057 … <description>Service Interval based scheduling for Isochronous IN Endpoints</description>
16063 … <description>The controller behavior depends on DCTL.IgnrFrmNum field.</description>
16068 …<description>Scatter/Gather DMA Mode: The controller can transmit the packets in any frame of the …
16075 … <description>Disable the correction to OpMode/XcvrSel/TermSel on UTMI Interface.</description>
16081 …<description>Opmode, XcvrSel, TermSel are changed by the Device Controller after TxValid goes LOW …
16086 …<description>Opmode, XcvrSel, TermSel are changed by the Device Controller immediately on soft dis…
16093 <description>Disable the correction of TermSel on UTMI Interface.</description>
16099 …<description>Valid Combination of XcvrSel and TermSel is driven by the Device Controller.</descrip…
16104 …<description>Invalid Combination of XcvrSel and TermSel is driven by the Device Controller.</descr…
16113 <description>Device Status Register</description>
16121 <description>Suspend Status (SuspSts)</description>
16128 <description>No suspend state</description>
16133 <description>Suspend state</description>
16140 <description>Enumerated Speed (EnumSpd)</description>
16147 <description>High speed (PHY clock is running at 30 or 60 MHz)</description>
16152 <description>Full speed (PHY clock is running at 30 or 60 MHz)</description>
16157 <description>Low speed (PHY clock is running at 6 MHz)</description>
16162 <description>Full speed (PHY clock is running at 48 MHz)</description>
16169 <description>Erratic Error (ErrticErr)</description>
16176 <description>No Erratic Error</description>
16181 <description>Erratic Error</description>
16188 <description>Frame or Microframe Number of the Received SOF (SOFFN)</description>
16195 <description>Device Line Status (DevLnSts)</description>
16204 <description>Device IN Endpoint Common Interrupt Mask Register</description>
16212 <description>Transfer Completed Interrupt Mask (XferComplMsk)</description>
16218 <description>Mask Transfer Completed Interrupt</description>
16223 <description>No Transfer Completed Interrupt Mask</description>
16230 <description>Endpoint Disabled Interrupt Mask (EPDisbldMsk)</description>
16236 <description>Mask Endpoint Disabled Interrupt</description>
16241 <description>No Endpoint Disabled Interrupt Mask</description>
16248 <description>AHB Error Mask (AHBErrMsk)</description>
16254 <description>Mask AHB Error Interrupt</description>
16259 <description>No AHB Error Interrupt Mask</description>
16266 … <description>Timeout Condition Mask (TimeOUTMsk) (Non-isochronous endpoints)</description>
16272 <description>Mask Timeout Condition Interrupt</description>
16277 <description>No Timeout Condition Interrupt Mask</description>
16284 <description>IN Token Received When TxFIFO Empty Mask (INTknTXFEmpMsk)</description>
16290 <description>Mask IN Token Received When TxFIFO Empty Interrupt</description>
16295 <description>No IN Token Received When TxFIFO Empty Interrupt</description>
16302 <description>IN Token received with EP Mismatch Mask (INTknEPMisMsk)</description>
16308 <description>Mask IN Token received with EP Mismatch Interrupt</description>
16313 <description>No Mask IN Token received with EP Mismatch Interrupt</description>
16320 <description>IN Endpoint NAK Effective Mask (INEPNakEffMsk)</description>
16326 <description>Mask IN Endpoint NAK Effective Interrupt</description>
16331 <description>No IN Endpoint NAK Effective Interrupt Mask</description>
16338 <description>Fifo Underrun Mask (TxfifoUndrnMsk)</description>
16344 <description>Mask Fifo Underrun Interrupt</description>
16349 <description>No Fifo Underrun Interrupt Mask</description>
16356 <description>NAK interrupt Mask (NAKMsk)</description>
16362 <description>Mask NAK Interrupt</description>
16367 <description>No Mask NAK Interrupt</description>
16376 <description>Device OUT Endpoint Common Interrupt Mask Register</description>
16384 <description>Transfer Completed Interrupt Mask (XferComplMsk)</description>
16390 <description>Mask Transfer Completed Interrupt</description>
16395 <description>No Transfer Completed Interrupt Mask</description>
16402 <description>Endpoint Disabled Interrupt Mask (EPDisbldMsk)</description>
16408 <description>Mask Endpoint Disabled Interrupt</description>
16413 <description>No Endpoint Disabled Interrupt Mask</description>
16420 <description>AHB Error (AHBErrMsk)</description>
16426 <description>Mask AHB Error Interrupt</description>
16431 <description>No AHB Error Interrupt Mask</description>
16438 <description>SETUP Phase Done Mask (SetUPMsk)</description>
16444 <description>Mask SETUP Phase Done Interrupt</description>
16449 <description>No SETUP Phase Done Interrupt Mask</description>
16456 … <description>OUT Token Received when Endpoint Disabled Mask (OUTTknEPdisMsk)</description>
16462 … <description>Mask OUT Token Received when Endpoint Disabled Interrupt</description>
16467 … <description>No OUT Token Received when Endpoint Disabled Interrupt Mask</description>
16474 <description>Status Phase Received Mask (StsPhseRcvdMsk)</description>
16480 <description>Status Phase Received Mask</description>
16485 <description>No Status Phase Received Mask</description>
16492 <description>Back-to-Back SETUP Packets Received Mask (Back2BackSETup)</description>
16498 <description>Mask Back-to-Back SETUP Packets Received Interrupt</description>
16503 <description>No Back-to-Back SETUP Packets Received Interrupt Mask</description>
16510 <description>OUT Packet Error Mask (OutPktErrMsk)</description>
16516 <description>Mask OUT Packet Error Interrupt</description>
16521 <description>No OUT Packet Error Interrupt Mask</description>
16528 <description>Babble Error interrupt Mask (BbleErrMsk)</description>
16534 <description>Mask Babble Error Interrupt</description>
16539 <description>No Babble Error Interrupt Mask</description>
16546 <description>NAK interrupt Mask (NAKMsk)</description>
16552 <description>Mask NAK Interrupt</description>
16557 <description>No NAK Interrupt Mask</description>
16564 <description>NYET interrupt Mask (NYETMsk)</description>
16570 <description>Mask NYET Interrupt</description>
16575 <description>No NYET Interrupt Mask</description>
16584 <description>Device All Endpoints Interrupt Register</description>
16592 <description>IN Endpoint 0 Interrupt Bit</description>
16599 <description>No Interrupt</description>
16604 <description>Interrupt is active for IN EP0</description>
16611 <description>IN Endpoint 1 Interrupt Bit</description>
16618 <description>No Interrupt</description>
16623 <description>Interrupt is active for the IN EP</description>
16630 <description>IN Endpoint 2 Interrupt Bit</description>
16637 <description>No Interrupt</description>
16642 <description>Interrupt is active for the IN EP</description>
16649 <description>IN Endpoint 3 Interrupt Bit</description>
16656 <description>No Interrupt</description>
16661 <description>Interrupt is active for the IN EP</description>
16668 <description>IN Endpoint 4 Interrupt Bit</description>
16675 <description>No Interrupt</description>
16680 <description>Interrupt is active for the IN EP</description>
16687 <description>IN Endpoint 5 Interrupt Bit</description>
16694 <description>No Interrupt</description>
16699 <description>Interrupt is active for the IN EP</description>
16706 <description>IN Endpoint 6 Interrupt Bit</description>
16713 <description>No Interrupt</description>
16718 <description>Interrupt is active for the IN EP</description>
16725 <description>IN Endpoint 7 Interrupt Bit</description>
16732 <description>No Interrupt</description>
16737 <description>Interrupt is active for the IN EP</description>
16744 <description>IN Endpoint 8 Interrupt Bit</description>
16751 <description>No Interrupt</description>
16756 <description>Interrupt is active for the IN EP</description>
16763 <description>IN Endpoint 9 Interrupt Bit</description>
16770 <description>No Interrupt</description>
16775 <description>Interrupt is active for the IN EP</description>
16782 <description>IN Endpoint 10 Interrupt Bit</description>
16789 <description>No Interrupt</description>
16794 <description>Interrupt is active for the IN EP</description>
16801 <description>IN Endpoint 11 Interrupt Bit</description>
16808 <description>No Interrupt</description>
16813 <description>Interrupt is active for the IN EP</description>
16820 <description>OUT Endpoint 0 Interrupt Bit</description>
16827 <description>No Interrupt</description>
16832 <description>Interrupt is active for OUT EP0</description>
16839 <description>OUT Endpoint 1 Interrupt Bit</description>
16846 <description>No Interrupt</description>
16851 <description>Interrupt is active for the OUT EP</description>
16858 <description>OUT Endpoint 2 Interrupt Bit</description>
16865 <description>No Interrupt</description>
16870 <description>Interrupt is active for the OUT EP</description>
16877 <description>OUT Endpoint 3 Interrupt Bit</description>
16884 <description>No Interrupt</description>
16889 <description>Interrupt is active for the OUT EP</description>
16896 <description>OUT Endpoint 4 Interrupt Bit</description>
16903 <description>No Interrupt</description>
16908 <description>Interrupt is active for the OUT EP</description>
16915 <description>OUT Endpoint 5 Interrupt Bit</description>
16922 <description>No Interrupt</description>
16927 <description>Interrupt is active for the OUT EP</description>
16934 <description>OUT Endpoint 12 Interrupt Bit</description>
16941 <description>No Interrupt</description>
16946 <description>Interrupt is active for the OUT EP</description>
16953 <description>OUT Endpoint 13 Interrupt Bit</description>
16960 <description>No Interrupt</description>
16965 <description>Interrupt is active for the OUT EP</description>
16972 <description>OUT Endpoint 14 Interrupt Bit</description>
16979 <description>No Interrupt</description>
16984 <description>Interrupt is active for the OUT EP</description>
16991 <description>OUT Endpoint 15 Interrupt Bit</description>
16998 <description>No Interrupt</description>
17003 <description>Interrupt is active for the OUT EP</description>
17012 <description>Device All Endpoints Interrupt Mask Register</description>
17020 <description>IN Endpoint 0 Interrupt mask Bit</description>
17026 <description>Mask IN Endpoint 0 Interrupt</description>
17031 <description>No Interrupt mask</description>
17038 <description>IN Endpoint 1 Interrupt mask Bit</description>
17044 <description>Mask IN Endpoint Interrupt</description>
17049 <description>No Interrupt mask</description>
17056 <description>IN Endpoint 2 Interrupt mask Bit</description>
17062 <description>Mask IN Endpoint Interrupt</description>
17067 <description>No Interrupt mask</description>
17074 <description>IN Endpoint 3 Interrupt mask Bit</description>
17080 <description>Mask IN Endpoint Interrupt</description>
17085 <description>No Interrupt mask</description>
17092 <description>IN Endpoint 4 Interrupt mask Bit</description>
17098 <description>Mask IN Endpoint Interrupt</description>
17103 <description>No Interrupt mask</description>
17110 <description>IN Endpoint 5 Interrupt mask Bit</description>
17116 <description>Mask IN Endpoint Interrupt</description>
17121 <description>No Interrupt mask</description>
17128 <description>IN Endpoint 6 Interrupt mask Bit</description>
17134 <description>Mask IN Endpoint Interrupt</description>
17139 <description>No Interrupt mask</description>
17146 <description>IN Endpoint 7 Interrupt mask Bit</description>
17152 <description>Mask IN Endpoint Interrupt</description>
17157 <description>No Interrupt mask</description>
17164 <description>IN Endpoint 8 Interrupt mask Bit</description>
17170 <description>Mask IN Endpoint Interrupt</description>
17175 <description>No Interrupt mask</description>
17182 <description>IN Endpoint 9 Interrupt mask Bit</description>
17188 <description>Mask IN Endpoint Interrupt</description>
17193 <description>No Interrupt mask</description>
17200 <description>IN Endpoint 10 Interrupt mask Bit</description>
17206 <description>Mask IN Endpoint Interrupt</description>
17211 <description>No Interrupt mask</description>
17218 <description>IN Endpoint 11 Interrupt mask Bit</description>
17224 <description>Mask IN Endpoint Interrupt</description>
17229 <description>No Interrupt mask</description>
17236 <description>OUT Endpoint 0 Interrupt mask Bit</description>
17242 <description>Mask OUT Endpoint 0 Interrupt</description>
17247 <description>No Interrupt mask</description>
17254 <description>OUT Endpoint 1 Interrupt mask Bit</description>
17260 <description>Mask OUT Endpoint Interrupt</description>
17265 <description>No Interrupt mask</description>
17272 <description>OUT Endpoint 2 Interrupt mask Bit</description>
17278 <description>Mask OUT Endpoint Interrupt</description>
17283 <description>No Interrupt mask</description>
17290 <description>OUT Endpoint 3 Interrupt mask Bit</description>
17296 <description>Mask OUT Endpoint Interrupt</description>
17301 <description>No Interrupt mask</description>
17308 <description>OUT Endpoint 4 Interrupt mask Bit</description>
17314 <description>Mask OUT Endpoint Interrupt</description>
17319 <description>No Interrupt mask</description>
17326 <description>OUT Endpoint 5 Interrupt mask Bit</description>
17332 <description>Mask OUT Endpoint Interrupt</description>
17337 <description>No Interrupt mask</description>
17344 <description>OUT Endpoint 12 Interrupt mask Bit</description>
17350 <description>Mask OUT Endpoint Interrupt</description>
17355 <description>No Interrupt mask</description>
17362 <description>OUT Endpoint 13 Interrupt mask Bit</description>
17368 <description>Mask OUT Endpoint Interrupt</description>
17373 <description>No Interrupt mask</description>
17380 <description>OUT Endpoint 14 Interrupt mask Bit</description>
17386 <description>Mask OUT Endpoint Interrupt</description>
17391 <description>No Interrupt mask</description>
17398 <description>OUT Endpoint 15 Interrupt mask Bit</description>
17404 <description>Mask OUT Endpoint Interrupt</description>
17409 <description>No Interrupt mask</description>
17418 <description>Device VBUS Discharge Time Register</description>
17426 <description>Device VBUS Discharge Time (DVBUSDis)</description>
17434 <description>Device VBUS Pulsing Time Register</description>
17442 <description>Device VBUS Pulsing Time (DVBUSPulse)</description>
17450 <description>Device Threshold Control Register</description>
17458 <description>Non-ISO IN Endpoints Threshold Enable. (NonISOThrEn)</description>
17464 <description>No thresholding</description>
17469 <description>Enable thresholding for non-isochronous IN endpoints</description>
17481 <description>No thresholding</description>
17486 <description>Enables thresholding for isochronous IN endpoints</description>
17493 <description>Transmit Threshold Length (TxThrLen)</description>
17499 <description>AHB Threshold Ratio (AHBThrRatio)</description>
17505 <description>AHB threshold = MAC threshold</description>
17510 <description>AHB threshold = MAC threshold /2</description>
17515 <description>AHB threshold = MAC threshold /4</description>
17520 <description>AHB threshold = MAC threshold /8</description>
17527 <description>Receive Threshold Enable (RxThrEn)</description>
17533 <description>Disable thresholding</description>
17538 <description>Enable thresholding in the receive direction</description>
17545 <description>Receive Threshold Length (RxThrLen)</description>
17551 <description>Arbiter Parking Enable (ArbPrkEn)</description>
17557 <description>Disable DMA arbiter parking</description>
17562 <description>Enable DMA arbiter parking for IN endpoints</description>
17571 <description>Device IN Endpoint FIFO Empty Interrupt Mask Register</description>
17579 <description>IN EP Tx FIFO Empty Interrupt Mask Bits (InEpTxfEmpMsk)</description>
17585 <description>Mask IN EP0 Tx FIFO Empty Interrupt</description>
17590 <description>Mask IN EP1 Tx FIFO Empty Interrupt</description>
17595 <description>Mask IN EP2 Tx FIFO Empty Interrupt</description>
17600 <description>Mask IN EP3 Tx FIFO Empty Interrupt</description>
17605 <description>Mask IN EP4 Tx FIFO Empty Interrupt</description>
17610 <description>Mask IN EP5 Tx FIFO Empty Interrupt</description>
17615 <description>Mask IN EP6 Tx FIFO Empty Interrupt</description>
17620 <description>Mask IN EP7 Tx FIFO Empty Interrupt</description>
17625 <description>Mask IN EP8 Tx FIFO Empty Interrupt</description>
17630 <description>Mask IN EP9 Tx FIFO Empty Interrupt</description>
17635 <description>Mask IN EP10 Tx FIFO Empty Interrupt</description>
17640 <description>Mask IN EP11 Tx FIFO Empty Interrupt</description>
17645 <description>Mask IN EP12 Tx FIFO Empty Interrupt</description>
17650 <description>Mask IN EP13 Tx FIFO Empty Interrupt</description>
17655 <description>Mask IN EP14 Tx FIFO Empty Interrupt</description>
17660 <description>Mask IN EP15 Tx FIFO Empty Interrupt</description>
17669 <description>Device Control IN Endpoint 0 Control Register</description>
17677 <description>Maximum Packet Size (MPS)</description>
17683 <description>64 bytes</description>
17688 <description>32 bytes</description>
17693 <description>16 bytes</description>
17698 <description>8 bytes</description>
17705 <description>USB Active Endpoint (USBActEP)</description>
17712 <description>Control endpoint is always active</description>
17719 <description>NAK Status (NAKSts)</description>
17726 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
17731 … <description>The core is transmitting NAK handshakes on this endpoint</description>
17738 <description>Endpoint Type (EPType)</description>
17745 <description>Endpoint Control 0</description>
17752 <description>STALL Handshake (Stall)</description>
17758 <description>No Stall</description>
17763 <description>Stall Handshake</description>
17770 <description>TxFIFO Number (TxFNum)</description>
17776 <description>Tx FIFO 0</description>
17781 <description>Tx FIFO 1</description>
17786 <description>Tx FIFO 2</description>
17791 <description>Tx FIFO 3</description>
17796 <description>Tx FIFO 4</description>
17801 <description>Tx FIFO 5</description>
17806 <description>Tx FIFO 6</description>
17811 <description>Tx FIFO 7</description>
17816 <description>Tx FIFO 8</description>
17821 <description>Tx FIFO 9</description>
17826 <description>Tx FIFO 10</description>
17831 <description>Tx FIFO 11</description>
17836 <description>Tx FIFO 12</description>
17841 <description>Tx FIFO 13</description>
17846 <description>Tx FIFO 14</description>
17851 <description>Tx FIFO 15</description>
17864 <description>No action</description>
17869 <description>Clear NAK</description>
17882 <description>No action</description>
17887 <description>Set NAK</description>
17894 <description>Endpoint Disable (EPDis)</description>
17900 <description>No action</description>
17905 <description>Disabled Endpoint</description>
17912 <description>Endpoint Enable (EPEna)</description>
17918 <description>No action</description>
17923 <description>Enable Endpoint</description>
17932 <description>Device IN Endpoint 0 Interrupt Register</description>
17940 <description>Transfer Completed Interrupt (XferCompl)</description>
17946 <description>No Transfer Complete Interrupt</description>
17951 <description>Transfer Completed Interrupt</description>
17958 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
17964 <description>No Endpoint Disabled Interrupt</description>
17969 <description>Endpoint Disabled Interrupt</description>
17976 <description>AHB Error (AHBErr)</description>
17982 <description>No AHB Error Interrupt</description>
17987 <description>AHB Error interrupt</description>
17994 <description>Timeout Condition (TimeOUT)</description>
18000 <description>No Timeout interrupt</description>
18005 <description>Timeout interrupt</description>
18012 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
18018 <description>No IN Token Received when TxFIFO Empty interrupt</description>
18023 <description>IN Token Received when TxFIFO Empty Interrupt</description>
18030 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
18036 <description>No IN Token Received with EP Mismatch interrupt</description>
18041 <description>IN Token Received with EP Mismatch interrupt</description>
18048 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
18054 <description>No IN Endpoint NAK Effective interrupt</description>
18059 <description>IN Endpoint NAK Effective interrupt</description>
18066 <description>Transmit FIFO Empty (TxFEmp)</description>
18073 <description>No Transmit FIFO Empty interrupt</description>
18078 <description>Transmit FIFO Empty interrupt</description>
18085 <description>Fifo Underrun (TxfifoUndrn)</description>
18091 <description>No Fifo Underrun interrupt</description>
18096 <description>Fifo Underrun interrupt</description>
18103 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
18109 <description>No BNA interrupt</description>
18114 <description>BNA interrupt</description>
18121 <description>Packet Drop Status (PktDrpSts)</description>
18127 <description>No interrupt</description>
18132 <description>Packet Drop Status</description>
18139 <description>NAK Interrupt (BbleErr)</description>
18145 <description>No interrupt</description>
18150 <description>BbleErr interrupt</description>
18157 <description>NAK Interrupt (NAKInterrupt)</description>
18163 <description>No interrupt</description>
18168 <description>NAK Interrupt</description>
18175 <description>NYET Interrupt (NYETIntrpt)</description>
18181 <description>No interrupt</description>
18186 <description>NYET Interrupt</description>
18195 <description>Device IN Endpoint 0 Transfer Size Register</description>
18203 <description>Transfer Size (XferSize)</description>
18209 <description>Packet Count (PktCnt)</description>
18217 <description>Device IN Endpoint 0 DMA Address Register</description>
18225 <description>DMAAddr</description>
18233 <description>Device IN Endpoint Transmit FIFO Status Register 0</description>
18241 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
18250 <description>Device Control IN Endpoint Control Register</description>
18258 <description>Maximum Packet Size (MPS)</description>
18264 <description>USB Active Endpoint (USBActEP)</description>
18270 <description>Not Active</description>
18275 <description>USB Active Endpoint</description>
18288 <description>DATA0 or Even Frame</description>
18293 <description>DATA1 or Odd Frame</description>
18300 <description>NAK Status (NAKSts)</description>
18307 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
18312 … <description>The core is transmitting NAK handshakes on this endpoint</description>
18319 <description>Endpoint Type (EPType)</description>
18325 <description>Control</description>
18330 <description>Isochronous</description>
18335 <description>Bulk</description>
18340 <description>Interrupt</description>
18347 <description>STALL Handshake (Stall)</description>
18353 <description>STALL All non-active tokens</description>
18358 <description>STALL All Active Tokens</description>
18365 <description>TxFIFO Number (TxFNum)</description>
18371 <description>Tx FIFO 0</description>
18376 <description>Tx FIFO 1</description>
18381 <description>Tx FIFO 2</description>
18386 <description>Tx FIFO 3</description>
18391 <description>Tx FIFO 4</description>
18396 <description>Tx FIFO 5</description>
18401 <description>Tx FIFO 6</description>
18406 <description>Tx FIFO 7</description>
18411 <description>Tx FIFO 8</description>
18416 <description>Tx FIFO 9</description>
18421 <description>Tx FIFO 10</description>
18426 <description>Tx FIFO 11</description>
18431 <description>Tx FIFO 12</description>
18436 <description>Tx FIFO 13</description>
18441 <description>Tx FIFO 14</description>
18446 <description>Tx FIFO 15</description>
18453 <description>Clear NAK (CNAK)</description>
18460 <description>No Clear NAK</description>
18465 <description>Clear NAK</description>
18472 <description>Set NAK (SNAK)</description>
18479 <description>No Set NAK</description>
18484 <description>Set NAK</description>
18491 <description>Set DATA0 PID (SetD0PID)</description>
18498 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
18503 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
18510 <description>Set DATA1 PID (SetD1PID)</description>
18517 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
18522 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
18529 <description>Endpoint Disable (EPDis)</description>
18535 <description>No Action</description>
18540 <description>Disable Endpoint</description>
18547 <description>Endpoint Enable (EPEna)</description>
18553 <description>No Action</description>
18558 <description>Enable Endpoint</description>
18567 <description>Device IN Endpoint Interrupt Register</description>
18575 <description>Transfer Completed Interrupt (XferCompl)</description>
18581 <description>No Transfer Complete Interrupt</description>
18586 <description>Transfer Complete Interrupt</description>
18593 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
18599 <description>No Endpoint Disabled Interrupt</description>
18604 <description>Endpoint Disabled Interrupt</description>
18611 <description>AHB Error (AHBErr)</description>
18617 <description>No AHB Error Interrupt</description>
18622 <description>AHB Error interrupt</description>
18629 <description>Timeout Condition (TimeOUT)</description>
18635 <description>No Timeout interrupt</description>
18640 <description>Timeout interrupt</description>
18647 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
18653 <description>No IN Token Received interrupt</description>
18658 <description>IN Token Received Interrupt</description>
18665 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
18671 <description>No IN Token Received with EP Mismatch interrupt</description>
18676 <description>IN Token Received with EP Mismatch interrupt</description>
18683 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
18689 <description>No Endpoint NAK Effective interrupt</description>
18694 <description>IN Endpoint NAK Effective interrupt</description>
18701 <description>Transmit FIFO Empty (TxFEmp)</description>
18708 <description>No Transmit FIFO Empty interrupt</description>
18713 <description>Transmit FIFO Empty interrupt</description>
18720 <description>Fifo Underrun (TxfifoUndrn)</description>
18726 <description>No Tx FIFO Underrun interrupt</description>
18731 <description>TxFIFO Underrun interrupt</description>
18738 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
18744 <description>No BNA interrupt</description>
18749 <description>BNA interrupt</description>
18756 <description>Packet Drop Status (PktDrpSts)</description>
18762 <description>No interrupt</description>
18767 <description>Packet Drop Status interrupt</description>
18774 <description>NAK Interrupt (BbleErr)</description>
18780 <description>No interrupt</description>
18785 <description>BbleErr interrupt</description>
18792 <description>NAK Interrupt (NAKInterrupt)</description>
18798 <description>No NAK interrupt</description>
18803 <description>NAK Interrupt</description>
18810 <description>NYET Interrupt (NYETIntrpt)</description>
18816 <description>No NYET interrupt</description>
18821 <description>NYET Interrupt</description>
18830 <description>Device IN Endpoint Transfer Size Register</description>
18838 <description>Transfer Size (XferSize)</description>
18844 <description>Packet Count (PktCnt)</description>
18850 <description>MC</description>
18856 <description>1 packet</description>
18861 <description>2 packets</description>
18866 <description>3 packets</description>
18875 <description>Device IN Endpoint DMA Address Register</description>
18883 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
18891 <description>Device IN Endpoint Transmit FIFO Status Register</description>
18899 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
18908 <description>Device Control IN Endpoint Control Register</description>
18916 <description>Maximum Packet Size (MPS)</description>
18922 <description>USB Active Endpoint (USBActEP)</description>
18928 <description>Not Active</description>
18933 <description>USB Active Endpoint</description>
18946 <description>DATA0 or Even Frame</description>
18951 <description>DATA1 or Odd Frame</description>
18958 <description>NAK Status (NAKSts)</description>
18965 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
18970 … <description>The core is transmitting NAK handshakes on this endpoint</description>
18977 <description>Endpoint Type (EPType)</description>
18983 <description>Control</description>
18988 <description>Isochronous</description>
18993 <description>Bulk</description>
18998 <description>Interrupt</description>
19005 <description>STALL Handshake (Stall)</description>
19011 <description>STALL All non-active tokens</description>
19016 <description>STALL All Active Tokens</description>
19023 <description>TxFIFO Number (TxFNum)</description>
19029 <description>Tx FIFO 0</description>
19034 <description>Tx FIFO 1</description>
19039 <description>Tx FIFO 2</description>
19044 <description>Tx FIFO 3</description>
19049 <description>Tx FIFO 4</description>
19054 <description>Tx FIFO 5</description>
19059 <description>Tx FIFO 6</description>
19064 <description>Tx FIFO 7</description>
19069 <description>Tx FIFO 8</description>
19074 <description>Tx FIFO 9</description>
19079 <description>Tx FIFO 10</description>
19084 <description>Tx FIFO 11</description>
19089 <description>Tx FIFO 12</description>
19094 <description>Tx FIFO 13</description>
19099 <description>Tx FIFO 14</description>
19104 <description>Tx FIFO 15</description>
19111 <description>Clear NAK (CNAK)</description>
19118 <description>No Clear NAK</description>
19123 <description>Clear NAK</description>
19130 <description>Set NAK (SNAK)</description>
19137 <description>No Set NAK</description>
19142 <description>Set NAK</description>
19149 <description>Set DATA0 PID (SetD0PID)</description>
19156 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
19161 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
19168 <description>Set DATA1 PID (SetD1PID)</description>
19175 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
19180 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
19187 <description>Endpoint Disable (EPDis)</description>
19193 <description>No Action</description>
19198 <description>Disable Endpoint</description>
19205 <description>Endpoint Enable (EPEna)</description>
19211 <description>No Action</description>
19216 <description>Enable Endpoint</description>
19225 <description>Device IN Endpoint Interrupt Register</description>
19233 <description>Transfer Completed Interrupt (XferCompl)</description>
19239 <description>No Transfer Complete Interrupt</description>
19244 <description>Transfer Complete Interrupt</description>
19251 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
19257 <description>No Endpoint Disabled Interrupt</description>
19262 <description>Endpoint Disabled Interrupt</description>
19269 <description>AHB Error (AHBErr)</description>
19275 <description>No AHB Error Interrupt</description>
19280 <description>AHB Error interrupt</description>
19287 <description>Timeout Condition (TimeOUT)</description>
19293 <description>No Timeout interrupt</description>
19298 <description>Timeout interrupt</description>
19305 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
19311 <description>No IN Token Received interrupt</description>
19316 <description>IN Token Received Interrupt</description>
19323 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
19329 <description>No IN Token Received with EP Mismatch interrupt</description>
19334 <description>IN Token Received with EP Mismatch interrupt</description>
19341 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
19347 <description>No Endpoint NAK Effective interrupt</description>
19352 <description>IN Endpoint NAK Effective interrupt</description>
19359 <description>Transmit FIFO Empty (TxFEmp)</description>
19366 <description>No Transmit FIFO Empty interrupt</description>
19371 <description>Transmit FIFO Empty interrupt</description>
19378 <description>Fifo Underrun (TxfifoUndrn)</description>
19384 <description>No Tx FIFO Underrun interrupt</description>
19389 <description>TxFIFO Underrun interrupt</description>
19396 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
19402 <description>No BNA interrupt</description>
19407 <description>BNA interrupt</description>
19414 <description>Packet Drop Status (PktDrpSts)</description>
19420 <description>No interrupt</description>
19425 <description>Packet Drop Status interrupt</description>
19432 <description>NAK Interrupt (BbleErr)</description>
19438 <description>No interrupt</description>
19443 <description>BbleErr interrupt</description>
19450 <description>NAK Interrupt (NAKInterrupt)</description>
19456 <description>No NAK interrupt</description>
19461 <description>NAK Interrupt</description>
19468 <description>NYET Interrupt (NYETIntrpt)</description>
19474 <description>No NYET interrupt</description>
19479 <description>NYET Interrupt</description>
19488 <description>Device IN Endpoint Transfer Size Register</description>
19496 <description>Transfer Size (XferSize)</description>
19502 <description>Packet Count (PktCnt)</description>
19508 <description>MC</description>
19514 <description>1 packet</description>
19519 <description>2 packets</description>
19524 <description>3 packets</description>
19533 <description>Device IN Endpoint DMA Address Register</description>
19541 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
19549 <description>Device IN Endpoint Transmit FIFO Status Register</description>
19557 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
19566 <description>Device Control IN Endpoint Control Register</description>
19574 <description>Maximum Packet Size (MPS)</description>
19580 <description>USB Active Endpoint (USBActEP)</description>
19586 <description>Not Active</description>
19591 <description>USB Active Endpoint</description>
19604 <description>DATA0 or Even Frame</description>
19609 <description>DATA1 or Odd Frame</description>
19616 <description>NAK Status (NAKSts)</description>
19623 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
19628 … <description>The core is transmitting NAK handshakes on this endpoint</description>
19635 <description>Endpoint Type (EPType)</description>
19641 <description>Control</description>
19646 <description>Isochronous</description>
19651 <description>Bulk</description>
19656 <description>Interrupt</description>
19663 <description>STALL Handshake (Stall)</description>
19669 <description>STALL All non-active tokens</description>
19674 <description>STALL All Active Tokens</description>
19681 <description>TxFIFO Number (TxFNum)</description>
19687 <description>Tx FIFO 0</description>
19692 <description>Tx FIFO 1</description>
19697 <description>Tx FIFO 2</description>
19702 <description>Tx FIFO 3</description>
19707 <description>Tx FIFO 4</description>
19712 <description>Tx FIFO 5</description>
19717 <description>Tx FIFO 6</description>
19722 <description>Tx FIFO 7</description>
19727 <description>Tx FIFO 8</description>
19732 <description>Tx FIFO 9</description>
19737 <description>Tx FIFO 10</description>
19742 <description>Tx FIFO 11</description>
19747 <description>Tx FIFO 12</description>
19752 <description>Tx FIFO 13</description>
19757 <description>Tx FIFO 14</description>
19762 <description>Tx FIFO 15</description>
19769 <description>Clear NAK (CNAK)</description>
19776 <description>No Clear NAK</description>
19781 <description>Clear NAK</description>
19788 <description>Set NAK (SNAK)</description>
19795 <description>No Set NAK</description>
19800 <description>Set NAK</description>
19807 <description>Set DATA0 PID (SetD0PID)</description>
19814 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
19819 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
19826 <description>Set DATA1 PID (SetD1PID)</description>
19833 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
19838 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
19845 <description>Endpoint Disable (EPDis)</description>
19851 <description>No Action</description>
19856 <description>Disable Endpoint</description>
19863 <description>Endpoint Enable (EPEna)</description>
19869 <description>No Action</description>
19874 <description>Enable Endpoint</description>
19883 <description>Device IN Endpoint Interrupt Register</description>
19891 <description>Transfer Completed Interrupt (XferCompl)</description>
19897 <description>No Transfer Complete Interrupt</description>
19902 <description>Transfer Complete Interrupt</description>
19909 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
19915 <description>No Endpoint Disabled Interrupt</description>
19920 <description>Endpoint Disabled Interrupt</description>
19927 <description>AHB Error (AHBErr)</description>
19933 <description>No AHB Error Interrupt</description>
19938 <description>AHB Error interrupt</description>
19945 <description>Timeout Condition (TimeOUT)</description>
19951 <description>No Timeout interrupt</description>
19956 <description>Timeout interrupt</description>
19963 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
19969 <description>No IN Token Received interrupt</description>
19974 <description>IN Token Received Interrupt</description>
19981 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
19987 <description>No IN Token Received with EP Mismatch interrupt</description>
19992 <description>IN Token Received with EP Mismatch interrupt</description>
19999 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
20005 <description>No Endpoint NAK Effective interrupt</description>
20010 <description>IN Endpoint NAK Effective interrupt</description>
20017 <description>Transmit FIFO Empty (TxFEmp)</description>
20024 <description>No Transmit FIFO Empty interrupt</description>
20029 <description>Transmit FIFO Empty interrupt</description>
20036 <description>Fifo Underrun (TxfifoUndrn)</description>
20042 <description>No Tx FIFO Underrun interrupt</description>
20047 <description>TxFIFO Underrun interrupt</description>
20054 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
20060 <description>No BNA interrupt</description>
20065 <description>BNA interrupt</description>
20072 <description>Packet Drop Status (PktDrpSts)</description>
20078 <description>No interrupt</description>
20083 <description>Packet Drop Status interrupt</description>
20090 <description>NAK Interrupt (BbleErr)</description>
20096 <description>No interrupt</description>
20101 <description>BbleErr interrupt</description>
20108 <description>NAK Interrupt (NAKInterrupt)</description>
20114 <description>No NAK interrupt</description>
20119 <description>NAK Interrupt</description>
20126 <description>NYET Interrupt (NYETIntrpt)</description>
20132 <description>No NYET interrupt</description>
20137 <description>NYET Interrupt</description>
20146 <description>Device IN Endpoint Transfer Size Register</description>
20154 <description>Transfer Size (XferSize)</description>
20160 <description>Packet Count (PktCnt)</description>
20166 <description>MC</description>
20172 <description>1 packet</description>
20177 <description>2 packets</description>
20182 <description>3 packets</description>
20191 <description>Device IN Endpoint DMA Address Register</description>
20199 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
20207 <description>Device IN Endpoint Transmit FIFO Status Register</description>
20215 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
20224 <description>Device Control IN Endpoint Control Register</description>
20232 <description>Maximum Packet Size (MPS)</description>
20238 <description>USB Active Endpoint (USBActEP)</description>
20244 <description>Not Active</description>
20249 <description>USB Active Endpoint</description>
20262 <description>DATA0 or Even Frame</description>
20267 <description>DATA1 or Odd Frame</description>
20274 <description>NAK Status (NAKSts)</description>
20281 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
20286 … <description>The core is transmitting NAK handshakes on this endpoint</description>
20293 <description>Endpoint Type (EPType)</description>
20299 <description>Control</description>
20304 <description>Isochronous</description>
20309 <description>Bulk</description>
20314 <description>Interrupt</description>
20321 <description>STALL Handshake (Stall)</description>
20327 <description>STALL All non-active tokens</description>
20332 <description>STALL All Active Tokens</description>
20339 <description>TxFIFO Number (TxFNum)</description>
20345 <description>Tx FIFO 0</description>
20350 <description>Tx FIFO 1</description>
20355 <description>Tx FIFO 2</description>
20360 <description>Tx FIFO 3</description>
20365 <description>Tx FIFO 4</description>
20370 <description>Tx FIFO 5</description>
20375 <description>Tx FIFO 6</description>
20380 <description>Tx FIFO 7</description>
20385 <description>Tx FIFO 8</description>
20390 <description>Tx FIFO 9</description>
20395 <description>Tx FIFO 10</description>
20400 <description>Tx FIFO 11</description>
20405 <description>Tx FIFO 12</description>
20410 <description>Tx FIFO 13</description>
20415 <description>Tx FIFO 14</description>
20420 <description>Tx FIFO 15</description>
20427 <description>Clear NAK (CNAK)</description>
20434 <description>No Clear NAK</description>
20439 <description>Clear NAK</description>
20446 <description>Set NAK (SNAK)</description>
20453 <description>No Set NAK</description>
20458 <description>Set NAK</description>
20465 <description>Set DATA0 PID (SetD0PID)</description>
20472 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
20477 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
20484 <description>Set DATA1 PID (SetD1PID)</description>
20491 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
20496 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
20503 <description>Endpoint Disable (EPDis)</description>
20509 <description>No Action</description>
20514 <description>Disable Endpoint</description>
20521 <description>Endpoint Enable (EPEna)</description>
20527 <description>No Action</description>
20532 <description>Enable Endpoint</description>
20541 <description>Device IN Endpoint Interrupt Register</description>
20549 <description>Transfer Completed Interrupt (XferCompl)</description>
20555 <description>No Transfer Complete Interrupt</description>
20560 <description>Transfer Complete Interrupt</description>
20567 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
20573 <description>No Endpoint Disabled Interrupt</description>
20578 <description>Endpoint Disabled Interrupt</description>
20585 <description>AHB Error (AHBErr)</description>
20591 <description>No AHB Error Interrupt</description>
20596 <description>AHB Error interrupt</description>
20603 <description>Timeout Condition (TimeOUT)</description>
20609 <description>No Timeout interrupt</description>
20614 <description>Timeout interrupt</description>
20621 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
20627 <description>No IN Token Received interrupt</description>
20632 <description>IN Token Received Interrupt</description>
20639 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
20645 <description>No IN Token Received with EP Mismatch interrupt</description>
20650 <description>IN Token Received with EP Mismatch interrupt</description>
20657 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
20663 <description>No Endpoint NAK Effective interrupt</description>
20668 <description>IN Endpoint NAK Effective interrupt</description>
20675 <description>Transmit FIFO Empty (TxFEmp)</description>
20682 <description>No Transmit FIFO Empty interrupt</description>
20687 <description>Transmit FIFO Empty interrupt</description>
20694 <description>Fifo Underrun (TxfifoUndrn)</description>
20700 <description>No Tx FIFO Underrun interrupt</description>
20705 <description>TxFIFO Underrun interrupt</description>
20712 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
20718 <description>No BNA interrupt</description>
20723 <description>BNA interrupt</description>
20730 <description>Packet Drop Status (PktDrpSts)</description>
20736 <description>No interrupt</description>
20741 <description>Packet Drop Status interrupt</description>
20748 <description>NAK Interrupt (BbleErr)</description>
20754 <description>No interrupt</description>
20759 <description>BbleErr interrupt</description>
20766 <description>NAK Interrupt (NAKInterrupt)</description>
20772 <description>No NAK interrupt</description>
20777 <description>NAK Interrupt</description>
20784 <description>NYET Interrupt (NYETIntrpt)</description>
20790 <description>No NYET interrupt</description>
20795 <description>NYET Interrupt</description>
20804 <description>Device IN Endpoint Transfer Size Register</description>
20812 <description>Transfer Size (XferSize)</description>
20818 <description>Packet Count (PktCnt)</description>
20824 <description>MC</description>
20830 <description>1 packet</description>
20835 <description>2 packets</description>
20840 <description>3 packets</description>
20849 <description>Device IN Endpoint DMA Address Register</description>
20857 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
20865 <description>Device IN Endpoint Transmit FIFO Status Register</description>
20873 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
20882 <description>Device Control IN Endpoint Control Register</description>
20890 <description>Maximum Packet Size (MPS)</description>
20896 <description>USB Active Endpoint (USBActEP)</description>
20902 <description>Not Active</description>
20907 <description>USB Active Endpoint</description>
20920 <description>DATA0 or Even Frame</description>
20925 <description>DATA1 or Odd Frame</description>
20932 <description>NAK Status (NAKSts)</description>
20939 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
20944 … <description>The core is transmitting NAK handshakes on this endpoint</description>
20951 <description>Endpoint Type (EPType)</description>
20957 <description>Control</description>
20962 <description>Isochronous</description>
20967 <description>Bulk</description>
20972 <description>Interrupt</description>
20979 <description>STALL Handshake (Stall)</description>
20985 <description>STALL All non-active tokens</description>
20990 <description>STALL All Active Tokens</description>
20997 <description>TxFIFO Number (TxFNum)</description>
21003 <description>Tx FIFO 0</description>
21008 <description>Tx FIFO 1</description>
21013 <description>Tx FIFO 2</description>
21018 <description>Tx FIFO 3</description>
21023 <description>Tx FIFO 4</description>
21028 <description>Tx FIFO 5</description>
21033 <description>Tx FIFO 6</description>
21038 <description>Tx FIFO 7</description>
21043 <description>Tx FIFO 8</description>
21048 <description>Tx FIFO 9</description>
21053 <description>Tx FIFO 10</description>
21058 <description>Tx FIFO 11</description>
21063 <description>Tx FIFO 12</description>
21068 <description>Tx FIFO 13</description>
21073 <description>Tx FIFO 14</description>
21078 <description>Tx FIFO 15</description>
21085 <description>Clear NAK (CNAK)</description>
21092 <description>No Clear NAK</description>
21097 <description>Clear NAK</description>
21104 <description>Set NAK (SNAK)</description>
21111 <description>No Set NAK</description>
21116 <description>Set NAK</description>
21123 <description>Set DATA0 PID (SetD0PID)</description>
21130 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
21135 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
21142 <description>Set DATA1 PID (SetD1PID)</description>
21149 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
21154 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
21161 <description>Endpoint Disable (EPDis)</description>
21167 <description>No Action</description>
21172 <description>Disable Endpoint</description>
21179 <description>Endpoint Enable (EPEna)</description>
21185 <description>No Action</description>
21190 <description>Enable Endpoint</description>
21199 <description>Device IN Endpoint Interrupt Register</description>
21207 <description>Transfer Completed Interrupt (XferCompl)</description>
21213 <description>No Transfer Complete Interrupt</description>
21218 <description>Transfer Complete Interrupt</description>
21225 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
21231 <description>No Endpoint Disabled Interrupt</description>
21236 <description>Endpoint Disabled Interrupt</description>
21243 <description>AHB Error (AHBErr)</description>
21249 <description>No AHB Error Interrupt</description>
21254 <description>AHB Error interrupt</description>
21261 <description>Timeout Condition (TimeOUT)</description>
21267 <description>No Timeout interrupt</description>
21272 <description>Timeout interrupt</description>
21279 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
21285 <description>No IN Token Received interrupt</description>
21290 <description>IN Token Received Interrupt</description>
21297 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
21303 <description>No IN Token Received with EP Mismatch interrupt</description>
21308 <description>IN Token Received with EP Mismatch interrupt</description>
21315 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
21321 <description>No Endpoint NAK Effective interrupt</description>
21326 <description>IN Endpoint NAK Effective interrupt</description>
21333 <description>Transmit FIFO Empty (TxFEmp)</description>
21340 <description>No Transmit FIFO Empty interrupt</description>
21345 <description>Transmit FIFO Empty interrupt</description>
21352 <description>Fifo Underrun (TxfifoUndrn)</description>
21358 <description>No Tx FIFO Underrun interrupt</description>
21363 <description>TxFIFO Underrun interrupt</description>
21370 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
21376 <description>No BNA interrupt</description>
21381 <description>BNA interrupt</description>
21388 <description>Packet Drop Status (PktDrpSts)</description>
21394 <description>No interrupt</description>
21399 <description>Packet Drop Status interrupt</description>
21406 <description>NAK Interrupt (BbleErr)</description>
21412 <description>No interrupt</description>
21417 <description>BbleErr interrupt</description>
21424 <description>NAK Interrupt (NAKInterrupt)</description>
21430 <description>No NAK interrupt</description>
21435 <description>NAK Interrupt</description>
21442 <description>NYET Interrupt (NYETIntrpt)</description>
21448 <description>No NYET interrupt</description>
21453 <description>NYET Interrupt</description>
21462 <description>Device IN Endpoint Transfer Size Register</description>
21470 <description>Transfer Size (XferSize)</description>
21476 <description>Packet Count (PktCnt)</description>
21482 <description>MC</description>
21488 <description>1 packet</description>
21493 <description>2 packets</description>
21498 <description>3 packets</description>
21507 <description>Device IN Endpoint DMA Address Register</description>
21515 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
21523 <description>Device IN Endpoint Transmit FIFO Status Register</description>
21531 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
21540 <description>Device Control IN Endpoint Control Register</description>
21548 <description>Maximum Packet Size (MPS)</description>
21554 <description>USB Active Endpoint (USBActEP)</description>
21560 <description>Not Active</description>
21565 <description>USB Active Endpoint</description>
21578 <description>DATA0 or Even Frame</description>
21583 <description>DATA1 or Odd Frame</description>
21590 <description>NAK Status (NAKSts)</description>
21597 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
21602 … <description>The core is transmitting NAK handshakes on this endpoint</description>
21609 <description>Endpoint Type (EPType)</description>
21615 <description>Control</description>
21620 <description>Isochronous</description>
21625 <description>Bulk</description>
21630 <description>Interrupt</description>
21637 <description>STALL Handshake (Stall)</description>
21643 <description>STALL All non-active tokens</description>
21648 <description>STALL All Active Tokens</description>
21655 <description>TxFIFO Number (TxFNum)</description>
21661 <description>Tx FIFO 0</description>
21666 <description>Tx FIFO 1</description>
21671 <description>Tx FIFO 2</description>
21676 <description>Tx FIFO 3</description>
21681 <description>Tx FIFO 4</description>
21686 <description>Tx FIFO 5</description>
21691 <description>Tx FIFO 6</description>
21696 <description>Tx FIFO 7</description>
21701 <description>Tx FIFO 8</description>
21706 <description>Tx FIFO 9</description>
21711 <description>Tx FIFO 10</description>
21716 <description>Tx FIFO 11</description>
21721 <description>Tx FIFO 12</description>
21726 <description>Tx FIFO 13</description>
21731 <description>Tx FIFO 14</description>
21736 <description>Tx FIFO 15</description>
21743 <description>Clear NAK (CNAK)</description>
21750 <description>No Clear NAK</description>
21755 <description>Clear NAK</description>
21762 <description>Set NAK (SNAK)</description>
21769 <description>No Set NAK</description>
21774 <description>Set NAK</description>
21781 <description>Set DATA0 PID (SetD0PID)</description>
21788 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
21793 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
21800 <description>Set DATA1 PID (SetD1PID)</description>
21807 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
21812 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
21819 <description>Endpoint Disable (EPDis)</description>
21825 <description>No Action</description>
21830 <description>Disable Endpoint</description>
21837 <description>Endpoint Enable (EPEna)</description>
21843 <description>No Action</description>
21848 <description>Enable Endpoint</description>
21857 <description>Device IN Endpoint Interrupt Register</description>
21865 <description>Transfer Completed Interrupt (XferCompl)</description>
21871 <description>No Transfer Complete Interrupt</description>
21876 <description>Transfer Complete Interrupt</description>
21883 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
21889 <description>No Endpoint Disabled Interrupt</description>
21894 <description>Endpoint Disabled Interrupt</description>
21901 <description>AHB Error (AHBErr)</description>
21907 <description>No AHB Error Interrupt</description>
21912 <description>AHB Error interrupt</description>
21919 <description>Timeout Condition (TimeOUT)</description>
21925 <description>No Timeout interrupt</description>
21930 <description>Timeout interrupt</description>
21937 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
21943 <description>No IN Token Received interrupt</description>
21948 <description>IN Token Received Interrupt</description>
21955 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
21961 <description>No IN Token Received with EP Mismatch interrupt</description>
21966 <description>IN Token Received with EP Mismatch interrupt</description>
21973 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
21979 <description>No Endpoint NAK Effective interrupt</description>
21984 <description>IN Endpoint NAK Effective interrupt</description>
21991 <description>Transmit FIFO Empty (TxFEmp)</description>
21998 <description>No Transmit FIFO Empty interrupt</description>
22003 <description>Transmit FIFO Empty interrupt</description>
22010 <description>Fifo Underrun (TxfifoUndrn)</description>
22016 <description>No Tx FIFO Underrun interrupt</description>
22021 <description>TxFIFO Underrun interrupt</description>
22028 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
22034 <description>No BNA interrupt</description>
22039 <description>BNA interrupt</description>
22046 <description>Packet Drop Status (PktDrpSts)</description>
22052 <description>No interrupt</description>
22057 <description>Packet Drop Status interrupt</description>
22064 <description>NAK Interrupt (BbleErr)</description>
22070 <description>No interrupt</description>
22075 <description>BbleErr interrupt</description>
22082 <description>NAK Interrupt (NAKInterrupt)</description>
22088 <description>No NAK interrupt</description>
22093 <description>NAK Interrupt</description>
22100 <description>NYET Interrupt (NYETIntrpt)</description>
22106 <description>No NYET interrupt</description>
22111 <description>NYET Interrupt</description>
22120 <description>Device IN Endpoint Transfer Size Register</description>
22128 <description>Transfer Size (XferSize)</description>
22134 <description>Packet Count (PktCnt)</description>
22140 <description>MC</description>
22146 <description>1 packet</description>
22151 <description>2 packets</description>
22156 <description>3 packets</description>
22165 <description>Device IN Endpoint DMA Address Register</description>
22173 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
22181 <description>Device IN Endpoint Transmit FIFO Status Register</description>
22189 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
22198 <description>Device Control IN Endpoint Control Register</description>
22206 <description>Maximum Packet Size (MPS)</description>
22212 <description>USB Active Endpoint (USBActEP)</description>
22218 <description>Not Active</description>
22223 <description>USB Active Endpoint</description>
22236 <description>DATA0 or Even Frame</description>
22241 <description>DATA1 or Odd Frame</description>
22248 <description>NAK Status (NAKSts)</description>
22255 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
22260 … <description>The core is transmitting NAK handshakes on this endpoint</description>
22267 <description>Endpoint Type (EPType)</description>
22273 <description>Control</description>
22278 <description>Isochronous</description>
22283 <description>Bulk</description>
22288 <description>Interrupt</description>
22295 <description>STALL Handshake (Stall)</description>
22301 <description>STALL All non-active tokens</description>
22306 <description>STALL All Active Tokens</description>
22313 <description>TxFIFO Number (TxFNum)</description>
22319 <description>Tx FIFO 0</description>
22324 <description>Tx FIFO 1</description>
22329 <description>Tx FIFO 2</description>
22334 <description>Tx FIFO 3</description>
22339 <description>Tx FIFO 4</description>
22344 <description>Tx FIFO 5</description>
22349 <description>Tx FIFO 6</description>
22354 <description>Tx FIFO 7</description>
22359 <description>Tx FIFO 8</description>
22364 <description>Tx FIFO 9</description>
22369 <description>Tx FIFO 10</description>
22374 <description>Tx FIFO 11</description>
22379 <description>Tx FIFO 12</description>
22384 <description>Tx FIFO 13</description>
22389 <description>Tx FIFO 14</description>
22394 <description>Tx FIFO 15</description>
22401 <description>Clear NAK (CNAK)</description>
22408 <description>No Clear NAK</description>
22413 <description>Clear NAK</description>
22420 <description>Set NAK (SNAK)</description>
22427 <description>No Set NAK</description>
22432 <description>Set NAK</description>
22439 <description>Set DATA0 PID (SetD0PID)</description>
22446 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
22451 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
22458 <description>Set DATA1 PID (SetD1PID)</description>
22465 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
22470 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
22477 <description>Endpoint Disable (EPDis)</description>
22483 <description>No Action</description>
22488 <description>Disable Endpoint</description>
22495 <description>Endpoint Enable (EPEna)</description>
22501 <description>No Action</description>
22506 <description>Enable Endpoint</description>
22515 <description>Device IN Endpoint Interrupt Register</description>
22523 <description>Transfer Completed Interrupt (XferCompl)</description>
22529 <description>No Transfer Complete Interrupt</description>
22534 <description>Transfer Complete Interrupt</description>
22541 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
22547 <description>No Endpoint Disabled Interrupt</description>
22552 <description>Endpoint Disabled Interrupt</description>
22559 <description>AHB Error (AHBErr)</description>
22565 <description>No AHB Error Interrupt</description>
22570 <description>AHB Error interrupt</description>
22577 <description>Timeout Condition (TimeOUT)</description>
22583 <description>No Timeout interrupt</description>
22588 <description>Timeout interrupt</description>
22595 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
22601 <description>No IN Token Received interrupt</description>
22606 <description>IN Token Received Interrupt</description>
22613 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
22619 <description>No IN Token Received with EP Mismatch interrupt</description>
22624 <description>IN Token Received with EP Mismatch interrupt</description>
22631 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
22637 <description>No Endpoint NAK Effective interrupt</description>
22642 <description>IN Endpoint NAK Effective interrupt</description>
22649 <description>Transmit FIFO Empty (TxFEmp)</description>
22656 <description>No Transmit FIFO Empty interrupt</description>
22661 <description>Transmit FIFO Empty interrupt</description>
22668 <description>Fifo Underrun (TxfifoUndrn)</description>
22674 <description>No Tx FIFO Underrun interrupt</description>
22679 <description>TxFIFO Underrun interrupt</description>
22686 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
22692 <description>No BNA interrupt</description>
22697 <description>BNA interrupt</description>
22704 <description>Packet Drop Status (PktDrpSts)</description>
22710 <description>No interrupt</description>
22715 <description>Packet Drop Status interrupt</description>
22722 <description>NAK Interrupt (BbleErr)</description>
22728 <description>No interrupt</description>
22733 <description>BbleErr interrupt</description>
22740 <description>NAK Interrupt (NAKInterrupt)</description>
22746 <description>No NAK interrupt</description>
22751 <description>NAK Interrupt</description>
22758 <description>NYET Interrupt (NYETIntrpt)</description>
22764 <description>No NYET interrupt</description>
22769 <description>NYET Interrupt</description>
22778 <description>Device IN Endpoint Transfer Size Register</description>
22786 <description>Transfer Size (XferSize)</description>
22792 <description>Packet Count (PktCnt)</description>
22798 <description>MC</description>
22804 <description>1 packet</description>
22809 <description>2 packets</description>
22814 <description>3 packets</description>
22823 <description>Device IN Endpoint DMA Address Register</description>
22831 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
22839 <description>Device IN Endpoint Transmit FIFO Status Register</description>
22847 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
22856 <description>Device Control IN Endpoint Control Register</description>
22864 <description>Maximum Packet Size (MPS)</description>
22870 <description>USB Active Endpoint (USBActEP)</description>
22876 <description>Not Active</description>
22881 <description>USB Active Endpoint</description>
22894 <description>DATA0 or Even Frame</description>
22899 <description>DATA1 or Odd Frame</description>
22906 <description>NAK Status (NAKSts)</description>
22913 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
22918 … <description>The core is transmitting NAK handshakes on this endpoint</description>
22925 <description>Endpoint Type (EPType)</description>
22931 <description>Control</description>
22936 <description>Isochronous</description>
22941 <description>Bulk</description>
22946 <description>Interrupt</description>
22953 <description>STALL Handshake (Stall)</description>
22959 <description>STALL All non-active tokens</description>
22964 <description>STALL All Active Tokens</description>
22971 <description>TxFIFO Number (TxFNum)</description>
22977 <description>Tx FIFO 0</description>
22982 <description>Tx FIFO 1</description>
22987 <description>Tx FIFO 2</description>
22992 <description>Tx FIFO 3</description>
22997 <description>Tx FIFO 4</description>
23002 <description>Tx FIFO 5</description>
23007 <description>Tx FIFO 6</description>
23012 <description>Tx FIFO 7</description>
23017 <description>Tx FIFO 8</description>
23022 <description>Tx FIFO 9</description>
23027 <description>Tx FIFO 10</description>
23032 <description>Tx FIFO 11</description>
23037 <description>Tx FIFO 12</description>
23042 <description>Tx FIFO 13</description>
23047 <description>Tx FIFO 14</description>
23052 <description>Tx FIFO 15</description>
23059 <description>Clear NAK (CNAK)</description>
23066 <description>No Clear NAK</description>
23071 <description>Clear NAK</description>
23078 <description>Set NAK (SNAK)</description>
23085 <description>No Set NAK</description>
23090 <description>Set NAK</description>
23097 <description>Set DATA0 PID (SetD0PID)</description>
23104 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
23109 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
23116 <description>Set DATA1 PID (SetD1PID)</description>
23123 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
23128 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
23135 <description>Endpoint Disable (EPDis)</description>
23141 <description>No Action</description>
23146 <description>Disable Endpoint</description>
23153 <description>Endpoint Enable (EPEna)</description>
23159 <description>No Action</description>
23164 <description>Enable Endpoint</description>
23173 <description>Device IN Endpoint Interrupt Register</description>
23181 <description>Transfer Completed Interrupt (XferCompl)</description>
23187 <description>No Transfer Complete Interrupt</description>
23192 <description>Transfer Complete Interrupt</description>
23199 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
23205 <description>No Endpoint Disabled Interrupt</description>
23210 <description>Endpoint Disabled Interrupt</description>
23217 <description>AHB Error (AHBErr)</description>
23223 <description>No AHB Error Interrupt</description>
23228 <description>AHB Error interrupt</description>
23235 <description>Timeout Condition (TimeOUT)</description>
23241 <description>No Timeout interrupt</description>
23246 <description>Timeout interrupt</description>
23253 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
23259 <description>No IN Token Received interrupt</description>
23264 <description>IN Token Received Interrupt</description>
23271 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
23277 <description>No IN Token Received with EP Mismatch interrupt</description>
23282 <description>IN Token Received with EP Mismatch interrupt</description>
23289 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
23295 <description>No Endpoint NAK Effective interrupt</description>
23300 <description>IN Endpoint NAK Effective interrupt</description>
23307 <description>Transmit FIFO Empty (TxFEmp)</description>
23314 <description>No Transmit FIFO Empty interrupt</description>
23319 <description>Transmit FIFO Empty interrupt</description>
23326 <description>Fifo Underrun (TxfifoUndrn)</description>
23332 <description>No Tx FIFO Underrun interrupt</description>
23337 <description>TxFIFO Underrun interrupt</description>
23344 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
23350 <description>No BNA interrupt</description>
23355 <description>BNA interrupt</description>
23362 <description>Packet Drop Status (PktDrpSts)</description>
23368 <description>No interrupt</description>
23373 <description>Packet Drop Status interrupt</description>
23380 <description>NAK Interrupt (BbleErr)</description>
23386 <description>No interrupt</description>
23391 <description>BbleErr interrupt</description>
23398 <description>NAK Interrupt (NAKInterrupt)</description>
23404 <description>No NAK interrupt</description>
23409 <description>NAK Interrupt</description>
23416 <description>NYET Interrupt (NYETIntrpt)</description>
23422 <description>No NYET interrupt</description>
23427 <description>NYET Interrupt</description>
23436 <description>Device IN Endpoint Transfer Size Register</description>
23444 <description>Transfer Size (XferSize)</description>
23450 <description>Packet Count (PktCnt)</description>
23456 <description>MC</description>
23462 <description>1 packet</description>
23467 <description>2 packets</description>
23472 <description>3 packets</description>
23481 <description>Device IN Endpoint DMA Address Register</description>
23489 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
23497 <description>Device IN Endpoint Transmit FIFO Status Register</description>
23505 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
23514 <description>Device Control IN Endpoint Control Register</description>
23522 <description>Maximum Packet Size (MPS)</description>
23528 <description>USB Active Endpoint (USBActEP)</description>
23534 <description>Not Active</description>
23539 <description>USB Active Endpoint</description>
23552 <description>DATA0 or Even Frame</description>
23557 <description>DATA1 or Odd Frame</description>
23564 <description>NAK Status (NAKSts)</description>
23571 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
23576 … <description>The core is transmitting NAK handshakes on this endpoint</description>
23583 <description>Endpoint Type (EPType)</description>
23589 <description>Control</description>
23594 <description>Isochronous</description>
23599 <description>Bulk</description>
23604 <description>Interrupt</description>
23611 <description>STALL Handshake (Stall)</description>
23617 <description>STALL All non-active tokens</description>
23622 <description>STALL All Active Tokens</description>
23629 <description>TxFIFO Number (TxFNum)</description>
23635 <description>Tx FIFO 0</description>
23640 <description>Tx FIFO 1</description>
23645 <description>Tx FIFO 2</description>
23650 <description>Tx FIFO 3</description>
23655 <description>Tx FIFO 4</description>
23660 <description>Tx FIFO 5</description>
23665 <description>Tx FIFO 6</description>
23670 <description>Tx FIFO 7</description>
23675 <description>Tx FIFO 8</description>
23680 <description>Tx FIFO 9</description>
23685 <description>Tx FIFO 10</description>
23690 <description>Tx FIFO 11</description>
23695 <description>Tx FIFO 12</description>
23700 <description>Tx FIFO 13</description>
23705 <description>Tx FIFO 14</description>
23710 <description>Tx FIFO 15</description>
23717 <description>Clear NAK (CNAK)</description>
23724 <description>No Clear NAK</description>
23729 <description>Clear NAK</description>
23736 <description>Set NAK (SNAK)</description>
23743 <description>No Set NAK</description>
23748 <description>Set NAK</description>
23755 <description>Set DATA0 PID (SetD0PID)</description>
23762 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
23767 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
23774 <description>Set DATA1 PID (SetD1PID)</description>
23781 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
23786 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
23793 <description>Endpoint Disable (EPDis)</description>
23799 <description>No Action</description>
23804 <description>Disable Endpoint</description>
23811 <description>Endpoint Enable (EPEna)</description>
23817 <description>No Action</description>
23822 <description>Enable Endpoint</description>
23831 <description>Device IN Endpoint Interrupt Register</description>
23839 <description>Transfer Completed Interrupt (XferCompl)</description>
23845 <description>No Transfer Complete Interrupt</description>
23850 <description>Transfer Complete Interrupt</description>
23857 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
23863 <description>No Endpoint Disabled Interrupt</description>
23868 <description>Endpoint Disabled Interrupt</description>
23875 <description>AHB Error (AHBErr)</description>
23881 <description>No AHB Error Interrupt</description>
23886 <description>AHB Error interrupt</description>
23893 <description>Timeout Condition (TimeOUT)</description>
23899 <description>No Timeout interrupt</description>
23904 <description>Timeout interrupt</description>
23911 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
23917 <description>No IN Token Received interrupt</description>
23922 <description>IN Token Received Interrupt</description>
23929 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
23935 <description>No IN Token Received with EP Mismatch interrupt</description>
23940 <description>IN Token Received with EP Mismatch interrupt</description>
23947 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
23953 <description>No Endpoint NAK Effective interrupt</description>
23958 <description>IN Endpoint NAK Effective interrupt</description>
23965 <description>Transmit FIFO Empty (TxFEmp)</description>
23972 <description>No Transmit FIFO Empty interrupt</description>
23977 <description>Transmit FIFO Empty interrupt</description>
23984 <description>Fifo Underrun (TxfifoUndrn)</description>
23990 <description>No Tx FIFO Underrun interrupt</description>
23995 <description>TxFIFO Underrun interrupt</description>
24002 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
24008 <description>No BNA interrupt</description>
24013 <description>BNA interrupt</description>
24020 <description>Packet Drop Status (PktDrpSts)</description>
24026 <description>No interrupt</description>
24031 <description>Packet Drop Status interrupt</description>
24038 <description>NAK Interrupt (BbleErr)</description>
24044 <description>No interrupt</description>
24049 <description>BbleErr interrupt</description>
24056 <description>NAK Interrupt (NAKInterrupt)</description>
24062 <description>No NAK interrupt</description>
24067 <description>NAK Interrupt</description>
24074 <description>NYET Interrupt (NYETIntrpt)</description>
24080 <description>No NYET interrupt</description>
24085 <description>NYET Interrupt</description>
24094 <description>Device IN Endpoint Transfer Size Register</description>
24102 <description>Transfer Size (XferSize)</description>
24108 <description>Packet Count (PktCnt)</description>
24114 <description>MC</description>
24120 <description>1 packet</description>
24125 <description>2 packets</description>
24130 <description>3 packets</description>
24139 <description>Device IN Endpoint DMA Address Register</description>
24147 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
24155 <description>Device IN Endpoint Transmit FIFO Status Register</description>
24163 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
24172 <description>Device Control IN Endpoint Control Register</description>
24180 <description>Maximum Packet Size (MPS)</description>
24186 <description>USB Active Endpoint (USBActEP)</description>
24192 <description>Not Active</description>
24197 <description>USB Active Endpoint</description>
24210 <description>DATA0 or Even Frame</description>
24215 <description>DATA1 or Odd Frame</description>
24222 <description>NAK Status (NAKSts)</description>
24229 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
24234 … <description>The core is transmitting NAK handshakes on this endpoint</description>
24241 <description>Endpoint Type (EPType)</description>
24247 <description>Control</description>
24252 <description>Isochronous</description>
24257 <description>Bulk</description>
24262 <description>Interrupt</description>
24269 <description>STALL Handshake (Stall)</description>
24275 <description>STALL All non-active tokens</description>
24280 <description>STALL All Active Tokens</description>
24287 <description>TxFIFO Number (TxFNum)</description>
24293 <description>Tx FIFO 0</description>
24298 <description>Tx FIFO 1</description>
24303 <description>Tx FIFO 2</description>
24308 <description>Tx FIFO 3</description>
24313 <description>Tx FIFO 4</description>
24318 <description>Tx FIFO 5</description>
24323 <description>Tx FIFO 6</description>
24328 <description>Tx FIFO 7</description>
24333 <description>Tx FIFO 8</description>
24338 <description>Tx FIFO 9</description>
24343 <description>Tx FIFO 10</description>
24348 <description>Tx FIFO 11</description>
24353 <description>Tx FIFO 12</description>
24358 <description>Tx FIFO 13</description>
24363 <description>Tx FIFO 14</description>
24368 <description>Tx FIFO 15</description>
24375 <description>Clear NAK (CNAK)</description>
24382 <description>No Clear NAK</description>
24387 <description>Clear NAK</description>
24394 <description>Set NAK (SNAK)</description>
24401 <description>No Set NAK</description>
24406 <description>Set NAK</description>
24413 <description>Set DATA0 PID (SetD0PID)</description>
24420 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
24425 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
24432 <description>Set DATA1 PID (SetD1PID)</description>
24439 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
24444 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
24451 <description>Endpoint Disable (EPDis)</description>
24457 <description>No Action</description>
24462 <description>Disable Endpoint</description>
24469 <description>Endpoint Enable (EPEna)</description>
24475 <description>No Action</description>
24480 <description>Enable Endpoint</description>
24489 <description>Device IN Endpoint Interrupt Register</description>
24497 <description>Transfer Completed Interrupt (XferCompl)</description>
24503 <description>No Transfer Complete Interrupt</description>
24508 <description>Transfer Complete Interrupt</description>
24515 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
24521 <description>No Endpoint Disabled Interrupt</description>
24526 <description>Endpoint Disabled Interrupt</description>
24533 <description>AHB Error (AHBErr)</description>
24539 <description>No AHB Error Interrupt</description>
24544 <description>AHB Error interrupt</description>
24551 <description>Timeout Condition (TimeOUT)</description>
24557 <description>No Timeout interrupt</description>
24562 <description>Timeout interrupt</description>
24569 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
24575 <description>No IN Token Received interrupt</description>
24580 <description>IN Token Received Interrupt</description>
24587 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
24593 <description>No IN Token Received with EP Mismatch interrupt</description>
24598 <description>IN Token Received with EP Mismatch interrupt</description>
24605 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
24611 <description>No Endpoint NAK Effective interrupt</description>
24616 <description>IN Endpoint NAK Effective interrupt</description>
24623 <description>Transmit FIFO Empty (TxFEmp)</description>
24630 <description>No Transmit FIFO Empty interrupt</description>
24635 <description>Transmit FIFO Empty interrupt</description>
24642 <description>Fifo Underrun (TxfifoUndrn)</description>
24648 <description>No Tx FIFO Underrun interrupt</description>
24653 <description>TxFIFO Underrun interrupt</description>
24660 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
24666 <description>No BNA interrupt</description>
24671 <description>BNA interrupt</description>
24678 <description>Packet Drop Status (PktDrpSts)</description>
24684 <description>No interrupt</description>
24689 <description>Packet Drop Status interrupt</description>
24696 <description>NAK Interrupt (BbleErr)</description>
24702 <description>No interrupt</description>
24707 <description>BbleErr interrupt</description>
24714 <description>NAK Interrupt (NAKInterrupt)</description>
24720 <description>No NAK interrupt</description>
24725 <description>NAK Interrupt</description>
24732 <description>NYET Interrupt (NYETIntrpt)</description>
24738 <description>No NYET interrupt</description>
24743 <description>NYET Interrupt</description>
24752 <description>Device IN Endpoint Transfer Size Register</description>
24760 <description>Transfer Size (XferSize)</description>
24766 <description>Packet Count (PktCnt)</description>
24772 <description>MC</description>
24778 <description>1 packet</description>
24783 <description>2 packets</description>
24788 <description>3 packets</description>
24797 <description>Device IN Endpoint DMA Address Register</description>
24805 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
24813 <description>Device IN Endpoint Transmit FIFO Status Register</description>
24821 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
24830 <description>Device Control IN Endpoint Control Register</description>
24838 <description>Maximum Packet Size (MPS)</description>
24844 <description>USB Active Endpoint (USBActEP)</description>
24850 <description>Not Active</description>
24855 <description>USB Active Endpoint</description>
24868 <description>DATA0 or Even Frame</description>
24873 <description>DATA1 or Odd Frame</description>
24880 <description>NAK Status (NAKSts)</description>
24887 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
24892 … <description>The core is transmitting NAK handshakes on this endpoint</description>
24899 <description>Endpoint Type (EPType)</description>
24905 <description>Control</description>
24910 <description>Isochronous</description>
24915 <description>Bulk</description>
24920 <description>Interrupt</description>
24927 <description>STALL Handshake (Stall)</description>
24933 <description>STALL All non-active tokens</description>
24938 <description>STALL All Active Tokens</description>
24945 <description>TxFIFO Number (TxFNum)</description>
24951 <description>Tx FIFO 0</description>
24956 <description>Tx FIFO 1</description>
24961 <description>Tx FIFO 2</description>
24966 <description>Tx FIFO 3</description>
24971 <description>Tx FIFO 4</description>
24976 <description>Tx FIFO 5</description>
24981 <description>Tx FIFO 6</description>
24986 <description>Tx FIFO 7</description>
24991 <description>Tx FIFO 8</description>
24996 <description>Tx FIFO 9</description>
25001 <description>Tx FIFO 10</description>
25006 <description>Tx FIFO 11</description>
25011 <description>Tx FIFO 12</description>
25016 <description>Tx FIFO 13</description>
25021 <description>Tx FIFO 14</description>
25026 <description>Tx FIFO 15</description>
25033 <description>Clear NAK (CNAK)</description>
25040 <description>No Clear NAK</description>
25045 <description>Clear NAK</description>
25052 <description>Set NAK (SNAK)</description>
25059 <description>No Set NAK</description>
25064 <description>Set NAK</description>
25071 <description>Set DATA0 PID (SetD0PID)</description>
25078 … <description>Disables Set DATA0 PID or Do not force Even (micro)Frame</description>
25083 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to Even (micro)Frame</descript…
25090 <description>Set DATA1 PID (SetD1PID)</description>
25097 … <description>Disables Set DATA1 PID or Do not force Odd (micro)Frame</description>
25102 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to Odd (micro)Frame</descripti…
25109 <description>Endpoint Disable (EPDis)</description>
25115 <description>No Action</description>
25120 <description>Disable Endpoint</description>
25127 <description>Endpoint Enable (EPEna)</description>
25133 <description>No Action</description>
25138 <description>Enable Endpoint</description>
25147 <description>Device IN Endpoint Interrupt Register</description>
25155 <description>Transfer Completed Interrupt (XferCompl)</description>
25161 <description>No Transfer Complete Interrupt</description>
25166 <description>Transfer Complete Interrupt</description>
25173 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
25179 <description>No Endpoint Disabled Interrupt</description>
25184 <description>Endpoint Disabled Interrupt</description>
25191 <description>AHB Error (AHBErr)</description>
25197 <description>No AHB Error Interrupt</description>
25202 <description>AHB Error interrupt</description>
25209 <description>Timeout Condition (TimeOUT)</description>
25215 <description>No Timeout interrupt</description>
25220 <description>Timeout interrupt</description>
25227 <description>IN Token Received When TxFIFO is Empty (INTknTXFEmp)</description>
25233 <description>No IN Token Received interrupt</description>
25238 <description>IN Token Received Interrupt</description>
25245 <description>IN Token Received with EP Mismatch (INTknEPMis)</description>
25251 <description>No IN Token Received with EP Mismatch interrupt</description>
25256 <description>IN Token Received with EP Mismatch interrupt</description>
25263 <description>IN Endpoint NAK Effective (INEPNakEff)</description>
25269 <description>No Endpoint NAK Effective interrupt</description>
25274 <description>IN Endpoint NAK Effective interrupt</description>
25281 <description>Transmit FIFO Empty (TxFEmp)</description>
25288 <description>No Transmit FIFO Empty interrupt</description>
25293 <description>Transmit FIFO Empty interrupt</description>
25300 <description>Fifo Underrun (TxfifoUndrn)</description>
25306 <description>No Tx FIFO Underrun interrupt</description>
25311 <description>TxFIFO Underrun interrupt</description>
25318 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
25324 <description>No BNA interrupt</description>
25329 <description>BNA interrupt</description>
25336 <description>Packet Drop Status (PktDrpSts)</description>
25342 <description>No interrupt</description>
25347 <description>Packet Drop Status interrupt</description>
25354 <description>NAK Interrupt (BbleErr)</description>
25360 <description>No interrupt</description>
25365 <description>BbleErr interrupt</description>
25372 <description>NAK Interrupt (NAKInterrupt)</description>
25378 <description>No NAK interrupt</description>
25383 <description>NAK Interrupt</description>
25390 <description>NYET Interrupt (NYETIntrpt)</description>
25396 <description>No NYET interrupt</description>
25401 <description>NYET Interrupt</description>
25410 <description>Device IN Endpoint Transfer Size Register</description>
25418 <description>Transfer Size (XferSize)</description>
25424 <description>Packet Count (PktCnt)</description>
25430 <description>MC</description>
25436 <description>1 packet</description>
25441 <description>2 packets</description>
25446 <description>3 packets</description>
25455 <description>Device IN Endpoint DMA Address Register</description>
25463 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
25471 <description>Device IN Endpoint Transmit FIFO Status Register</description>
25479 <description>IN Endpoint TxFIFO Space Avail (INEPTxFSpcAvail)</description>
25488 <description>Device Control OUT Endpoint 0 Control Register</description>
25496 <description>Maximum Packet Size (MPS)</description>
25503 <description>64 bytes</description>
25508 <description>32 bytes</description>
25513 <description>16 bytes</description>
25518 <description>8 bytes</description>
25525 <description>USB Active Endpoint (USBActEP)</description>
25532 <description>USB Active Endpoint 0</description>
25539 <description>NAK Status (NAKSts)</description>
25546 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
25551 … <description>The core is transmitting NAK handshakes on this endpoint</description>
25558 <description>Endpoint Type (EPType)</description>
25565 <description>Endpoint Control 0</description>
25572 <description>STALL Handshake (Stall)</description>
25578 <description>No Stall</description>
25583 <description>Stall Handshake</description>
25590 <description>Clear NAK (CNAK)</description>
25597 <description>No action</description>
25602 <description>Clear NAK</description>
25609 <description>Set NAK (SNAK)</description>
25616 <description>No action</description>
25621 <description>Set NAK</description>
25628 <description>Endpoint Disable (EPDis)</description>
25635 <description>No Endpoint disable</description>
25642 <description>Endpoint Enable (EPEna)</description>
25648 <description>No action</description>
25653 <description>Enable Endpoint</description>
25662 <description>Device OUT Endpoint 0 Interrupt Register</description>
25670 <description>Transfer Completed Interrupt (XferCompl)</description>
25676 <description>No Transfer Complete Interrupt</description>
25681 <description>Transfer Complete Interrupt</description>
25688 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
25694 <description>No Endpoint Disabled Interrupt</description>
25699 <description>Endpoint Disabled Interrupt</description>
25706 <description>AHB Error (AHBErr)</description>
25712 <description>No AHB Error Interrupt</description>
25717 <description>AHB Error interrupt</description>
25724 <description>SETUP Phase Done (SetUp)</description>
25730 <description>No SETUP Phase Done</description>
25735 <description>SETUP Phase Done</description>
25742 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
25748 <description>No OUT Token Received When Endpoint Disabled</description>
25753 <description>OUT Token Received When Endpoint Disabled</description>
25760 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
25766 <description>No Status Phase Received for Control Write</description>
25771 <description>Status Phase Received for Control Write</description>
25778 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
25784 <description>No Back-to-Back SETUP Packets Received</description>
25789 <description>Back-to-Back SETUP Packets Received</description>
25796 <description>OUT Packet Error (OutPktErr)</description>
25802 <description>No OUT Packet Error</description>
25807 <description>OUT Packet Error</description>
25814 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
25820 <description>No BNA interrupt</description>
25825 <description>BNA interrupt</description>
25832 <description>Packet Drop Status (PktDrpSts)</description>
25838 <description>No interrupt</description>
25843 <description>Packet Drop Status interrupt</description>
25850 <description>NAK Interrupt (BbleErr)</description>
25856 <description>No BbleErr interrupt</description>
25861 <description>BbleErr interrupt</description>
25868 <description>NAK Interrupt (NAKInterrupt)</description>
25874 <description>No NAK interrupt</description>
25879 <description>NAK Interrupt</description>
25886 <description>NYET Interrupt (NYETIntrpt)</description>
25892 <description>No NYET interrupt</description>
25897 <description>NYET Interrupt</description>
25904 <description>Setup Packet Received</description>
25910 <description>No Setup packet received</description>
25915 <description>Setup packet received</description>
25924 <description>Device OUT Endpoint 0 Transfer Size Register</description>
25932 <description>Transfer Size (XferSize)</description>
25938 <description>Packet Count (PktCnt)</description>
25944 <description>SETUP Packet Count (SUPCnt)</description>
25950 <description>1 packet</description>
25955 <description>2 packets</description>
25960 <description>3 packets</description>
25969 <description>Device OUT Endpoint 0 DMA Address Register</description>
25977 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
25985 <description>Device Control OUT Endpoint Control Register</description>
25993 <description>Maximum Packet Size (MPS)</description>
25999 <description>USB Active Endpoint (USBActEP)</description>
26005 <description>Not Active</description>
26010 <description>USB Active Endpoint</description>
26017 <description>Endpoint Data PID (DPID)</description>
26024 <description>Endpoint Data PID not active</description>
26029 <description>Endpoint Data PID active</description>
26036 <description>NAK Status (NAKSts)</description>
26043 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
26048 … <description>The core is transmitting NAK handshakes on this endpoint</description>
26055 <description>Endpoint Type (EPType)</description>
26061 <description>Control</description>
26066 <description>Isochronous</description>
26071 <description>Bulk</description>
26076 <description>Interrupt</description>
26083 <description>STALL Handshake (Stall)</description>
26089 <description>STALL All non-active tokens</description>
26094 <description>STALL All Active Tokens</description>
26107 <description>No Clear NAK</description>
26112 <description>Clear NAK</description>
26119 <description>Set NAK (SNAK)</description>
26126 <description>No Set NAK</description>
26131 <description>Set NAK</description>
26138 <description>Set DATA0 PID (SetD0PID)</description>
26145 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
26150 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
26157 <description>Set DATA1 PID (SetD1PID)</description>
26164 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
26169 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
26176 <description>Endpoint Disable (EPDis)</description>
26182 <description>No Action</description>
26187 <description>Disable Endpoint</description>
26194 <description>Endpoint Enable (EPEna)</description>
26200 <description>No Action</description>
26205 <description>Enable Endpoint</description>
26214 <description>Device OUT Endpoint Interrupt Register</description>
26222 <description>Transfer Completed Interrupt (XferCompl)</description>
26228 <description>No Transfer Complete Interrupt</description>
26233 <description>Transfer Complete Interrupt</description>
26240 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
26246 <description>No Endpoint Disabled Interrupt</description>
26251 <description>Endpoint Disabled Interrupt</description>
26258 <description>AHB Error (AHBErr)</description>
26264 <description>No AHB Error Interrupt</description>
26269 <description>AHB Error interrupt</description>
26276 <description>SETUP Phase Done (SetUp)</description>
26282 <description>No SETUP Phase Done</description>
26287 <description>SETUP Phase Done</description>
26294 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
26300 <description>No OUT Token Received When Endpoint Disabled</description>
26305 <description>OUT Token Received When Endpoint Disabled</description>
26312 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
26318 <description>No Status Phase Received for Control Write</description>
26323 <description>Status Phase Received for Control Write</description>
26330 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
26336 <description>No Back-to-Back SETUP Packets Received</description>
26341 <description>Back-to-Back SETUP Packets Received</description>
26348 <description>OUT Packet Error (OutPktErr)</description>
26354 <description>No OUT Packet Error</description>
26359 <description>OUT Packet Error</description>
26366 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
26372 <description>No BNA interrupt</description>
26377 <description>BNA interrupt</description>
26384 <description>Packet Drop Status (PktDrpSts)</description>
26390 <description>No interrupt</description>
26395 <description>Packet Drop Status interrupt</description>
26402 <description>NAK Interrupt (BbleErr)</description>
26408 <description>No BbleErr interrupt</description>
26413 <description>BbleErr interrupt</description>
26420 <description>NAK Interrupt (NAKInterrupt)</description>
26426 <description>No NAK interrupt</description>
26431 <description>NAK Interrupt</description>
26438 <description>NYET Interrupt (NYETIntrpt)</description>
26444 <description>No NYET interrupt</description>
26449 <description>NYET Interrupt</description>
26456 <description>Setup Packet Received</description>
26462 <description>No Setup packet received</description>
26467 <description>Setup packet received</description>
26476 <description>Device OUT Endpoint Transfer Size Register</description>
26484 <description>Transfer Size (XferSize)</description>
26490 <description>Packet Count (PktCnt)</description>
26496 <description>RxDPID</description>
26503 <description>DATA0</description>
26508 <description>DATA2 or 1 packet</description>
26513 <description>DATA1 or 2 packets</description>
26518 <description>MDATA or 3 packets</description>
26527 <description>Device OUT Endpoint DMA Address Register</description>
26535 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
26543 <description>Device Control OUT Endpoint Control Register</description>
26551 <description>Maximum Packet Size (MPS)</description>
26557 <description>USB Active Endpoint (USBActEP)</description>
26563 <description>Not Active</description>
26568 <description>USB Active Endpoint</description>
26575 <description>Endpoint Data PID (DPID)</description>
26582 <description>Endpoint Data PID not active</description>
26587 <description>Endpoint Data PID active</description>
26594 <description>NAK Status (NAKSts)</description>
26601 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
26606 … <description>The core is transmitting NAK handshakes on this endpoint</description>
26613 <description>Endpoint Type (EPType)</description>
26619 <description>Control</description>
26624 <description>Isochronous</description>
26629 <description>Bulk</description>
26634 <description>Interrupt</description>
26641 <description>STALL Handshake (Stall)</description>
26647 <description>STALL All non-active tokens</description>
26652 <description>STALL All Active Tokens</description>
26665 <description>No Clear NAK</description>
26670 <description>Clear NAK</description>
26677 <description>Set NAK (SNAK)</description>
26684 <description>No Set NAK</description>
26689 <description>Set NAK</description>
26696 <description>Set DATA0 PID (SetD0PID)</description>
26703 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
26708 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
26715 <description>Set DATA1 PID (SetD1PID)</description>
26722 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
26727 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
26734 <description>Endpoint Disable (EPDis)</description>
26740 <description>No Action</description>
26745 <description>Disable Endpoint</description>
26752 <description>Endpoint Enable (EPEna)</description>
26758 <description>No Action</description>
26763 <description>Enable Endpoint</description>
26772 <description>Device OUT Endpoint Interrupt Register</description>
26780 <description>Transfer Completed Interrupt (XferCompl)</description>
26786 <description>No Transfer Complete Interrupt</description>
26791 <description>Transfer Complete Interrupt</description>
26798 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
26804 <description>No Endpoint Disabled Interrupt</description>
26809 <description>Endpoint Disabled Interrupt</description>
26816 <description>AHB Error (AHBErr)</description>
26822 <description>No AHB Error Interrupt</description>
26827 <description>AHB Error interrupt</description>
26834 <description>SETUP Phase Done (SetUp)</description>
26840 <description>No SETUP Phase Done</description>
26845 <description>SETUP Phase Done</description>
26852 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
26858 <description>No OUT Token Received When Endpoint Disabled</description>
26863 <description>OUT Token Received When Endpoint Disabled</description>
26870 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
26876 <description>No Status Phase Received for Control Write</description>
26881 <description>Status Phase Received for Control Write</description>
26888 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
26894 <description>No Back-to-Back SETUP Packets Received</description>
26899 <description>Back-to-Back SETUP Packets Received</description>
26906 <description>OUT Packet Error (OutPktErr)</description>
26912 <description>No OUT Packet Error</description>
26917 <description>OUT Packet Error</description>
26924 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
26930 <description>No BNA interrupt</description>
26935 <description>BNA interrupt</description>
26942 <description>Packet Drop Status (PktDrpSts)</description>
26948 <description>No interrupt</description>
26953 <description>Packet Drop Status interrupt</description>
26960 <description>NAK Interrupt (BbleErr)</description>
26966 <description>No BbleErr interrupt</description>
26971 <description>BbleErr interrupt</description>
26978 <description>NAK Interrupt (NAKInterrupt)</description>
26984 <description>No NAK interrupt</description>
26989 <description>NAK Interrupt</description>
26996 <description>NYET Interrupt (NYETIntrpt)</description>
27002 <description>No NYET interrupt</description>
27007 <description>NYET Interrupt</description>
27014 <description>Setup Packet Received</description>
27020 <description>No Setup packet received</description>
27025 <description>Setup packet received</description>
27034 <description>Device OUT Endpoint Transfer Size Register</description>
27042 <description>Transfer Size (XferSize)</description>
27048 <description>Packet Count (PktCnt)</description>
27054 <description>RxDPID</description>
27061 <description>DATA0</description>
27066 <description>DATA2 or 1 packet</description>
27071 <description>DATA1 or 2 packets</description>
27076 <description>MDATA or 3 packets</description>
27085 <description>Device OUT Endpoint DMA Address Register</description>
27093 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
27101 <description>Device Control OUT Endpoint Control Register</description>
27109 <description>Maximum Packet Size (MPS)</description>
27115 <description>USB Active Endpoint (USBActEP)</description>
27121 <description>Not Active</description>
27126 <description>USB Active Endpoint</description>
27133 <description>Endpoint Data PID (DPID)</description>
27140 <description>Endpoint Data PID not active</description>
27145 <description>Endpoint Data PID active</description>
27152 <description>NAK Status (NAKSts)</description>
27159 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
27164 … <description>The core is transmitting NAK handshakes on this endpoint</description>
27171 <description>Endpoint Type (EPType)</description>
27177 <description>Control</description>
27182 <description>Isochronous</description>
27187 <description>Bulk</description>
27192 <description>Interrupt</description>
27199 <description>STALL Handshake (Stall)</description>
27205 <description>STALL All non-active tokens</description>
27210 <description>STALL All Active Tokens</description>
27223 <description>No Clear NAK</description>
27228 <description>Clear NAK</description>
27235 <description>Set NAK (SNAK)</description>
27242 <description>No Set NAK</description>
27247 <description>Set NAK</description>
27254 <description>Set DATA0 PID (SetD0PID)</description>
27261 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
27266 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
27273 <description>Set DATA1 PID (SetD1PID)</description>
27280 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
27285 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
27292 <description>Endpoint Disable (EPDis)</description>
27298 <description>No Action</description>
27303 <description>Disable Endpoint</description>
27310 <description>Endpoint Enable (EPEna)</description>
27316 <description>No Action</description>
27321 <description>Enable Endpoint</description>
27330 <description>Device OUT Endpoint Interrupt Register</description>
27338 <description>Transfer Completed Interrupt (XferCompl)</description>
27344 <description>No Transfer Complete Interrupt</description>
27349 <description>Transfer Complete Interrupt</description>
27356 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
27362 <description>No Endpoint Disabled Interrupt</description>
27367 <description>Endpoint Disabled Interrupt</description>
27374 <description>AHB Error (AHBErr)</description>
27380 <description>No AHB Error Interrupt</description>
27385 <description>AHB Error interrupt</description>
27392 <description>SETUP Phase Done (SetUp)</description>
27398 <description>No SETUP Phase Done</description>
27403 <description>SETUP Phase Done</description>
27410 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
27416 <description>No OUT Token Received When Endpoint Disabled</description>
27421 <description>OUT Token Received When Endpoint Disabled</description>
27428 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
27434 <description>No Status Phase Received for Control Write</description>
27439 <description>Status Phase Received for Control Write</description>
27446 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
27452 <description>No Back-to-Back SETUP Packets Received</description>
27457 <description>Back-to-Back SETUP Packets Received</description>
27464 <description>OUT Packet Error (OutPktErr)</description>
27470 <description>No OUT Packet Error</description>
27475 <description>OUT Packet Error</description>
27482 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
27488 <description>No BNA interrupt</description>
27493 <description>BNA interrupt</description>
27500 <description>Packet Drop Status (PktDrpSts)</description>
27506 <description>No interrupt</description>
27511 <description>Packet Drop Status interrupt</description>
27518 <description>NAK Interrupt (BbleErr)</description>
27524 <description>No BbleErr interrupt</description>
27529 <description>BbleErr interrupt</description>
27536 <description>NAK Interrupt (NAKInterrupt)</description>
27542 <description>No NAK interrupt</description>
27547 <description>NAK Interrupt</description>
27554 <description>NYET Interrupt (NYETIntrpt)</description>
27560 <description>No NYET interrupt</description>
27565 <description>NYET Interrupt</description>
27572 <description>Setup Packet Received</description>
27578 <description>No Setup packet received</description>
27583 <description>Setup packet received</description>
27592 <description>Device OUT Endpoint Transfer Size Register</description>
27600 <description>Transfer Size (XferSize)</description>
27606 <description>Packet Count (PktCnt)</description>
27612 <description>RxDPID</description>
27619 <description>DATA0</description>
27624 <description>DATA2 or 1 packet</description>
27629 <description>DATA1 or 2 packets</description>
27634 <description>MDATA or 3 packets</description>
27643 <description>Device OUT Endpoint DMA Address Register</description>
27651 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
27659 <description>Device Control OUT Endpoint Control Register</description>
27667 <description>Maximum Packet Size (MPS)</description>
27673 <description>USB Active Endpoint (USBActEP)</description>
27679 <description>Not Active</description>
27684 <description>USB Active Endpoint</description>
27691 <description>Endpoint Data PID (DPID)</description>
27698 <description>Endpoint Data PID not active</description>
27703 <description>Endpoint Data PID active</description>
27710 <description>NAK Status (NAKSts)</description>
27717 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
27722 … <description>The core is transmitting NAK handshakes on this endpoint</description>
27729 <description>Endpoint Type (EPType)</description>
27735 <description>Control</description>
27740 <description>Isochronous</description>
27745 <description>Bulk</description>
27750 <description>Interrupt</description>
27757 <description>STALL Handshake (Stall)</description>
27763 <description>STALL All non-active tokens</description>
27768 <description>STALL All Active Tokens</description>
27781 <description>No Clear NAK</description>
27786 <description>Clear NAK</description>
27793 <description>Set NAK (SNAK)</description>
27800 <description>No Set NAK</description>
27805 <description>Set NAK</description>
27812 <description>Set DATA0 PID (SetD0PID)</description>
27819 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
27824 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
27831 <description>Set DATA1 PID (SetD1PID)</description>
27838 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
27843 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
27850 <description>Endpoint Disable (EPDis)</description>
27856 <description>No Action</description>
27861 <description>Disable Endpoint</description>
27868 <description>Endpoint Enable (EPEna)</description>
27874 <description>No Action</description>
27879 <description>Enable Endpoint</description>
27888 <description>Device OUT Endpoint Interrupt Register</description>
27896 <description>Transfer Completed Interrupt (XferCompl)</description>
27902 <description>No Transfer Complete Interrupt</description>
27907 <description>Transfer Complete Interrupt</description>
27914 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
27920 <description>No Endpoint Disabled Interrupt</description>
27925 <description>Endpoint Disabled Interrupt</description>
27932 <description>AHB Error (AHBErr)</description>
27938 <description>No AHB Error Interrupt</description>
27943 <description>AHB Error interrupt</description>
27950 <description>SETUP Phase Done (SetUp)</description>
27956 <description>No SETUP Phase Done</description>
27961 <description>SETUP Phase Done</description>
27968 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
27974 <description>No OUT Token Received When Endpoint Disabled</description>
27979 <description>OUT Token Received When Endpoint Disabled</description>
27986 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
27992 <description>No Status Phase Received for Control Write</description>
27997 <description>Status Phase Received for Control Write</description>
28004 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
28010 <description>No Back-to-Back SETUP Packets Received</description>
28015 <description>Back-to-Back SETUP Packets Received</description>
28022 <description>OUT Packet Error (OutPktErr)</description>
28028 <description>No OUT Packet Error</description>
28033 <description>OUT Packet Error</description>
28040 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
28046 <description>No BNA interrupt</description>
28051 <description>BNA interrupt</description>
28058 <description>Packet Drop Status (PktDrpSts)</description>
28064 <description>No interrupt</description>
28069 <description>Packet Drop Status interrupt</description>
28076 <description>NAK Interrupt (BbleErr)</description>
28082 <description>No BbleErr interrupt</description>
28087 <description>BbleErr interrupt</description>
28094 <description>NAK Interrupt (NAKInterrupt)</description>
28100 <description>No NAK interrupt</description>
28105 <description>NAK Interrupt</description>
28112 <description>NYET Interrupt (NYETIntrpt)</description>
28118 <description>No NYET interrupt</description>
28123 <description>NYET Interrupt</description>
28130 <description>Setup Packet Received</description>
28136 <description>No Setup packet received</description>
28141 <description>Setup packet received</description>
28150 <description>Device OUT Endpoint Transfer Size Register</description>
28158 <description>Transfer Size (XferSize)</description>
28164 <description>Packet Count (PktCnt)</description>
28170 <description>RxDPID</description>
28177 <description>DATA0</description>
28182 <description>DATA2 or 1 packet</description>
28187 <description>DATA1 or 2 packets</description>
28192 <description>MDATA or 3 packets</description>
28201 <description>Device OUT Endpoint DMA Address Register</description>
28209 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
28217 <description>Device Control OUT Endpoint Control Register</description>
28225 <description>Maximum Packet Size (MPS)</description>
28231 <description>USB Active Endpoint (USBActEP)</description>
28237 <description>Not Active</description>
28242 <description>USB Active Endpoint</description>
28249 <description>Endpoint Data PID (DPID)</description>
28256 <description>Endpoint Data PID not active</description>
28261 <description>Endpoint Data PID active</description>
28268 <description>NAK Status (NAKSts)</description>
28275 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
28280 … <description>The core is transmitting NAK handshakes on this endpoint</description>
28287 <description>Endpoint Type (EPType)</description>
28293 <description>Control</description>
28298 <description>Isochronous</description>
28303 <description>Bulk</description>
28308 <description>Interrupt</description>
28315 <description>STALL Handshake (Stall)</description>
28321 <description>STALL All non-active tokens</description>
28326 <description>STALL All Active Tokens</description>
28339 <description>No Clear NAK</description>
28344 <description>Clear NAK</description>
28351 <description>Set NAK (SNAK)</description>
28358 <description>No Set NAK</description>
28363 <description>Set NAK</description>
28370 <description>Set DATA0 PID (SetD0PID)</description>
28377 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
28382 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
28389 <description>Set DATA1 PID (SetD1PID)</description>
28396 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
28401 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
28408 <description>Endpoint Disable (EPDis)</description>
28414 <description>No Action</description>
28419 <description>Disable Endpoint</description>
28426 <description>Endpoint Enable (EPEna)</description>
28432 <description>No Action</description>
28437 <description>Enable Endpoint</description>
28446 <description>Device OUT Endpoint Interrupt Register</description>
28454 <description>Transfer Completed Interrupt (XferCompl)</description>
28460 <description>No Transfer Complete Interrupt</description>
28465 <description>Transfer Complete Interrupt</description>
28472 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
28478 <description>No Endpoint Disabled Interrupt</description>
28483 <description>Endpoint Disabled Interrupt</description>
28490 <description>AHB Error (AHBErr)</description>
28496 <description>No AHB Error Interrupt</description>
28501 <description>AHB Error interrupt</description>
28508 <description>SETUP Phase Done (SetUp)</description>
28514 <description>No SETUP Phase Done</description>
28519 <description>SETUP Phase Done</description>
28526 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
28532 <description>No OUT Token Received When Endpoint Disabled</description>
28537 <description>OUT Token Received When Endpoint Disabled</description>
28544 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
28550 <description>No Status Phase Received for Control Write</description>
28555 <description>Status Phase Received for Control Write</description>
28562 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
28568 <description>No Back-to-Back SETUP Packets Received</description>
28573 <description>Back-to-Back SETUP Packets Received</description>
28580 <description>OUT Packet Error (OutPktErr)</description>
28586 <description>No OUT Packet Error</description>
28591 <description>OUT Packet Error</description>
28598 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
28604 <description>No BNA interrupt</description>
28609 <description>BNA interrupt</description>
28616 <description>Packet Drop Status (PktDrpSts)</description>
28622 <description>No interrupt</description>
28627 <description>Packet Drop Status interrupt</description>
28634 <description>NAK Interrupt (BbleErr)</description>
28640 <description>No BbleErr interrupt</description>
28645 <description>BbleErr interrupt</description>
28652 <description>NAK Interrupt (NAKInterrupt)</description>
28658 <description>No NAK interrupt</description>
28663 <description>NAK Interrupt</description>
28670 <description>NYET Interrupt (NYETIntrpt)</description>
28676 <description>No NYET interrupt</description>
28681 <description>NYET Interrupt</description>
28688 <description>Setup Packet Received</description>
28694 <description>No Setup packet received</description>
28699 <description>Setup packet received</description>
28708 <description>Device OUT Endpoint Transfer Size Register</description>
28716 <description>Transfer Size (XferSize)</description>
28722 <description>Packet Count (PktCnt)</description>
28728 <description>RxDPID</description>
28735 <description>DATA0</description>
28740 <description>DATA2 or 1 packet</description>
28745 <description>DATA1 or 2 packets</description>
28750 <description>MDATA or 3 packets</description>
28759 <description>Device OUT Endpoint DMA Address Register</description>
28767 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
28775 <description>Device Control OUT Endpoint Control Register</description>
28783 <description>Maximum Packet Size (MPS)</description>
28789 <description>USB Active Endpoint (USBActEP)</description>
28795 <description>Not Active</description>
28800 <description>USB Active Endpoint</description>
28807 <description>Endpoint Data PID (DPID)</description>
28814 <description>Endpoint Data PID not active</description>
28819 <description>Endpoint Data PID active</description>
28826 <description>NAK Status (NAKSts)</description>
28833 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
28838 … <description>The core is transmitting NAK handshakes on this endpoint</description>
28845 <description>Endpoint Type (EPType)</description>
28851 <description>Control</description>
28856 <description>Isochronous</description>
28861 <description>Bulk</description>
28866 <description>Interrupt</description>
28873 <description>STALL Handshake (Stall)</description>
28879 <description>STALL All non-active tokens</description>
28884 <description>STALL All Active Tokens</description>
28897 <description>No Clear NAK</description>
28902 <description>Clear NAK</description>
28909 <description>Set NAK (SNAK)</description>
28916 <description>No Set NAK</description>
28921 <description>Set NAK</description>
28928 <description>Set DATA0 PID (SetD0PID)</description>
28935 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
28940 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
28947 <description>Set DATA1 PID (SetD1PID)</description>
28954 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
28959 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
28966 <description>Endpoint Disable (EPDis)</description>
28972 <description>No Action</description>
28977 <description>Disable Endpoint</description>
28984 <description>Endpoint Enable (EPEna)</description>
28990 <description>No Action</description>
28995 <description>Enable Endpoint</description>
29004 <description>Device OUT Endpoint Interrupt Register</description>
29012 <description>Transfer Completed Interrupt (XferCompl)</description>
29018 <description>No Transfer Complete Interrupt</description>
29023 <description>Transfer Complete Interrupt</description>
29030 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
29036 <description>No Endpoint Disabled Interrupt</description>
29041 <description>Endpoint Disabled Interrupt</description>
29048 <description>AHB Error (AHBErr)</description>
29054 <description>No AHB Error Interrupt</description>
29059 <description>AHB Error interrupt</description>
29066 <description>SETUP Phase Done (SetUp)</description>
29072 <description>No SETUP Phase Done</description>
29077 <description>SETUP Phase Done</description>
29084 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
29090 <description>No OUT Token Received When Endpoint Disabled</description>
29095 <description>OUT Token Received When Endpoint Disabled</description>
29102 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
29108 <description>No Status Phase Received for Control Write</description>
29113 <description>Status Phase Received for Control Write</description>
29120 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
29126 <description>No Back-to-Back SETUP Packets Received</description>
29131 <description>Back-to-Back SETUP Packets Received</description>
29138 <description>OUT Packet Error (OutPktErr)</description>
29144 <description>No OUT Packet Error</description>
29149 <description>OUT Packet Error</description>
29156 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
29162 <description>No BNA interrupt</description>
29167 <description>BNA interrupt</description>
29174 <description>Packet Drop Status (PktDrpSts)</description>
29180 <description>No interrupt</description>
29185 <description>Packet Drop Status interrupt</description>
29192 <description>NAK Interrupt (BbleErr)</description>
29198 <description>No BbleErr interrupt</description>
29203 <description>BbleErr interrupt</description>
29210 <description>NAK Interrupt (NAKInterrupt)</description>
29216 <description>No NAK interrupt</description>
29221 <description>NAK Interrupt</description>
29228 <description>NYET Interrupt (NYETIntrpt)</description>
29234 <description>No NYET interrupt</description>
29239 <description>NYET Interrupt</description>
29246 <description>Setup Packet Received</description>
29252 <description>No Setup packet received</description>
29257 <description>Setup packet received</description>
29266 <description>Device OUT Endpoint Transfer Size Register</description>
29274 <description>Transfer Size (XferSize)</description>
29280 <description>Packet Count (PktCnt)</description>
29286 <description>RxDPID</description>
29293 <description>DATA0</description>
29298 <description>DATA2 or 1 packet</description>
29303 <description>DATA1 or 2 packets</description>
29308 <description>MDATA or 3 packets</description>
29317 <description>Device OUT Endpoint DMA Address Register</description>
29325 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
29333 <description>Device Control OUT Endpoint Control Register</description>
29341 <description>Maximum Packet Size (MPS)</description>
29347 <description>USB Active Endpoint (USBActEP)</description>
29353 <description>Not Active</description>
29358 <description>USB Active Endpoint</description>
29365 <description>Endpoint Data PID (DPID)</description>
29372 <description>Endpoint Data PID not active</description>
29377 <description>Endpoint Data PID active</description>
29384 <description>NAK Status (NAKSts)</description>
29391 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
29396 … <description>The core is transmitting NAK handshakes on this endpoint</description>
29403 <description>Endpoint Type (EPType)</description>
29409 <description>Control</description>
29414 <description>Isochronous</description>
29419 <description>Bulk</description>
29424 <description>Interrupt</description>
29431 <description>STALL Handshake (Stall)</description>
29437 <description>STALL All non-active tokens</description>
29442 <description>STALL All Active Tokens</description>
29455 <description>No Clear NAK</description>
29460 <description>Clear NAK</description>
29467 <description>Set NAK (SNAK)</description>
29474 <description>No Set NAK</description>
29479 <description>Set NAK</description>
29486 <description>Set DATA0 PID (SetD0PID)</description>
29493 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
29498 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
29505 <description>Set DATA1 PID (SetD1PID)</description>
29512 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
29517 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
29524 <description>Endpoint Disable (EPDis)</description>
29530 <description>No Action</description>
29535 <description>Disable Endpoint</description>
29542 <description>Endpoint Enable (EPEna)</description>
29548 <description>No Action</description>
29553 <description>Enable Endpoint</description>
29562 <description>Device OUT Endpoint Interrupt Register</description>
29570 <description>Transfer Completed Interrupt (XferCompl)</description>
29576 <description>No Transfer Complete Interrupt</description>
29581 <description>Transfer Complete Interrupt</description>
29588 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
29594 <description>No Endpoint Disabled Interrupt</description>
29599 <description>Endpoint Disabled Interrupt</description>
29606 <description>AHB Error (AHBErr)</description>
29612 <description>No AHB Error Interrupt</description>
29617 <description>AHB Error interrupt</description>
29624 <description>SETUP Phase Done (SetUp)</description>
29630 <description>No SETUP Phase Done</description>
29635 <description>SETUP Phase Done</description>
29642 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
29648 <description>No OUT Token Received When Endpoint Disabled</description>
29653 <description>OUT Token Received When Endpoint Disabled</description>
29660 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
29666 <description>No Status Phase Received for Control Write</description>
29671 <description>Status Phase Received for Control Write</description>
29678 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
29684 <description>No Back-to-Back SETUP Packets Received</description>
29689 <description>Back-to-Back SETUP Packets Received</description>
29696 <description>OUT Packet Error (OutPktErr)</description>
29702 <description>No OUT Packet Error</description>
29707 <description>OUT Packet Error</description>
29714 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
29720 <description>No BNA interrupt</description>
29725 <description>BNA interrupt</description>
29732 <description>Packet Drop Status (PktDrpSts)</description>
29738 <description>No interrupt</description>
29743 <description>Packet Drop Status interrupt</description>
29750 <description>NAK Interrupt (BbleErr)</description>
29756 <description>No BbleErr interrupt</description>
29761 <description>BbleErr interrupt</description>
29768 <description>NAK Interrupt (NAKInterrupt)</description>
29774 <description>No NAK interrupt</description>
29779 <description>NAK Interrupt</description>
29786 <description>NYET Interrupt (NYETIntrpt)</description>
29792 <description>No NYET interrupt</description>
29797 <description>NYET Interrupt</description>
29804 <description>Setup Packet Received</description>
29810 <description>No Setup packet received</description>
29815 <description>Setup packet received</description>
29824 <description>Device OUT Endpoint Transfer Size Register</description>
29832 <description>Transfer Size (XferSize)</description>
29838 <description>Packet Count (PktCnt)</description>
29844 <description>RxDPID</description>
29851 <description>DATA0</description>
29856 <description>DATA2 or 1 packet</description>
29861 <description>DATA1 or 2 packets</description>
29866 <description>MDATA or 3 packets</description>
29875 <description>Device OUT Endpoint DMA Address Register</description>
29883 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
29891 <description>Device Control OUT Endpoint Control Register</description>
29899 <description>Maximum Packet Size (MPS)</description>
29905 <description>USB Active Endpoint (USBActEP)</description>
29911 <description>Not Active</description>
29916 <description>USB Active Endpoint</description>
29923 <description>Endpoint Data PID (DPID)</description>
29930 <description>Endpoint Data PID not active</description>
29935 <description>Endpoint Data PID active</description>
29942 <description>NAK Status (NAKSts)</description>
29949 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
29954 … <description>The core is transmitting NAK handshakes on this endpoint</description>
29961 <description>Endpoint Type (EPType)</description>
29967 <description>Control</description>
29972 <description>Isochronous</description>
29977 <description>Bulk</description>
29982 <description>Interrupt</description>
29989 <description>STALL Handshake (Stall)</description>
29995 <description>STALL All non-active tokens</description>
30000 <description>STALL All Active Tokens</description>
30013 <description>No Clear NAK</description>
30018 <description>Clear NAK</description>
30025 <description>Set NAK (SNAK)</description>
30032 <description>No Set NAK</description>
30037 <description>Set NAK</description>
30044 <description>Set DATA0 PID (SetD0PID)</description>
30051 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
30056 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
30063 <description>Set DATA1 PID (SetD1PID)</description>
30070 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
30075 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
30082 <description>Endpoint Disable (EPDis)</description>
30088 <description>No Action</description>
30093 <description>Disable Endpoint</description>
30100 <description>Endpoint Enable (EPEna)</description>
30106 <description>No Action</description>
30111 <description>Enable Endpoint</description>
30120 <description>Device OUT Endpoint Interrupt Register</description>
30128 <description>Transfer Completed Interrupt (XferCompl)</description>
30134 <description>No Transfer Complete Interrupt</description>
30139 <description>Transfer Complete Interrupt</description>
30146 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
30152 <description>No Endpoint Disabled Interrupt</description>
30157 <description>Endpoint Disabled Interrupt</description>
30164 <description>AHB Error (AHBErr)</description>
30170 <description>No AHB Error Interrupt</description>
30175 <description>AHB Error interrupt</description>
30182 <description>SETUP Phase Done (SetUp)</description>
30188 <description>No SETUP Phase Done</description>
30193 <description>SETUP Phase Done</description>
30200 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
30206 <description>No OUT Token Received When Endpoint Disabled</description>
30211 <description>OUT Token Received When Endpoint Disabled</description>
30218 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
30224 <description>No Status Phase Received for Control Write</description>
30229 <description>Status Phase Received for Control Write</description>
30236 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
30242 <description>No Back-to-Back SETUP Packets Received</description>
30247 <description>Back-to-Back SETUP Packets Received</description>
30254 <description>OUT Packet Error (OutPktErr)</description>
30260 <description>No OUT Packet Error</description>
30265 <description>OUT Packet Error</description>
30272 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
30278 <description>No BNA interrupt</description>
30283 <description>BNA interrupt</description>
30290 <description>Packet Drop Status (PktDrpSts)</description>
30296 <description>No interrupt</description>
30301 <description>Packet Drop Status interrupt</description>
30308 <description>NAK Interrupt (BbleErr)</description>
30314 <description>No BbleErr interrupt</description>
30319 <description>BbleErr interrupt</description>
30326 <description>NAK Interrupt (NAKInterrupt)</description>
30332 <description>No NAK interrupt</description>
30337 <description>NAK Interrupt</description>
30344 <description>NYET Interrupt (NYETIntrpt)</description>
30350 <description>No NYET interrupt</description>
30355 <description>NYET Interrupt</description>
30362 <description>Setup Packet Received</description>
30368 <description>No Setup packet received</description>
30373 <description>Setup packet received</description>
30382 <description>Device OUT Endpoint Transfer Size Register</description>
30390 <description>Transfer Size (XferSize)</description>
30396 <description>Packet Count (PktCnt)</description>
30402 <description>RxDPID</description>
30409 <description>DATA0</description>
30414 <description>DATA2 or 1 packet</description>
30419 <description>DATA1 or 2 packets</description>
30424 <description>MDATA or 3 packets</description>
30433 <description>Device OUT Endpoint DMA Address Register</description>
30441 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
30449 <description>Device Control OUT Endpoint Control Register</description>
30457 <description>Maximum Packet Size (MPS)</description>
30463 <description>USB Active Endpoint (USBActEP)</description>
30469 <description>Not Active</description>
30474 <description>USB Active Endpoint</description>
30481 <description>Endpoint Data PID (DPID)</description>
30488 <description>Endpoint Data PID not active</description>
30493 <description>Endpoint Data PID active</description>
30500 <description>NAK Status (NAKSts)</description>
30507 … <description>The core is transmitting non-NAK handshakes based on the FIFO status</description>
30512 … <description>The core is transmitting NAK handshakes on this endpoint</description>
30519 <description>Endpoint Type (EPType)</description>
30525 <description>Control</description>
30530 <description>Isochronous</description>
30535 <description>Bulk</description>
30540 <description>Interrupt</description>
30547 <description>STALL Handshake (Stall)</description>
30553 <description>STALL All non-active tokens</description>
30558 <description>STALL All Active Tokens</description>
30571 <description>No Clear NAK</description>
30576 <description>Clear NAK</description>
30583 <description>Set NAK (SNAK)</description>
30590 <description>No Set NAK</description>
30595 <description>Set NAK</description>
30602 <description>Set DATA0 PID (SetD0PID)</description>
30609 <description>Disables Set DATA0 PID or Do not force Even Frame</description>
30614 …<description>Set Endpoint Data PID to DATA0 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
30621 <description>Set DATA1 PID (SetD1PID)</description>
30628 <description>Disables Set DATA1 PID or Do not force Odd Frame</description>
30633 …<description>Set Endpoint Data PID to DATA1 or Sets EO_FrNum field to odd (micro)Frame</descriptio…
30640 <description>Endpoint Disable (EPDis)</description>
30646 <description>No Action</description>
30651 <description>Disable Endpoint</description>
30658 <description>Endpoint Enable (EPEna)</description>
30664 <description>No Action</description>
30669 <description>Enable Endpoint</description>
30678 <description>Device OUT Endpoint Interrupt Register</description>
30686 <description>Transfer Completed Interrupt (XferCompl)</description>
30692 <description>No Transfer Complete Interrupt</description>
30697 <description>Transfer Complete Interrupt</description>
30704 <description>Endpoint Disabled Interrupt (EPDisbld)</description>
30710 <description>No Endpoint Disabled Interrupt</description>
30715 <description>Endpoint Disabled Interrupt</description>
30722 <description>AHB Error (AHBErr)</description>
30728 <description>No AHB Error Interrupt</description>
30733 <description>AHB Error interrupt</description>
30740 <description>SETUP Phase Done (SetUp)</description>
30746 <description>No SETUP Phase Done</description>
30751 <description>SETUP Phase Done</description>
30758 <description>OUT Token Received When Endpoint Disabled (OUTTknEPdis)</description>
30764 <description>No OUT Token Received When Endpoint Disabled</description>
30769 <description>OUT Token Received When Endpoint Disabled</description>
30776 <description>Status Phase Received for Control Write (StsPhseRcvd)</description>
30782 <description>No Status Phase Received for Control Write</description>
30787 <description>Status Phase Received for Control Write</description>
30794 <description>Back-to-Back SETUP Packets Received (Back2BackSETup)</description>
30800 <description>No Back-to-Back SETUP Packets Received</description>
30805 <description>Back-to-Back SETUP Packets Received</description>
30812 <description>OUT Packet Error (OutPktErr)</description>
30818 <description>No OUT Packet Error</description>
30823 <description>OUT Packet Error</description>
30830 <description>BNA (Buffer Not Available) Interrupt (BNAIntr)</description>
30836 <description>No BNA interrupt</description>
30841 <description>BNA interrupt</description>
30848 <description>Packet Drop Status (PktDrpSts)</description>
30854 <description>No interrupt</description>
30859 <description>Packet Drop Status interrupt</description>
30866 <description>NAK Interrupt (BbleErr)</description>
30872 <description>No BbleErr interrupt</description>
30877 <description>BbleErr interrupt</description>
30884 <description>NAK Interrupt (NAKInterrupt)</description>
30890 <description>No NAK interrupt</description>
30895 <description>NAK Interrupt</description>
30902 <description>NYET Interrupt (NYETIntrpt)</description>
30908 <description>No NYET interrupt</description>
30913 <description>NYET Interrupt</description>
30920 <description>Setup Packet Received</description>
30926 <description>No Setup packet received</description>
30931 <description>Setup packet received</description>
30940 <description>Device OUT Endpoint Transfer Size Register</description>
30948 <description>Transfer Size (XferSize)</description>
30954 <description>Packet Count (PktCnt)</description>
30960 <description>RxDPID</description>
30967 <description>DATA0</description>
30972 <description>DATA2 or 1 packet</description>
30977 <description>DATA1 or 2 packets</description>
30982 <description>MDATA or 3 packets</description>
30991 <description>Device OUT Endpoint DMA Address Register</description>
30999 …<description>Holds the start address of the external memory for storing or fetching endpoint</desc…
31007 <description>Power and Clock Gating Control Register</description>
31015 <description>Stop Pclk (StopPclk)</description>
31021 <description>Disable Stop Pclk</description>
31026 <description>Enable Stop Pclk</description>
31033 <description>Gate Hclk (GateHclk)</description>
31039 … <description>Clears this bit when the USB is resumed or a new session starts</description>
31044 …<description>Sets this bit to gate hclk to modules when the USB is suspended or the session is not…
31051 <description>Reset Power-Down Modules (RstPdwnModule)</description>
31057 <description>Power is turned on</description>
31062 <description>Power is turned off</description>
31069 <description>Enable Sleep Clock Gating</description>
31075 <description>The PHY clock is not gated in Sleep state</description>
31080 … <description>The Core internal clock gating is enabled in Sleep state</description>
31087 <description>PHY In Sleep</description>
31094 <description>Phy not in Sleep state</description>
31099 <description>Phy in Sleep state</description>
31106 <description>L1 Deep Sleep</description>
31113 <description>Non Deep Sleep</description>
31118 <description>Deep Sleep</description>
31125 <description>Restore Mode (RestoreMode)</description>
31131 …description>In Host mode,this bit indicates Host-initiated Resume and Reset. In Device mode, this …
31136 …description>In Host mode,this bit indicates Device-initiated Remote Wakeup. In Device mode, this b…
31143 <description>Essential Register Values Restored (EssRegRestored)</description>
31150 <description>Register values of essential registers are not restored</description>
31155 … <description>Register values of essential registers have been restored</description>
31162 <description>Restore Value (RestoreValue)</description>
31170 <description>Global STAR Fix Disable Register</description>
31178 …<description>Disable the STAR fix added for Device controller to go back to low power mode when Ho…
31184 …<description>Device controller goes back into SUSPENDED state when host ignores Remote Wakeup</des…
31189 …<description>Device controller waits indefinitely without entering SUSPENDED state when host ignor…
31196 …<description>Disable the STAR fix added for Device controller to detect lineK and move to RESUMING…
31202 <description>Device controller detects line K and resumes</description>
31207 <description>Device controller does not detect line K and resume</description>
31214 …description>Disable the STAR fix added for Device controller to reject DATA0 for the first Control…
31220 <description>Transaction Error reported when host sends DATA0 PID</description>
31225 … <description>Transaction Error not reported when host sends DATA0 PID</description>
31232 …<description>Disable the STAR fix added for Host controller to flag error for SSPLIT STALL/NYET</d…
31238 … <description>Transaction Error reported when device sends STALL/NYET for SSPLIT</description>
31243 … <description>Transaction Error not reported when device sends STALL/NYET for SSPLIT</description>
31250 …<description>Disable the STAR fix added for Host controller to accept DATA1 PID from device for IS…
31256 …<description>Transaction Error not reported when device sends DATA1 PID for ISOC Split</descriptio…
31261 … <description>Transaction Error reported when device sends DATA1 PID for ISOC Split</description>
31268 …<description>Disable the STAR fix added for Host controller to handle Faulty cable scenarios</desc…
31274 <description>Fix for handling faulty cable enabled</description>
31279 <description>Fix for handling faulty cable disabled</description>
31286 …<description>Disable the STAR fix added for Host controller LS mode IPG increment from 2 LS bit ti…
31292 <description>Host LS mode IPG is 3 LS bit times</description>
31297 <description>Host LS mode IPG is 2 LS bit times</description>
31304 …<description>Disable the STAR fix added for Device controller to transition to IDLE state during F…
31310 … <description>Device controller transitions to IDLE state during FS device disconnect</description>
31315 …<description>Device controller does not transition to IDLE state during FS device disconnect</desc…
31322 …<description>Disable the STAR fix added for Device controller to not start Remote Wakeup signallin…
31328 …<description>Device controller does not start remote wakeup signalling when host resume has alread…
31333 …<description>Device controller is allowed to start remote wakeup signalling when host resume has a…
31340 …<description>Disable the STAR fix added for Device controller to not hang when Remote Wakeup signa…
31346 …<description>Device controller does not hang when remote wakeup signalling clashes with host resum…
31351 …<description>Device controller hangs when remote wakeup signalling clashes with host resume during…
31358 …description>Disable the STAR fix added for Host controller to wait for IPG duration to send next t…
31364 <description>Host controller checks IPG after NAK/STALL for IN token</description>
31369 … <description>Host controller does not check IPG after NAK/STALL for IN token</description>
31376 …description>Disable the STAR fix added for Host controller to increase the gap between utmi_xcvrse…
31382 …<description>Host controller asserts utmi_txvalid at least 2 utmi_clk cycles after utmi_xcvrselect…
31387 …<description>Host controller can assert utmi_txvalid after 1 utmi_clk cycle of utmi_xcvrselect swi…
31394 …description>Disable the STAR fix added for Host controller to increase the preamble transceiver se…
31400 …description>Host controller waits for previous functional register update to complete before switc…
31405 …description>Host controller does not wait for the previous functional register update to complete …
31412 …description>Disable the STAR fix added for Host controller to report transaction error when DATA0 …
31418 …<description>Host controller reports transaction error when DATA0 PID is received for CTRL STATUS …
31423 …<description>Host controller retries the transfer when DATA0 PID is received for CTRL STATUS IN tr…
31430 …<description>Disable the correction to OpMode/XcvrSel/TermSel on UTMI Interface in Host mode.</des…
31436 …<description>Opmode, XcvrSel, TermSel are changed by the Host Controller after TxValid goes LOW (1…
31441 …description>Opmode, XcvrSel, TermSel are changed by the Host Controller without waiting for TxVali…
31448 …<description>Disable the STAR fix added for correcting Opmode and XcvrSel on UTMI Interface when r…
31454 …<description>Valid Combination of Opmode and XcvrSel is driven when reset is detected in suspend s…
31459 …<description>Invalid Combination of Opmode and XcvrSel is driven when reset is detected in suspend…
31466 …<description>Disable the STAR fix added for correcting Txvalid deassertion on UTMI Interface when …
31472 …<description>Txvalid is deasserted during soft disconnect after receiving Txready from the PHY</de…
31477 …<description>Txvalid is deasserted during soft disconnect without waiting for Txready from the PHY…
31484 …<description>Disable the STAR fix added for correcting Host behavior when port is disabled.</descr…
31490 <description>Txvalid is not asserted when port is disabled</description>
31495 <description>Txvalid can be asserted when port is disabled</description>
31506 <description>Unspecified</description>
31514 <description>Description collection: Data FIFO Access Register Map 0</description>
31523 <description>Unspecified</description>
31531 <description>Description collection: Data FIFO Direct Access Register Map</description>
31542 <description>USBHSCORE 1</description>
31549 <description>System protection unit 0</description>
31569 … <description>A security violation has been detected on one or several peripherals</description>
31577 … <description>A security violation has been detected on one or several peripherals</description>
31583 <description>Event not generated</description>
31588 <description>Event generated</description>
31597 <description>Enable or disable interrupt</description>
31605 <description>Enable or disable interrupt for event PERIPHACCERR</description>
31611 <description>Disable</description>
31616 <description>Enable</description>
31625 <description>Enable interrupt</description>
31633 <description>Write '1' to enable interrupt for event PERIPHACCERR</description>
31640 <description>Read: Disabled</description>
31645 <description>Read: Enabled</description>
31653 <description>Enable</description>
31662 <description>Disable interrupt</description>
31670 <description>Write '1' to disable interrupt for event PERIPHACCERR</description>
31677 <description>Read: Disabled</description>
31682 <description>Read: Enabled</description>
31690 <description>Disable</description>
31699 <description>Pending interrupts</description>
31707 <description>Read pending status of interrupt for event PERIPHACCERR</description>
31714 <description>Read: Not pending</description>
31719 <description>Read: Pending</description>
31728 <description>Unspecified</description>
31734 <description>Address of the transaction that caused first error.</description>
31742 <description>Address</description>
31753 <description>Unspecified</description>
31759 …<description>Description cluster: Get and set the applicable access permissions for the peripheral…
31767 <description>Read capabilities for TrustZone Cortex-M secure attribute</description>
31774 … <description>This peripheral is always accessible as a non-secure peripheral</description>
31779 … <description>This peripheral is always accessible as a secure peripheral</description>
31784 …<description>Non-secure or secure attribute for this peripheral is defined by the PERIPH[n].PERM r…
31789 … <description>This peripheral implements the split security mechanism.</description>
31796 <description>Read the peripheral DMA capabilities</description>
31803 <description>Peripheral has no DMA capability</description>
31808 …<description>Peripheral has DMA and DMA transfers always have the same security attribute as assig…
31813 …<description>Peripheral has DMA and DMA transfers can have a different security attribute than the…
31820 <description>Peripheral security mapping</description>
31826 … <description>Peripheral is mapped in secure peripheral address space</description>
31831 …description>If SECUREMAPPING == UserSelectable: Peripheral is mapped in non-secure peripheral addr…
31838 <description>Security attribution for the DMA transfer</description>
31844 …<description>DMA transfers initiated by this peripheral have the secure attribute set</description>
31849 …<description>DMA transfers initiated by this peripheral have the non-secure attribute set</descrip…
31856 <description>Register lock</description>
31863 <description>This register can be updated</description>
31868 … <description>The content of this register can not be changed until the next reset</description>
31875 … <description>Indicates if a peripheral is present with peripheral slave index n</description>
31882 <description>Peripheral is not present</description>
31887 <description>Peripheral is present</description>
31897 <description>Unspecified</description>
31903 <description>Unspecified</description>
31911 …<description>Description collection: Configuration of features for channel n of DPPIC</description>
31919 <description>SECATTR feature</description>
31925 <description>Feature is available for non-secure usage</description>
31930 <description>Feature is reserved for secure usage</description>
31937 <description>LOCK feature</description>
31944 <description>Feature permissions can be updated</description>
31949 … <description>Feature permissions can not be changed until the next reset</description>
31960 …<description>Description collection: Configuration of features for channel group n of DPPIC</descr…
31968 <description>SECATTR feature</description>
31974 <description>Feature is available for non-secure usage</description>
31979 <description>Feature is reserved for secure usage</description>
31986 <description>LOCK feature</description>
31993 <description>Feature permissions can be updated</description>
31998 … <description>Feature permissions can not be changed until the next reset</description>
32010 <description>Unspecified</description>
32018 …<description>Description collection: Configuration of features for channel o of GPIOTE[n]</descrip…
32026 <description>SECATTR feature</description>
32032 <description>Feature is available for non-secure usage</description>
32037 <description>Feature is reserved for secure usage</description>
32044 <description>LOCK feature</description>
32051 <description>Feature permissions can be updated</description>
32056 … <description>Feature permissions can not be changed until the next reset</description>
32067 …<description>Description collection: Configuration of features for interrupt o of GPIOTE[n]</descr…
32075 <description>SECATTR feature</description>
32081 <description>Feature is available for non-secure usage</description>
32086 <description>Feature is reserved for secure usage</description>
32093 <description>LOCK feature</description>
32100 <description>Feature permissions can be updated</description>
32105 … <description>Feature permissions can not be changed until the next reset</description>
32117 <description>Unspecified</description>
32125 … <description>Description collection: Configuration of features for GPIO[n] PIN[o]</description>
32133 <description>SECATTR feature</description>
32139 <description>Feature is available for non-secure usage</description>
32144 <description>Feature is reserved for secure usage</description>
32151 <description>LOCK feature</description>
32158 <description>Feature permissions can be updated</description>
32163 … <description>Feature permissions can not be changed until the next reset</description>
32173 <description>Unspecified</description>
32181 … <description>Description collection: Configuration of features for CC n of GRTC</description>
32189 <description>SECATTR feature</description>
32195 <description>Feature is available for non-secure usage</description>
32200 <description>Feature is reserved for secure usage</description>
32207 <description>LOCK feature</description>
32214 <description>Feature permissions can be updated</description>
32219 … <description>Feature permissions can not be changed until the next reset</description>
32228 <description>Configuration of feature for PWMCONFIG of GRTC</description>
32236 <description>SECATTR feature</description>
32242 <description>Feature is available for non-secure usage</description>
32247 <description>Feature is reserved for secure usage</description>
32254 <description>LOCK feature</description>
32261 <description>Feature permissions can be updated</description>
32266 … <description>Feature permissions can not be changed until the next reset</description>
32275 <description>Configuration of features for CLKOUT/CLKCFG of GRTC</description>
32283 <description>SECATTR feature</description>
32289 <description>Feature is available for non-secure usage</description>
32294 <description>Feature is reserved for secure usage</description>
32301 <description>LOCK feature</description>
32308 <description>Feature permissions can be updated</description>
32313 … <description>Feature permissions can not be changed until the next reset</description>
32322 … <description>Configuration of features for SYSCOUNTERL/SYSCOUNTERH of GRTC</description>
32330 <description>SECATTR feature</description>
32336 <description>Feature is available for non-secure usage</description>
32341 <description>Feature is reserved for secure usage</description>
32348 <description>LOCK feature</description>
32355 <description>Feature permissions can be updated</description>
32360 … <description>Feature permissions can not be changed until the next reset</description>
32371 …<description>Description collection: Configuration of features for interrupt n of GRTC</descriptio…
32379 <description>SECATTR feature</description>
32385 <description>Feature is available for non-secure usage</description>
32390 <description>Feature is reserved for secure usage</description>
32397 <description>LOCK feature</description>
32404 <description>Feature permissions can be updated</description>
32409 … <description>Feature permissions can not be changed until the next reset</description>
32422 <description>Memory Privilege Controller</description>
32442 <description>Memory Access Error event</description>
32450 <description>Memory Access Error event</description>
32456 <description>Event not generated</description>
32461 <description>Event generated</description>
32470 <description>Enable or disable interrupt</description>
32478 <description>Enable or disable interrupt for event MEMACCERR</description>
32484 <description>Disable</description>
32489 <description>Enable</description>
32498 <description>Enable interrupt</description>
32506 <description>Write '1' to enable interrupt for event MEMACCERR</description>
32513 <description>Read: Disabled</description>
32518 <description>Read: Enabled</description>
32526 <description>Enable</description>
32535 <description>Disable interrupt</description>
32543 <description>Write '1' to disable interrupt for event MEMACCERR</description>
32550 <description>Read: Disabled</description>
32555 <description>Read: Enabled</description>
32563 <description>Disable</description>
32572 <description>Memory Access Error status registers</description>
32578 …<description>Target Address of Memory Access Error. Register content won't be changed as long as M…
32586 <description>Target address for erroneous access</description>
32594 …description>Access information for the transaction that triggered a memory access error. Register …
32602 <description>Read bit of bus access</description>
32608 <description>Read access bit was set</description>
32613 <description>Read access bit was not set</description>
32620 <description>Write bit of bus access</description>
32626 <description>Write access bit was set</description>
32631 <description>Write access bit was not set</description>
32638 <description>Execute bit of bus access</description>
32644 <description>Execute access bit was set</description>
32649 <description>Execute access bit was not set</description>
32656 <description>Secure bit of bus access</description>
32662 <description>Secure access bit was set</description>
32667 <description>Secure access bit was not set</description>
32674 <description>Source of memory access error</description>
32680 <description>Error was triggered by MPC module</description>
32685 <description>Error was triggered by a Subordinate</description>
32697 <description>Special privilege tables</description>
32703 <description>Description cluster: Override region n Configuration register</description>
32711 <description>Lock Override region n</description>
32718 <description>Override region n settings can be updated</description>
32723 … <description>Override region n settings can't be updated until next reset</description>
32730 <description>Enable Override region n</description>
32736 <description>Override region n is not used</description>
32741 <description>Override region n is used</description>
32750 <description>Description cluster: Override region n Start Address</description>
32758 <description>Start address for override region n</description>
32766 <description>Description cluster: Override region n End Address</description>
32774 <description>End address for override region n</description>
32782 … <description>Description cluster: Permission settings for override region n</description>
32790 <description>Read access</description>
32796 <description>Read access to override region n is not allowed</description>
32801 <description>Read access to override region n is allowed</description>
32808 <description>Write access</description>
32814 <description>Write access to override region n is not allowed</description>
32819 <description>Write access to override region n is allowed</description>
32826 <description>Software execute</description>
32832 … <description>Software execution from override region n is not allowed</description>
32837 <description>Software execution from override region n is allowed</description>
32844 <description>Security mapping</description>
32850 … <description>Override region n is mapped in secure memory address space</description>
32855 … <description>Override region n is mapped in non-secure memory address space</description>
32864 …<description>Description cluster: Masks permission setting fields from register OVERRIDE.PERM</des…
32872 <description>Read mask</description>
32878 … <description>Permission setting READ in OVERRIDE register will not be applied</description>
32883 … <description>Permission setting READ in OVERRIDE register will be applied</description>
32890 <description>Write mask</description>
32896 … <description>Permission setting WRITE in OVERRIDE register will not be applied</description>
32901 … <description>Permission setting WRITE in OVERRIDE register will be applied</description>
32908 <description>Execute mask</description>
32914 … <description>Permission setting EXECUTE in OVERRIDE register will not be applied</description>
32919 … <description>Permission setting EXECUTE in OVERRIDE register will be applied</description>
32926 <description>Security mapping mask</description>
32932 … <description>Permission setting SECATTR in OVERRIDE register will not be applied</description>
32937 … <description>Permission setting SECATTR in OVERRIDE register will be applied</description>
32949 <description>Distributed programmable peripheral interconnect controller 0</description>
32968 <description>Channel group tasks</description>
32974 <description>Description cluster: Enable channel group n</description>
32982 <description>Enable channel group n</description>
32988 <description>Trigger task</description>
32997 <description>Description cluster: Disable channel group n</description>
33005 <description>Disable channel group n</description>
33011 <description>Trigger task</description>
33023 <description>Subscribe configuration for tasks</description>
33029 … <description>Description cluster: Subscribe configuration for task CHG[n].EN</description>
33037 <description>DPPI channel that task CHG[n].EN will subscribe to</description>
33048 <description>Disable subscription</description>
33053 <description>Enable subscription</description>
33062 … <description>Description cluster: Subscribe configuration for task CHG[n].DIS</description>
33070 <description>DPPI channel that task CHG[n].DIS will subscribe to</description>
33081 <description>Disable subscription</description>
33086 <description>Enable subscription</description>
33096 <description>Channel enable register</description>
33104 <description>Enable or disable channel 0</description>
33110 <description>Disable channel</description>
33115 <description>Enable channel</description>
33122 <description>Enable or disable channel 1</description>
33128 <description>Disable channel</description>
33133 <description>Enable channel</description>
33140 <description>Enable or disable channel 2</description>
33146 <description>Disable channel</description>
33151 <description>Enable channel</description>
33158 <description>Enable or disable channel 3</description>
33164 <description>Disable channel</description>
33169 <description>Enable channel</description>
33176 <description>Enable or disable channel 4</description>
33182 <description>Disable channel</description>
33187 <description>Enable channel</description>
33194 <description>Enable or disable channel 5</description>
33200 <description>Disable channel</description>
33205 <description>Enable channel</description>
33212 <description>Enable or disable channel 6</description>
33218 <description>Disable channel</description>
33223 <description>Enable channel</description>
33230 <description>Enable or disable channel 7</description>
33236 <description>Disable channel</description>
33241 <description>Enable channel</description>
33248 <description>Enable or disable channel 8</description>
33254 <description>Disable channel</description>
33259 <description>Enable channel</description>
33266 <description>Enable or disable channel 9</description>
33272 <description>Disable channel</description>
33277 <description>Enable channel</description>
33284 <description>Enable or disable channel 10</description>
33290 <description>Disable channel</description>
33295 <description>Enable channel</description>
33302 <description>Enable or disable channel 11</description>
33308 <description>Disable channel</description>
33313 <description>Enable channel</description>
33320 <description>Enable or disable channel 12</description>
33326 <description>Disable channel</description>
33331 <description>Enable channel</description>
33338 <description>Enable or disable channel 13</description>
33344 <description>Disable channel</description>
33349 <description>Enable channel</description>
33356 <description>Enable or disable channel 14</description>
33362 <description>Disable channel</description>
33367 <description>Enable channel</description>
33374 <description>Enable or disable channel 15</description>
33380 <description>Disable channel</description>
33385 <description>Enable channel</description>
33392 <description>Enable or disable channel 16</description>
33398 <description>Disable channel</description>
33403 <description>Enable channel</description>
33410 <description>Enable or disable channel 17</description>
33416 <description>Disable channel</description>
33421 <description>Enable channel</description>
33428 <description>Enable or disable channel 18</description>
33434 <description>Disable channel</description>
33439 <description>Enable channel</description>
33446 <description>Enable or disable channel 19</description>
33452 <description>Disable channel</description>
33457 <description>Enable channel</description>
33464 <description>Enable or disable channel 20</description>
33470 <description>Disable channel</description>
33475 <description>Enable channel</description>
33482 <description>Enable or disable channel 21</description>
33488 <description>Disable channel</description>
33493 <description>Enable channel</description>
33500 <description>Enable or disable channel 22</description>
33506 <description>Disable channel</description>
33511 <description>Enable channel</description>
33518 <description>Enable or disable channel 23</description>
33524 <description>Disable channel</description>
33529 <description>Enable channel</description>
33538 <description>Channel enable set register</description>
33547 <description>Channel 0 enable set register. Writing 0 has no effect.</description>
33554 <description>Read: Channel disabled</description>
33559 <description>Read: Channel enabled</description>
33567 <description>Write: Enable channel</description>
33574 <description>Channel 1 enable set register. Writing 0 has no effect.</description>
33581 <description>Read: Channel disabled</description>
33586 <description>Read: Channel enabled</description>
33594 <description>Write: Enable channel</description>
33601 <description>Channel 2 enable set register. Writing 0 has no effect.</description>
33608 <description>Read: Channel disabled</description>
33613 <description>Read: Channel enabled</description>
33621 <description>Write: Enable channel</description>
33628 <description>Channel 3 enable set register. Writing 0 has no effect.</description>
33635 <description>Read: Channel disabled</description>
33640 <description>Read: Channel enabled</description>
33648 <description>Write: Enable channel</description>
33655 <description>Channel 4 enable set register. Writing 0 has no effect.</description>
33662 <description>Read: Channel disabled</description>
33667 <description>Read: Channel enabled</description>
33675 <description>Write: Enable channel</description>
33682 <description>Channel 5 enable set register. Writing 0 has no effect.</description>
33689 <description>Read: Channel disabled</description>
33694 <description>Read: Channel enabled</description>
33702 <description>Write: Enable channel</description>
33709 <description>Channel 6 enable set register. Writing 0 has no effect.</description>
33716 <description>Read: Channel disabled</description>
33721 <description>Read: Channel enabled</description>
33729 <description>Write: Enable channel</description>
33736 <description>Channel 7 enable set register. Writing 0 has no effect.</description>
33743 <description>Read: Channel disabled</description>
33748 <description>Read: Channel enabled</description>
33756 <description>Write: Enable channel</description>
33763 <description>Channel 8 enable set register. Writing 0 has no effect.</description>
33770 <description>Read: Channel disabled</description>
33775 <description>Read: Channel enabled</description>
33783 <description>Write: Enable channel</description>
33790 <description>Channel 9 enable set register. Writing 0 has no effect.</description>
33797 <description>Read: Channel disabled</description>
33802 <description>Read: Channel enabled</description>
33810 <description>Write: Enable channel</description>
33817 <description>Channel 10 enable set register. Writing 0 has no effect.</description>
33824 <description>Read: Channel disabled</description>
33829 <description>Read: Channel enabled</description>
33837 <description>Write: Enable channel</description>
33844 <description>Channel 11 enable set register. Writing 0 has no effect.</description>
33851 <description>Read: Channel disabled</description>
33856 <description>Read: Channel enabled</description>
33864 <description>Write: Enable channel</description>
33871 <description>Channel 12 enable set register. Writing 0 has no effect.</description>
33878 <description>Read: Channel disabled</description>
33883 <description>Read: Channel enabled</description>
33891 <description>Write: Enable channel</description>
33898 <description>Channel 13 enable set register. Writing 0 has no effect.</description>
33905 <description>Read: Channel disabled</description>
33910 <description>Read: Channel enabled</description>
33918 <description>Write: Enable channel</description>
33925 <description>Channel 14 enable set register. Writing 0 has no effect.</description>
33932 <description>Read: Channel disabled</description>
33937 <description>Read: Channel enabled</description>
33945 <description>Write: Enable channel</description>
33952 <description>Channel 15 enable set register. Writing 0 has no effect.</description>
33959 <description>Read: Channel disabled</description>
33964 <description>Read: Channel enabled</description>
33972 <description>Write: Enable channel</description>
33979 <description>Channel 16 enable set register. Writing 0 has no effect.</description>
33986 <description>Read: Channel disabled</description>
33991 <description>Read: Channel enabled</description>
33999 <description>Write: Enable channel</description>
34006 <description>Channel 17 enable set register. Writing 0 has no effect.</description>
34013 <description>Read: Channel disabled</description>
34018 <description>Read: Channel enabled</description>
34026 <description>Write: Enable channel</description>
34033 <description>Channel 18 enable set register. Writing 0 has no effect.</description>
34040 <description>Read: Channel disabled</description>
34045 <description>Read: Channel enabled</description>
34053 <description>Write: Enable channel</description>
34060 <description>Channel 19 enable set register. Writing 0 has no effect.</description>
34067 <description>Read: Channel disabled</description>
34072 <description>Read: Channel enabled</description>
34080 <description>Write: Enable channel</description>
34087 <description>Channel 20 enable set register. Writing 0 has no effect.</description>
34094 <description>Read: Channel disabled</description>
34099 <description>Read: Channel enabled</description>
34107 <description>Write: Enable channel</description>
34114 <description>Channel 21 enable set register. Writing 0 has no effect.</description>
34121 <description>Read: Channel disabled</description>
34126 <description>Read: Channel enabled</description>
34134 <description>Write: Enable channel</description>
34141 <description>Channel 22 enable set register. Writing 0 has no effect.</description>
34148 <description>Read: Channel disabled</description>
34153 <description>Read: Channel enabled</description>
34161 <description>Write: Enable channel</description>
34168 <description>Channel 23 enable set register. Writing 0 has no effect.</description>
34175 <description>Read: Channel disabled</description>
34180 <description>Read: Channel enabled</description>
34188 <description>Write: Enable channel</description>
34197 <description>Channel enable clear register</description>
34206 <description>Channel 0 enable clear register. Writing 0 has no effect.</description>
34213 <description>Read: Channel disabled</description>
34218 <description>Read: Channel enabled</description>
34226 <description>Write: Disable channel</description>
34233 <description>Channel 1 enable clear register. Writing 0 has no effect.</description>
34240 <description>Read: Channel disabled</description>
34245 <description>Read: Channel enabled</description>
34253 <description>Write: Disable channel</description>
34260 <description>Channel 2 enable clear register. Writing 0 has no effect.</description>
34267 <description>Read: Channel disabled</description>
34272 <description>Read: Channel enabled</description>
34280 <description>Write: Disable channel</description>
34287 <description>Channel 3 enable clear register. Writing 0 has no effect.</description>
34294 <description>Read: Channel disabled</description>
34299 <description>Read: Channel enabled</description>
34307 <description>Write: Disable channel</description>
34314 <description>Channel 4 enable clear register. Writing 0 has no effect.</description>
34321 <description>Read: Channel disabled</description>
34326 <description>Read: Channel enabled</description>
34334 <description>Write: Disable channel</description>
34341 <description>Channel 5 enable clear register. Writing 0 has no effect.</description>
34348 <description>Read: Channel disabled</description>
34353 <description>Read: Channel enabled</description>
34361 <description>Write: Disable channel</description>
34368 <description>Channel 6 enable clear register. Writing 0 has no effect.</description>
34375 <description>Read: Channel disabled</description>
34380 <description>Read: Channel enabled</description>
34388 <description>Write: Disable channel</description>
34395 <description>Channel 7 enable clear register. Writing 0 has no effect.</description>
34402 <description>Read: Channel disabled</description>
34407 <description>Read: Channel enabled</description>
34415 <description>Write: Disable channel</description>
34422 <description>Channel 8 enable clear register. Writing 0 has no effect.</description>
34429 <description>Read: Channel disabled</description>
34434 <description>Read: Channel enabled</description>
34442 <description>Write: Disable channel</description>
34449 <description>Channel 9 enable clear register. Writing 0 has no effect.</description>
34456 <description>Read: Channel disabled</description>
34461 <description>Read: Channel enabled</description>
34469 <description>Write: Disable channel</description>
34476 <description>Channel 10 enable clear register. Writing 0 has no effect.</description>
34483 <description>Read: Channel disabled</description>
34488 <description>Read: Channel enabled</description>
34496 <description>Write: Disable channel</description>
34503 <description>Channel 11 enable clear register. Writing 0 has no effect.</description>
34510 <description>Read: Channel disabled</description>
34515 <description>Read: Channel enabled</description>
34523 <description>Write: Disable channel</description>
34530 <description>Channel 12 enable clear register. Writing 0 has no effect.</description>
34537 <description>Read: Channel disabled</description>
34542 <description>Read: Channel enabled</description>
34550 <description>Write: Disable channel</description>
34557 <description>Channel 13 enable clear register. Writing 0 has no effect.</description>
34564 <description>Read: Channel disabled</description>
34569 <description>Read: Channel enabled</description>
34577 <description>Write: Disable channel</description>
34584 <description>Channel 14 enable clear register. Writing 0 has no effect.</description>
34591 <description>Read: Channel disabled</description>
34596 <description>Read: Channel enabled</description>
34604 <description>Write: Disable channel</description>
34611 <description>Channel 15 enable clear register. Writing 0 has no effect.</description>
34618 <description>Read: Channel disabled</description>
34623 <description>Read: Channel enabled</description>
34631 <description>Write: Disable channel</description>
34638 <description>Channel 16 enable clear register. Writing 0 has no effect.</description>
34645 <description>Read: Channel disabled</description>
34650 <description>Read: Channel enabled</description>
34658 <description>Write: Disable channel</description>
34665 <description>Channel 17 enable clear register. Writing 0 has no effect.</description>
34672 <description>Read: Channel disabled</description>
34677 <description>Read: Channel enabled</description>
34685 <description>Write: Disable channel</description>
34692 <description>Channel 18 enable clear register. Writing 0 has no effect.</description>
34699 <description>Read: Channel disabled</description>
34704 <description>Read: Channel enabled</description>
34712 <description>Write: Disable channel</description>
34719 <description>Channel 19 enable clear register. Writing 0 has no effect.</description>
34726 <description>Read: Channel disabled</description>
34731 <description>Read: Channel enabled</description>
34739 <description>Write: Disable channel</description>
34746 <description>Channel 20 enable clear register. Writing 0 has no effect.</description>
34753 <description>Read: Channel disabled</description>
34758 <description>Read: Channel enabled</description>
34766 <description>Write: Disable channel</description>
34773 <description>Channel 21 enable clear register. Writing 0 has no effect.</description>
34780 <description>Read: Channel disabled</description>
34785 <description>Read: Channel enabled</description>
34793 <description>Write: Disable channel</description>
34800 <description>Channel 22 enable clear register. Writing 0 has no effect.</description>
34807 <description>Read: Channel disabled</description>
34812 <description>Read: Channel enabled</description>
34820 <description>Write: Disable channel</description>
34827 <description>Channel 23 enable clear register. Writing 0 has no effect.</description>
34834 <description>Read: Channel disabled</description>
34839 <description>Read: Channel enabled</description>
34847 <description>Write: Disable channel</description>
34858 …description>Description collection: Channel group n Note: Writes to this register are ignored if e…
34866 <description>Include or exclude channel 0</description>
34872 <description>Exclude</description>
34877 <description>Include</description>
34884 <description>Include or exclude channel 1</description>
34890 <description>Exclude</description>
34895 <description>Include</description>
34902 <description>Include or exclude channel 2</description>
34908 <description>Exclude</description>
34913 <description>Include</description>
34920 <description>Include or exclude channel 3</description>
34926 <description>Exclude</description>
34931 <description>Include</description>
34938 <description>Include or exclude channel 4</description>
34944 <description>Exclude</description>
34949 <description>Include</description>
34956 <description>Include or exclude channel 5</description>
34962 <description>Exclude</description>
34967 <description>Include</description>
34974 <description>Include or exclude channel 6</description>
34980 <description>Exclude</description>
34985 <description>Include</description>
34992 <description>Include or exclude channel 7</description>
34998 <description>Exclude</description>
35003 <description>Include</description>
35010 <description>Include or exclude channel 8</description>
35016 <description>Exclude</description>
35021 <description>Include</description>
35028 <description>Include or exclude channel 9</description>
35034 <description>Exclude</description>
35039 <description>Include</description>
35046 <description>Include or exclude channel 10</description>
35052 <description>Exclude</description>
35057 <description>Include</description>
35064 <description>Include or exclude channel 11</description>
35070 <description>Exclude</description>
35075 <description>Include</description>
35082 <description>Include or exclude channel 12</description>
35088 <description>Exclude</description>
35093 <description>Include</description>
35100 <description>Include or exclude channel 13</description>
35106 <description>Exclude</description>
35111 <description>Include</description>
35118 <description>Include or exclude channel 14</description>
35124 <description>Exclude</description>
35129 <description>Include</description>
35136 <description>Include or exclude channel 15</description>
35142 <description>Exclude</description>
35147 <description>Include</description>
35154 <description>Include or exclude channel 16</description>
35160 <description>Exclude</description>
35165 <description>Include</description>
35172 <description>Include or exclude channel 17</description>
35178 <description>Exclude</description>
35183 <description>Include</description>
35190 <description>Include or exclude channel 18</description>
35196 <description>Exclude</description>
35201 <description>Include</description>
35208 <description>Include or exclude channel 19</description>
35214 <description>Exclude</description>
35219 <description>Include</description>
35226 <description>Include or exclude channel 20</description>
35232 <description>Exclude</description>
35237 <description>Include</description>
35244 <description>Include or exclude channel 21</description>
35250 <description>Exclude</description>
35255 <description>Include</description>
35262 <description>Include or exclude channel 22</description>
35268 <description>Exclude</description>
35273 <description>Include</description>
35280 <description>Include or exclude channel 23</description>
35286 <description>Exclude</description>
35291 <description>Include</description>
35302 <description>Distributed programmable peripheral interconnect controller 1</description>
35311 <description>PPIB APB registers 0</description>
35328 …<description>Description collection: This task is unused, but the PPIB provides the SUBSCRIBE task…
35336 …<description>This task is unused, but the PPIB provides the SUBSCRIBE task to connect SEND [n] tas…
35342 <description>Trigger task</description>
35353 … <description>Description collection: Subscribe configuration for task SEND[n]</description>
35361 <description>DPPI channel that task SEND[n] will subscribe to</description>
35372 <description>Disable subscription</description>
35377 <description>Enable subscription</description>
35388 …<description>Description collection: This event is unused, but the PPIB provides the PUBLISH event…
35396 …<description>This event is unused, but the PPIB provides the PUBLISH event to connect RECEIVE [n] …
35402 <description>Event not generated</description>
35407 <description>Event generated</description>
35418 … <description>Description collection: Publish configuration for event RECEIVE[n]</description>
35426 <description>DPPI channel that event RECEIVE[n] will publish to</description>
35437 <description>Disable publishing</description>
35442 <description>Enable publishing</description>
35451 <description>Unspecified</description>
35457 …<description>The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear.</description>
35465 <description>The status for tasks overflow at SUBSCRIBE_SEND[0].</description>
35471 <description>Task overflow is happened.</description>
35476 <description>Task overflow is not happened.</description>
35483 <description>The status for tasks overflow at SUBSCRIBE_SEND[1].</description>
35489 <description>Task overflow is happened.</description>
35494 <description>Task overflow is not happened.</description>
35501 <description>The status for tasks overflow at SUBSCRIBE_SEND[2].</description>
35507 <description>Task overflow is happened.</description>
35512 <description>Task overflow is not happened.</description>
35519 <description>The status for tasks overflow at SUBSCRIBE_SEND[3].</description>
35525 <description>Task overflow is happened.</description>
35530 <description>Task overflow is not happened.</description>
35537 <description>The status for tasks overflow at SUBSCRIBE_SEND[4].</description>
35543 <description>Task overflow is happened.</description>
35548 <description>Task overflow is not happened.</description>
35555 <description>The status for tasks overflow at SUBSCRIBE_SEND[5].</description>
35561 <description>Task overflow is happened.</description>
35566 <description>Task overflow is not happened.</description>
35573 <description>The status for tasks overflow at SUBSCRIBE_SEND[6].</description>
35579 <description>Task overflow is happened.</description>
35584 <description>Task overflow is not happened.</description>
35591 <description>The status for tasks overflow at SUBSCRIBE_SEND[7].</description>
35597 <description>Task overflow is happened.</description>
35602 <description>Task overflow is not happened.</description>
35609 <description>The status for tasks overflow at SUBSCRIBE_SEND[8].</description>
35615 <description>Task overflow is happened.</description>
35620 <description>Task overflow is not happened.</description>
35627 <description>The status for tasks overflow at SUBSCRIBE_SEND[9].</description>
35633 <description>Task overflow is happened.</description>
35638 <description>Task overflow is not happened.</description>
35645 <description>The status for tasks overflow at SUBSCRIBE_SEND[10].</description>
35651 <description>Task overflow is happened.</description>
35656 <description>Task overflow is not happened.</description>
35663 <description>The status for tasks overflow at SUBSCRIBE_SEND[11].</description>
35669 <description>Task overflow is happened.</description>
35674 <description>Task overflow is not happened.</description>
35681 <description>The status for tasks overflow at SUBSCRIBE_SEND[12].</description>
35687 <description>Task overflow is happened.</description>
35692 <description>Task overflow is not happened.</description>
35699 <description>The status for tasks overflow at SUBSCRIBE_SEND[13].</description>
35705 <description>Task overflow is happened.</description>
35710 <description>Task overflow is not happened.</description>
35717 <description>The status for tasks overflow at SUBSCRIBE_SEND[14].</description>
35723 <description>Task overflow is happened.</description>
35728 <description>Task overflow is not happened.</description>
35735 <description>The status for tasks overflow at SUBSCRIBE_SEND[15].</description>
35741 <description>Task overflow is happened.</description>
35746 <description>Task overflow is not happened.</description>
35753 <description>The status for tasks overflow at SUBSCRIBE_SEND[16].</description>
35759 <description>Task overflow is happened.</description>
35764 <description>Task overflow is not happened.</description>
35771 <description>The status for tasks overflow at SUBSCRIBE_SEND[17].</description>
35777 <description>Task overflow is happened.</description>
35782 <description>Task overflow is not happened.</description>
35789 <description>The status for tasks overflow at SUBSCRIBE_SEND[18].</description>
35795 <description>Task overflow is happened.</description>
35800 <description>Task overflow is not happened.</description>
35807 <description>The status for tasks overflow at SUBSCRIBE_SEND[19].</description>
35813 <description>Task overflow is happened.</description>
35818 <description>Task overflow is not happened.</description>
35825 <description>The status for tasks overflow at SUBSCRIBE_SEND[20].</description>
35831 <description>Task overflow is happened.</description>
35836 <description>Task overflow is not happened.</description>
35843 <description>The status for tasks overflow at SUBSCRIBE_SEND[21].</description>
35849 <description>Task overflow is happened.</description>
35854 <description>Task overflow is not happened.</description>
35861 <description>The status for tasks overflow at SUBSCRIBE_SEND[22].</description>
35867 <description>Task overflow is happened.</description>
35872 <description>Task overflow is not happened.</description>
35879 <description>The status for tasks overflow at SUBSCRIBE_SEND[23].</description>
35885 <description>Task overflow is happened.</description>
35890 <description>Task overflow is not happened.</description>
35897 <description>The status for tasks overflow at SUBSCRIBE_SEND[24].</description>
35903 <description>Task overflow is happened.</description>
35908 <description>Task overflow is not happened.</description>
35915 <description>The status for tasks overflow at SUBSCRIBE_SEND[25].</description>
35921 <description>Task overflow is happened.</description>
35926 <description>Task overflow is not happened.</description>
35933 <description>The status for tasks overflow at SUBSCRIBE_SEND[26].</description>
35939 <description>Task overflow is happened.</description>
35944 <description>Task overflow is not happened.</description>
35951 <description>The status for tasks overflow at SUBSCRIBE_SEND[27].</description>
35957 <description>Task overflow is happened.</description>
35962 <description>Task overflow is not happened.</description>
35969 <description>The status for tasks overflow at SUBSCRIBE_SEND[28].</description>
35975 <description>Task overflow is happened.</description>
35980 <description>Task overflow is not happened.</description>
35987 <description>The status for tasks overflow at SUBSCRIBE_SEND[29].</description>
35993 <description>Task overflow is happened.</description>
35998 <description>Task overflow is not happened.</description>
36005 <description>The status for tasks overflow at SUBSCRIBE_SEND[30].</description>
36011 <description>Task overflow is happened.</description>
36016 <description>Task overflow is not happened.</description>
36023 <description>The status for tasks overflow at SUBSCRIBE_SEND[31].</description>
36029 <description>Task overflow is happened.</description>
36034 <description>Task overflow is not happened.</description>
36046 <description>PPIB APB registers 1</description>
36053 <description>PPIB APB registers 2</description>
36060 <description>PPIB APB registers 3</description>
36067 <description>Key management unit</description>
36082 <description>Provision key slot</description>
36090 <description>Provision key slot</description>
36096 <description>Trigger task</description>
36105 <description>Push key slot</description>
36113 <description>Push key slot</description>
36119 <description>Trigger task</description>
36128 <description>Revoke key slot</description>
36136 <description>Revoke key slot</description>
36142 <description>Trigger task</description>
36151 <description>Read key slot metadata into METADATA register</description>
36159 <description>Read key slot metadata into METADATA register</description>
36165 <description>Trigger task</description>
36174 …description>Block only the PUSH operation of a key slot, preventing the key slot from being PUSHED…
36182 …description>Block only the PUSH operation of a key slot, preventing the key slot from being PUSHED…
36188 <description>Trigger task</description>
36197 …description>Block the PROVISION, PUSH, and REVOKE operations of a key slot, preventing the key slo…
36205 …description>Block the PROVISION, PUSH, and REVOKE operations of a key slot, preventing the key slo…
36211 <description>Trigger task</description>
36220 <description>Key slot successfully provisioned</description>
36228 <description>Key slot successfully provisioned</description>
36234 <description>Event not generated</description>
36239 <description>Event generated</description>
36248 <description>Key slot successfully pushed</description>
36256 <description>Key slot successfully pushed</description>
36262 <description>Event not generated</description>
36267 <description>Event generated</description>
36276 <description>Key slot has been revoked and can no longer be used</description>
36284 <description>Key slot has been revoked and can no longer be used</description>
36290 <description>Event not generated</description>
36295 <description>Event generated</description>
36304 …description>Error generated during PROVISION, PUSH, READMETADATA or REVOKE operations. Triggering …
36312 …description>Error generated during PROVISION, PUSH, READMETADATA or REVOKE operations. Triggering …
36318 <description>Event not generated</description>
36323 <description>Event generated</description>
36332 <description>Key slot metadata has been read into METADATA register</description>
36340 <description>Key slot metadata has been read into METADATA register</description>
36346 <description>Event not generated</description>
36351 <description>Event generated</description>
36360 …<description>The PUSHBLOCK operation was successful. The event is kept for backwards compatibility…
36368 …<description>The PUSHBLOCK operation was successful. The event is kept for backwards compatibility…
36374 <description>Event not generated</description>
36379 <description>Event generated</description>
36388 <description>The BLOCK operation was successful</description>
36396 <description>The BLOCK operation was successful</description>
36402 <description>Event not generated</description>
36407 <description>Event generated</description>
36416 <description>KMU status register</description>
36424 <description>KMU status</description>
36430 <description>KMU is ready for new operation</description>
36435 <description>KMU is busy, an operation is in progress</description>
36444 <description>Select key slot to operate on</description>
36452 …<description>Select key slot ID to provision, push, read METADATA, revoke or block when the corres…
36460 <description>Source address for provisioning</description>
36468 <description>Source address for TASKS_PROVISION.</description>
36476 <description>Key slot metadata as read by TASKS_READMETADATA.</description>
36484 <description>Read metadata.</description>
36494 <description>Accelerated Address Resolver 0</description>
36513 …<description>Start resolving addresses based on IRKs specified in the IRK data structure</descript…
36521 …<description>Start resolving addresses based on IRKs specified in the IRK data structure</descript…
36527 <description>Trigger task</description>
36536 <description>Stop resolving addresses</description>
36544 <description>Stop resolving addresses</description>
36550 <description>Trigger task</description>
36559 <description>Subscribe configuration for task START</description>
36567 <description>DPPI channel that task START will subscribe to</description>
36578 <description>Disable subscription</description>
36583 <description>Enable subscription</description>
36592 <description>Subscribe configuration for task STOP</description>
36600 <description>DPPI channel that task STOP will subscribe to</description>
36611 <description>Disable subscription</description>
36616 <description>Enable subscription</description>
36625 <description>Address resolution procedure complete or ended due to an error</description>
36633 … <description>Address resolution procedure complete or ended due to an error</description>
36639 <description>Event not generated</description>
36644 <description>Event generated</description>
36653 <description>Address resolved</description>
36661 <description>Address resolved</description>
36667 <description>Event not generated</description>
36672 <description>Event generated</description>
36681 <description>Address not resolved</description>
36689 <description>Address not resolved</description>
36695 <description>Event not generated</description>
36700 <description>Event generated</description>
36709 <description>Operation aborted because of a STOP task or due to an error</description>
36717 <description>Operation aborted because of a STOP task or due to an error</description>
36723 <description>Event not generated</description>
36728 <description>Event generated</description>
36737 <description>Publish configuration for event END</description>
36745 <description>DPPI channel that event END will publish to</description>
36756 <description>Disable publishing</description>
36761 <description>Enable publishing</description>
36770 <description>Publish configuration for event RESOLVED</description>
36778 <description>DPPI channel that event RESOLVED will publish to</description>
36789 <description>Disable publishing</description>
36794 <description>Enable publishing</description>
36803 <description>Publish configuration for event NOTRESOLVED</description>
36811 <description>DPPI channel that event NOTRESOLVED will publish to</description>
36822 <description>Disable publishing</description>
36827 <description>Enable publishing</description>
36836 <description>Publish configuration for event ERROR</description>
36844 <description>DPPI channel that event ERROR will publish to</description>
36855 <description>Disable publishing</description>
36860 <description>Enable publishing</description>
36869 <description>Enable interrupt</description>
36877 <description>Write '1' to enable interrupt for event END</description>
36884 <description>Read: Disabled</description>
36889 <description>Read: Enabled</description>
36897 <description>Enable</description>
36904 <description>Write '1' to enable interrupt for event RESOLVED</description>
36911 <description>Read: Disabled</description>
36916 <description>Read: Enabled</description>
36924 <description>Enable</description>
36931 <description>Write '1' to enable interrupt for event NOTRESOLVED</description>
36938 <description>Read: Disabled</description>
36943 <description>Read: Enabled</description>
36951 <description>Enable</description>
36958 <description>Write '1' to enable interrupt for event ERROR</description>
36965 <description>Read: Disabled</description>
36970 <description>Read: Enabled</description>
36978 <description>Enable</description>
36987 <description>Disable interrupt</description>
36995 <description>Write '1' to disable interrupt for event END</description>
37002 <description>Read: Disabled</description>
37007 <description>Read: Enabled</description>
37015 <description>Disable</description>
37022 <description>Write '1' to disable interrupt for event RESOLVED</description>
37029 <description>Read: Disabled</description>
37034 <description>Read: Enabled</description>
37042 <description>Disable</description>
37049 <description>Write '1' to disable interrupt for event NOTRESOLVED</description>
37056 <description>Read: Disabled</description>
37061 <description>Read: Enabled</description>
37069 <description>Disable</description>
37076 <description>Write '1' to disable interrupt for event ERROR</description>
37083 <description>Read: Disabled</description>
37088 <description>Read: Enabled</description>
37096 <description>Disable</description>
37105 <description>Error status</description>
37113 <description>Error status when the ERROR event is generated</description>
37119 <description>No errors have occurred</description>
37124 <description>End of INPTR job list before data structure was read.</description>
37129 <description>End of OUTPTR job list before data structure was read.</description>
37134 <description>Bus error during DMA access.</description>
37143 <description>Enable AAR</description>
37151 <description>Enable or disable AAR</description>
37157 <description>Disable</description>
37162 <description>Enable</description>
37171 <description>Maximum number of IRKs to resolve</description>
37179 <description>The maximum number of IRKs to resolve</description>
37187 <description>IN EasyDMA channel</description>
37193 <description>Input pointer</description>
37201 <description>Points to a job list containing AAR data structure</description>
37210 <description>OUT EasyDMA channel</description>
37216 <description>Output pointer</description>
37224 <description>Output pointer</description>
37232 <description>Number of bytes transferred in the last transaction</description>
37240 … <description>Number of bytes written to memory after triggering the START task.</description>
37251 <description>AES CCM Mode Encryption 0</description>
37271 …<description>Start encryption/decryption. This operation will stop by itself when completed.</desc…
37279 …<description>Start encryption/decryption. This operation will stop by itself when completed.</desc…
37285 <description>Trigger task</description>
37294 <description>Stop encryption/decryption</description>
37302 <description>Stop encryption/decryption</description>
37308 <description>Trigger task</description>
37317 …description>Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE regis…
37325 …description>Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE regis…
37331 <description>Trigger task</description>
37340 <description>Subscribe configuration for task START</description>
37348 <description>DPPI channel that task START will subscribe to</description>
37359 <description>Disable subscription</description>
37364 <description>Enable subscription</description>
37373 <description>Subscribe configuration for task STOP</description>
37381 <description>DPPI channel that task STOP will subscribe to</description>
37392 <description>Disable subscription</description>
37397 <description>Enable subscription</description>
37406 <description>Subscribe configuration for task RATEOVERRIDE</description>
37414 <description>DPPI channel that task RATEOVERRIDE will subscribe to</description>
37425 <description>Disable subscription</description>
37430 <description>Enable subscription</description>
37439 <description>Encrypt/decrypt complete or ended because of an error</description>
37447 <description>Encrypt/decrypt complete or ended because of an error</description>
37453 <description>Event not generated</description>
37458 <description>Event generated</description>
37467 <description>CCM error event</description>
37475 <description>CCM error event</description>
37481 <description>Event not generated</description>
37486 <description>Event generated</description>
37495 <description>Publish configuration for event END</description>
37503 <description>DPPI channel that event END will publish to</description>
37514 <description>Disable publishing</description>
37519 <description>Enable publishing</description>
37528 <description>Publish configuration for event ERROR</description>
37536 <description>DPPI channel that event ERROR will publish to</description>
37547 <description>Disable publishing</description>
37552 <description>Enable publishing</description>
37561 <description>Enable interrupt</description>
37569 <description>Write '1' to enable interrupt for event END</description>
37576 <description>Read: Disabled</description>
37581 <description>Read: Enabled</description>
37589 <description>Enable</description>
37596 <description>Write '1' to enable interrupt for event ERROR</description>
37603 <description>Read: Disabled</description>
37608 <description>Read: Enabled</description>
37616 <description>Enable</description>
37625 <description>Disable interrupt</description>
37633 <description>Write '1' to disable interrupt for event END</description>
37640 <description>Read: Disabled</description>
37645 <description>Read: Enabled</description>
37653 <description>Disable</description>
37660 <description>Write '1' to disable interrupt for event ERROR</description>
37667 <description>Read: Disabled</description>
37672 <description>Read: Enabled</description>
37680 <description>Disable</description>
37689 <description>MAC check result</description>
37697 …<description>The result of the MAC check performed during the previous decryption operation</descr…
37703 <description>MAC check failed</description>
37708 <description>MAC check passed</description>
37717 <description>Error status</description>
37725 <description>Error status when the ERROR event is generated</description>
37731 <description>No errors have occurred</description>
37736 … <description>End of INPTR job list before CCM data structure was read.</description>
37741 … <description>End of OUTPTR job list before CCM data structure was read.</description>
37746 …<description>Encryption of the unencrypted CCM data structure did not complete in time.</descripti…
37751 <description>Bus error during DMA access.</description>
37760 <description>Enable</description>
37768 <description>Enable or disable CCM</description>
37774 <description>Disable</description>
37779 <description>Enable</description>
37788 <description>Operation mode</description>
37796 …<description>The mode of operation to be used. The settings in this register apply when the CRYPT …
37802 <description>AES CCM packet encryption mode</description>
37807 …<description>Deprecated enumerator - This mode will run CCM decryption in the speed of the DATARA…
37812 <description>AES CCM decryption mode.</description>
37819 <description>Protocol and packet format selection</description>
37825 <description>Bluetooth Low Energy packet format</description>
37830 <description>802.15.4 packet format</description>
37837 <description>Radio data rate that the CCM shall run synchronous with</description>
37843 <description>125 Kbps</description>
37848 <description>250 Kbps</description>
37853 <description>500 Kbps</description>
37858 <description>1 Mbps</description>
37863 <description>2 Mbps</description>
37868 <description>4 Mbps</description>
37875 <description>CCM MAC length (bytes)</description>
37881 …<description>M = 0 This is a special case for CCM* where encryption is required but not authentica…
37886 <description>M = 4</description>
37891 <description>M = 6</description>
37896 <description>M = 8</description>
37901 <description>M = 10</description>
37906 <description>M = 12</description>
37911 <description>M = 14</description>
37916 <description>M = 16</description>
37925 <description>Unspecified</description>
37933 <description>Description collection: 128-bit AES key</description>
37941 <description>AES 128-bit key value, bits (32*(i+1))-1 : (32*i)</description>
37950 <description>Unspecified</description>
37958 …<description>Description collection: 13-byte NONCE vector Only the lower 13 bytes are used</descri…
37966 <description>NONCE value, bits (32*(n+1))-1 : (32*n)</description>
37975 <description>IN EasyDMA channel</description>
37981 …description>Input pointer Points to a job list containing unencrypted CCM data structure in Encryp…
37989 <description>Input pointer</description>
37998 <description>OUT EasyDMA channel</description>
38004 …description>Output pointer Points to a job list containing encrypted CCM data structure in Encrypt…
38012 <description>Output pointer</description>
38021 <description>Data rate override setting.</description>
38029 <description>Data rate override setting.</description>
38035 <description>125 Kbps</description>
38040 <description>500 Kbps</description>
38045 <description>1 Mbps</description>
38050 <description>2 Mbps</description>
38055 <description>4 Mbps</description>
38064 <description>CCM adata mask.</description>
38072 <description>CCM adata mask.</description>
38082 <description>Accelerated Address Resolver 1</description>
38093 <description>AES CCM Mode Encryption 1</description>
38105 <description>AES ECB Mode Encryption 0</description>
38124 <description>Start ECB block encrypt</description>
38132 <description>Start ECB block encrypt</description>
38138 <description>Trigger task</description>
38147 <description>Abort a possible executing ECB operation</description>
38155 <description>Abort a possible executing ECB operation</description>
38161 <description>Trigger task</description>
38170 <description>Subscribe configuration for task START</description>
38178 <description>DPPI channel that task START will subscribe to</description>
38189 <description>Disable subscription</description>
38194 <description>Enable subscription</description>
38203 <description>Subscribe configuration for task STOP</description>
38211 <description>DPPI channel that task STOP will subscribe to</description>
38222 <description>Disable subscription</description>
38227 <description>Enable subscription</description>
38236 <description>ECB block encrypt complete</description>
38244 <description>ECB block encrypt complete</description>
38250 <description>Event not generated</description>
38255 <description>Event generated</description>
38264 … <description>ECB block encrypt aborted because of a STOP task or due to an error</description>
38272 … <description>ECB block encrypt aborted because of a STOP task or due to an error</description>
38278 <description>Event not generated</description>
38283 <description>Event generated</description>
38292 <description>Publish configuration for event END</description>
38300 <description>DPPI channel that event END will publish to</description>
38311 <description>Disable publishing</description>
38316 <description>Enable publishing</description>
38325 <description>Publish configuration for event ERROR</description>
38333 <description>DPPI channel that event ERROR will publish to</description>
38344 <description>Disable publishing</description>
38349 <description>Enable publishing</description>
38358 <description>Enable interrupt</description>
38366 <description>Write '1' to enable interrupt for event END</description>
38373 <description>Read: Disabled</description>
38378 <description>Read: Enabled</description>
38386 <description>Enable</description>
38393 <description>Write '1' to enable interrupt for event ERROR</description>
38400 <description>Read: Disabled</description>
38405 <description>Read: Enabled</description>
38413 <description>Enable</description>
38422 <description>Disable interrupt</description>
38430 <description>Write '1' to disable interrupt for event END</description>
38437 <description>Read: Disabled</description>
38442 <description>Read: Enabled</description>
38450 <description>Disable</description>
38457 <description>Write '1' to disable interrupt for event ERROR</description>
38464 <description>Read: Disabled</description>
38469 <description>Read: Enabled</description>
38477 <description>Disable</description>
38486 <description>Error status</description>
38494 <description>Error status when the ERROR event is generated</description>
38500 <description>No errors have occurred</description>
38505 <description>End of INPTR job list before data structure was read.</description>
38510 <description>End of OUTPTR job list before data structure was read.</description>
38515 …<description>Deprecated enumerator - Encryption aborted due to higher priority peripheral request…
38520 …<description>Encryption aborted due to higher priority peripheral requesting or using the AES modu…
38525 <description>Bus error during DMA access.</description>
38534 <description>Unspecified</description>
38542 <description>Description collection: 128-bit AES key</description>
38550 <description>AES 128-bit key value, bits (32*(n+1))-1 : (32*n)</description>
38559 <description>IN EasyDMA channel</description>
38565 <description>Input pointer</description>
38573 … <description>Points to a job list containing unencrypted ECB data structure</description>
38582 <description>OUT EasyDMA channel</description>
38588 …<description>Output pointer Points to a job list containing encrypted ECB data structure</descript…
38596 <description>Output pointer</description>
38607 <description>AES ECB Mode Encryption 1</description>
38618 <description>VPR peripheral registers 0</description>
38639 <description>Description collection: VPR task [n] register</description>
38647 <description>VPR task [n] register</description>
38653 <description>Trigger task</description>
38664 …<description>Description collection: Subscribe configuration for task TASKS_TRIGGER[n]</descriptio…
38672 <description>Subscription enable bit</description>
38678 <description>Disable subscription</description>
38683 <description>Enable subscription</description>
38694 <description>Description collection: VPR event [n] register</description>
38702 <description>VPR event [n] register</description>
38708 <description>Event not generated</description>
38713 <description>Event generated</description>
38724 …<description>Description collection: Publish configuration for event EVENTS_TRIGGERED[n]</descript…
38732 <description>Publication enable bit</description>
38738 <description>Disable publishing</description>
38743 <description>Enable publishing</description>
38752 <description>Enable or disable interrupt</description>
38760 <description>Enable or disable interrupt for event TRIGGERED[16]</description>
38766 <description>Disable</description>
38771 <description>Enable</description>
38778 <description>Enable or disable interrupt for event TRIGGERED[17]</description>
38784 <description>Disable</description>
38789 <description>Enable</description>
38796 <description>Enable or disable interrupt for event TRIGGERED[18]</description>
38802 <description>Disable</description>
38807 <description>Enable</description>
38814 <description>Enable or disable interrupt for event TRIGGERED[19]</description>
38820 <description>Disable</description>
38825 <description>Enable</description>
38832 <description>Enable or disable interrupt for event TRIGGERED[20]</description>
38838 <description>Disable</description>
38843 <description>Enable</description>
38850 <description>Enable or disable interrupt for event TRIGGERED[21]</description>
38856 <description>Disable</description>
38861 <description>Enable</description>
38868 <description>Enable or disable interrupt for event TRIGGERED[22]</description>
38874 <description>Disable</description>
38879 <description>Enable</description>
38888 <description>Enable interrupt</description>
38896 <description>Write '1' to enable interrupt for event TRIGGERED[16]</description>
38903 <description>Read: Disabled</description>
38908 <description>Read: Enabled</description>
38916 <description>Enable</description>
38923 <description>Write '1' to enable interrupt for event TRIGGERED[17]</description>
38930 <description>Read: Disabled</description>
38935 <description>Read: Enabled</description>
38943 <description>Enable</description>
38950 <description>Write '1' to enable interrupt for event TRIGGERED[18]</description>
38957 <description>Read: Disabled</description>
38962 <description>Read: Enabled</description>
38970 <description>Enable</description>
38977 <description>Write '1' to enable interrupt for event TRIGGERED[19]</description>
38984 <description>Read: Disabled</description>
38989 <description>Read: Enabled</description>
38997 <description>Enable</description>
39004 <description>Write '1' to enable interrupt for event TRIGGERED[20]</description>
39011 <description>Read: Disabled</description>
39016 <description>Read: Enabled</description>
39024 <description>Enable</description>
39031 <description>Write '1' to enable interrupt for event TRIGGERED[21]</description>
39038 <description>Read: Disabled</description>
39043 <description>Read: Enabled</description>
39051 <description>Enable</description>
39058 <description>Write '1' to enable interrupt for event TRIGGERED[22]</description>
39065 <description>Read: Disabled</description>
39070 <description>Read: Enabled</description>
39078 <description>Enable</description>
39087 <description>Disable interrupt</description>
39095 <description>Write '1' to disable interrupt for event TRIGGERED[16]</description>
39102 <description>Read: Disabled</description>
39107 <description>Read: Enabled</description>
39115 <description>Disable</description>
39122 <description>Write '1' to disable interrupt for event TRIGGERED[17]</description>
39129 <description>Read: Disabled</description>
39134 <description>Read: Enabled</description>
39142 <description>Disable</description>
39149 <description>Write '1' to disable interrupt for event TRIGGERED[18]</description>
39156 <description>Read: Disabled</description>
39161 <description>Read: Enabled</description>
39169 <description>Disable</description>
39176 <description>Write '1' to disable interrupt for event TRIGGERED[19]</description>
39183 <description>Read: Disabled</description>
39188 <description>Read: Enabled</description>
39196 <description>Disable</description>
39203 <description>Write '1' to disable interrupt for event TRIGGERED[20]</description>
39210 <description>Read: Disabled</description>
39215 <description>Read: Enabled</description>
39223 <description>Disable</description>
39230 <description>Write '1' to disable interrupt for event TRIGGERED[21]</description>
39237 <description>Read: Disabled</description>
39242 <description>Read: Enabled</description>
39250 <description>Disable</description>
39257 <description>Write '1' to disable interrupt for event TRIGGERED[22]</description>
39264 <description>Read: Disabled</description>
39269 <description>Read: Enabled</description>
39277 <description>Disable</description>
39286 <description>Pending interrupts</description>
39294 <description>Read pending status of interrupt for event TRIGGERED[16]</description>
39301 <description>Read: Not pending</description>
39306 <description>Read: Pending</description>
39313 <description>Read pending status of interrupt for event TRIGGERED[17]</description>
39320 <description>Read: Not pending</description>
39325 <description>Read: Pending</description>
39332 <description>Read pending status of interrupt for event TRIGGERED[18]</description>
39339 <description>Read: Not pending</description>
39344 <description>Read: Pending</description>
39351 <description>Read pending status of interrupt for event TRIGGERED[19]</description>
39358 <description>Read: Not pending</description>
39363 <description>Read: Pending</description>
39370 <description>Read pending status of interrupt for event TRIGGERED[20]</description>
39377 <description>Read: Not pending</description>
39382 <description>Read: Pending</description>
39389 <description>Read pending status of interrupt for event TRIGGERED[21]</description>
39396 <description>Read: Not pending</description>
39401 <description>Read: Pending</description>
39408 <description>Read pending status of interrupt for event TRIGGERED[22]</description>
39415 <description>Read: Not pending</description>
39420 <description>Read: Pending</description>
39429 <description>Unspecified</description>
39435 <description>Abstract Data 0. Read/write data for argument 0</description>
39443 <description>Abstract Data 0</description>
39451 <description>Abstract Data 1. Read/write data for argument 1</description>
39459 <description>Abstract Data 1</description>
39467 <description>Debug Module Control</description>
39475 <description>Reset signal for the debug module.</description>
39481 <description>Reset the debug module itself</description>
39486 <description>Normal operation</description>
39493 <description>Reset signal output from the debug module to the system.</description>
39499 <description>Reset inactive</description>
39504 <description>Reset active</description>
39511 <description>Clear the halt on reset request.</description>
39518 <description>No operation when written 0.</description>
39523 <description>Clears the halt on reset request</description>
39530 <description>Set the halt on reset request.</description>
39537 <description>No operation when written 0.</description>
39542 <description>Sets the halt on reset request</description>
39549 <description>The high 10 bits of hartsel.</description>
39556 <description>The low 10 bits of hartsel.</description>
39563 <description>Definition of currently selected harts.</description>
39570 <description>Single hart selected.</description>
39575 <description>Multiple harts selected</description>
39582 <description>Clear the havereset.</description>
39589 <description>No operation when written 0.</description>
39594 <description>Clears the havereset for selected harts.</description>
39601 <description>Reset harts.</description>
39607 <description>Reset de-asserted.</description>
39612 <description>Reset asserted.</description>
39619 <description>Resume currently selected harts.</description>
39626 <description>No operation when written 0.</description>
39631 <description>Currently selected harts resumed.</description>
39638 <description>Halt currently selected harts.</description>
39645 … <description>Clears halt request bit for all currently selected harts.</description>
39650 <description>Currently selected harts halted.</description>
39659 <description>Debug Module Status</description>
39667 <description>Version of the debug module.</description>
39673 <description>Debug module not present.</description>
39678 …<description>There is a Debug Module and it conforms to version 0.11 of this specifcation.</descri…
39683 …<description>There is a Debug Module and it conforms to version 0.13 of this specifcation.</descri…
39688 …<description>There is a Debug Module but it does not conform to any available version of the spec.…
39695 <description>Configuration string.</description>
39701 …<description>The confstrptr0..confstrptr3 holds information which is not relevant to the configura…
39706 …<description>The confstrptr0..confstrptr3 holds the address of the configuration string.</descript…
39713 <description>Halt-on-reset support status.</description>
39719 <description>Halt-on-reset is supported.</description>
39724 <description>Halt-on-reset is not supported.</description>
39731 <description>Authentication busy status.</description>
39737 <description>The authentication module is ready.</description>
39742 <description>The authentication module is busy.</description>
39749 <description>Authentication status.</description>
39755 … <description>Authentication required before using the debug module.</description>
39760 <description>Authentication passed.</description>
39767 <description>Any currently selected harts halted status.</description>
39773 <description>None of the currently selected harts halted.</description>
39778 <description>Any of the currently selected harts halted.</description>
39785 <description>All currently selected harts halted status.</description>
39791 <description>Not all of the currently selected harts halted.</description>
39796 <description>All of the currently selected harts halted.</description>
39803 <description>Any currently selected harts running status.</description>
39809 <description>None of the currently selected harts running.</description>
39814 <description>Any of the currently selected harts running.</description>
39821 <description>All currently selected harts running status.</description>
39827 <description>Not all of the currently selected harts running.</description>
39832 <description>All of the currently selected harts running.</description>
39839 <description>Any currently selected harts unavailable status.</description>
39845 <description>None of the currently selected harts unavailable.</description>
39850 <description>Any of the currently selected harts unavailable.</description>
39857 <description>All currently selected harts unavailable status.</description>
39863 <description>Not all of the currently selected harts unavailable.</description>
39868 <description>All of the currently selected harts unavailable.</description>
39875 <description>Any currently selected harts nonexistent status.</description>
39881 <description>None of the currently selected harts nonexistent.</description>
39886 <description>Any of the currently selected harts nonexistent.</description>
39893 <description>All currently selected harts nonexistent status.</description>
39899 <description>Not all of the currently selected harts nonexistent.</description>
39904 <description>All of the currently selected harts nonexistent.</description>
39911 … <description>Any currently selected harts acknowledged last resume request.</description>
39917 … <description>None of the currently selected harts acknowledged last resume request.</description>
39922 … <description>Any of the currently selected harts acknowledged last resume request.</description>
39929 <description>All currently selected harts acknowledged last resume</description>
39935 …<description>Not all of the currently selected harts acknowledged last resume request.</descriptio…
39940 … <description>All of the currently selected harts acknowledged last resume request.</description>
39947 …<description>Any currently selected harts have been reset and reset is not acknowledged.</descript…
39953 …<description>None of the currently selected harts have been reset and reset is not acknowledget.</…
39958 …<description>Any of the currently selected harts have been reset and reset is not acknowledge.</de…
39965 …<description>All currently selected harts have been reset and reset is not acknowledge</descriptio…
39971 …<description>Not all of the currently selected harts have been reset and reset is not acknowledge.…
39976 …<description>All of the currently selected harts have been reset and reset is not acknowledge.</de…
39983 …<description>Implicit ebreak instruction at the non-existent word immediately after the Program Bu…
39989 <description>No implicit ebreak instruction.</description>
39994 <description>Implicit ebreak instruction.</description>
40003 <description>Hart Information</description>
40011 <description>Data Address</description>
40018 <description>Data Size</description>
40025 <description>Data Access</description>
40032 <description>The data registers are shadowed in the hart
40034 corresponds to a single argument.</description>
40039 <description>The data registers are shadowed in the hart's
40041 the memory map.</description>
40048 <description>Number of dscratch registers</description>
40057 <description>Halt Summary 1</description>
40065 <description>Halt Summary 1</description>
40074 <description>Hart Array Window Select</description>
40082 …<description>The high bits of this field may be tied to 0, depending on how large the array mask r…
40083 … E.g. on a system with 48 harts only bit 0 of this field may actually be writable.</description>
40092 <description>Hart Array Window</description>
40100 <description>Mask data.</description>
40108 <description>Abstract Control and Status</description>
40116 …<description>Number of data registers that are implemented as part of the abstract command interfa…
40123 <description>Command error when the abstract command fails.</description>
40129 <description>No error.</description>
40134 <description>An abstract command was executing while command,
40136 or written. This status is only written if cmderr contains 0</description>
40141 <description>The requested command is notsupported,
40142 regardless of whether the hart is running or not.</description>
40147 <description>An exception occurred while executing the
40148 command (e.g. while executing theProgram Buffer).</description>
40153 <description>The abstract command couldn't execute
40154 … because the hart wasn't in the required state (running/halted). or unavailable.</description>
40159 <description>The abstract command failed due to abus
40160 error (e.g. alignment, access size, or timeout).</description>
40165 <description>The command failed for another reason.</description>
40172 <description>Abstract command execution status.</description>
40179 <description>Not busy.</description>
40184 <description>An abstract command is currently being executed.
40185 …t as soon as command is written, and is not cleared until that command has completed.</description>
40192 … <description>Size of the Program Buffer, in 32-bit words. Valid sizes are 0 - 1.</description>
40201 <description>Abstract command</description>
40209 …<description>This Field is interpreted in a command specific manner, described for each abstract c…
40215 … <description>The type determines the overall functionality of this abstract command.</description>
40221 <description>Register Access Command</description>
40226 <description>Quick Access Command</description>
40231 <description>Memory Access Command</description>
40240 <description>Abstract Command Autoexec</description>
40248 …<description>When a bit in this field is 1, read or write accesses to the corresponding data word …
40249 command in command to be executed again.</description>
40256 …<description>When a bit in this field is 1, read or write accesses to the corresponding progbuf wo…
40257 the command in command to be executed again.</description>
40268 <description>Description collection: Configuration String Pointer [n]</description>
40276 <description>Address</description>
40285 <description>Next Debug Module</description>
40293 <description>Address</description>
40304 <description>Description collection: Program Buffer [n]</description>
40312 <description>Data</description>
40321 <description>Authentication Data</description>
40329 <description>Data</description>
40338 <description>Halt Summary 2</description>
40346 <description>Halt Summary 2</description>
40355 <description>Halt Summary 3</description>
40363 <description>Halt Summary 3</description>
40372 <description>System Bus Addres 127:96</description>
40380 <description>Accesses bits 127:96 of the physical address in
40382 wide).</description>
40391 <description>System Bus Access Control and Status</description>
40405 <description>8-bit system bus accesses are supported.</description>
40418 <description>16-bit system bus accesses are supported.</description>
40431 <description>32-bit system bus accesses are supported.</description>
40444 <description>64-bit system bus accesses are supported.</description>
40457 <description>128-bit system bus accesses are supported.</description>
40464 …<description>Width of system bus addresses in bits. (0 indicates there is no bus access support.)<…
40477 <description>There was no bus error.</description>
40482 <description>There was a timeout.</description>
40487 <description>A bad address was accessed.</description>
40492 <description>There was an alignment error.</description>
40497 <description>An access of unsupported size was requested.</description>
40502 <description>Other.</description>
40515 <description>Every read from sbdata0 automatically
40516 triggers a system bus read at the (possibly autoincremented) address.</description>
40529 <description>sbaddress is incremented by the access
40530 size (in bytes) selected in sbaccess after every system bus access.</description>
40543 <description>8-bit.</description>
40548 <description>16-bit.</description>
40553 <description>32-bit.</description>
40558 <description>64-bit.</description>
40563 <description>128-bit.</description>
40576 <description>Every write to sbaddress0 automatically
40577 triggers a system bus read at the new address.</description>
40590 <description>System bus master is not busy.</description>
40595 <description>System bus master is busy.</description>
40608 <description>No error.</description>
40613 <description>Debugger access attempted while one in progress.</description>
40626 <description>The System Bus interface conforms to mainline
40627 … drafts of thia RISC-V External Debug Support spec older than 1 January, 2018.</description>
40632 …<description>The System Bus interface conforms to RISC-V External Debug Support version 0.14.0-DRA…
40633 Other values are reserved for future versions.</description>
40642 <description>System Bus Addres 31:0</description>
40650 <description>Accesses bits 31:0 of the physical address in
40651 sbaddress.</description>
40660 <description>System Bus Addres 63:32</description>
40668 <description>Accesses bits 63:32 of the physical address in
40670 wide).</description>
40679 <description>System Bus Addres 95:64</description>
40687 <description>Accesses bits 95:64 of the physical address in
40689 wide).</description>
40698 <description>System Bus Data 31:0</description>
40706 <description>Accesses bits 31:0 of sbdata</description>
40715 <description>System Bus Data 63:32</description>
40723 <description>Accesses bits 63:32 of sbdata (if the system bus
40724 is that wide).</description>
40733 <description>System Bus Data 95:64</description>
40741 <description>Accesses bits 95:64 of sbdata (if the system bus
40742 is that wide).</description>
40751 <description>System Bus Data 127:96</description>
40759 <description>Accesses bits 127:96 of sbdata (if the system bus
40760 is that wide).</description>
40769 <description>Halt summary 0</description>
40777 <description>Halt summary 0</description>
40787 <description>State of the CPU after a core reset</description>
40795 <description>Controls CPU running state after a core reset.</description>
40801 …<description>CPU stopped. If this is the CPU state after a core reset, setting this bit will chang…
40806 …description>CPU running. If this is the CPU state after a core reset, clearing this bit will chang…
40815 <description>VPR state information.</description>
40829 <description>WAITING (not yet started)</description>
40834 <description>RUNNING</description>
40839 <description>SLEEPING</description>
40844 <description>INTERRUPT (in handler)</description>
40849 <description>EXCEPTION/TRAP (in handler)</description>
40854 <description>ONGOING_RESET</description>
40859 <description>HALTED</description>
40864 <description>ERROR (lockup, needs debugging or reset)</description>
40871 … <description>Mirrors the ENABLERTPERIPH bit in the NORDIC.VPRNORDICCTRL CSR</description>
40878 <description>Real-time peripherals disabled</description>
40883 <description>Real-time peripherals enabled</description>
40890 …<description>Stalled waiting for real-time peripheral blocking CSR access, for example WAIT, OUTB …
40899 <description>Initial value of the PC at CPU start.</description>
40907 <description>Initial value of the PC at CPU start.</description>
40917 <description>VPR peripheral registers 1</description>
40928 <description>Serial Peripheral Interface Master with EasyDMA 0</description>
40947 <description>Start SPI transaction</description>
40955 <description>Start SPI transaction</description>
40961 <description>Trigger task</description>
40970 <description>Stop SPI transaction</description>
40978 <description>Stop SPI transaction</description>
40984 <description>Trigger task</description>
40993 <description>Suspend SPI transaction</description>
41001 <description>Suspend SPI transaction</description>
41007 <description>Trigger task</description>
41016 <description>Resume SPI transaction</description>
41024 <description>Resume SPI transaction</description>
41030 <description>Trigger task</description>
41039 <description>Peripheral tasks.</description>
41045 <description>Peripheral tasks.</description>
41053 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
41061 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
41067 <description>Trigger task</description>
41078 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
41086 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
41092 <description>Trigger task</description>
41103 <description>Subscribe configuration for task START</description>
41111 <description>DPPI channel that task START will subscribe to</description>
41122 <description>Disable subscription</description>
41127 <description>Enable subscription</description>
41136 <description>Subscribe configuration for task STOP</description>
41144 <description>DPPI channel that task STOP will subscribe to</description>
41155 <description>Disable subscription</description>
41160 <description>Enable subscription</description>
41169 <description>Subscribe configuration for task SUSPEND</description>
41177 <description>DPPI channel that task SUSPEND will subscribe to</description>
41188 <description>Disable subscription</description>
41193 <description>Enable subscription</description>
41202 <description>Subscribe configuration for task RESUME</description>
41210 <description>DPPI channel that task RESUME will subscribe to</description>
41221 <description>Disable subscription</description>
41226 <description>Enable subscription</description>
41235 <description>Subscribe configuration for tasks</description>
41241 <description>Subscribe configuration for tasks</description>
41249 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
41257 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
41268 <description>Disable subscription</description>
41273 <description>Enable subscription</description>
41284 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
41292 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
41303 <description>Disable subscription</description>
41308 <description>Enable subscription</description>
41319 <description>SPI transaction has started</description>
41327 <description>SPI transaction has started</description>
41333 <description>Event not generated</description>
41338 <description>Event generated</description>
41347 <description>SPI transaction has stopped</description>
41355 <description>SPI transaction has stopped</description>
41361 <description>Event not generated</description>
41366 <description>Event generated</description>
41375 <description>End of RXD buffer and TXD buffer reached</description>
41383 <description>End of RXD buffer and TXD buffer reached</description>
41389 <description>Event not generated</description>
41394 <description>Event generated</description>
41403 <description>Peripheral events.</description>
41409 <description>Peripheral events.</description>
41415 <description>Generated after all MAXCNT bytes have been transferred</description>
41423 <description>Generated after all MAXCNT bytes have been transferred</description>
41429 <description>Event not generated</description>
41434 <description>Event generated</description>
41443 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
41451 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
41457 <description>Event not generated</description>
41462 <description>Event generated</description>
41471 <description>An error occured during the bus transfer.</description>
41479 <description>An error occured during the bus transfer.</description>
41485 <description>Event not generated</description>
41490 <description>Event generated</description>
41501 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
41509 <description>Pattern match is detected on the DMA data bus.</description>
41515 <description>Event not generated</description>
41520 <description>Event generated</description>
41530 <description>Peripheral events.</description>
41536 <description>Generated after all MAXCNT bytes have been transferred</description>
41544 <description>Generated after all MAXCNT bytes have been transferred</description>
41550 <description>Event not generated</description>
41555 <description>Event generated</description>
41564 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
41572 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
41578 <description>Event not generated</description>
41583 <description>Event generated</description>
41592 <description>An error occured during the bus transfer.</description>
41600 <description>An error occured during the bus transfer.</description>
41606 <description>Event not generated</description>
41611 <description>Event generated</description>
41622 <description>Publish configuration for event STARTED</description>
41630 <description>DPPI channel that event STARTED will publish to</description>
41641 <description>Disable publishing</description>
41646 <description>Enable publishing</description>
41655 <description>Publish configuration for event STOPPED</description>
41663 <description>DPPI channel that event STOPPED will publish to</description>
41674 <description>Disable publishing</description>
41679 <description>Enable publishing</description>
41688 <description>Publish configuration for event END</description>
41696 <description>DPPI channel that event END will publish to</description>
41707 <description>Disable publishing</description>
41712 <description>Enable publishing</description>
41721 <description>Publish configuration for events</description>
41727 <description>Publish configuration for events</description>
41733 <description>Publish configuration for event END</description>
41741 <description>DPPI channel that event END will publish to</description>
41752 <description>Disable publishing</description>
41757 <description>Enable publishing</description>
41766 <description>Publish configuration for event READY</description>
41774 <description>DPPI channel that event READY will publish to</description>
41785 <description>Disable publishing</description>
41790 <description>Enable publishing</description>
41799 <description>Publish configuration for event BUSERROR</description>
41807 <description>DPPI channel that event BUSERROR will publish to</description>
41818 <description>Disable publishing</description>
41823 <description>Enable publishing</description>
41834 … <description>Description collection: Publish configuration for event MATCH[n]</description>
41842 <description>DPPI channel that event MATCH[n] will publish to</description>
41853 <description>Disable publishing</description>
41858 <description>Enable publishing</description>
41868 <description>Publish configuration for events</description>
41874 <description>Publish configuration for event END</description>
41882 <description>DPPI channel that event END will publish to</description>
41893 <description>Disable publishing</description>
41898 <description>Enable publishing</description>
41907 <description>Publish configuration for event READY</description>
41915 <description>DPPI channel that event READY will publish to</description>
41926 <description>Disable publishing</description>
41931 <description>Enable publishing</description>
41940 <description>Publish configuration for event BUSERROR</description>
41948 <description>DPPI channel that event BUSERROR will publish to</description>
41959 <description>Disable publishing</description>
41964 <description>Enable publishing</description>
41975 <description>Shortcuts between local events and tasks</description>
41983 <description>Shortcut between event END and task START</description>
41989 <description>Disable shortcut</description>
41994 <description>Enable shortcut</description>
42001 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
42007 <description>Disable shortcut</description>
42012 <description>Enable shortcut</description>
42019 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
42025 <description>Disable shortcut</description>
42030 <description>Enable shortcut</description>
42037 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
42043 <description>Disable shortcut</description>
42048 <description>Enable shortcut</description>
42055 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
42061 <description>Disable shortcut</description>
42066 <description>Enable shortcut</description>
42073 … <description>Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]</description>
42079 <description>Disable shortcut</description>
42084 <description>Enable shortcut</description>
42091 … <description>Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]</description>
42097 <description>Disable shortcut</description>
42102 <description>Enable shortcut</description>
42109 … <description>Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]</description>
42115 <description>Disable shortcut</description>
42120 <description>Enable shortcut</description>
42127 … <description>Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]</description>
42133 <description>Disable shortcut</description>
42138 <description>Enable shortcut</description>
42147 <description>Enable interrupt</description>
42155 <description>Write '1' to enable interrupt for event STARTED</description>
42162 <description>Read: Disabled</description>
42167 <description>Read: Enabled</description>
42175 <description>Enable</description>
42182 <description>Write '1' to enable interrupt for event STOPPED</description>
42189 <description>Read: Disabled</description>
42194 <description>Read: Enabled</description>
42202 <description>Enable</description>
42209 <description>Write '1' to enable interrupt for event END</description>
42216 <description>Read: Disabled</description>
42221 <description>Read: Enabled</description>
42229 <description>Enable</description>
42236 <description>Write '1' to enable interrupt for event DMARXEND</description>
42243 <description>Read: Disabled</description>
42248 <description>Read: Enabled</description>
42256 <description>Enable</description>
42263 <description>Write '1' to enable interrupt for event DMARXREADY</description>
42270 <description>Read: Disabled</description>
42275 <description>Read: Enabled</description>
42283 <description>Enable</description>
42290 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
42297 <description>Read: Disabled</description>
42302 <description>Read: Enabled</description>
42310 <description>Enable</description>
42317 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
42324 <description>Read: Disabled</description>
42329 <description>Read: Enabled</description>
42337 <description>Enable</description>
42344 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
42351 <description>Read: Disabled</description>
42356 <description>Read: Enabled</description>
42364 <description>Enable</description>
42371 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
42378 <description>Read: Disabled</description>
42383 <description>Read: Enabled</description>
42391 <description>Enable</description>
42398 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
42405 <description>Read: Disabled</description>
42410 <description>Read: Enabled</description>
42418 <description>Enable</description>
42425 <description>Write '1' to enable interrupt for event DMATXEND</description>
42432 <description>Read: Disabled</description>
42437 <description>Read: Enabled</description>
42445 <description>Enable</description>
42452 <description>Write '1' to enable interrupt for event DMATXREADY</description>
42459 <description>Read: Disabled</description>
42464 <description>Read: Enabled</description>
42472 <description>Enable</description>
42479 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
42486 <description>Read: Disabled</description>
42491 <description>Read: Enabled</description>
42499 <description>Enable</description>
42508 <description>Disable interrupt</description>
42516 <description>Write '1' to disable interrupt for event STARTED</description>
42523 <description>Read: Disabled</description>
42528 <description>Read: Enabled</description>
42536 <description>Disable</description>
42543 <description>Write '1' to disable interrupt for event STOPPED</description>
42550 <description>Read: Disabled</description>
42555 <description>Read: Enabled</description>
42563 <description>Disable</description>
42570 <description>Write '1' to disable interrupt for event END</description>
42577 <description>Read: Disabled</description>
42582 <description>Read: Enabled</description>
42590 <description>Disable</description>
42597 <description>Write '1' to disable interrupt for event DMARXEND</description>
42604 <description>Read: Disabled</description>
42609 <description>Read: Enabled</description>
42617 <description>Disable</description>
42624 <description>Write '1' to disable interrupt for event DMARXREADY</description>
42631 <description>Read: Disabled</description>
42636 <description>Read: Enabled</description>
42644 <description>Disable</description>
42651 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
42658 <description>Read: Disabled</description>
42663 <description>Read: Enabled</description>
42671 <description>Disable</description>
42678 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
42685 <description>Read: Disabled</description>
42690 <description>Read: Enabled</description>
42698 <description>Disable</description>
42705 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
42712 <description>Read: Disabled</description>
42717 <description>Read: Enabled</description>
42725 <description>Disable</description>
42732 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
42739 <description>Read: Disabled</description>
42744 <description>Read: Enabled</description>
42752 <description>Disable</description>
42759 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
42766 <description>Read: Disabled</description>
42771 <description>Read: Enabled</description>
42779 <description>Disable</description>
42786 <description>Write '1' to disable interrupt for event DMATXEND</description>
42793 <description>Read: Disabled</description>
42798 <description>Read: Enabled</description>
42806 <description>Disable</description>
42813 <description>Write '1' to disable interrupt for event DMATXREADY</description>
42820 <description>Read: Disabled</description>
42825 <description>Read: Enabled</description>
42833 <description>Disable</description>
42840 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
42847 <description>Read: Disabled</description>
42852 <description>Read: Enabled</description>
42860 <description>Disable</description>
42869 <description>Enable SPIM</description>
42877 <description>Enable or disable SPIM</description>
42883 <description>Disable SPIM</description>
42888 <description>Enable SPIM</description>
42897 <description>The prescaler is used to set the SPI frequency.</description>
42905 <description>Core clock to SCK divisor</description>
42913 <description>Configuration register</description>
42921 <description>Bit order</description>
42927 <description>Most significant bit shifted out first</description>
42932 <description>Least significant bit shifted out first</description>
42939 <description>Serial clock (SCK) phase</description>
42945 … <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
42950 … <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
42957 <description>Serial clock (SCK) polarity</description>
42963 <description>Active high</description>
42968 <description>Active low</description>
42977 <description>Unspecified</description>
42983 <description>Sample delay for input serial data on SDI</description>
42991 …description>Sample delay for input serial data on SDI. The value specifies the number of SPIM core…
42999 …description>Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used, t…
43007 …description>Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used, t…
43016 <description>DCX configuration</description>
43024 …description>This register specifies the number of command bytes preceding the data bytes. The PSEL…
43032 <description>Polarity of CSN output</description>
43040 <description>Polarity of CSN output</description>
43046 <description>Active low (idle state high)</description>
43051 <description>Active high (idle state low)</description>
43060 …<description>Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MA…
43068 …<description>Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MA…
43076 <description>Unspecified</description>
43082 <description>Pin select for SCK</description>
43090 <description>Pin number</description>
43096 <description>Port number</description>
43102 <description>Connection</description>
43108 <description>Disconnect</description>
43113 <description>Connect</description>
43122 <description>Pin select for SDO signal</description>
43130 <description>Pin number</description>
43136 <description>Port number</description>
43142 <description>Connection</description>
43148 <description>Disconnect</description>
43153 <description>Connect</description>
43162 <description>Pin select for SDI signal</description>
43170 <description>Pin number</description>
43176 <description>Port number</description>
43182 <description>Connection</description>
43188 <description>Disconnect</description>
43193 <description>Connect</description>
43202 <description>Pin select for DCX signal</description>
43210 <description>Pin number</description>
43216 <description>Port number</description>
43222 <description>Connection</description>
43228 <description>Disconnect</description>
43233 <description>Connect</description>
43242 <description>Pin select for CSN</description>
43250 <description>Pin number</description>
43256 <description>Port number</description>
43262 <description>Connection</description>
43268 <description>Disconnect</description>
43273 <description>Connect</description>
43283 <description>Unspecified</description>
43289 <description>Unspecified</description>
43295 <description>RAM buffer start address</description>
43303 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
43311 <description>Maximum number of bytes in channel buffer</description>
43319 <description>Maximum number of bytes in channel buffer</description>
43327 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
43335 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
43343 <description>EasyDMA list type</description>
43351 <description>List type</description>
43357 <description>Disable EasyDMA list</description>
43362 <description>Use array list</description>
43371 <description>Terminate the transaction if a BUSERROR event is detected.</description>
43384 <description>Disable</description>
43389 <description>Enable</description>
43398 … <description>Address of transaction that generated the last BUSERROR event.</description>
43413 … <description>Registers to control the behavior of the pattern matcher engine</description>
43419 <description>Configure individual match events</description>
43427 <description>Enable match filter 0</description>
43433 <description>Match filter disabled</description>
43438 <description>Match filter enabled</description>
43445 <description>Enable match filter 1</description>
43451 <description>Match filter disabled</description>
43456 <description>Match filter enabled</description>
43463 <description>Enable match filter 2</description>
43469 <description>Match filter disabled</description>
43474 <description>Match filter enabled</description>
43481 <description>Enable match filter 3</description>
43487 <description>Match filter disabled</description>
43492 <description>Match filter enabled</description>
43499 <description>Configure match filter 0 as one-shot or sticky</description>
43505 <description>Match filter stays enabled until disabled by task</description>
43510 … <description>Match filter stays enabled until next data word is received</description>
43517 <description>Configure match filter 1 as one-shot or sticky</description>
43523 <description>Match filter stays enabled until disabled by task</description>
43528 … <description>Match filter stays enabled until next data word is received</description>
43535 <description>Configure match filter 2 as one-shot or sticky</description>
43541 <description>Match filter stays enabled until disabled by task</description>
43546 … <description>Match filter stays enabled until next data word is received</description>
43553 <description>Configure match filter 3 as one-shot or sticky</description>
43559 <description>Match filter stays enabled until disabled by task</description>
43564 … <description>Match filter stays enabled until next data word is received</description>
43575 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
43583 <description>Data to look for</description>
43593 <description>Unspecified</description>
43599 <description>RAM buffer start address</description>
43607 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
43615 <description>Maximum number of bytes in channel buffer</description>
43623 <description>Maximum number of bytes in channel buffer</description>
43631 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
43639 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
43647 <description>EasyDMA list type</description>
43655 <description>List type</description>
43661 <description>Disable EasyDMA list</description>
43666 <description>Use array list</description>
43675 <description>Terminate the transaction if a BUSERROR event is detected.</description>
43688 <description>Disable</description>
43693 <description>Enable</description>
43702 … <description>Address of transaction that generated the last BUSERROR event.</description>
43721 <description>SPI Slave 0</description>
43741 <description>Acquire SPI semaphore</description>
43749 <description>Acquire SPI semaphore</description>
43755 <description>Trigger task</description>
43764 <description>Release SPI semaphore, enabling the SPI slave to acquire it</description>
43772 <description>Release SPI semaphore, enabling the SPI slave to acquire it</description>
43778 <description>Trigger task</description>
43787 <description>Peripheral tasks.</description>
43793 <description>Peripheral tasks.</description>
43801 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
43809 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
43815 <description>Trigger task</description>
43826 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
43834 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
43840 <description>Trigger task</description>
43851 <description>Subscribe configuration for task ACQUIRE</description>
43859 <description>DPPI channel that task ACQUIRE will subscribe to</description>
43870 <description>Disable subscription</description>
43875 <description>Enable subscription</description>
43884 <description>Subscribe configuration for task RELEASE</description>
43892 <description>DPPI channel that task RELEASE will subscribe to</description>
43903 <description>Disable subscription</description>
43908 <description>Enable subscription</description>
43917 <description>Subscribe configuration for tasks</description>
43923 <description>Subscribe configuration for tasks</description>
43931 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
43939 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
43950 <description>Disable subscription</description>
43955 <description>Enable subscription</description>
43966 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
43974 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
43985 <description>Disable subscription</description>
43990 <description>Enable subscription</description>
44001 <description>Granted transaction completed</description>
44009 <description>Granted transaction completed</description>
44015 <description>Event not generated</description>
44020 <description>Event generated</description>
44029 <description>Semaphore acquired</description>
44037 <description>Semaphore acquired</description>
44043 <description>Event not generated</description>
44048 <description>Event generated</description>
44057 <description>Peripheral events.</description>
44063 <description>Peripheral events.</description>
44069 <description>Generated after all MAXCNT bytes have been transferred</description>
44077 <description>Generated after all MAXCNT bytes have been transferred</description>
44083 <description>Event not generated</description>
44088 <description>Event generated</description>
44097 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
44105 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
44111 <description>Event not generated</description>
44116 <description>Event generated</description>
44125 <description>An error occured during the bus transfer.</description>
44133 <description>An error occured during the bus transfer.</description>
44139 <description>Event not generated</description>
44144 <description>Event generated</description>
44155 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
44163 <description>Pattern match is detected on the DMA data bus.</description>
44169 <description>Event not generated</description>
44174 <description>Event generated</description>
44184 <description>Peripheral events.</description>
44190 <description>Generated after all MAXCNT bytes have been transferred</description>
44198 <description>Generated after all MAXCNT bytes have been transferred</description>
44204 <description>Event not generated</description>
44209 <description>Event generated</description>
44218 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
44226 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
44232 <description>Event not generated</description>
44237 <description>Event generated</description>
44246 <description>An error occured during the bus transfer.</description>
44254 <description>An error occured during the bus transfer.</description>
44260 <description>Event not generated</description>
44265 <description>Event generated</description>
44276 <description>Publish configuration for event END</description>
44284 <description>DPPI channel that event END will publish to</description>
44295 <description>Disable publishing</description>
44300 <description>Enable publishing</description>
44309 <description>Publish configuration for event ACQUIRED</description>
44317 <description>DPPI channel that event ACQUIRED will publish to</description>
44328 <description>Disable publishing</description>
44333 <description>Enable publishing</description>
44342 <description>Publish configuration for events</description>
44348 <description>Publish configuration for events</description>
44354 <description>Publish configuration for event END</description>
44362 <description>DPPI channel that event END will publish to</description>
44373 <description>Disable publishing</description>
44378 <description>Enable publishing</description>
44387 <description>Publish configuration for event READY</description>
44395 <description>DPPI channel that event READY will publish to</description>
44406 <description>Disable publishing</description>
44411 <description>Enable publishing</description>
44420 <description>Publish configuration for event BUSERROR</description>
44428 <description>DPPI channel that event BUSERROR will publish to</description>
44439 <description>Disable publishing</description>
44444 <description>Enable publishing</description>
44455 … <description>Description collection: Publish configuration for event MATCH[n]</description>
44463 <description>DPPI channel that event MATCH[n] will publish to</description>
44474 <description>Disable publishing</description>
44479 <description>Enable publishing</description>
44489 <description>Publish configuration for events</description>
44495 <description>Publish configuration for event END</description>
44503 <description>DPPI channel that event END will publish to</description>
44514 <description>Disable publishing</description>
44519 <description>Enable publishing</description>
44528 <description>Publish configuration for event READY</description>
44536 <description>DPPI channel that event READY will publish to</description>
44547 <description>Disable publishing</description>
44552 <description>Enable publishing</description>
44561 <description>Publish configuration for event BUSERROR</description>
44569 <description>DPPI channel that event BUSERROR will publish to</description>
44580 <description>Disable publishing</description>
44585 <description>Enable publishing</description>
44596 <description>Shortcuts between local events and tasks</description>
44604 <description>Shortcut between event END and task ACQUIRE</description>
44610 <description>Disable shortcut</description>
44615 <description>Enable shortcut</description>
44622 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
44628 <description>Disable shortcut</description>
44633 <description>Enable shortcut</description>
44640 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
44646 <description>Disable shortcut</description>
44651 <description>Enable shortcut</description>
44658 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
44664 <description>Disable shortcut</description>
44669 <description>Enable shortcut</description>
44676 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
44682 <description>Disable shortcut</description>
44687 <description>Enable shortcut</description>
44694 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
44700 <description>Disable shortcut</description>
44705 <description>Enable shortcut</description>
44712 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
44718 <description>Disable shortcut</description>
44723 <description>Enable shortcut</description>
44730 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
44736 <description>Disable shortcut</description>
44741 <description>Enable shortcut</description>
44748 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
44754 <description>Disable shortcut</description>
44759 <description>Enable shortcut</description>
44768 <description>Enable interrupt</description>
44776 <description>Write '1' to enable interrupt for event END</description>
44783 <description>Read: Disabled</description>
44788 <description>Read: Enabled</description>
44796 <description>Enable</description>
44803 <description>Write '1' to enable interrupt for event ACQUIRED</description>
44810 <description>Read: Disabled</description>
44815 <description>Read: Enabled</description>
44823 <description>Enable</description>
44830 <description>Write '1' to enable interrupt for event DMARXEND</description>
44837 <description>Read: Disabled</description>
44842 <description>Read: Enabled</description>
44850 <description>Enable</description>
44857 <description>Write '1' to enable interrupt for event DMARXREADY</description>
44864 <description>Read: Disabled</description>
44869 <description>Read: Enabled</description>
44877 <description>Enable</description>
44884 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
44891 <description>Read: Disabled</description>
44896 <description>Read: Enabled</description>
44904 <description>Enable</description>
44911 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
44918 <description>Read: Disabled</description>
44923 <description>Read: Enabled</description>
44931 <description>Enable</description>
44938 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
44945 <description>Read: Disabled</description>
44950 <description>Read: Enabled</description>
44958 <description>Enable</description>
44965 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
44972 <description>Read: Disabled</description>
44977 <description>Read: Enabled</description>
44985 <description>Enable</description>
44992 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
44999 <description>Read: Disabled</description>
45004 <description>Read: Enabled</description>
45012 <description>Enable</description>
45019 <description>Write '1' to enable interrupt for event DMATXEND</description>
45026 <description>Read: Disabled</description>
45031 <description>Read: Enabled</description>
45039 <description>Enable</description>
45046 <description>Write '1' to enable interrupt for event DMATXREADY</description>
45053 <description>Read: Disabled</description>
45058 <description>Read: Enabled</description>
45066 <description>Enable</description>
45073 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
45080 <description>Read: Disabled</description>
45085 <description>Read: Enabled</description>
45093 <description>Enable</description>
45102 <description>Disable interrupt</description>
45110 <description>Write '1' to disable interrupt for event END</description>
45117 <description>Read: Disabled</description>
45122 <description>Read: Enabled</description>
45130 <description>Disable</description>
45137 <description>Write '1' to disable interrupt for event ACQUIRED</description>
45144 <description>Read: Disabled</description>
45149 <description>Read: Enabled</description>
45157 <description>Disable</description>
45164 <description>Write '1' to disable interrupt for event DMARXEND</description>
45171 <description>Read: Disabled</description>
45176 <description>Read: Enabled</description>
45184 <description>Disable</description>
45191 <description>Write '1' to disable interrupt for event DMARXREADY</description>
45198 <description>Read: Disabled</description>
45203 <description>Read: Enabled</description>
45211 <description>Disable</description>
45218 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
45225 <description>Read: Disabled</description>
45230 <description>Read: Enabled</description>
45238 <description>Disable</description>
45245 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
45252 <description>Read: Disabled</description>
45257 <description>Read: Enabled</description>
45265 <description>Disable</description>
45272 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
45279 <description>Read: Disabled</description>
45284 <description>Read: Enabled</description>
45292 <description>Disable</description>
45299 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
45306 <description>Read: Disabled</description>
45311 <description>Read: Enabled</description>
45319 <description>Disable</description>
45326 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
45333 <description>Read: Disabled</description>
45338 <description>Read: Enabled</description>
45346 <description>Disable</description>
45353 <description>Write '1' to disable interrupt for event DMATXEND</description>
45360 <description>Read: Disabled</description>
45365 <description>Read: Enabled</description>
45373 <description>Disable</description>
45380 <description>Write '1' to disable interrupt for event DMATXREADY</description>
45387 <description>Read: Disabled</description>
45392 <description>Read: Enabled</description>
45400 <description>Disable</description>
45407 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
45414 <description>Read: Disabled</description>
45419 <description>Read: Enabled</description>
45427 <description>Disable</description>
45436 <description>Semaphore status register</description>
45444 <description>Semaphore status</description>
45450 <description>Semaphore is free</description>
45455 <description>Semaphore is assigned to CPU</description>
45460 <description>Semaphore is assigned to SPI slave</description>
45465 … <description>Semaphore is assigned to SPI but a handover to the CPU is pending</description>
45474 <description>Status from last transaction</description>
45482 <description>TX buffer over-read detected, and prevented</description>
45489 <description>Read: error not present</description>
45494 <description>Read: error present</description>
45502 <description>Write: clear error on writing '1'</description>
45509 <description>RX buffer overflow detected, and prevented</description>
45516 <description>Read: error not present</description>
45521 <description>Read: error present</description>
45529 <description>Write: clear error on writing '1'</description>
45538 <description>Enable SPI slave</description>
45546 <description>Enable or disable SPI slave</description>
45552 <description>Disable SPI slave</description>
45557 <description>Enable SPI slave</description>
45566 <description>Configuration register</description>
45574 <description>Bit order</description>
45580 <description>Most significant bit shifted out first</description>
45585 <description>Least significant bit shifted out first</description>
45592 <description>Serial clock (SCK) phase</description>
45598 … <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
45603 … <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
45610 <description>Serial clock (SCK) polarity</description>
45616 <description>Active high</description>
45621 <description>Active low</description>
45630 …<description>Default character. Character clocked out in case of an ignored transaction.</descript…
45638 …<description>Default character. Character clocked out in case of an ignored transaction.</descript…
45646 <description>Over-read character</description>
45654 …<description>Over-read character. Character clocked out after an over-read of the transmit buffer.…
45662 <description>Unspecified</description>
45668 <description>Pin select for SCK</description>
45676 <description>Pin number</description>
45682 <description>Port number</description>
45688 <description>Connection</description>
45694 <description>Disconnect</description>
45699 <description>Connect</description>
45708 <description>Pin select for SDO signal</description>
45716 <description>Pin number</description>
45722 <description>Port number</description>
45728 <description>Connection</description>
45734 <description>Disconnect</description>
45739 <description>Connect</description>
45748 <description>Pin select for SDI signal</description>
45756 <description>Pin number</description>
45762 <description>Port number</description>
45768 <description>Connection</description>
45774 <description>Disconnect</description>
45779 <description>Connect</description>
45788 <description>Pin select for CSN signal</description>
45796 <description>Pin number</description>
45802 <description>Port number</description>
45808 <description>Connection</description>
45814 <description>Disconnect</description>
45819 <description>Connect</description>
45829 <description>Unspecified</description>
45835 <description>Unspecified</description>
45841 <description>RAM buffer start address</description>
45849 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
45857 <description>Maximum number of bytes in channel buffer</description>
45865 <description>Maximum number of bytes in channel buffer</description>
45873 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
45881 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
45889 <description>Terminate the transaction if a BUSERROR event is detected.</description>
45902 <description>Disable</description>
45907 <description>Enable</description>
45916 … <description>Address of transaction that generated the last BUSERROR event.</description>
45931 … <description>Registers to control the behavior of the pattern matcher engine</description>
45937 <description>Configure individual match events</description>
45945 <description>Enable match filter 0</description>
45951 <description>Match filter disabled</description>
45956 <description>Match filter enabled</description>
45963 <description>Enable match filter 1</description>
45969 <description>Match filter disabled</description>
45974 <description>Match filter enabled</description>
45981 <description>Enable match filter 2</description>
45987 <description>Match filter disabled</description>
45992 <description>Match filter enabled</description>
45999 <description>Enable match filter 3</description>
46005 <description>Match filter disabled</description>
46010 <description>Match filter enabled</description>
46017 <description>Configure match filter 0 as one-shot or sticky</description>
46023 <description>Match filter stays enabled until disabled by task</description>
46028 … <description>Match filter stays enabled until next data word is received</description>
46035 <description>Configure match filter 1 as one-shot or sticky</description>
46041 <description>Match filter stays enabled until disabled by task</description>
46046 … <description>Match filter stays enabled until next data word is received</description>
46053 <description>Configure match filter 2 as one-shot or sticky</description>
46059 <description>Match filter stays enabled until disabled by task</description>
46064 … <description>Match filter stays enabled until next data word is received</description>
46071 <description>Configure match filter 3 as one-shot or sticky</description>
46077 <description>Match filter stays enabled until disabled by task</description>
46082 … <description>Match filter stays enabled until next data word is received</description>
46093 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
46101 <description>Data to look for</description>
46111 <description>Unspecified</description>
46117 <description>RAM buffer start address</description>
46125 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
46133 <description>Maximum number of bytes in channel buffer</description>
46141 <description>Maximum number of bytes in channel buffer</description>
46149 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
46157 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
46165 <description>Terminate the transaction if a BUSERROR event is detected.</description>
46178 <description>Disable</description>
46183 <description>Enable</description>
46192 … <description>Address of transaction that generated the last BUSERROR event.</description>
46211 <description>UART with EasyDMA 0</description>
46231 <description>Flush RX FIFO into RX buffer</description>
46239 <description>Flush RX FIFO into RX buffer</description>
46245 <description>Trigger task</description>
46254 <description>Peripheral tasks.</description>
46260 <description>Peripheral tasks.</description>
46266 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
46274 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
46280 <description>Trigger task</description>
46289 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
46297 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
46303 <description>Trigger task</description>
46314 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
46322 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
46328 <description>Trigger task</description>
46339 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
46347 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
46353 <description>Trigger task</description>
46363 <description>Peripheral tasks.</description>
46369 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
46377 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
46383 <description>Trigger task</description>
46392 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
46400 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
46406 <description>Trigger task</description>
46417 <description>Subscribe configuration for task FLUSHRX</description>
46425 <description>DPPI channel that task FLUSHRX will subscribe to</description>
46436 <description>Disable subscription</description>
46441 <description>Enable subscription</description>
46450 <description>Subscribe configuration for tasks</description>
46456 <description>Subscribe configuration for tasks</description>
46462 <description>Subscribe configuration for task START</description>
46470 <description>DPPI channel that task START will subscribe to</description>
46481 <description>Disable subscription</description>
46486 <description>Enable subscription</description>
46495 <description>Subscribe configuration for task STOP</description>
46503 <description>DPPI channel that task STOP will subscribe to</description>
46514 <description>Disable subscription</description>
46519 <description>Enable subscription</description>
46530 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
46538 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
46549 <description>Disable subscription</description>
46554 <description>Enable subscription</description>
46565 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
46573 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
46584 <description>Disable subscription</description>
46589 <description>Enable subscription</description>
46599 <description>Subscribe configuration for tasks</description>
46605 <description>Subscribe configuration for task START</description>
46613 <description>DPPI channel that task START will subscribe to</description>
46624 <description>Disable subscription</description>
46629 <description>Enable subscription</description>
46638 <description>Subscribe configuration for task STOP</description>
46646 <description>DPPI channel that task STOP will subscribe to</description>
46657 <description>Disable subscription</description>
46662 <description>Enable subscription</description>
46673 <description>CTS is activated (set low). Clear To Send.</description>
46681 <description>CTS is activated (set low). Clear To Send.</description>
46687 <description>Event not generated</description>
46692 <description>Event generated</description>
46701 <description>CTS is deactivated (set high). Not Clear To Send.</description>
46709 <description>CTS is deactivated (set high). Not Clear To Send.</description>
46715 <description>Event not generated</description>
46720 <description>Event generated</description>
46729 <description>Data sent from TXD</description>
46737 <description>Data sent from TXD</description>
46743 <description>Event not generated</description>
46748 <description>Event generated</description>
46757 … <description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
46765 … <description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
46771 <description>Event not generated</description>
46776 <description>Event generated</description>
46785 <description>Error detected</description>
46793 <description>Error detected</description>
46799 <description>Event not generated</description>
46804 <description>Event generated</description>
46813 <description>Receiver timeout</description>
46821 <description>Receiver timeout</description>
46827 <description>Event not generated</description>
46832 <description>Event generated</description>
46841 <description>Transmitter stopped</description>
46849 <description>Transmitter stopped</description>
46855 <description>Event not generated</description>
46860 <description>Event generated</description>
46869 <description>Peripheral events.</description>
46875 <description>Peripheral events.</description>
46881 <description>Generated after all MAXCNT bytes have been transferred</description>
46889 <description>Generated after all MAXCNT bytes have been transferred</description>
46895 <description>Event not generated</description>
46900 <description>Event generated</description>
46909 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
46917 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
46923 <description>Event not generated</description>
46928 <description>Event generated</description>
46937 <description>An error occured during the bus transfer.</description>
46945 <description>An error occured during the bus transfer.</description>
46951 <description>Event not generated</description>
46956 <description>Event generated</description>
46967 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
46975 <description>Pattern match is detected on the DMA data bus.</description>
46981 <description>Event not generated</description>
46986 <description>Event generated</description>
46996 <description>Peripheral events.</description>
47002 <description>Generated after all MAXCNT bytes have been transferred</description>
47010 <description>Generated after all MAXCNT bytes have been transferred</description>
47016 <description>Event not generated</description>
47021 <description>Event generated</description>
47030 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
47038 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
47044 <description>Event not generated</description>
47049 <description>Event generated</description>
47058 <description>An error occured during the bus transfer.</description>
47066 <description>An error occured during the bus transfer.</description>
47072 <description>Event not generated</description>
47077 <description>Event generated</description>
47088 <description>Timed out due to bus being idle while receiving data.</description>
47096 <description>Timed out due to bus being idle while receiving data.</description>
47102 <description>Event not generated</description>
47107 <description>Event generated</description>
47116 <description>Publish configuration for event CTS</description>
47124 <description>DPPI channel that event CTS will publish to</description>
47135 <description>Disable publishing</description>
47140 <description>Enable publishing</description>
47149 <description>Publish configuration for event NCTS</description>
47157 <description>DPPI channel that event NCTS will publish to</description>
47168 <description>Disable publishing</description>
47173 <description>Enable publishing</description>
47182 <description>Publish configuration for event TXDRDY</description>
47190 <description>DPPI channel that event TXDRDY will publish to</description>
47201 <description>Disable publishing</description>
47206 <description>Enable publishing</description>
47215 <description>Publish configuration for event RXDRDY</description>
47223 <description>DPPI channel that event RXDRDY will publish to</description>
47234 <description>Disable publishing</description>
47239 <description>Enable publishing</description>
47248 <description>Publish configuration for event ERROR</description>
47256 <description>DPPI channel that event ERROR will publish to</description>
47267 <description>Disable publishing</description>
47272 <description>Enable publishing</description>
47281 <description>Publish configuration for event RXTO</description>
47289 <description>DPPI channel that event RXTO will publish to</description>
47300 <description>Disable publishing</description>
47305 <description>Enable publishing</description>
47314 <description>Publish configuration for event TXSTOPPED</description>
47322 <description>DPPI channel that event TXSTOPPED will publish to</description>
47333 <description>Disable publishing</description>
47338 <description>Enable publishing</description>
47347 <description>Publish configuration for events</description>
47353 <description>Publish configuration for events</description>
47359 <description>Publish configuration for event END</description>
47367 <description>DPPI channel that event END will publish to</description>
47378 <description>Disable publishing</description>
47383 <description>Enable publishing</description>
47392 <description>Publish configuration for event READY</description>
47400 <description>DPPI channel that event READY will publish to</description>
47411 <description>Disable publishing</description>
47416 <description>Enable publishing</description>
47425 <description>Publish configuration for event BUSERROR</description>
47433 <description>DPPI channel that event BUSERROR will publish to</description>
47444 <description>Disable publishing</description>
47449 <description>Enable publishing</description>
47460 … <description>Description collection: Publish configuration for event MATCH[n]</description>
47468 <description>DPPI channel that event MATCH[n] will publish to</description>
47479 <description>Disable publishing</description>
47484 <description>Enable publishing</description>
47494 <description>Publish configuration for events</description>
47500 <description>Publish configuration for event END</description>
47508 <description>DPPI channel that event END will publish to</description>
47519 <description>Disable publishing</description>
47524 <description>Enable publishing</description>
47533 <description>Publish configuration for event READY</description>
47541 <description>DPPI channel that event READY will publish to</description>
47552 <description>Disable publishing</description>
47557 <description>Enable publishing</description>
47566 <description>Publish configuration for event BUSERROR</description>
47574 <description>DPPI channel that event BUSERROR will publish to</description>
47585 <description>Disable publishing</description>
47590 <description>Enable publishing</description>
47601 <description>Publish configuration for event FRAMETIMEOUT</description>
47609 <description>DPPI channel that event FRAMETIMEOUT will publish to</description>
47620 <description>Disable publishing</description>
47625 <description>Enable publishing</description>
47634 <description>Shortcuts between local events and tasks</description>
47642 <description>Shortcut between event DMA.RX.END and task DMA.RX.START</description>
47648 <description>Disable shortcut</description>
47653 <description>Enable shortcut</description>
47660 <description>Shortcut between event DMA.RX.END and task DMA.RX.STOP</description>
47666 <description>Disable shortcut</description>
47671 <description>Enable shortcut</description>
47678 <description>Shortcut between event DMA.TX.END and task DMA.TX.STOP</description>
47684 <description>Disable shortcut</description>
47689 <description>Enable shortcut</description>
47696 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
47702 <description>Disable shortcut</description>
47707 <description>Enable shortcut</description>
47714 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
47720 <description>Disable shortcut</description>
47725 <description>Enable shortcut</description>
47732 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
47738 <description>Disable shortcut</description>
47743 <description>Enable shortcut</description>
47750 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
47756 <description>Disable shortcut</description>
47761 <description>Enable shortcut</description>
47768 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
47774 <description>Disable shortcut</description>
47779 <description>Enable shortcut</description>
47786 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
47792 <description>Disable shortcut</description>
47797 <description>Enable shortcut</description>
47804 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
47810 <description>Disable shortcut</description>
47815 <description>Enable shortcut</description>
47822 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
47828 <description>Disable shortcut</description>
47833 <description>Enable shortcut</description>
47840 <description>Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP</description>
47846 <description>Disable shortcut</description>
47851 <description>Enable shortcut</description>
47860 <description>Enable or disable interrupt</description>
47868 <description>Enable or disable interrupt for event CTS</description>
47874 <description>Disable</description>
47879 <description>Enable</description>
47886 <description>Enable or disable interrupt for event NCTS</description>
47892 <description>Disable</description>
47897 <description>Enable</description>
47904 <description>Enable or disable interrupt for event TXDRDY</description>
47910 <description>Disable</description>
47915 <description>Enable</description>
47922 <description>Enable or disable interrupt for event RXDRDY</description>
47928 <description>Disable</description>
47933 <description>Enable</description>
47940 <description>Enable or disable interrupt for event ERROR</description>
47946 <description>Disable</description>
47951 <description>Enable</description>
47958 <description>Enable or disable interrupt for event RXTO</description>
47964 <description>Disable</description>
47969 <description>Enable</description>
47976 <description>Enable or disable interrupt for event TXSTOPPED</description>
47982 <description>Disable</description>
47987 <description>Enable</description>
47994 <description>Enable or disable interrupt for event DMARXEND</description>
48000 <description>Disable</description>
48005 <description>Enable</description>
48012 <description>Enable or disable interrupt for event DMARXREADY</description>
48018 <description>Disable</description>
48023 <description>Enable</description>
48030 <description>Enable or disable interrupt for event DMARXBUSERROR</description>
48036 <description>Disable</description>
48041 <description>Enable</description>
48048 <description>Enable or disable interrupt for event DMARXMATCH[0]</description>
48054 <description>Disable</description>
48059 <description>Enable</description>
48066 <description>Enable or disable interrupt for event DMARXMATCH[1]</description>
48072 <description>Disable</description>
48077 <description>Enable</description>
48084 <description>Enable or disable interrupt for event DMARXMATCH[2]</description>
48090 <description>Disable</description>
48095 <description>Enable</description>
48102 <description>Enable or disable interrupt for event DMARXMATCH[3]</description>
48108 <description>Disable</description>
48113 <description>Enable</description>
48120 <description>Enable or disable interrupt for event DMATXEND</description>
48126 <description>Disable</description>
48131 <description>Enable</description>
48138 <description>Enable or disable interrupt for event DMATXREADY</description>
48144 <description>Disable</description>
48149 <description>Enable</description>
48156 <description>Enable or disable interrupt for event DMATXBUSERROR</description>
48162 <description>Disable</description>
48167 <description>Enable</description>
48174 <description>Enable or disable interrupt for event FRAMETIMEOUT</description>
48180 <description>Disable</description>
48185 <description>Enable</description>
48194 <description>Enable interrupt</description>
48202 <description>Write '1' to enable interrupt for event CTS</description>
48209 <description>Read: Disabled</description>
48214 <description>Read: Enabled</description>
48222 <description>Enable</description>
48229 <description>Write '1' to enable interrupt for event NCTS</description>
48236 <description>Read: Disabled</description>
48241 <description>Read: Enabled</description>
48249 <description>Enable</description>
48256 <description>Write '1' to enable interrupt for event TXDRDY</description>
48263 <description>Read: Disabled</description>
48268 <description>Read: Enabled</description>
48276 <description>Enable</description>
48283 <description>Write '1' to enable interrupt for event RXDRDY</description>
48290 <description>Read: Disabled</description>
48295 <description>Read: Enabled</description>
48303 <description>Enable</description>
48310 <description>Write '1' to enable interrupt for event ERROR</description>
48317 <description>Read: Disabled</description>
48322 <description>Read: Enabled</description>
48330 <description>Enable</description>
48337 <description>Write '1' to enable interrupt for event RXTO</description>
48344 <description>Read: Disabled</description>
48349 <description>Read: Enabled</description>
48357 <description>Enable</description>
48364 <description>Write '1' to enable interrupt for event TXSTOPPED</description>
48371 <description>Read: Disabled</description>
48376 <description>Read: Enabled</description>
48384 <description>Enable</description>
48391 <description>Write '1' to enable interrupt for event DMARXEND</description>
48398 <description>Read: Disabled</description>
48403 <description>Read: Enabled</description>
48411 <description>Enable</description>
48418 <description>Write '1' to enable interrupt for event DMARXREADY</description>
48425 <description>Read: Disabled</description>
48430 <description>Read: Enabled</description>
48438 <description>Enable</description>
48445 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
48452 <description>Read: Disabled</description>
48457 <description>Read: Enabled</description>
48465 <description>Enable</description>
48472 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
48479 <description>Read: Disabled</description>
48484 <description>Read: Enabled</description>
48492 <description>Enable</description>
48499 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
48506 <description>Read: Disabled</description>
48511 <description>Read: Enabled</description>
48519 <description>Enable</description>
48526 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
48533 <description>Read: Disabled</description>
48538 <description>Read: Enabled</description>
48546 <description>Enable</description>
48553 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
48560 <description>Read: Disabled</description>
48565 <description>Read: Enabled</description>
48573 <description>Enable</description>
48580 <description>Write '1' to enable interrupt for event DMATXEND</description>
48587 <description>Read: Disabled</description>
48592 <description>Read: Enabled</description>
48600 <description>Enable</description>
48607 <description>Write '1' to enable interrupt for event DMATXREADY</description>
48614 <description>Read: Disabled</description>
48619 <description>Read: Enabled</description>
48627 <description>Enable</description>
48634 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
48641 <description>Read: Disabled</description>
48646 <description>Read: Enabled</description>
48654 <description>Enable</description>
48661 <description>Write '1' to enable interrupt for event FRAMETIMEOUT</description>
48668 <description>Read: Disabled</description>
48673 <description>Read: Enabled</description>
48681 <description>Enable</description>
48690 <description>Disable interrupt</description>
48698 <description>Write '1' to disable interrupt for event CTS</description>
48705 <description>Read: Disabled</description>
48710 <description>Read: Enabled</description>
48718 <description>Disable</description>
48725 <description>Write '1' to disable interrupt for event NCTS</description>
48732 <description>Read: Disabled</description>
48737 <description>Read: Enabled</description>
48745 <description>Disable</description>
48752 <description>Write '1' to disable interrupt for event TXDRDY</description>
48759 <description>Read: Disabled</description>
48764 <description>Read: Enabled</description>
48772 <description>Disable</description>
48779 <description>Write '1' to disable interrupt for event RXDRDY</description>
48786 <description>Read: Disabled</description>
48791 <description>Read: Enabled</description>
48799 <description>Disable</description>
48806 <description>Write '1' to disable interrupt for event ERROR</description>
48813 <description>Read: Disabled</description>
48818 <description>Read: Enabled</description>
48826 <description>Disable</description>
48833 <description>Write '1' to disable interrupt for event RXTO</description>
48840 <description>Read: Disabled</description>
48845 <description>Read: Enabled</description>
48853 <description>Disable</description>
48860 <description>Write '1' to disable interrupt for event TXSTOPPED</description>
48867 <description>Read: Disabled</description>
48872 <description>Read: Enabled</description>
48880 <description>Disable</description>
48887 <description>Write '1' to disable interrupt for event DMARXEND</description>
48894 <description>Read: Disabled</description>
48899 <description>Read: Enabled</description>
48907 <description>Disable</description>
48914 <description>Write '1' to disable interrupt for event DMARXREADY</description>
48921 <description>Read: Disabled</description>
48926 <description>Read: Enabled</description>
48934 <description>Disable</description>
48941 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
48948 <description>Read: Disabled</description>
48953 <description>Read: Enabled</description>
48961 <description>Disable</description>
48968 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
48975 <description>Read: Disabled</description>
48980 <description>Read: Enabled</description>
48988 <description>Disable</description>
48995 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
49002 <description>Read: Disabled</description>
49007 <description>Read: Enabled</description>
49015 <description>Disable</description>
49022 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
49029 <description>Read: Disabled</description>
49034 <description>Read: Enabled</description>
49042 <description>Disable</description>
49049 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
49056 <description>Read: Disabled</description>
49061 <description>Read: Enabled</description>
49069 <description>Disable</description>
49076 <description>Write '1' to disable interrupt for event DMATXEND</description>
49083 <description>Read: Disabled</description>
49088 <description>Read: Enabled</description>
49096 <description>Disable</description>
49103 <description>Write '1' to disable interrupt for event DMATXREADY</description>
49110 <description>Read: Disabled</description>
49115 <description>Read: Enabled</description>
49123 <description>Disable</description>
49130 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
49137 <description>Read: Disabled</description>
49142 <description>Read: Enabled</description>
49150 <description>Disable</description>
49157 <description>Write '1' to disable interrupt for event FRAMETIMEOUT</description>
49164 <description>Read: Disabled</description>
49169 <description>Read: Enabled</description>
49177 <description>Disable</description>
49186 <description>Error source</description>
49195 <description>Overrun error</description>
49202 <description>Read: error not present</description>
49207 <description>Read: error present</description>
49214 <description>Parity error</description>
49221 <description>Read: error not present</description>
49226 <description>Read: error present</description>
49233 <description>Framing error occurred</description>
49240 <description>Read: error not present</description>
49245 <description>Read: error present</description>
49252 <description>Break condition</description>
49259 <description>Read: error not present</description>
49264 <description>Read: error present</description>
49273 <description>Enable UART</description>
49281 <description>Enable or disable UARTE</description>
49287 <description>Disable UARTE</description>
49292 <description>Enable UARTE</description>
49301 <description>Baud rate. Accuracy depends on the HFCLK source selected.</description>
49309 <description>Baud rate</description>
49315 …<description>1200 baud (actual rate: 1205) when UARTE has 16 MHz peripheral clock frequency</descr…
49320 …<description>2400 baud (actual rate: 2396) when UARTE has 16 MHz peripheral clock frequency</descr…
49325 …<description>4800 baud (actual rate: 4808) when UARTE has 16 MHz peripheral clock frequency</descr…
49330 …<description>9600 baud (actual rate: 9598) when UARTE has 16 MHz peripheral clock frequency</descr…
49335 …<description>14400 baud (actual rate: 14401) when UARTE has 16 MHz peripheral clock frequency</des…
49340 …<description>19200 baud (actual rate: 19208) when UARTE has 16 MHz peripheral clock frequency</des…
49345 …<description>28800 baud (actual rate: 28777) when UARTE has 16 MHz peripheral clock frequency</des…
49350 … <description>31250 baud when UARTE has 16 MHz peripheral clock frequency</description>
49355 …<description>38400 baud (actual rate: 38369) when UARTE has 16 MHz peripheral clock frequency</des…
49360 …<description>56000 baud (actual rate: 55944) when UARTE has 16 MHz peripheral clock frequency</des…
49365 …<description>57600 baud (actual rate: 57554) when UARTE has 16 MHz peripheral clock frequency</des…
49370 …<description>76800 baud (actual rate: 76923) when UARTE has 16 MHz peripheral clock frequency</des…
49375 …<description>115200 baud (actual rate: 115108) when UARTE has 16 MHz peripheral clock frequency</d…
49380 …<description>230400 baud (actual rate: 231884) when UARTE has 16 MHz peripheral clock frequency</d…
49385 … <description>250000 baud when UARTE has 16 MHz peripheral clock frequency</description>
49390 …<description>460800 baud (actual rate: 457143) when UARTE has 16 MHz peripheral clock frequency</d…
49395 …<description>921600 baud (actual rate: 941176) when UARTE has 16 MHz peripheral clock frequency</d…
49400 … <description>1 megabaud when UARTE has 16 MHz peripheral clock frequency</description>
49409 …<description>Configuration of parity, hardware flow control, framesize, and packet timeout.</descr…
49417 <description>Hardware flow control</description>
49423 <description>Disabled</description>
49428 <description>Enabled</description>
49435 <description>Parity</description>
49441 <description>Exclude parity bit</description>
49446 <description>Include even parity bit</description>
49453 <description>Stop bits</description>
49459 <description>One stop bit</description>
49464 <description>Two stop bits</description>
49471 <description>Even or odd parity type</description>
49477 <description>Even parity</description>
49482 <description>Odd parity</description>
49489 <description>Set the data frame size</description>
49495 … <description>9 bit data frame size. 9th bit is treated as address bit.</description>
49500 <description>8 bit data frame size.</description>
49505 <description>7 bit data frame size.</description>
49510 <description>6 bit data frame size.</description>
49515 <description>5 bit data frame size.</description>
49520 <description>4 bit data frame size.</description>
49527 …<description>Select if data is trimmed from MSB or LSB end when the data frame size is less than 8…
49533 <description>Data is trimmed from MSB end.</description>
49538 <description>Data is trimmed from LSB end.</description>
49545 <description>Enable packet timeout.</description>
49551 <description>Packet timeout is disabled.</description>
49556 <description>Packet timeout is enabled.</description>
49561 <description>Packet timeout is disabled.</description>
49566 <description>Packet timeout is enabled.</description>
49575 … <description>Set the address of the UARTE for RX when used in 9 bit data frame mode.</description>
49583 <description>Set address</description>
49591 … <description>Set the number of UARTE bits to count before triggering packet timeout.</description>
49599 <description>Number of UARTE bits before timeout.</description>
49607 <description>Unspecified</description>
49613 <description>Pin select for TXD signal</description>
49621 <description>Pin number</description>
49627 <description>Port number</description>
49633 <description>Connection</description>
49639 <description>Disconnect</description>
49644 <description>Connect</description>
49653 <description>Pin select for CTS signal</description>
49661 <description>Pin number</description>
49667 <description>Port number</description>
49673 <description>Connection</description>
49679 <description>Disconnect</description>
49684 <description>Connect</description>
49693 <description>Pin select for RXD signal</description>
49701 <description>Pin number</description>
49707 <description>Port number</description>
49713 <description>Connection</description>
49719 <description>Disconnect</description>
49724 <description>Connect</description>
49733 <description>Pin select for RTS signal</description>
49741 <description>Pin number</description>
49747 <description>Port number</description>
49753 <description>Connection</description>
49759 <description>Disconnect</description>
49764 <description>Connect</description>
49774 <description>Unspecified</description>
49780 <description>Unspecified</description>
49786 <description>RAM buffer start address</description>
49794 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
49802 <description>Maximum number of bytes in channel buffer</description>
49810 <description>Maximum number of bytes in channel buffer</description>
49818 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
49826 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
49834 <description>Terminate the transaction if a BUSERROR event is detected.</description>
49847 <description>Disable</description>
49852 <description>Enable</description>
49861 … <description>Address of transaction that generated the last BUSERROR event.</description>
49876 … <description>Registers to control the behavior of the pattern matcher engine</description>
49882 <description>Configure individual match events</description>
49890 <description>Enable match filter 0</description>
49896 <description>Match filter disabled</description>
49901 <description>Match filter enabled</description>
49908 <description>Enable match filter 1</description>
49914 <description>Match filter disabled</description>
49919 <description>Match filter enabled</description>
49926 <description>Enable match filter 2</description>
49932 <description>Match filter disabled</description>
49937 <description>Match filter enabled</description>
49944 <description>Enable match filter 3</description>
49950 <description>Match filter disabled</description>
49955 <description>Match filter enabled</description>
49962 <description>Configure match filter 0 as one-shot or continous</description>
49968 <description>Match filter stays enabled until disabled by task</description>
49973 … <description>Match filter stays enabled until next data word is received</description>
49980 <description>Configure match filter 1 as one-shot or continous</description>
49986 <description>Match filter stays enabled until disabled by task</description>
49991 … <description>Match filter stays enabled until next data word is received</description>
49998 <description>Configure match filter 2 as one-shot or continous</description>
50004 <description>Match filter stays enabled until disabled by task</description>
50009 … <description>Match filter stays enabled until next data word is received</description>
50016 <description>Configure match filter 3 as one-shot or continous</description>
50022 <description>Match filter stays enabled until disabled by task</description>
50027 … <description>Match filter stays enabled until next data word is received</description>
50038 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
50046 <description>Data to look for</description>
50056 <description>Unspecified</description>
50062 <description>RAM buffer start address</description>
50070 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
50078 <description>Maximum number of bytes in channel buffer</description>
50086 <description>Maximum number of bytes in channel buffer</description>
50094 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
50102 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
50110 <description>Terminate the transaction if a BUSERROR event is detected.</description>
50123 <description>Disable</description>
50128 <description>Enable</description>
50137 … <description>Address of transaction that generated the last BUSERROR event.</description>
50156 <description>Serial Peripheral Interface Master with EasyDMA 1</description>
50167 <description>SPI Slave 1</description>
50179 <description>UART with EasyDMA 1</description>
50191 <description>Voltage glitch detectors</description>
50206 <description>Configuration for glitch detector</description>
50214 <description>Enable glitch detector</description>
50220 <description>Disable glitch detector</description>
50225 <description>Enable glitch detector</description>
50232 <description>Glitch detector mode</description>
50238 <description>High pass filter mode</description>
50243 <description>Cap divider mode</description>
50254 <description>RRAM controller GLITCH detector</description>
50274 <description>Wakeup the RRAM from low power mode</description>
50282 <description>Wakeup the RRAM from low power mode</description>
50288 <description>Trigger task</description>
50297 <description>Commits the data stored in internal write-buffer to RRAM</description>
50305 <description>Commits the data stored in internal write-buffer to RRAM</description>
50311 <description>Trigger task</description>
50320 <description>Subscribe configuration for task WAKEUP</description>
50328 <description>DPPI channel that task WAKEUP will subscribe to</description>
50339 <description>Disable subscription</description>
50344 <description>Enable subscription</description>
50353 <description>Subscribe configuration for task COMMITWRITEBUF</description>
50361 <description>DPPI channel that task COMMITWRITEBUF will subscribe to</description>
50372 <description>Disable subscription</description>
50377 <description>Enable subscription</description>
50386 <description>RRAMC is woken up from low power mode</description>
50394 <description>RRAMC is woken up from low power mode</description>
50400 <description>Event not generated</description>
50405 <description>Event generated</description>
50414 <description>RRAMC is ready</description>
50422 <description>RRAMC is ready</description>
50428 <description>Event not generated</description>
50433 <description>Event generated</description>
50442 <description>Ready to accept a new write operation</description>
50450 <description>Ready to accept a new write operation</description>
50456 <description>Event not generated</description>
50461 <description>Event generated</description>
50470 <description>RRAM access error</description>
50478 <description>RRAM access error</description>
50484 <description>Event not generated</description>
50489 <description>Event generated</description>
50498 <description>Publish configuration for event WOKENUP</description>
50506 <description>DPPI channel that event WOKENUP will publish to</description>
50517 <description>Disable publishing</description>
50522 <description>Enable publishing</description>
50531 <description>Enable or disable interrupt</description>
50539 <description>Enable or disable interrupt for event WOKENUP</description>
50545 <description>Disable</description>
50550 <description>Enable</description>
50557 <description>Enable or disable interrupt for event READY</description>
50563 <description>Disable</description>
50568 <description>Enable</description>
50575 <description>Enable or disable interrupt for event READYNEXT</description>
50581 <description>Disable</description>
50586 <description>Enable</description>
50593 <description>Enable or disable interrupt for event ACCESSERROR</description>
50599 <description>Disable</description>
50604 <description>Enable</description>
50613 <description>Enable interrupt</description>
50621 <description>Write '1' to enable interrupt for event WOKENUP</description>
50628 <description>Read: Disabled</description>
50633 <description>Read: Enabled</description>
50641 <description>Enable</description>
50648 <description>Write '1' to enable interrupt for event READY</description>
50655 <description>Read: Disabled</description>
50660 <description>Read: Enabled</description>
50668 <description>Enable</description>
50675 <description>Write '1' to enable interrupt for event READYNEXT</description>
50682 <description>Read: Disabled</description>
50687 <description>Read: Enabled</description>
50695 <description>Enable</description>
50702 <description>Write '1' to enable interrupt for event ACCESSERROR</description>
50709 <description>Read: Disabled</description>
50714 <description>Read: Enabled</description>
50722 <description>Enable</description>
50731 <description>Disable interrupt</description>
50739 <description>Write '1' to disable interrupt for event WOKENUP</description>
50746 <description>Read: Disabled</description>
50751 <description>Read: Enabled</description>
50759 <description>Disable</description>
50766 <description>Write '1' to disable interrupt for event READY</description>
50773 <description>Read: Disabled</description>
50778 <description>Read: Enabled</description>
50786 <description>Disable</description>
50793 <description>Write '1' to disable interrupt for event READYNEXT</description>
50800 <description>Read: Disabled</description>
50805 <description>Read: Enabled</description>
50813 <description>Disable</description>
50820 <description>Write '1' to disable interrupt for event ACCESSERROR</description>
50827 <description>Read: Disabled</description>
50832 <description>Read: Enabled</description>
50840 <description>Disable</description>
50849 <description>Pending interrupts</description>
50857 <description>Read pending status of interrupt for event WOKENUP</description>
50864 <description>Read: Not pending</description>
50869 <description>Read: Pending</description>
50876 <description>Read pending status of interrupt for event READY</description>
50883 <description>Read: Not pending</description>
50888 <description>Read: Pending</description>
50895 <description>Read pending status of interrupt for event READYNEXT</description>
50902 <description>Read: Not pending</description>
50907 <description>Read: Pending</description>
50914 <description>Read pending status of interrupt for event ACCESSERROR</description>
50921 <description>Read: Not pending</description>
50926 <description>Read: Pending</description>
50935 <description>RRAMC ready status</description>
50943 <description>RRAMC is ready or busy</description>
50949 <description>RRAMC is busy</description>
50954 … <description>The current RRAMC operation is completed and RRAMC is ready</description>
50963 <description>Ready next flag</description>
50971 <description>RRAMC can accept a new write operation</description>
50977 <description>RRAMC cannot accept any write operation now</description>
50982 <description>RRAMC is ready to accept a new write operation</description>
50991 <description>Address of the first access error</description>
50999 <description>Access error address</description>
51007 <description>Unspecified</description>
51013 <description>Internal write-buffer is empty</description>
51026 … <description>The internal write-buffer has data that needs committing</description>
51031 …<description>The internal write-buffer is empty and has no content that needs to be committed</des…
51041 <description>Unspecified</description>
51047 <description>Address of the first ECC error that could not be corrected</description>
51055 <description>ECC error address</description>
51064 <description>Configuration register</description>
51072 <description>Write enable</description>
51078 <description>Write is disabled</description>
51083 <description>Write is enabled</description>
51090 <description>write-buffer size in number of 128-bit words</description>
51096 <description>Disable buffering</description>
51105 …<description>Configuration for ready next timeout counter, in units of AXI clock frequency</descri…
51113 <description>Preload value for waiting for a next write</description>
51119 <description>Enable ready next timeout</description>
51125 <description>Disable ready next timeout</description>
51130 <description>Enable ready next timeout</description>
51139 <description>Unspecified</description>
51145 <description>Power configuration</description>
51153 …<description>Access timeout, in 31.25 ns units, used for going into standby power mode or remain a…
51159 <description>Power on failure warning handling configuration</description>
51165 <description>Wait until the current RRAM write finishes</description>
51170 <description>Abort the current RRAM write</description>
51179 <description>Low power mode configuration</description>
51187 <description>RRAM low power mode</description>
51193 <description>The RRAM goes into power down mode</description>
51198 …<description>The RRAM automatically goes into standby mode while the RRAM is not being accessed</d…
51203 <description>The RRAM goes into NAP mode</description>
51208 <description>The RRAM is powered Off</description>
51218 <description>Unspecified</description>
51224 …<description>Register for erasing whole RRAM main block, that includes the SICR and the UICR</desc…
51232 <description>Erase whole RRAM main block</description>
51238 <description>No operation</description>
51243 <description>Start erase of chip</description>
51255 <description>Unspecified</description>
51261 <description>Description cluster: Region address</description>
51269 <description>Start address of the region [n]</description>
51277 <description>Description cluster: Region configuration</description>
51285 <description>Read access</description>
51291 <description>Read access to override region [n] is not allowed</description>
51296 <description>Read access to override region [n] is allowed</description>
51303 <description>Write access</description>
51309 <description>Write access to override region [n] is not allowed</description>
51314 <description>Write access to override region [n] is allowed</description>
51321 <description>Execute access</description>
51327 <description>Execute access to override region [n] is not allowed</description>
51332 <description>Execute access to override region [n] is allowed</description>
51339 <description>Secure access</description>
51345 … <description>Both Secure and non-Secure access to override region [n] is allowed</description>
51350 <description>Only secure access to override region [n] is allowed</description>
51357 <description>Owner ID</description>
51363 <description>Owner ID protection is not enforced</description>
51370 <description>Write-once</description>
51376 <description>Write-once disabled</description>
51381 <description>Write-once enabled</description>
51388 <description>Enable lock</description>
51395 <description>Lock disabled for region [n]</description>
51400 <description>Lock enabled for region [n]</description>
51407 <description>Size in KBytes of region [n]</description>
51418 <description>GPIO Port 0</description>
51434 <description>Write GPIO port</description>
51442 <description>Pin 0</description>
51448 <description>Pin driver is low</description>
51453 <description>Pin driver is high</description>
51460 <description>Pin 1</description>
51466 <description>Pin driver is low</description>
51471 <description>Pin driver is high</description>
51478 <description>Pin 2</description>
51484 <description>Pin driver is low</description>
51489 <description>Pin driver is high</description>
51496 <description>Pin 3</description>
51502 <description>Pin driver is low</description>
51507 <description>Pin driver is high</description>
51514 <description>Pin 4</description>
51520 <description>Pin driver is low</description>
51525 <description>Pin driver is high</description>
51532 <description>Pin 5</description>
51538 <description>Pin driver is low</description>
51543 <description>Pin driver is high</description>
51550 <description>Pin 6</description>
51556 <description>Pin driver is low</description>
51561 <description>Pin driver is high</description>
51568 <description>Pin 7</description>
51574 <description>Pin driver is low</description>
51579 <description>Pin driver is high</description>
51586 <description>Pin 8</description>
51592 <description>Pin driver is low</description>
51597 <description>Pin driver is high</description>
51604 <description>Pin 9</description>
51610 <description>Pin driver is low</description>
51615 <description>Pin driver is high</description>
51622 <description>Pin 10</description>
51628 <description>Pin driver is low</description>
51633 <description>Pin driver is high</description>
51640 <description>Pin 11</description>
51646 <description>Pin driver is low</description>
51651 <description>Pin driver is high</description>
51658 <description>Pin 12</description>
51664 <description>Pin driver is low</description>
51669 <description>Pin driver is high</description>
51676 <description>Pin 13</description>
51682 <description>Pin driver is low</description>
51687 <description>Pin driver is high</description>
51694 <description>Pin 14</description>
51700 <description>Pin driver is low</description>
51705 <description>Pin driver is high</description>
51712 <description>Pin 15</description>
51718 <description>Pin driver is low</description>
51723 <description>Pin driver is high</description>
51730 <description>Pin 16</description>
51736 <description>Pin driver is low</description>
51741 <description>Pin driver is high</description>
51748 <description>Pin 17</description>
51754 <description>Pin driver is low</description>
51759 <description>Pin driver is high</description>
51766 <description>Pin 18</description>
51772 <description>Pin driver is low</description>
51777 <description>Pin driver is high</description>
51784 <description>Pin 19</description>
51790 <description>Pin driver is low</description>
51795 <description>Pin driver is high</description>
51802 <description>Pin 20</description>
51808 <description>Pin driver is low</description>
51813 <description>Pin driver is high</description>
51820 <description>Pin 21</description>
51826 <description>Pin driver is low</description>
51831 <description>Pin driver is high</description>
51838 <description>Pin 22</description>
51844 <description>Pin driver is low</description>
51849 <description>Pin driver is high</description>
51856 <description>Pin 23</description>
51862 <description>Pin driver is low</description>
51867 <description>Pin driver is high</description>
51874 <description>Pin 24</description>
51880 <description>Pin driver is low</description>
51885 <description>Pin driver is high</description>
51892 <description>Pin 25</description>
51898 <description>Pin driver is low</description>
51903 <description>Pin driver is high</description>
51910 <description>Pin 26</description>
51916 <description>Pin driver is low</description>
51921 <description>Pin driver is high</description>
51928 <description>Pin 27</description>
51934 <description>Pin driver is low</description>
51939 <description>Pin driver is high</description>
51946 <description>Pin 28</description>
51952 <description>Pin driver is low</description>
51957 <description>Pin driver is high</description>
51964 <description>Pin 29</description>
51970 <description>Pin driver is low</description>
51975 <description>Pin driver is high</description>
51982 <description>Pin 30</description>
51988 <description>Pin driver is low</description>
51993 <description>Pin driver is high</description>
52000 <description>Pin 31</description>
52006 <description>Pin driver is low</description>
52011 <description>Pin driver is high</description>
52020 <description>Set individual bits in GPIO port</description>
52029 <description>Pin 0</description>
52036 <description>Read: pin driver is low</description>
52041 <description>Read: pin driver is high</description>
52049 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52056 <description>Pin 1</description>
52063 <description>Read: pin driver is low</description>
52068 <description>Read: pin driver is high</description>
52076 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52083 <description>Pin 2</description>
52090 <description>Read: pin driver is low</description>
52095 <description>Read: pin driver is high</description>
52103 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52110 <description>Pin 3</description>
52117 <description>Read: pin driver is low</description>
52122 <description>Read: pin driver is high</description>
52130 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52137 <description>Pin 4</description>
52144 <description>Read: pin driver is low</description>
52149 <description>Read: pin driver is high</description>
52157 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52164 <description>Pin 5</description>
52171 <description>Read: pin driver is low</description>
52176 <description>Read: pin driver is high</description>
52184 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52191 <description>Pin 6</description>
52198 <description>Read: pin driver is low</description>
52203 <description>Read: pin driver is high</description>
52211 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52218 <description>Pin 7</description>
52225 <description>Read: pin driver is low</description>
52230 <description>Read: pin driver is high</description>
52238 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52245 <description>Pin 8</description>
52252 <description>Read: pin driver is low</description>
52257 <description>Read: pin driver is high</description>
52265 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52272 <description>Pin 9</description>
52279 <description>Read: pin driver is low</description>
52284 <description>Read: pin driver is high</description>
52292 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52299 <description>Pin 10</description>
52306 <description>Read: pin driver is low</description>
52311 <description>Read: pin driver is high</description>
52319 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52326 <description>Pin 11</description>
52333 <description>Read: pin driver is low</description>
52338 <description>Read: pin driver is high</description>
52346 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52353 <description>Pin 12</description>
52360 <description>Read: pin driver is low</description>
52365 <description>Read: pin driver is high</description>
52373 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52380 <description>Pin 13</description>
52387 <description>Read: pin driver is low</description>
52392 <description>Read: pin driver is high</description>
52400 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52407 <description>Pin 14</description>
52414 <description>Read: pin driver is low</description>
52419 <description>Read: pin driver is high</description>
52427 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52434 <description>Pin 15</description>
52441 <description>Read: pin driver is low</description>
52446 <description>Read: pin driver is high</description>
52454 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52461 <description>Pin 16</description>
52468 <description>Read: pin driver is low</description>
52473 <description>Read: pin driver is high</description>
52481 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52488 <description>Pin 17</description>
52495 <description>Read: pin driver is low</description>
52500 <description>Read: pin driver is high</description>
52508 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52515 <description>Pin 18</description>
52522 <description>Read: pin driver is low</description>
52527 <description>Read: pin driver is high</description>
52535 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52542 <description>Pin 19</description>
52549 <description>Read: pin driver is low</description>
52554 <description>Read: pin driver is high</description>
52562 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52569 <description>Pin 20</description>
52576 <description>Read: pin driver is low</description>
52581 <description>Read: pin driver is high</description>
52589 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52596 <description>Pin 21</description>
52603 <description>Read: pin driver is low</description>
52608 <description>Read: pin driver is high</description>
52616 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52623 <description>Pin 22</description>
52630 <description>Read: pin driver is low</description>
52635 <description>Read: pin driver is high</description>
52643 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52650 <description>Pin 23</description>
52657 <description>Read: pin driver is low</description>
52662 <description>Read: pin driver is high</description>
52670 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52677 <description>Pin 24</description>
52684 <description>Read: pin driver is low</description>
52689 <description>Read: pin driver is high</description>
52697 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52704 <description>Pin 25</description>
52711 <description>Read: pin driver is low</description>
52716 <description>Read: pin driver is high</description>
52724 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52731 <description>Pin 26</description>
52738 <description>Read: pin driver is low</description>
52743 <description>Read: pin driver is high</description>
52751 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52758 <description>Pin 27</description>
52765 <description>Read: pin driver is low</description>
52770 <description>Read: pin driver is high</description>
52778 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52785 <description>Pin 28</description>
52792 <description>Read: pin driver is low</description>
52797 <description>Read: pin driver is high</description>
52805 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52812 <description>Pin 29</description>
52819 <description>Read: pin driver is low</description>
52824 <description>Read: pin driver is high</description>
52832 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52839 <description>Pin 30</description>
52846 <description>Read: pin driver is low</description>
52851 <description>Read: pin driver is high</description>
52859 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52866 <description>Pin 31</description>
52873 <description>Read: pin driver is low</description>
52878 <description>Read: pin driver is high</description>
52886 … <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
52895 <description>Clear individual bits in GPIO port</description>
52904 <description>Pin 0</description>
52911 <description>Read: pin driver is low</description>
52916 <description>Read: pin driver is high</description>
52924 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
52931 <description>Pin 1</description>
52938 <description>Read: pin driver is low</description>
52943 <description>Read: pin driver is high</description>
52951 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
52958 <description>Pin 2</description>
52965 <description>Read: pin driver is low</description>
52970 <description>Read: pin driver is high</description>
52978 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
52985 <description>Pin 3</description>
52992 <description>Read: pin driver is low</description>
52997 <description>Read: pin driver is high</description>
53005 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53012 <description>Pin 4</description>
53019 <description>Read: pin driver is low</description>
53024 <description>Read: pin driver is high</description>
53032 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53039 <description>Pin 5</description>
53046 <description>Read: pin driver is low</description>
53051 <description>Read: pin driver is high</description>
53059 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53066 <description>Pin 6</description>
53073 <description>Read: pin driver is low</description>
53078 <description>Read: pin driver is high</description>
53086 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53093 <description>Pin 7</description>
53100 <description>Read: pin driver is low</description>
53105 <description>Read: pin driver is high</description>
53113 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53120 <description>Pin 8</description>
53127 <description>Read: pin driver is low</description>
53132 <description>Read: pin driver is high</description>
53140 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53147 <description>Pin 9</description>
53154 <description>Read: pin driver is low</description>
53159 <description>Read: pin driver is high</description>
53167 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53174 <description>Pin 10</description>
53181 <description>Read: pin driver is low</description>
53186 <description>Read: pin driver is high</description>
53194 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53201 <description>Pin 11</description>
53208 <description>Read: pin driver is low</description>
53213 <description>Read: pin driver is high</description>
53221 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53228 <description>Pin 12</description>
53235 <description>Read: pin driver is low</description>
53240 <description>Read: pin driver is high</description>
53248 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53255 <description>Pin 13</description>
53262 <description>Read: pin driver is low</description>
53267 <description>Read: pin driver is high</description>
53275 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53282 <description>Pin 14</description>
53289 <description>Read: pin driver is low</description>
53294 <description>Read: pin driver is high</description>
53302 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53309 <description>Pin 15</description>
53316 <description>Read: pin driver is low</description>
53321 <description>Read: pin driver is high</description>
53329 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53336 <description>Pin 16</description>
53343 <description>Read: pin driver is low</description>
53348 <description>Read: pin driver is high</description>
53356 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53363 <description>Pin 17</description>
53370 <description>Read: pin driver is low</description>
53375 <description>Read: pin driver is high</description>
53383 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53390 <description>Pin 18</description>
53397 <description>Read: pin driver is low</description>
53402 <description>Read: pin driver is high</description>
53410 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53417 <description>Pin 19</description>
53424 <description>Read: pin driver is low</description>
53429 <description>Read: pin driver is high</description>
53437 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53444 <description>Pin 20</description>
53451 <description>Read: pin driver is low</description>
53456 <description>Read: pin driver is high</description>
53464 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53471 <description>Pin 21</description>
53478 <description>Read: pin driver is low</description>
53483 <description>Read: pin driver is high</description>
53491 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53498 <description>Pin 22</description>
53505 <description>Read: pin driver is low</description>
53510 <description>Read: pin driver is high</description>
53518 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53525 <description>Pin 23</description>
53532 <description>Read: pin driver is low</description>
53537 <description>Read: pin driver is high</description>
53545 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53552 <description>Pin 24</description>
53559 <description>Read: pin driver is low</description>
53564 <description>Read: pin driver is high</description>
53572 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53579 <description>Pin 25</description>
53586 <description>Read: pin driver is low</description>
53591 <description>Read: pin driver is high</description>
53599 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53606 <description>Pin 26</description>
53613 <description>Read: pin driver is low</description>
53618 <description>Read: pin driver is high</description>
53626 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53633 <description>Pin 27</description>
53640 <description>Read: pin driver is low</description>
53645 <description>Read: pin driver is high</description>
53653 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53660 <description>Pin 28</description>
53667 <description>Read: pin driver is low</description>
53672 <description>Read: pin driver is high</description>
53680 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53687 <description>Pin 29</description>
53694 <description>Read: pin driver is low</description>
53699 <description>Read: pin driver is high</description>
53707 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53714 <description>Pin 30</description>
53721 <description>Read: pin driver is low</description>
53726 <description>Read: pin driver is high</description>
53734 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53741 <description>Pin 31</description>
53748 <description>Read: pin driver is low</description>
53753 <description>Read: pin driver is high</description>
53761 … <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
53770 <description>Read GPIO port</description>
53778 <description>Pin 0</description>
53784 <description>Pin input is low</description>
53789 <description>Pin input is high</description>
53796 <description>Pin 1</description>
53802 <description>Pin input is low</description>
53807 <description>Pin input is high</description>
53814 <description>Pin 2</description>
53820 <description>Pin input is low</description>
53825 <description>Pin input is high</description>
53832 <description>Pin 3</description>
53838 <description>Pin input is low</description>
53843 <description>Pin input is high</description>
53850 <description>Pin 4</description>
53856 <description>Pin input is low</description>
53861 <description>Pin input is high</description>
53868 <description>Pin 5</description>
53874 <description>Pin input is low</description>
53879 <description>Pin input is high</description>
53886 <description>Pin 6</description>
53892 <description>Pin input is low</description>
53897 <description>Pin input is high</description>
53904 <description>Pin 7</description>
53910 <description>Pin input is low</description>
53915 <description>Pin input is high</description>
53922 <description>Pin 8</description>
53928 <description>Pin input is low</description>
53933 <description>Pin input is high</description>
53940 <description>Pin 9</description>
53946 <description>Pin input is low</description>
53951 <description>Pin input is high</description>
53958 <description>Pin 10</description>
53964 <description>Pin input is low</description>
53969 <description>Pin input is high</description>
53976 <description>Pin 11</description>
53982 <description>Pin input is low</description>
53987 <description>Pin input is high</description>
53994 <description>Pin 12</description>
54000 <description>Pin input is low</description>
54005 <description>Pin input is high</description>
54012 <description>Pin 13</description>
54018 <description>Pin input is low</description>
54023 <description>Pin input is high</description>
54030 <description>Pin 14</description>
54036 <description>Pin input is low</description>
54041 <description>Pin input is high</description>
54048 <description>Pin 15</description>
54054 <description>Pin input is low</description>
54059 <description>Pin input is high</description>
54066 <description>Pin 16</description>
54072 <description>Pin input is low</description>
54077 <description>Pin input is high</description>
54084 <description>Pin 17</description>
54090 <description>Pin input is low</description>
54095 <description>Pin input is high</description>
54102 <description>Pin 18</description>
54108 <description>Pin input is low</description>
54113 <description>Pin input is high</description>
54120 <description>Pin 19</description>
54126 <description>Pin input is low</description>
54131 <description>Pin input is high</description>
54138 <description>Pin 20</description>
54144 <description>Pin input is low</description>
54149 <description>Pin input is high</description>
54156 <description>Pin 21</description>
54162 <description>Pin input is low</description>
54167 <description>Pin input is high</description>
54174 <description>Pin 22</description>
54180 <description>Pin input is low</description>
54185 <description>Pin input is high</description>
54192 <description>Pin 23</description>
54198 <description>Pin input is low</description>
54203 <description>Pin input is high</description>
54210 <description>Pin 24</description>
54216 <description>Pin input is low</description>
54221 <description>Pin input is high</description>
54228 <description>Pin 25</description>
54234 <description>Pin input is low</description>
54239 <description>Pin input is high</description>
54246 <description>Pin 26</description>
54252 <description>Pin input is low</description>
54257 <description>Pin input is high</description>
54264 <description>Pin 27</description>
54270 <description>Pin input is low</description>
54275 <description>Pin input is high</description>
54282 <description>Pin 28</description>
54288 <description>Pin input is low</description>
54293 <description>Pin input is high</description>
54300 <description>Pin 29</description>
54306 <description>Pin input is low</description>
54311 <description>Pin input is high</description>
54318 <description>Pin 30</description>
54324 <description>Pin input is low</description>
54329 <description>Pin input is high</description>
54336 <description>Pin 31</description>
54342 <description>Pin input is low</description>
54347 <description>Pin input is high</description>
54356 <description>Direction of GPIO pins</description>
54364 <description>Pin 0</description>
54370 <description>Pin set as input</description>
54375 <description>Pin set as output</description>
54382 <description>Pin 1</description>
54388 <description>Pin set as input</description>
54393 <description>Pin set as output</description>
54400 <description>Pin 2</description>
54406 <description>Pin set as input</description>
54411 <description>Pin set as output</description>
54418 <description>Pin 3</description>
54424 <description>Pin set as input</description>
54429 <description>Pin set as output</description>
54436 <description>Pin 4</description>
54442 <description>Pin set as input</description>
54447 <description>Pin set as output</description>
54454 <description>Pin 5</description>
54460 <description>Pin set as input</description>
54465 <description>Pin set as output</description>
54472 <description>Pin 6</description>
54478 <description>Pin set as input</description>
54483 <description>Pin set as output</description>
54490 <description>Pin 7</description>
54496 <description>Pin set as input</description>
54501 <description>Pin set as output</description>
54508 <description>Pin 8</description>
54514 <description>Pin set as input</description>
54519 <description>Pin set as output</description>
54526 <description>Pin 9</description>
54532 <description>Pin set as input</description>
54537 <description>Pin set as output</description>
54544 <description>Pin 10</description>
54550 <description>Pin set as input</description>
54555 <description>Pin set as output</description>
54562 <description>Pin 11</description>
54568 <description>Pin set as input</description>
54573 <description>Pin set as output</description>
54580 <description>Pin 12</description>
54586 <description>Pin set as input</description>
54591 <description>Pin set as output</description>
54598 <description>Pin 13</description>
54604 <description>Pin set as input</description>
54609 <description>Pin set as output</description>
54616 <description>Pin 14</description>
54622 <description>Pin set as input</description>
54627 <description>Pin set as output</description>
54634 <description>Pin 15</description>
54640 <description>Pin set as input</description>
54645 <description>Pin set as output</description>
54652 <description>Pin 16</description>
54658 <description>Pin set as input</description>
54663 <description>Pin set as output</description>
54670 <description>Pin 17</description>
54676 <description>Pin set as input</description>
54681 <description>Pin set as output</description>
54688 <description>Pin 18</description>
54694 <description>Pin set as input</description>
54699 <description>Pin set as output</description>
54706 <description>Pin 19</description>
54712 <description>Pin set as input</description>
54717 <description>Pin set as output</description>
54724 <description>Pin 20</description>
54730 <description>Pin set as input</description>
54735 <description>Pin set as output</description>
54742 <description>Pin 21</description>
54748 <description>Pin set as input</description>
54753 <description>Pin set as output</description>
54760 <description>Pin 22</description>
54766 <description>Pin set as input</description>
54771 <description>Pin set as output</description>
54778 <description>Pin 23</description>
54784 <description>Pin set as input</description>
54789 <description>Pin set as output</description>
54796 <description>Pin 24</description>
54802 <description>Pin set as input</description>
54807 <description>Pin set as output</description>
54814 <description>Pin 25</description>
54820 <description>Pin set as input</description>
54825 <description>Pin set as output</description>
54832 <description>Pin 26</description>
54838 <description>Pin set as input</description>
54843 <description>Pin set as output</description>
54850 <description>Pin 27</description>
54856 <description>Pin set as input</description>
54861 <description>Pin set as output</description>
54868 <description>Pin 28</description>
54874 <description>Pin set as input</description>
54879 <description>Pin set as output</description>
54886 <description>Pin 29</description>
54892 <description>Pin set as input</description>
54897 <description>Pin set as output</description>
54904 <description>Pin 30</description>
54910 <description>Pin set as input</description>
54915 <description>Pin set as output</description>
54922 <description>Pin 31</description>
54928 <description>Pin set as input</description>
54933 <description>Pin set as output</description>
54942 <description>DIR set register</description>
54951 <description>Set as output pin 0</description>
54958 <description>Read: pin set as input</description>
54963 <description>Read: pin set as output</description>
54971 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
54978 <description>Set as output pin 1</description>
54985 <description>Read: pin set as input</description>
54990 <description>Read: pin set as output</description>
54998 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55005 <description>Set as output pin 2</description>
55012 <description>Read: pin set as input</description>
55017 <description>Read: pin set as output</description>
55025 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55032 <description>Set as output pin 3</description>
55039 <description>Read: pin set as input</description>
55044 <description>Read: pin set as output</description>
55052 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55059 <description>Set as output pin 4</description>
55066 <description>Read: pin set as input</description>
55071 <description>Read: pin set as output</description>
55079 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55086 <description>Set as output pin 5</description>
55093 <description>Read: pin set as input</description>
55098 <description>Read: pin set as output</description>
55106 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55113 <description>Set as output pin 6</description>
55120 <description>Read: pin set as input</description>
55125 <description>Read: pin set as output</description>
55133 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55140 <description>Set as output pin 7</description>
55147 <description>Read: pin set as input</description>
55152 <description>Read: pin set as output</description>
55160 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55167 <description>Set as output pin 8</description>
55174 <description>Read: pin set as input</description>
55179 <description>Read: pin set as output</description>
55187 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55194 <description>Set as output pin 9</description>
55201 <description>Read: pin set as input</description>
55206 <description>Read: pin set as output</description>
55214 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55221 <description>Set as output pin 10</description>
55228 <description>Read: pin set as input</description>
55233 <description>Read: pin set as output</description>
55241 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55248 <description>Set as output pin 11</description>
55255 <description>Read: pin set as input</description>
55260 <description>Read: pin set as output</description>
55268 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55275 <description>Set as output pin 12</description>
55282 <description>Read: pin set as input</description>
55287 <description>Read: pin set as output</description>
55295 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55302 <description>Set as output pin 13</description>
55309 <description>Read: pin set as input</description>
55314 <description>Read: pin set as output</description>
55322 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55329 <description>Set as output pin 14</description>
55336 <description>Read: pin set as input</description>
55341 <description>Read: pin set as output</description>
55349 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55356 <description>Set as output pin 15</description>
55363 <description>Read: pin set as input</description>
55368 <description>Read: pin set as output</description>
55376 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55383 <description>Set as output pin 16</description>
55390 <description>Read: pin set as input</description>
55395 <description>Read: pin set as output</description>
55403 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55410 <description>Set as output pin 17</description>
55417 <description>Read: pin set as input</description>
55422 <description>Read: pin set as output</description>
55430 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55437 <description>Set as output pin 18</description>
55444 <description>Read: pin set as input</description>
55449 <description>Read: pin set as output</description>
55457 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55464 <description>Set as output pin 19</description>
55471 <description>Read: pin set as input</description>
55476 <description>Read: pin set as output</description>
55484 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55491 <description>Set as output pin 20</description>
55498 <description>Read: pin set as input</description>
55503 <description>Read: pin set as output</description>
55511 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55518 <description>Set as output pin 21</description>
55525 <description>Read: pin set as input</description>
55530 <description>Read: pin set as output</description>
55538 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55545 <description>Set as output pin 22</description>
55552 <description>Read: pin set as input</description>
55557 <description>Read: pin set as output</description>
55565 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55572 <description>Set as output pin 23</description>
55579 <description>Read: pin set as input</description>
55584 <description>Read: pin set as output</description>
55592 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55599 <description>Set as output pin 24</description>
55606 <description>Read: pin set as input</description>
55611 <description>Read: pin set as output</description>
55619 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55626 <description>Set as output pin 25</description>
55633 <description>Read: pin set as input</description>
55638 <description>Read: pin set as output</description>
55646 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55653 <description>Set as output pin 26</description>
55660 <description>Read: pin set as input</description>
55665 <description>Read: pin set as output</description>
55673 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55680 <description>Set as output pin 27</description>
55687 <description>Read: pin set as input</description>
55692 <description>Read: pin set as output</description>
55700 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55707 <description>Set as output pin 28</description>
55714 <description>Read: pin set as input</description>
55719 <description>Read: pin set as output</description>
55727 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55734 <description>Set as output pin 29</description>
55741 <description>Read: pin set as input</description>
55746 <description>Read: pin set as output</description>
55754 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55761 <description>Set as output pin 30</description>
55768 <description>Read: pin set as input</description>
55773 <description>Read: pin set as output</description>
55781 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55788 <description>Set as output pin 31</description>
55795 <description>Read: pin set as input</description>
55800 <description>Read: pin set as output</description>
55808 … <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
55817 <description>DIR clear register</description>
55826 <description>Set as input pin 0</description>
55833 <description>Read: pin set as input</description>
55838 <description>Read: pin set as output</description>
55846 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
55853 <description>Set as input pin 1</description>
55860 <description>Read: pin set as input</description>
55865 <description>Read: pin set as output</description>
55873 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
55880 <description>Set as input pin 2</description>
55887 <description>Read: pin set as input</description>
55892 <description>Read: pin set as output</description>
55900 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
55907 <description>Set as input pin 3</description>
55914 <description>Read: pin set as input</description>
55919 <description>Read: pin set as output</description>
55927 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
55934 <description>Set as input pin 4</description>
55941 <description>Read: pin set as input</description>
55946 <description>Read: pin set as output</description>
55954 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
55961 <description>Set as input pin 5</description>
55968 <description>Read: pin set as input</description>
55973 <description>Read: pin set as output</description>
55981 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
55988 <description>Set as input pin 6</description>
55995 <description>Read: pin set as input</description>
56000 <description>Read: pin set as output</description>
56008 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56015 <description>Set as input pin 7</description>
56022 <description>Read: pin set as input</description>
56027 <description>Read: pin set as output</description>
56035 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56042 <description>Set as input pin 8</description>
56049 <description>Read: pin set as input</description>
56054 <description>Read: pin set as output</description>
56062 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56069 <description>Set as input pin 9</description>
56076 <description>Read: pin set as input</description>
56081 <description>Read: pin set as output</description>
56089 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56096 <description>Set as input pin 10</description>
56103 <description>Read: pin set as input</description>
56108 <description>Read: pin set as output</description>
56116 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56123 <description>Set as input pin 11</description>
56130 <description>Read: pin set as input</description>
56135 <description>Read: pin set as output</description>
56143 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56150 <description>Set as input pin 12</description>
56157 <description>Read: pin set as input</description>
56162 <description>Read: pin set as output</description>
56170 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56177 <description>Set as input pin 13</description>
56184 <description>Read: pin set as input</description>
56189 <description>Read: pin set as output</description>
56197 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56204 <description>Set as input pin 14</description>
56211 <description>Read: pin set as input</description>
56216 <description>Read: pin set as output</description>
56224 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56231 <description>Set as input pin 15</description>
56238 <description>Read: pin set as input</description>
56243 <description>Read: pin set as output</description>
56251 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56258 <description>Set as input pin 16</description>
56265 <description>Read: pin set as input</description>
56270 <description>Read: pin set as output</description>
56278 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56285 <description>Set as input pin 17</description>
56292 <description>Read: pin set as input</description>
56297 <description>Read: pin set as output</description>
56305 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56312 <description>Set as input pin 18</description>
56319 <description>Read: pin set as input</description>
56324 <description>Read: pin set as output</description>
56332 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56339 <description>Set as input pin 19</description>
56346 <description>Read: pin set as input</description>
56351 <description>Read: pin set as output</description>
56359 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56366 <description>Set as input pin 20</description>
56373 <description>Read: pin set as input</description>
56378 <description>Read: pin set as output</description>
56386 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56393 <description>Set as input pin 21</description>
56400 <description>Read: pin set as input</description>
56405 <description>Read: pin set as output</description>
56413 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56420 <description>Set as input pin 22</description>
56427 <description>Read: pin set as input</description>
56432 <description>Read: pin set as output</description>
56440 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56447 <description>Set as input pin 23</description>
56454 <description>Read: pin set as input</description>
56459 <description>Read: pin set as output</description>
56467 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56474 <description>Set as input pin 24</description>
56481 <description>Read: pin set as input</description>
56486 <description>Read: pin set as output</description>
56494 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56501 <description>Set as input pin 25</description>
56508 <description>Read: pin set as input</description>
56513 <description>Read: pin set as output</description>
56521 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56528 <description>Set as input pin 26</description>
56535 <description>Read: pin set as input</description>
56540 <description>Read: pin set as output</description>
56548 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56555 <description>Set as input pin 27</description>
56562 <description>Read: pin set as input</description>
56567 <description>Read: pin set as output</description>
56575 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56582 <description>Set as input pin 28</description>
56589 <description>Read: pin set as input</description>
56594 <description>Read: pin set as output</description>
56602 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56609 <description>Set as input pin 29</description>
56616 <description>Read: pin set as input</description>
56621 <description>Read: pin set as output</description>
56629 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56636 <description>Set as input pin 30</description>
56643 <description>Read: pin set as input</description>
56648 <description>Read: pin set as output</description>
56656 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56663 <description>Set as input pin 31</description>
56670 <description>Read: pin set as input</description>
56675 <description>Read: pin set as output</description>
56683 … <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
56692 …<description>Latch register indicating what GPIO pins that have met the criteria set in the PIN_CN…
56700 …<description>Status on whether PIN0 has met criteria set in PIN_CNF[0].SENSE register. Write '1' t…
56706 <description>Criteria has not been met</description>
56711 <description>Criteria has been met</description>
56718 …<description>Status on whether PIN1 has met criteria set in PIN_CNF[1].SENSE register. Write '1' t…
56724 <description>Criteria has not been met</description>
56729 <description>Criteria has been met</description>
56736 …<description>Status on whether PIN2 has met criteria set in PIN_CNF[2].SENSE register. Write '1' t…
56742 <description>Criteria has not been met</description>
56747 <description>Criteria has been met</description>
56754 …<description>Status on whether PIN3 has met criteria set in PIN_CNF[3].SENSE register. Write '1' t…
56760 <description>Criteria has not been met</description>
56765 <description>Criteria has been met</description>
56772 …<description>Status on whether PIN4 has met criteria set in PIN_CNF[4].SENSE register. Write '1' t…
56778 <description>Criteria has not been met</description>
56783 <description>Criteria has been met</description>
56790 …<description>Status on whether PIN5 has met criteria set in PIN_CNF[5].SENSE register. Write '1' t…
56796 <description>Criteria has not been met</description>
56801 <description>Criteria has been met</description>
56808 …<description>Status on whether PIN6 has met criteria set in PIN_CNF[6].SENSE register. Write '1' t…
56814 <description>Criteria has not been met</description>
56819 <description>Criteria has been met</description>
56826 …<description>Status on whether PIN7 has met criteria set in PIN_CNF[7].SENSE register. Write '1' t…
56832 <description>Criteria has not been met</description>
56837 <description>Criteria has been met</description>
56844 …<description>Status on whether PIN8 has met criteria set in PIN_CNF[8].SENSE register. Write '1' t…
56850 <description>Criteria has not been met</description>
56855 <description>Criteria has been met</description>
56862 …<description>Status on whether PIN9 has met criteria set in PIN_CNF[9].SENSE register. Write '1' t…
56868 <description>Criteria has not been met</description>
56873 <description>Criteria has been met</description>
56880 …<description>Status on whether PIN10 has met criteria set in PIN_CNF[10].SENSE register. Write '1'…
56886 <description>Criteria has not been met</description>
56891 <description>Criteria has been met</description>
56898 …<description>Status on whether PIN11 has met criteria set in PIN_CNF[11].SENSE register. Write '1'…
56904 <description>Criteria has not been met</description>
56909 <description>Criteria has been met</description>
56916 …<description>Status on whether PIN12 has met criteria set in PIN_CNF[12].SENSE register. Write '1'…
56922 <description>Criteria has not been met</description>
56927 <description>Criteria has been met</description>
56934 …<description>Status on whether PIN13 has met criteria set in PIN_CNF[13].SENSE register. Write '1'…
56940 <description>Criteria has not been met</description>
56945 <description>Criteria has been met</description>
56952 …<description>Status on whether PIN14 has met criteria set in PIN_CNF[14].SENSE register. Write '1'…
56958 <description>Criteria has not been met</description>
56963 <description>Criteria has been met</description>
56970 …<description>Status on whether PIN15 has met criteria set in PIN_CNF[15].SENSE register. Write '1'…
56976 <description>Criteria has not been met</description>
56981 <description>Criteria has been met</description>
56988 …<description>Status on whether PIN16 has met criteria set in PIN_CNF[16].SENSE register. Write '1'…
56994 <description>Criteria has not been met</description>
56999 <description>Criteria has been met</description>
57006 …<description>Status on whether PIN17 has met criteria set in PIN_CNF[17].SENSE register. Write '1'…
57012 <description>Criteria has not been met</description>
57017 <description>Criteria has been met</description>
57024 …<description>Status on whether PIN18 has met criteria set in PIN_CNF[18].SENSE register. Write '1'…
57030 <description>Criteria has not been met</description>
57035 <description>Criteria has been met</description>
57042 …<description>Status on whether PIN19 has met criteria set in PIN_CNF[19].SENSE register. Write '1'…
57048 <description>Criteria has not been met</description>
57053 <description>Criteria has been met</description>
57060 …<description>Status on whether PIN20 has met criteria set in PIN_CNF[20].SENSE register. Write '1'…
57066 <description>Criteria has not been met</description>
57071 <description>Criteria has been met</description>
57078 …<description>Status on whether PIN21 has met criteria set in PIN_CNF[21].SENSE register. Write '1'…
57084 <description>Criteria has not been met</description>
57089 <description>Criteria has been met</description>
57096 …<description>Status on whether PIN22 has met criteria set in PIN_CNF[22].SENSE register. Write '1'…
57102 <description>Criteria has not been met</description>
57107 <description>Criteria has been met</description>
57114 …<description>Status on whether PIN23 has met criteria set in PIN_CNF[23].SENSE register. Write '1'…
57120 <description>Criteria has not been met</description>
57125 <description>Criteria has been met</description>
57132 …<description>Status on whether PIN24 has met criteria set in PIN_CNF[24].SENSE register. Write '1'…
57138 <description>Criteria has not been met</description>
57143 <description>Criteria has been met</description>
57150 …<description>Status on whether PIN25 has met criteria set in PIN_CNF[25].SENSE register. Write '1'…
57156 <description>Criteria has not been met</description>
57161 <description>Criteria has been met</description>
57168 …<description>Status on whether PIN26 has met criteria set in PIN_CNF[26].SENSE register. Write '1'…
57174 <description>Criteria has not been met</description>
57179 <description>Criteria has been met</description>
57186 …<description>Status on whether PIN27 has met criteria set in PIN_CNF[27].SENSE register. Write '1'…
57192 <description>Criteria has not been met</description>
57197 <description>Criteria has been met</description>
57204 …<description>Status on whether PIN28 has met criteria set in PIN_CNF[28].SENSE register. Write '1'…
57210 <description>Criteria has not been met</description>
57215 <description>Criteria has been met</description>
57222 …<description>Status on whether PIN29 has met criteria set in PIN_CNF[29].SENSE register. Write '1'…
57228 <description>Criteria has not been met</description>
57233 <description>Criteria has been met</description>
57240 …<description>Status on whether PIN30 has met criteria set in PIN_CNF[30].SENSE register. Write '1'…
57246 <description>Criteria has not been met</description>
57251 <description>Criteria has been met</description>
57258 …<description>Status on whether PIN31 has met criteria set in PIN_CNF[31].SENSE register. Write '1'…
57264 <description>Criteria has not been met</description>
57269 <description>Criteria has been met</description>
57278 <description>Select between default DETECT signal behavior and LDETECT mode</description>
57287 … <description>Select between default DETECT signal behavior and LDETECT mode</description>
57293 <description>DETECT directly connected to PIN DETECT signals</description>
57298 <description>Use the latched LDETECT behavior</description>
57309 <description>Description collection: Pin n configuration of GPIO pin</description>
57317 <description>Pin direction. Same physical register as DIR register</description>
57323 <description>Configure pin as an input pin</description>
57328 <description>Configure pin as an output pin</description>
57335 <description>Connect or disconnect input buffer</description>
57341 <description>Connect input buffer</description>
57346 <description>Disconnect input buffer</description>
57353 <description>Pull configuration</description>
57359 <description>No pull</description>
57364 <description>Pull down on pin</description>
57369 <description>Pull up on pin</description>
57376 <description>Drive configuration for '0'</description>
57382 <description>Standard '0'</description>
57387 <description>High drive '0'</description>
57392 <description>Disconnect '0'(normally used for wired-or connections)</description>
57397 <description>Extra high drive '0'</description>
57404 <description>Drive configuration for '1'</description>
57410 <description>Standard '1'</description>
57415 <description>High drive '1'</description>
57420 <description>Disconnect '1'(normally used for wired-or connections)</description>
57425 <description>Extra high drive '1'</description>
57432 <description>Pin sensing mechanism</description>
57438 <description>Disabled</description>
57443 <description>Sense for high level</description>
57448 <description>Sense for low level</description>
57455 <description>Select which module has direct control over this pin</description>
57461 <description>GPIO or peripherals with PSEL registers</description>
57466 <description>VPR processor</description>
57471 <description>GRTC peripheral</description>
57482 <description>GPIO Port 1</description>
57490 <description>Control access port 0</description>
57509 <description>RXSTATUS is changed to DataPending.</description>
57517 <description>RXSTATUS is changed to DataPending.</description>
57523 <description>Event not generated</description>
57528 <description>Event generated</description>
57537 <description>TXSTATUS is changed to NoDataPending.</description>
57545 <description>TXSTATUS is changed to NoDataPending.</description>
57551 <description>Event not generated</description>
57556 <description>Event generated</description>
57565 <description>Enable or disable interrupt</description>
57573 <description>Enable or disable interrupt for event RXREADY</description>
57579 <description>Disable</description>
57584 <description>Enable</description>
57591 <description>Enable or disable interrupt for event TXDONE</description>
57597 <description>Disable</description>
57602 <description>Enable</description>
57611 <description>Enable interrupt</description>
57619 <description>Write '1' to enable interrupt for event RXREADY</description>
57626 <description>Read: Disabled</description>
57631 <description>Read: Enabled</description>
57639 <description>Enable</description>
57646 <description>Write '1' to enable interrupt for event TXDONE</description>
57653 <description>Read: Disabled</description>
57658 <description>Read: Enabled</description>
57666 <description>Enable</description>
57675 <description>Disable interrupt</description>
57683 <description>Write '1' to disable interrupt for event RXREADY</description>
57690 <description>Read: Disabled</description>
57695 <description>Read: Enabled</description>
57703 <description>Disable</description>
57710 <description>Write '1' to disable interrupt for event TXDONE</description>
57717 <description>Read: Disabled</description>
57722 <description>Read: Enabled</description>
57730 <description>Disable</description>
57739 <description>Pending interrupts</description>
57747 <description>Read pending status of interrupt for event RXREADY</description>
57754 <description>Read: Not pending</description>
57759 <description>Read: Pending</description>
57766 <description>Read pending status of interrupt for event TXDONE</description>
57773 <description>Read: Not pending</description>
57778 <description>Read: Pending</description>
57787 <description>Unspecified</description>
57793 <description>Data sent from the debugger to the CPU.</description>
57801 <description>Data received from debugger.</description>
57809 …<description>Status to indicate if data sent from the debugger to the CPU has been read.</descript…
57817 <description>Status of data in register RXDATA.</description>
57823 <description>No data is pending in register RXDATA.</description>
57828 <description>Data is pending in register RXDATA.</description>
57837 <description>Data sent from the CPU to the debugger.</description>
57845 <description>Data sent to debugger.</description>
57853 …<description>Status to indicate if data sent from the CPU to the debugger has been read.</descript…
57861 <description>Status of data in register TXDATA.</description>
57867 <description>No data is pending in register TXDATA.</description>
57872 <description>Data is pending in register TXDATA.</description>
57882 <description>Unspecified</description>
57888 …<description>This register locks the ERASEPROTECT.DISABLE register from being written until next r…
57896 … <description>Lock ERASEPROTECT.DISABLE register from being written until next reset.</description>
57902 <description>Register ERASEPROTECT.DISABLE is writeable.</description>
57907 <description>Register ERASEPROTECT.DISABLE is read-only.</description>
57916 …<description>This register disables the ERASEPROTECT register and performs an ERASEALL operation.…
57924 …description>The ERASEALL sequence is initiated if the value of the KEY fields are non-zero and the…
57933 <description>System reset request.</description>
57941 <description>Reset request</description>
57947 <description>No reset is generated</description>
57952 <description>Perform a device soft reset</description>
57957 <description>Perform a device hard reset</description>
57962 <description>Perform a device pin reset</description>
57973 <description>Control access port 1</description>
57984 <description>Trace and debug control 0</description>
57999 <description>System power-up request</description>
58007 <description>Activate power-up request</description>
58013 <description>Power-up request not active</description>
58018 <description>Power-up request active</description>
58027 <description>Debug power-up request</description>
58035 <description>Activate power-up request</description>
58041 <description>Power-up request not active</description>
58046 <description>Power-up request active</description>
58055 <description>Enable debug domain and aquire selected GPIOs</description>
58068 <description>Disable debug domain and release selected GPIOs</description>
58073 <description>Enable debug domain and aquire selected GPIOs</description>
58082 <description>Trace port speed</description>
58090 …<description>Trace port speed is divided from CPU clock. The TRACECLK pin output will be divided a…
58096 <description>Trace port speed equals CPU clock</description>
58101 <description>Trace port speed equals CPU clock divided by 2</description>
58106 <description>Trace port speed equals CPU clock divided by 4</description>
58111 <description>Trace port speed equals CPU clock divided by 32</description>
58120 <description>SW-DP Target instance</description>
58128 … <description>TINSTANCE bits are used in the SW-DP DLPIDR.TINSTANCE field.</description>
58138 <description>Trace and debug control 1</description>
58145 <description>Timer/Counter 0</description>
58164 <description>Start Timer</description>
58172 <description>Start Timer</description>
58178 <description>Trigger task</description>
58187 <description>Stop Timer</description>
58195 <description>Stop Timer</description>
58201 <description>Trigger task</description>
58210 <description>Increment Timer (Counter mode only)</description>
58218 <description>Increment Timer (Counter mode only)</description>
58224 <description>Trigger task</description>
58233 <description>Clear time</description>
58241 <description>Clear time</description>
58247 <description>Trigger task</description>
58258 <description>Description collection: Capture Timer value to CC[n] register</description>
58266 <description>Capture Timer value to CC[n] register</description>
58272 <description>Trigger task</description>
58281 <description>Subscribe configuration for task START</description>
58289 <description>DPPI channel that task START will subscribe to</description>
58300 <description>Disable subscription</description>
58305 <description>Enable subscription</description>
58314 <description>Subscribe configuration for task STOP</description>
58322 <description>DPPI channel that task STOP will subscribe to</description>
58333 <description>Disable subscription</description>
58338 <description>Enable subscription</description>
58347 <description>Subscribe configuration for task COUNT</description>
58355 <description>DPPI channel that task COUNT will subscribe to</description>
58366 <description>Disable subscription</description>
58371 <description>Enable subscription</description>
58380 <description>Subscribe configuration for task CLEAR</description>
58388 <description>DPPI channel that task CLEAR will subscribe to</description>
58399 <description>Disable subscription</description>
58404 <description>Enable subscription</description>
58415 … <description>Description collection: Subscribe configuration for task CAPTURE[n]</description>
58423 <description>DPPI channel that task CAPTURE[n] will subscribe to</description>
58434 <description>Disable subscription</description>
58439 <description>Enable subscription</description>
58450 <description>Description collection: Compare event on CC[n] match</description>
58458 <description>Compare event on CC[n] match</description>
58464 <description>Event not generated</description>
58469 <description>Event generated</description>
58480 … <description>Description collection: Publish configuration for event COMPARE[n]</description>
58488 <description>DPPI channel that event COMPARE[n] will publish to</description>
58499 <description>Disable publishing</description>
58504 <description>Enable publishing</description>
58513 <description>Shortcuts between local events and tasks</description>
58521 <description>Shortcut between event COMPARE[0] and task CLEAR</description>
58527 <description>Disable shortcut</description>
58532 <description>Enable shortcut</description>
58539 <description>Shortcut between event COMPARE[1] and task CLEAR</description>
58545 <description>Disable shortcut</description>
58550 <description>Enable shortcut</description>
58557 <description>Shortcut between event COMPARE[2] and task CLEAR</description>
58563 <description>Disable shortcut</description>
58568 <description>Enable shortcut</description>
58575 <description>Shortcut between event COMPARE[3] and task CLEAR</description>
58581 <description>Disable shortcut</description>
58586 <description>Enable shortcut</description>
58593 <description>Shortcut between event COMPARE[4] and task CLEAR</description>
58599 <description>Disable shortcut</description>
58604 <description>Enable shortcut</description>
58611 <description>Shortcut between event COMPARE[5] and task CLEAR</description>
58617 <description>Disable shortcut</description>
58622 <description>Enable shortcut</description>
58629 <description>Shortcut between event COMPARE[6] and task CLEAR</description>
58635 <description>Disable shortcut</description>
58640 <description>Enable shortcut</description>
58647 <description>Shortcut between event COMPARE[7] and task CLEAR</description>
58653 <description>Disable shortcut</description>
58658 <description>Enable shortcut</description>
58665 <description>Shortcut between event COMPARE[0] and task STOP</description>
58671 <description>Disable shortcut</description>
58676 <description>Enable shortcut</description>
58683 <description>Shortcut between event COMPARE[1] and task STOP</description>
58689 <description>Disable shortcut</description>
58694 <description>Enable shortcut</description>
58701 <description>Shortcut between event COMPARE[2] and task STOP</description>
58707 <description>Disable shortcut</description>
58712 <description>Enable shortcut</description>
58719 <description>Shortcut between event COMPARE[3] and task STOP</description>
58725 <description>Disable shortcut</description>
58730 <description>Enable shortcut</description>
58737 <description>Shortcut between event COMPARE[4] and task STOP</description>
58743 <description>Disable shortcut</description>
58748 <description>Enable shortcut</description>
58755 <description>Shortcut between event COMPARE[5] and task STOP</description>
58761 <description>Disable shortcut</description>
58766 <description>Enable shortcut</description>
58773 <description>Shortcut between event COMPARE[6] and task STOP</description>
58779 <description>Disable shortcut</description>
58784 <description>Enable shortcut</description>
58791 <description>Shortcut between event COMPARE[7] and task STOP</description>
58797 <description>Disable shortcut</description>
58802 <description>Enable shortcut</description>
58811 <description>Enable or disable interrupt</description>
58819 <description>Enable or disable interrupt for event COMPARE[0]</description>
58825 <description>Disable</description>
58830 <description>Enable</description>
58837 <description>Enable or disable interrupt for event COMPARE[1]</description>
58843 <description>Disable</description>
58848 <description>Enable</description>
58855 <description>Enable or disable interrupt for event COMPARE[2]</description>
58861 <description>Disable</description>
58866 <description>Enable</description>
58873 <description>Enable or disable interrupt for event COMPARE[3]</description>
58879 <description>Disable</description>
58884 <description>Enable</description>
58891 <description>Enable or disable interrupt for event COMPARE[4]</description>
58897 <description>Disable</description>
58902 <description>Enable</description>
58909 <description>Enable or disable interrupt for event COMPARE[5]</description>
58915 <description>Disable</description>
58920 <description>Enable</description>
58927 <description>Enable or disable interrupt for event COMPARE[6]</description>
58933 <description>Disable</description>
58938 <description>Enable</description>
58945 <description>Enable or disable interrupt for event COMPARE[7]</description>
58951 <description>Disable</description>
58956 <description>Enable</description>
58965 <description>Enable interrupt</description>
58973 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
58980 <description>Read: Disabled</description>
58985 <description>Read: Enabled</description>
58993 <description>Enable</description>
59000 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
59007 <description>Read: Disabled</description>
59012 <description>Read: Enabled</description>
59020 <description>Enable</description>
59027 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
59034 <description>Read: Disabled</description>
59039 <description>Read: Enabled</description>
59047 <description>Enable</description>
59054 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
59061 <description>Read: Disabled</description>
59066 <description>Read: Enabled</description>
59074 <description>Enable</description>
59081 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
59088 <description>Read: Disabled</description>
59093 <description>Read: Enabled</description>
59101 <description>Enable</description>
59108 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
59115 <description>Read: Disabled</description>
59120 <description>Read: Enabled</description>
59128 <description>Enable</description>
59135 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
59142 <description>Read: Disabled</description>
59147 <description>Read: Enabled</description>
59155 <description>Enable</description>
59162 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
59169 <description>Read: Disabled</description>
59174 <description>Read: Enabled</description>
59182 <description>Enable</description>
59191 <description>Disable interrupt</description>
59199 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
59206 <description>Read: Disabled</description>
59211 <description>Read: Enabled</description>
59219 <description>Disable</description>
59226 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
59233 <description>Read: Disabled</description>
59238 <description>Read: Enabled</description>
59246 <description>Disable</description>
59253 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
59260 <description>Read: Disabled</description>
59265 <description>Read: Enabled</description>
59273 <description>Disable</description>
59280 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
59287 <description>Read: Disabled</description>
59292 <description>Read: Enabled</description>
59300 <description>Disable</description>
59307 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
59314 <description>Read: Disabled</description>
59319 <description>Read: Enabled</description>
59327 <description>Disable</description>
59334 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
59341 <description>Read: Disabled</description>
59346 <description>Read: Enabled</description>
59354 <description>Disable</description>
59361 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
59368 <description>Read: Disabled</description>
59373 <description>Read: Enabled</description>
59381 <description>Disable</description>
59388 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
59395 <description>Read: Disabled</description>
59400 <description>Read: Enabled</description>
59408 <description>Disable</description>
59417 <description>Timer mode selection</description>
59425 <description>Timer mode</description>
59431 <description>Select Timer mode</description>
59436 <description>Deprecated enumerator - Select Counter mode</description>
59441 <description>Select Low Power Counter mode</description>
59450 <description>Configure the number of bits used by the TIMER</description>
59458 <description>Timer bit width</description>
59464 <description>16 bit timer bit width</description>
59469 <description>8 bit timer bit width</description>
59474 <description>24 bit timer bit width</description>
59479 <description>32 bit timer bit width</description>
59488 <description>Timer prescaler register</description>
59496 <description>Prescaler value</description>
59506 <description>Description collection: Capture/Compare register n</description>
59514 <description>Capture/Compare value</description>
59524 …<description>Description collection: Enable one-shot operation for Capture/Compare channel n</desc…
59532 <description>Enable one-shot operation</description>
59538 <description>Disable one-shot operation</description>
59543 <description>Enable one-shot operation</description>
59554 <description>Timer/Counter 1</description>
59565 <description>Event generator unit 0</description>
59586 …<description>Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event…
59594 … <description>Trigger n for triggering the corresponding TRIGGERED[n] event</description>
59600 <description>Trigger task</description>
59611 … <description>Description collection: Subscribe configuration for task TRIGGER[n]</description>
59619 <description>DPPI channel that task TRIGGER[n] will subscribe to</description>
59630 <description>Disable subscription</description>
59635 <description>Enable subscription</description>
59646 …<description>Description collection: Event number n generated by triggering the corresponding TRIG…
59654 …<description>Event number n generated by triggering the corresponding TRIGGER[n] task</description>
59660 <description>Event not generated</description>
59665 <description>Event generated</description>
59676 … <description>Description collection: Publish configuration for event TRIGGERED[n]</description>
59684 <description>DPPI channel that event TRIGGERED[n] will publish to</description>
59695 <description>Disable publishing</description>
59700 <description>Enable publishing</description>
59709 <description>Enable or disable interrupt</description>
59717 <description>Enable or disable interrupt for event TRIGGERED[0]</description>
59723 <description>Disable</description>
59728 <description>Enable</description>
59735 <description>Enable or disable interrupt for event TRIGGERED[1]</description>
59741 <description>Disable</description>
59746 <description>Enable</description>
59753 <description>Enable or disable interrupt for event TRIGGERED[2]</description>
59759 <description>Disable</description>
59764 <description>Enable</description>
59771 <description>Enable or disable interrupt for event TRIGGERED[3]</description>
59777 <description>Disable</description>
59782 <description>Enable</description>
59789 <description>Enable or disable interrupt for event TRIGGERED[4]</description>
59795 <description>Disable</description>
59800 <description>Enable</description>
59807 <description>Enable or disable interrupt for event TRIGGERED[5]</description>
59813 <description>Disable</description>
59818 <description>Enable</description>
59825 <description>Enable or disable interrupt for event TRIGGERED[6]</description>
59831 <description>Disable</description>
59836 <description>Enable</description>
59843 <description>Enable or disable interrupt for event TRIGGERED[7]</description>
59849 <description>Disable</description>
59854 <description>Enable</description>
59861 <description>Enable or disable interrupt for event TRIGGERED[8]</description>
59867 <description>Disable</description>
59872 <description>Enable</description>
59879 <description>Enable or disable interrupt for event TRIGGERED[9]</description>
59885 <description>Disable</description>
59890 <description>Enable</description>
59897 <description>Enable or disable interrupt for event TRIGGERED[10]</description>
59903 <description>Disable</description>
59908 <description>Enable</description>
59915 <description>Enable or disable interrupt for event TRIGGERED[11]</description>
59921 <description>Disable</description>
59926 <description>Enable</description>
59933 <description>Enable or disable interrupt for event TRIGGERED[12]</description>
59939 <description>Disable</description>
59944 <description>Enable</description>
59951 <description>Enable or disable interrupt for event TRIGGERED[13]</description>
59957 <description>Disable</description>
59962 <description>Enable</description>
59969 <description>Enable or disable interrupt for event TRIGGERED[14]</description>
59975 <description>Disable</description>
59980 <description>Enable</description>
59987 <description>Enable or disable interrupt for event TRIGGERED[15]</description>
59993 <description>Disable</description>
59998 <description>Enable</description>
60007 <description>Enable interrupt</description>
60015 <description>Write '1' to enable interrupt for event TRIGGERED[0]</description>
60022 <description>Read: Disabled</description>
60027 <description>Read: Enabled</description>
60035 <description>Enable</description>
60042 <description>Write '1' to enable interrupt for event TRIGGERED[1]</description>
60049 <description>Read: Disabled</description>
60054 <description>Read: Enabled</description>
60062 <description>Enable</description>
60069 <description>Write '1' to enable interrupt for event TRIGGERED[2]</description>
60076 <description>Read: Disabled</description>
60081 <description>Read: Enabled</description>
60089 <description>Enable</description>
60096 <description>Write '1' to enable interrupt for event TRIGGERED[3]</description>
60103 <description>Read: Disabled</description>
60108 <description>Read: Enabled</description>
60116 <description>Enable</description>
60123 <description>Write '1' to enable interrupt for event TRIGGERED[4]</description>
60130 <description>Read: Disabled</description>
60135 <description>Read: Enabled</description>
60143 <description>Enable</description>
60150 <description>Write '1' to enable interrupt for event TRIGGERED[5]</description>
60157 <description>Read: Disabled</description>
60162 <description>Read: Enabled</description>
60170 <description>Enable</description>
60177 <description>Write '1' to enable interrupt for event TRIGGERED[6]</description>
60184 <description>Read: Disabled</description>
60189 <description>Read: Enabled</description>
60197 <description>Enable</description>
60204 <description>Write '1' to enable interrupt for event TRIGGERED[7]</description>
60211 <description>Read: Disabled</description>
60216 <description>Read: Enabled</description>
60224 <description>Enable</description>
60231 <description>Write '1' to enable interrupt for event TRIGGERED[8]</description>
60238 <description>Read: Disabled</description>
60243 <description>Read: Enabled</description>
60251 <description>Enable</description>
60258 <description>Write '1' to enable interrupt for event TRIGGERED[9]</description>
60265 <description>Read: Disabled</description>
60270 <description>Read: Enabled</description>
60278 <description>Enable</description>
60285 <description>Write '1' to enable interrupt for event TRIGGERED[10]</description>
60292 <description>Read: Disabled</description>
60297 <description>Read: Enabled</description>
60305 <description>Enable</description>
60312 <description>Write '1' to enable interrupt for event TRIGGERED[11]</description>
60319 <description>Read: Disabled</description>
60324 <description>Read: Enabled</description>
60332 <description>Enable</description>
60339 <description>Write '1' to enable interrupt for event TRIGGERED[12]</description>
60346 <description>Read: Disabled</description>
60351 <description>Read: Enabled</description>
60359 <description>Enable</description>
60366 <description>Write '1' to enable interrupt for event TRIGGERED[13]</description>
60373 <description>Read: Disabled</description>
60378 <description>Read: Enabled</description>
60386 <description>Enable</description>
60393 <description>Write '1' to enable interrupt for event TRIGGERED[14]</description>
60400 <description>Read: Disabled</description>
60405 <description>Read: Enabled</description>
60413 <description>Enable</description>
60420 <description>Write '1' to enable interrupt for event TRIGGERED[15]</description>
60427 <description>Read: Disabled</description>
60432 <description>Read: Enabled</description>
60440 <description>Enable</description>
60449 <description>Disable interrupt</description>
60457 <description>Write '1' to disable interrupt for event TRIGGERED[0]</description>
60464 <description>Read: Disabled</description>
60469 <description>Read: Enabled</description>
60477 <description>Disable</description>
60484 <description>Write '1' to disable interrupt for event TRIGGERED[1]</description>
60491 <description>Read: Disabled</description>
60496 <description>Read: Enabled</description>
60504 <description>Disable</description>
60511 <description>Write '1' to disable interrupt for event TRIGGERED[2]</description>
60518 <description>Read: Disabled</description>
60523 <description>Read: Enabled</description>
60531 <description>Disable</description>
60538 <description>Write '1' to disable interrupt for event TRIGGERED[3]</description>
60545 <description>Read: Disabled</description>
60550 <description>Read: Enabled</description>
60558 <description>Disable</description>
60565 <description>Write '1' to disable interrupt for event TRIGGERED[4]</description>
60572 <description>Read: Disabled</description>
60577 <description>Read: Enabled</description>
60585 <description>Disable</description>
60592 <description>Write '1' to disable interrupt for event TRIGGERED[5]</description>
60599 <description>Read: Disabled</description>
60604 <description>Read: Enabled</description>
60612 <description>Disable</description>
60619 <description>Write '1' to disable interrupt for event TRIGGERED[6]</description>
60626 <description>Read: Disabled</description>
60631 <description>Read: Enabled</description>
60639 <description>Disable</description>
60646 <description>Write '1' to disable interrupt for event TRIGGERED[7]</description>
60653 <description>Read: Disabled</description>
60658 <description>Read: Enabled</description>
60666 <description>Disable</description>
60673 <description>Write '1' to disable interrupt for event TRIGGERED[8]</description>
60680 <description>Read: Disabled</description>
60685 <description>Read: Enabled</description>
60693 <description>Disable</description>
60700 <description>Write '1' to disable interrupt for event TRIGGERED[9]</description>
60707 <description>Read: Disabled</description>
60712 <description>Read: Enabled</description>
60720 <description>Disable</description>
60727 <description>Write '1' to disable interrupt for event TRIGGERED[10]</description>
60734 <description>Read: Disabled</description>
60739 <description>Read: Enabled</description>
60747 <description>Disable</description>
60754 <description>Write '1' to disable interrupt for event TRIGGERED[11]</description>
60761 <description>Read: Disabled</description>
60766 <description>Read: Enabled</description>
60774 <description>Disable</description>
60781 <description>Write '1' to disable interrupt for event TRIGGERED[12]</description>
60788 <description>Read: Disabled</description>
60793 <description>Read: Enabled</description>
60801 <description>Disable</description>
60808 <description>Write '1' to disable interrupt for event TRIGGERED[13]</description>
60815 <description>Read: Disabled</description>
60820 <description>Read: Enabled</description>
60828 <description>Disable</description>
60835 <description>Write '1' to disable interrupt for event TRIGGERED[14]</description>
60842 <description>Read: Disabled</description>
60847 <description>Read: Enabled</description>
60855 <description>Disable</description>
60862 <description>Write '1' to disable interrupt for event TRIGGERED[15]</description>
60869 <description>Read: Disabled</description>
60874 <description>Read: Enabled</description>
60882 <description>Disable</description>
60893 <description>Event generator unit 1</description>
60904 <description>CRACEN</description>
60923 <description>Event indicating that interrupt triggered at Cryptomaster</description>
60931 <description>Event indicating that interrupt triggered at Cryptomaster</description>
60937 <description>Event not generated</description>
60942 <description>Event generated</description>
60951 <description>Event indicating that interrupt triggered at RNG</description>
60959 <description>Event indicating that interrupt triggered at RNG</description>
60965 <description>Event not generated</description>
60970 <description>Event generated</description>
60979 <description>Event indicating that interrupt triggered at PKE or IKG</description>
60987 <description>Event indicating that interrupt triggered at PKE or IKG</description>
60993 <description>Event not generated</description>
60998 <description>Event generated</description>
61007 <description>Enable or disable interrupt</description>
61015 <description>Enable or disable interrupt for event CRYPTOMASTER</description>
61021 <description>Disable</description>
61026 <description>Enable</description>
61033 <description>Enable or disable interrupt for event RNG</description>
61039 <description>Disable</description>
61044 <description>Enable</description>
61051 <description>Enable or disable interrupt for event PKEIKG</description>
61057 <description>Disable</description>
61062 <description>Enable</description>
61071 <description>Enable interrupt</description>
61079 <description>Write '1' to enable interrupt for event CRYPTOMASTER</description>
61086 <description>Read: Disabled</description>
61091 <description>Read: Enabled</description>
61099 <description>Enable</description>
61106 <description>Write '1' to enable interrupt for event RNG</description>
61113 <description>Read: Disabled</description>
61118 <description>Read: Enabled</description>
61126 <description>Enable</description>
61133 <description>Write '1' to enable interrupt for event PKEIKG</description>
61140 <description>Read: Disabled</description>
61145 <description>Read: Enabled</description>
61153 <description>Enable</description>
61162 <description>Disable interrupt</description>
61170 <description>Write '1' to disable interrupt for event CRYPTOMASTER</description>
61177 <description>Read: Disabled</description>
61182 <description>Read: Enabled</description>
61190 <description>Disable</description>
61197 <description>Write '1' to disable interrupt for event RNG</description>
61204 <description>Read: Disabled</description>
61209 <description>Read: Enabled</description>
61217 <description>Disable</description>
61224 <description>Write '1' to disable interrupt for event PKEIKG</description>
61231 <description>Read: Disabled</description>
61236 <description>Read: Enabled</description>
61244 <description>Disable</description>
61253 <description>Pending interrupts</description>
61261 <description>Read pending status of interrupt for event CRYPTOMASTER</description>
61268 <description>Read: Not pending</description>
61273 <description>Read: Pending</description>
61280 <description>Read pending status of interrupt for event RNG</description>
61287 <description>Read: Not pending</description>
61292 <description>Read: Pending</description>
61299 <description>Read pending status of interrupt for event PKEIKG</description>
61306 <description>Read: Not pending</description>
61311 <description>Read: Pending</description>
61320 <description>Enable CRACEN peripheral modules.</description>
61328 <description>Enable cryptomaster</description>
61334 <description>Cryptomaster disabled.</description>
61339 <description>Cryptomaster enabled.</description>
61346 <description>Enable RNG</description>
61352 <description>RNG disabled.</description>
61357 <description>RNG enabled.</description>
61364 <description>Enable PKE and IKG</description>
61370 <description>PKE and IKG disabled.</description>
61375 <description>PKE and IKG enabled.</description>
61384 …<description>Indicates the SEED register is valid. Writing this register has no effect.</descripti…
61392 <description>Marks the SEED as valid</description>
61398 <description>Valid disabled.</description>
61403 <description>Valid enabled.</description>
61414 …<description>Description collection: Seed word [n] for symmetric and asymmetric key generation. Th…
61422 <description>Seed value</description>
61430 …<description>Indicates the access to the SEED register is locked. Writing this register has no eff…
61438 <description>Enable the lock</description>
61444 <description>Lock disabled.</description>
61449 <description>Lock enabled.</description>
61458 <description>Lock the access to the protected RAM.</description>
61466 <description>Enable the lock</description>
61472 <description>Lock disabled.</description>
61477 <description>Lock enabled.</description>
61488 <description>USBHS 0</description>
61507 <description>Start the USB peripheral.</description>
61515 <description>Start the USB peripheral.</description>
61521 <description>Trigger task</description>
61530 <description>Stop the USB peripheral</description>
61538 <description>Stop the USB peripheral</description>
61544 <description>Trigger task</description>
61553 <description>Subscribe configuration for task START</description>
61561 <description>DPPI channel that task START will subscribe to</description>
61572 <description>Disable subscription</description>
61577 <description>Enable subscription</description>
61586 <description>Subscribe configuration for task STOP</description>
61594 <description>DPPI channel that task STOP will subscribe to</description>
61605 <description>Disable subscription</description>
61610 <description>Enable subscription</description>
61619 <description>Start of Frame.</description>
61627 <description>Start of Frame.</description>
61633 <description>Event not generated</description>
61638 <description>Event generated</description>
61647 <description>Publish configuration for event SOF</description>
61655 <description>DPPI channel that event SOF will publish to</description>
61666 <description>Disable publishing</description>
61671 <description>Enable publishing</description>
61680 <description>Enable interrupt</description>
61688 <description>Write '1' to enable interrupt for event SOF</description>
61695 <description>Read: Disabled</description>
61700 <description>Read: Enabled</description>
61708 <description>Enable</description>
61717 <description>Disable interrupt</description>
61725 <description>Write '1' to disable interrupt for event SOF</description>
61732 <description>Read: Disabled</description>
61737 <description>Read: Enabled</description>
61745 <description>Disable</description>
61754 <description>Enable USB peripheral.</description>
61762 <description>Enable USB Controller</description>
61768 <description>USB Controller disabled.</description>
61773 <description>USB Controller enabled.</description>
61780 <description>Enable USB PHY</description>
61786 <description>USB PHY disabled.</description>
61791 <description>USB PHY enabled.</description>
61800 <description>Unspecified</description>
61806 <description>USB PHY parameter overrides</description>
61814 <description>PLL Integral Path Tune</description>
61820 <description>PLL Proportional Path Tune</description>
61826 <description>Disconnect Threshold Adjustment</description>
61832 <description>Squelch Threshold Adjustment</description>
61838 <description>Data Detect Voltage Adjustment</description>
61844 <description>Transmitter High-Speed Crossover Adjustment</description>
61850 <description>FS/LS Source Impedance Adjustment</description>
61856 <description>HS DC Voltage Level Adjustment</description>
61862 <description>HS Transmitter Rise/Fall Time Adjustment</description>
61868 <description>USB Source Impedance Adjustment</description>
61874 <description>HS Transmitter Pre-Emphasis Current Control</description>
61880 <description>HS Transmitter Pre-Emphasis Duration Control</description>
61888 <description>USB PHY clock configurations</description>
61896 <description>Select reference clock frequency</description>
61902 <description>Reference clock is 19.2MHz.</description>
61907 <description>Reference clock is 20MHz.</description>
61912 <description>Reference clock is 24MHz.</description>
61917 <description>Reference clock is 50MHz.</description>
61924 <description>PLL bandwidth adjustment</description>
61930 <description>PLL bandwidth adjustment disabled.</description>
61935 <description>PLL bandwidth adjustment enabled.</description>
61942 <description>Common block power down control</description>
61948 …<description>The REFCLOCK_LOGIC,bias and PLL blocks are powered in sleep or suspend mode.</descrip…
61953 …<description>The REFCLOCK_LOGIC, bias and PLL blocks are powered down in suspend mode and bias and…
61954 blocks are powered down in sleep mode.</description>
61963 …<description>Enables overriding of individual signals to the PHY, the override values are set in P…
61988 … <description>Values that are used to override the input signals to the PHY.</description>
61996 <description>This field controls the pull-down resistor on D+</description>
62002 <description>The pull-down resistor on D+ is enabled</description>
62007 <description>The pull-down resistor on D+ is disabled</description>
62014 <description>This field controls the pull-down resistor on D-</description>
62020 <description>The pull-down resistor on D+ is enabled</description>
62025 <description>The pull-down resistor on D+ is disabled</description>
62037 …<description>Signals to the PHY that VBUS is valid, and enables the pull-up resistor on D+</descri…
62043 … <description>VBUS is valid, and the pull up resistor on D+ is enabled</description>
62048 … <description>VBUS is not valid, and the pull up resistor on D+ is disabled.</description>
62057 …<description>The RTUNE mode is an alternative method for calibrating the DP and DM 45-Ohm source i…
62065 …<description>This signal selects the tuning method for the high-speed DP and DM source impedance o…
62071 <description>The TXRTUNE pin, external resistor REXT, and resulting internal
62073 impedance.</description>
62078 … <description>The RCALCODE value is used for tuning the high-speed source impedance.</description>
62085 …<description>This signal is used to tune the internal 200 ohm resistor or the USBHS DP and DM high…
62096 <description>USBHS 1</description>
62107 <description>System protection unit 1</description>
62118 <description>Distributed programmable peripheral interconnect controller 2</description>
62126 <description>Distributed programmable peripheral interconnect controller 3</description>
62134 <description>PPIB APB registers 4</description>
62141 <description>PPIB APB registers 5</description>
62148 <description>PPIB APB registers 6</description>
62155 <description>PPIB APB registers 7</description>
62162 <description>Timer/Counter 2</description>
62173 <description>Timer/Counter 3</description>
62184 <description>Event generator unit 2</description>
62195 <description>Event generator unit 3</description>
62206 <description>2.4 GHz radio 0</description>
62229 <description>Enable RADIO in TX mode</description>
62237 <description>Enable RADIO in TX mode</description>
62243 <description>Trigger task</description>
62252 <description>Enable RADIO in RX mode</description>
62260 <description>Enable RADIO in RX mode</description>
62266 <description>Trigger task</description>
62275 <description>Start RADIO</description>
62283 <description>Start RADIO</description>
62289 <description>Trigger task</description>
62298 <description>Stop RADIO</description>
62306 <description>Stop RADIO</description>
62312 <description>Trigger task</description>
62321 <description>Disable RADIO</description>
62329 <description>Disable RADIO</description>
62335 <description>Trigger task</description>
62344 …<description>Start the RSSI and take one single sample of the receive signal strength</description>
62352 …<description>Start the RSSI and take one single sample of the receive signal strength</description>
62358 <description>Trigger task</description>
62367 <description>Start the bit counter</description>
62375 <description>Start the bit counter</description>
62381 <description>Trigger task</description>
62390 <description>Stop the bit counter</description>
62398 <description>Stop the bit counter</description>
62404 <description>Trigger task</description>
62413 <description>Start the energy detect measurement used in IEEE 802.15.4 mode</description>
62421 … <description>Start the energy detect measurement used in IEEE 802.15.4 mode</description>
62427 <description>Trigger task</description>
62436 <description>Stop the energy detect measurement</description>
62444 <description>Stop the energy detect measurement</description>
62450 <description>Trigger task</description>
62459 <description>Start the clear channel assessment used in IEEE 802.15.4 mode</description>
62467 … <description>Start the clear channel assessment used in IEEE 802.15.4 mode</description>
62473 <description>Trigger task</description>
62482 <description>Stop the clear channel assessment</description>
62490 <description>Stop the clear channel assessment</description>
62496 <description>Trigger task</description>
62505 …description>Reset all public registers, but with these exceptions: DMA registers and EVENT/INTEN/S…
62513 …description>Reset all public registers, but with these exceptions: DMA registers and EVENT/INTEN/S…
62519 <description>Trigger task</description>
62528 <description>Subscribe configuration for task TXEN</description>
62536 <description>DPPI channel that task TXEN will subscribe to</description>
62547 <description>Disable subscription</description>
62552 <description>Enable subscription</description>
62561 <description>Subscribe configuration for task RXEN</description>
62569 <description>DPPI channel that task RXEN will subscribe to</description>
62580 <description>Disable subscription</description>
62585 <description>Enable subscription</description>
62594 <description>Subscribe configuration for task START</description>
62602 <description>DPPI channel that task START will subscribe to</description>
62613 <description>Disable subscription</description>
62618 <description>Enable subscription</description>
62627 <description>Subscribe configuration for task STOP</description>
62635 <description>DPPI channel that task STOP will subscribe to</description>
62646 <description>Disable subscription</description>
62651 <description>Enable subscription</description>
62660 <description>Subscribe configuration for task DISABLE</description>
62668 <description>DPPI channel that task DISABLE will subscribe to</description>
62679 <description>Disable subscription</description>
62684 <description>Enable subscription</description>
62693 <description>Subscribe configuration for task RSSISTART</description>
62701 <description>DPPI channel that task RSSISTART will subscribe to</description>
62712 <description>Disable subscription</description>
62717 <description>Enable subscription</description>
62726 <description>Subscribe configuration for task BCSTART</description>
62734 <description>DPPI channel that task BCSTART will subscribe to</description>
62745 <description>Disable subscription</description>
62750 <description>Enable subscription</description>
62759 <description>Subscribe configuration for task BCSTOP</description>
62767 <description>DPPI channel that task BCSTOP will subscribe to</description>
62778 <description>Disable subscription</description>
62783 <description>Enable subscription</description>
62792 <description>Subscribe configuration for task EDSTART</description>
62800 <description>DPPI channel that task EDSTART will subscribe to</description>
62811 <description>Disable subscription</description>
62816 <description>Enable subscription</description>
62825 <description>Subscribe configuration for task EDSTOP</description>
62833 <description>DPPI channel that task EDSTOP will subscribe to</description>
62844 <description>Disable subscription</description>
62849 <description>Enable subscription</description>
62858 <description>Subscribe configuration for task CCASTART</description>
62866 <description>DPPI channel that task CCASTART will subscribe to</description>
62877 <description>Disable subscription</description>
62882 <description>Enable subscription</description>
62891 <description>Subscribe configuration for task CCASTOP</description>
62899 <description>DPPI channel that task CCASTOP will subscribe to</description>
62910 <description>Disable subscription</description>
62915 <description>Enable subscription</description>
62924 <description>Subscribe configuration for task SOFTRESET</description>
62932 <description>DPPI channel that task SOFTRESET will subscribe to</description>
62943 <description>Disable subscription</description>
62948 <description>Enable subscription</description>
62957 <description>RADIO has ramped up and is ready to be started</description>
62965 <description>RADIO has ramped up and is ready to be started</description>
62971 <description>Event not generated</description>
62976 <description>Event generated</description>
62985 <description>RADIO has ramped up and is ready to be started TX path</description>
62993 <description>RADIO has ramped up and is ready to be started TX path</description>
62999 <description>Event not generated</description>
63004 <description>Event generated</description>
63013 <description>RADIO has ramped up and is ready to be started RX path</description>
63021 <description>RADIO has ramped up and is ready to be started RX path</description>
63027 <description>Event not generated</description>
63032 <description>Event generated</description>
63041 <description>Address sent or received</description>
63049 <description>Address sent or received</description>
63055 <description>Event not generated</description>
63060 <description>Event generated</description>
63069 <description>IEEE 802.15.4 length field received</description>
63077 <description>IEEE 802.15.4 length field received</description>
63083 <description>Event not generated</description>
63088 <description>Event generated</description>
63097 <description>Packet payload sent or received</description>
63105 <description>Packet payload sent or received</description>
63111 <description>Event not generated</description>
63116 <description>Event generated</description>
63125 <description>Memory access for packet data has been completed</description>
63133 <description>Memory access for packet data has been completed</description>
63139 <description>Event not generated</description>
63144 <description>Event generated</description>
63153 <description>The last bit is sent on air or last bit is received</description>
63161 <description>The last bit is sent on air or last bit is received</description>
63167 <description>Event not generated</description>
63172 <description>Event generated</description>
63181 <description>RADIO has been disabled</description>
63189 <description>RADIO has been disabled</description>
63195 <description>Event not generated</description>
63200 <description>Event generated</description>
63209 <description>A device address match occurred on the last received packet</description>
63217 <description>A device address match occurred on the last received packet</description>
63223 <description>Event not generated</description>
63228 <description>Event generated</description>
63237 <description>No device address match occurred on the last received packet</description>
63245 … <description>No device address match occurred on the last received packet</description>
63251 <description>Event not generated</description>
63256 <description>Event generated</description>
63265 <description>Packet received with CRC ok</description>
63273 <description>Packet received with CRC ok</description>
63279 <description>Event not generated</description>
63284 <description>Event generated</description>
63293 <description>Packet received with CRC error</description>
63301 <description>Packet received with CRC error</description>
63307 <description>Event not generated</description>
63312 <description>Event generated</description>
63321 <description>Bit counter reached bit count value</description>
63329 <description>Bit counter reached bit count value</description>
63335 <description>Event not generated</description>
63340 <description>Event generated</description>
63349 …<description>Sampling of energy detection complete (a new ED sample is ready for readout from the …
63357 …<description>Sampling of energy detection complete (a new ED sample is ready for readout from the …
63363 <description>Event not generated</description>
63368 <description>Event generated</description>
63377 <description>The sampling of energy detection has stopped</description>
63385 <description>The sampling of energy detection has stopped</description>
63391 <description>Event not generated</description>
63396 <description>Event generated</description>
63405 <description>Wireless medium in idle - clear to send</description>
63413 <description>Wireless medium in idle - clear to send</description>
63419 <description>Event not generated</description>
63424 <description>Event generated</description>
63433 <description>Wireless medium busy - do not send</description>
63441 <description>Wireless medium busy - do not send</description>
63447 <description>Event not generated</description>
63452 <description>Event generated</description>
63461 <description>The CCA has stopped</description>
63469 <description>The CCA has stopped</description>
63475 <description>Event not generated</description>
63480 <description>Event generated</description>
63489 …<description>Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit…
63497 …<description>Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit…
63503 <description>Event not generated</description>
63508 <description>Event generated</description>
63517 <description>MAC header match found</description>
63525 <description>MAC header match found</description>
63531 <description>Event not generated</description>
63536 <description>Event generated</description>
63545 <description>Initial sync detected</description>
63553 <description>Initial sync detected</description>
63559 <description>Event not generated</description>
63564 <description>Event generated</description>
63573 <description>CTEInfo byte is received</description>
63581 <description>CTEInfo byte is received</description>
63587 <description>Event not generated</description>
63592 <description>Event generated</description>
63601 <description>Publish configuration for event READY</description>
63609 <description>DPPI channel that event READY will publish to</description>
63620 <description>Disable publishing</description>
63625 <description>Enable publishing</description>
63634 <description>Publish configuration for event TXREADY</description>
63642 <description>DPPI channel that event TXREADY will publish to</description>
63653 <description>Disable publishing</description>
63658 <description>Enable publishing</description>
63667 <description>Publish configuration for event RXREADY</description>
63675 <description>DPPI channel that event RXREADY will publish to</description>
63686 <description>Disable publishing</description>
63691 <description>Enable publishing</description>
63700 <description>Publish configuration for event ADDRESS</description>
63708 <description>DPPI channel that event ADDRESS will publish to</description>
63719 <description>Disable publishing</description>
63724 <description>Enable publishing</description>
63733 <description>Publish configuration for event FRAMESTART</description>
63741 <description>DPPI channel that event FRAMESTART will publish to</description>
63752 <description>Disable publishing</description>
63757 <description>Enable publishing</description>
63766 <description>Publish configuration for event PAYLOAD</description>
63774 <description>DPPI channel that event PAYLOAD will publish to</description>
63785 <description>Disable publishing</description>
63790 <description>Enable publishing</description>
63799 <description>Publish configuration for event END</description>
63807 <description>DPPI channel that event END will publish to</description>
63818 <description>Disable publishing</description>
63823 <description>Enable publishing</description>
63832 <description>Publish configuration for event PHYEND</description>
63840 <description>DPPI channel that event PHYEND will publish to</description>
63851 <description>Disable publishing</description>
63856 <description>Enable publishing</description>
63865 <description>Publish configuration for event DISABLED</description>
63873 <description>DPPI channel that event DISABLED will publish to</description>
63884 <description>Disable publishing</description>
63889 <description>Enable publishing</description>
63898 <description>Publish configuration for event DEVMATCH</description>
63906 <description>DPPI channel that event DEVMATCH will publish to</description>
63917 <description>Disable publishing</description>
63922 <description>Enable publishing</description>
63931 <description>Publish configuration for event DEVMISS</description>
63939 <description>DPPI channel that event DEVMISS will publish to</description>
63950 <description>Disable publishing</description>
63955 <description>Enable publishing</description>
63964 <description>Publish configuration for event CRCOK</description>
63972 <description>DPPI channel that event CRCOK will publish to</description>
63983 <description>Disable publishing</description>
63988 <description>Enable publishing</description>
63997 <description>Publish configuration for event CRCERROR</description>
64005 <description>DPPI channel that event CRCERROR will publish to</description>
64016 <description>Disable publishing</description>
64021 <description>Enable publishing</description>
64030 <description>Publish configuration for event BCMATCH</description>
64038 <description>DPPI channel that event BCMATCH will publish to</description>
64049 <description>Disable publishing</description>
64054 <description>Enable publishing</description>
64063 <description>Publish configuration for event EDEND</description>
64071 <description>DPPI channel that event EDEND will publish to</description>
64082 <description>Disable publishing</description>
64087 <description>Enable publishing</description>
64096 <description>Publish configuration for event EDSTOPPED</description>
64104 <description>DPPI channel that event EDSTOPPED will publish to</description>
64115 <description>Disable publishing</description>
64120 <description>Enable publishing</description>
64129 <description>Publish configuration for event CCAIDLE</description>
64137 <description>DPPI channel that event CCAIDLE will publish to</description>
64148 <description>Disable publishing</description>
64153 <description>Enable publishing</description>
64162 <description>Publish configuration for event CCABUSY</description>
64170 <description>DPPI channel that event CCABUSY will publish to</description>
64181 <description>Disable publishing</description>
64186 <description>Enable publishing</description>
64195 <description>Publish configuration for event CCASTOPPED</description>
64203 <description>DPPI channel that event CCASTOPPED will publish to</description>
64214 <description>Disable publishing</description>
64219 <description>Enable publishing</description>
64228 <description>Publish configuration for event RATEBOOST</description>
64236 <description>DPPI channel that event RATEBOOST will publish to</description>
64247 <description>Disable publishing</description>
64252 <description>Enable publishing</description>
64261 <description>Publish configuration for event MHRMATCH</description>
64269 <description>DPPI channel that event MHRMATCH will publish to</description>
64280 <description>Disable publishing</description>
64285 <description>Enable publishing</description>
64294 <description>Publish configuration for event SYNC</description>
64302 <description>DPPI channel that event SYNC will publish to</description>
64313 <description>Disable publishing</description>
64318 <description>Enable publishing</description>
64327 <description>Publish configuration for event CTEPRESENT</description>
64335 <description>DPPI channel that event CTEPRESENT will publish to</description>
64346 <description>Disable publishing</description>
64351 <description>Enable publishing</description>
64360 <description>Shortcuts between local events and tasks</description>
64368 <description>Shortcut between event READY and task START</description>
64374 <description>Disable shortcut</description>
64379 <description>Enable shortcut</description>
64386 <description>Shortcut between event DISABLED and task TXEN</description>
64392 <description>Disable shortcut</description>
64397 <description>Enable shortcut</description>
64404 <description>Shortcut between event DISABLED and task RXEN</description>
64410 <description>Disable shortcut</description>
64415 <description>Enable shortcut</description>
64422 <description>Shortcut between event ADDRESS and task RSSISTART</description>
64428 <description>Disable shortcut</description>
64433 <description>Enable shortcut</description>
64440 <description>Shortcut between event END and task START</description>
64446 <description>Disable shortcut</description>
64451 <description>Enable shortcut</description>
64458 <description>Shortcut between event ADDRESS and task BCSTART</description>
64464 <description>Disable shortcut</description>
64469 <description>Enable shortcut</description>
64476 <description>Shortcut between event RXREADY and task CCASTART</description>
64482 <description>Disable shortcut</description>
64487 <description>Enable shortcut</description>
64494 <description>Shortcut between event CCAIDLE and task TXEN</description>
64500 <description>Disable shortcut</description>
64505 <description>Enable shortcut</description>
64512 <description>Shortcut between event CCABUSY and task DISABLE</description>
64518 <description>Disable shortcut</description>
64523 <description>Enable shortcut</description>
64530 <description>Shortcut between event FRAMESTART and task BCSTART</description>
64536 <description>Disable shortcut</description>
64541 <description>Enable shortcut</description>
64548 <description>Shortcut between event READY and task EDSTART</description>
64554 <description>Disable shortcut</description>
64559 <description>Enable shortcut</description>
64566 <description>Shortcut between event EDEND and task DISABLE</description>
64572 <description>Disable shortcut</description>
64577 <description>Enable shortcut</description>
64584 <description>Shortcut between event CCAIDLE and task STOP</description>
64590 <description>Disable shortcut</description>
64595 <description>Enable shortcut</description>
64602 <description>Shortcut between event TXREADY and task START</description>
64608 <description>Disable shortcut</description>
64613 <description>Enable shortcut</description>
64620 <description>Shortcut between event RXREADY and task START</description>
64626 <description>Disable shortcut</description>
64631 <description>Enable shortcut</description>
64638 <description>Shortcut between event PHYEND and task DISABLE</description>
64644 <description>Disable shortcut</description>
64649 <description>Enable shortcut</description>
64656 <description>Shortcut between event PHYEND and task START</description>
64662 <description>Disable shortcut</description>
64667 <description>Enable shortcut</description>
64676 <description>Enable interrupt</description>
64684 <description>Write '1' to enable interrupt for event READY</description>
64691 <description>Read: Disabled</description>
64696 <description>Read: Enabled</description>
64704 <description>Enable</description>
64711 <description>Write '1' to enable interrupt for event TXREADY</description>
64718 <description>Read: Disabled</description>
64723 <description>Read: Enabled</description>
64731 <description>Enable</description>
64738 <description>Write '1' to enable interrupt for event RXREADY</description>
64745 <description>Read: Disabled</description>
64750 <description>Read: Enabled</description>
64758 <description>Enable</description>
64765 <description>Write '1' to enable interrupt for event ADDRESS</description>
64772 <description>Read: Disabled</description>
64777 <description>Read: Enabled</description>
64785 <description>Enable</description>
64792 <description>Write '1' to enable interrupt for event FRAMESTART</description>
64799 <description>Read: Disabled</description>
64804 <description>Read: Enabled</description>
64812 <description>Enable</description>
64819 <description>Write '1' to enable interrupt for event PAYLOAD</description>
64826 <description>Read: Disabled</description>
64831 <description>Read: Enabled</description>
64839 <description>Enable</description>
64846 <description>Write '1' to enable interrupt for event END</description>
64853 <description>Read: Disabled</description>
64858 <description>Read: Enabled</description>
64866 <description>Enable</description>
64873 <description>Write '1' to enable interrupt for event PHYEND</description>
64880 <description>Read: Disabled</description>
64885 <description>Read: Enabled</description>
64893 <description>Enable</description>
64900 <description>Write '1' to enable interrupt for event DISABLED</description>
64907 <description>Read: Disabled</description>
64912 <description>Read: Enabled</description>
64920 <description>Enable</description>
64927 <description>Write '1' to enable interrupt for event DEVMATCH</description>
64934 <description>Read: Disabled</description>
64939 <description>Read: Enabled</description>
64947 <description>Enable</description>
64954 <description>Write '1' to enable interrupt for event DEVMISS</description>
64961 <description>Read: Disabled</description>
64966 <description>Read: Enabled</description>
64974 <description>Enable</description>
64981 <description>Write '1' to enable interrupt for event CRCOK</description>
64988 <description>Read: Disabled</description>
64993 <description>Read: Enabled</description>
65001 <description>Enable</description>
65008 <description>Write '1' to enable interrupt for event CRCERROR</description>
65015 <description>Read: Disabled</description>
65020 <description>Read: Enabled</description>
65028 <description>Enable</description>
65035 <description>Write '1' to enable interrupt for event BCMATCH</description>
65042 <description>Read: Disabled</description>
65047 <description>Read: Enabled</description>
65055 <description>Enable</description>
65062 <description>Write '1' to enable interrupt for event EDEND</description>
65069 <description>Read: Disabled</description>
65074 <description>Read: Enabled</description>
65082 <description>Enable</description>
65089 <description>Write '1' to enable interrupt for event EDSTOPPED</description>
65096 <description>Read: Disabled</description>
65101 <description>Read: Enabled</description>
65109 <description>Enable</description>
65116 <description>Write '1' to enable interrupt for event CCAIDLE</description>
65123 <description>Read: Disabled</description>
65128 <description>Read: Enabled</description>
65136 <description>Enable</description>
65143 <description>Write '1' to enable interrupt for event CCABUSY</description>
65150 <description>Read: Disabled</description>
65155 <description>Read: Enabled</description>
65163 <description>Enable</description>
65170 <description>Write '1' to enable interrupt for event CCASTOPPED</description>
65177 <description>Read: Disabled</description>
65182 <description>Read: Enabled</description>
65190 <description>Enable</description>
65197 <description>Write '1' to enable interrupt for event RATEBOOST</description>
65204 <description>Read: Disabled</description>
65209 <description>Read: Enabled</description>
65217 <description>Enable</description>
65224 <description>Write '1' to enable interrupt for event MHRMATCH</description>
65231 <description>Read: Disabled</description>
65236 <description>Read: Enabled</description>
65244 <description>Enable</description>
65251 <description>Write '1' to enable interrupt for event SYNC</description>
65258 <description>Read: Disabled</description>
65263 <description>Read: Enabled</description>
65271 <description>Enable</description>
65278 <description>Write '1' to enable interrupt for event CTEPRESENT</description>
65285 <description>Read: Disabled</description>
65290 <description>Read: Enabled</description>
65298 <description>Enable</description>
65307 <description>Disable interrupt</description>
65315 <description>Write '1' to disable interrupt for event READY</description>
65322 <description>Read: Disabled</description>
65327 <description>Read: Enabled</description>
65335 <description>Disable</description>
65342 <description>Write '1' to disable interrupt for event TXREADY</description>
65349 <description>Read: Disabled</description>
65354 <description>Read: Enabled</description>
65362 <description>Disable</description>
65369 <description>Write '1' to disable interrupt for event RXREADY</description>
65376 <description>Read: Disabled</description>
65381 <description>Read: Enabled</description>
65389 <description>Disable</description>
65396 <description>Write '1' to disable interrupt for event ADDRESS</description>
65403 <description>Read: Disabled</description>
65408 <description>Read: Enabled</description>
65416 <description>Disable</description>
65423 <description>Write '1' to disable interrupt for event FRAMESTART</description>
65430 <description>Read: Disabled</description>
65435 <description>Read: Enabled</description>
65443 <description>Disable</description>
65450 <description>Write '1' to disable interrupt for event PAYLOAD</description>
65457 <description>Read: Disabled</description>
65462 <description>Read: Enabled</description>
65470 <description>Disable</description>
65477 <description>Write '1' to disable interrupt for event END</description>
65484 <description>Read: Disabled</description>
65489 <description>Read: Enabled</description>
65497 <description>Disable</description>
65504 <description>Write '1' to disable interrupt for event PHYEND</description>
65511 <description>Read: Disabled</description>
65516 <description>Read: Enabled</description>
65524 <description>Disable</description>
65531 <description>Write '1' to disable interrupt for event DISABLED</description>
65538 <description>Read: Disabled</description>
65543 <description>Read: Enabled</description>
65551 <description>Disable</description>
65558 <description>Write '1' to disable interrupt for event DEVMATCH</description>
65565 <description>Read: Disabled</description>
65570 <description>Read: Enabled</description>
65578 <description>Disable</description>
65585 <description>Write '1' to disable interrupt for event DEVMISS</description>
65592 <description>Read: Disabled</description>
65597 <description>Read: Enabled</description>
65605 <description>Disable</description>
65612 <description>Write '1' to disable interrupt for event CRCOK</description>
65619 <description>Read: Disabled</description>
65624 <description>Read: Enabled</description>
65632 <description>Disable</description>
65639 <description>Write '1' to disable interrupt for event CRCERROR</description>
65646 <description>Read: Disabled</description>
65651 <description>Read: Enabled</description>
65659 <description>Disable</description>
65666 <description>Write '1' to disable interrupt for event BCMATCH</description>
65673 <description>Read: Disabled</description>
65678 <description>Read: Enabled</description>
65686 <description>Disable</description>
65693 <description>Write '1' to disable interrupt for event EDEND</description>
65700 <description>Read: Disabled</description>
65705 <description>Read: Enabled</description>
65713 <description>Disable</description>
65720 <description>Write '1' to disable interrupt for event EDSTOPPED</description>
65727 <description>Read: Disabled</description>
65732 <description>Read: Enabled</description>
65740 <description>Disable</description>
65747 <description>Write '1' to disable interrupt for event CCAIDLE</description>
65754 <description>Read: Disabled</description>
65759 <description>Read: Enabled</description>
65767 <description>Disable</description>
65774 <description>Write '1' to disable interrupt for event CCABUSY</description>
65781 <description>Read: Disabled</description>
65786 <description>Read: Enabled</description>
65794 <description>Disable</description>
65801 <description>Write '1' to disable interrupt for event CCASTOPPED</description>
65808 <description>Read: Disabled</description>
65813 <description>Read: Enabled</description>
65821 <description>Disable</description>
65828 <description>Write '1' to disable interrupt for event RATEBOOST</description>
65835 <description>Read: Disabled</description>
65840 <description>Read: Enabled</description>
65848 <description>Disable</description>
65855 <description>Write '1' to disable interrupt for event MHRMATCH</description>
65862 <description>Read: Disabled</description>
65867 <description>Read: Enabled</description>
65875 <description>Disable</description>
65882 <description>Write '1' to disable interrupt for event SYNC</description>
65889 <description>Read: Disabled</description>
65894 <description>Read: Enabled</description>
65902 <description>Disable</description>
65909 <description>Write '1' to disable interrupt for event CTEPRESENT</description>
65916 <description>Read: Disabled</description>
65921 <description>Read: Enabled</description>
65929 <description>Disable</description>
65938 <description>Enable interrupt</description>
65946 <description>Write '1' to enable interrupt for event READY</description>
65953 <description>Read: Disabled</description>
65958 <description>Read: Enabled</description>
65966 <description>Enable</description>
65973 <description>Write '1' to enable interrupt for event TXREADY</description>
65980 <description>Read: Disabled</description>
65985 <description>Read: Enabled</description>
65993 <description>Enable</description>
66000 <description>Write '1' to enable interrupt for event RXREADY</description>
66007 <description>Read: Disabled</description>
66012 <description>Read: Enabled</description>
66020 <description>Enable</description>
66027 <description>Write '1' to enable interrupt for event ADDRESS</description>
66034 <description>Read: Disabled</description>
66039 <description>Read: Enabled</description>
66047 <description>Enable</description>
66054 <description>Write '1' to enable interrupt for event FRAMESTART</description>
66061 <description>Read: Disabled</description>
66066 <description>Read: Enabled</description>
66074 <description>Enable</description>
66081 <description>Write '1' to enable interrupt for event PAYLOAD</description>
66088 <description>Read: Disabled</description>
66093 <description>Read: Enabled</description>
66101 <description>Enable</description>
66108 <description>Write '1' to enable interrupt for event END</description>
66115 <description>Read: Disabled</description>
66120 <description>Read: Enabled</description>
66128 <description>Enable</description>
66135 <description>Write '1' to enable interrupt for event PHYEND</description>
66142 <description>Read: Disabled</description>
66147 <description>Read: Enabled</description>
66155 <description>Enable</description>
66162 <description>Write '1' to enable interrupt for event DISABLED</description>
66169 <description>Read: Disabled</description>
66174 <description>Read: Enabled</description>
66182 <description>Enable</description>
66189 <description>Write '1' to enable interrupt for event DEVMATCH</description>
66196 <description>Read: Disabled</description>
66201 <description>Read: Enabled</description>
66209 <description>Enable</description>
66216 <description>Write '1' to enable interrupt for event DEVMISS</description>
66223 <description>Read: Disabled</description>
66228 <description>Read: Enabled</description>
66236 <description>Enable</description>
66243 <description>Write '1' to enable interrupt for event CRCOK</description>
66250 <description>Read: Disabled</description>
66255 <description>Read: Enabled</description>
66263 <description>Enable</description>
66270 <description>Write '1' to enable interrupt for event CRCERROR</description>
66277 <description>Read: Disabled</description>
66282 <description>Read: Enabled</description>
66290 <description>Enable</description>
66297 <description>Write '1' to enable interrupt for event BCMATCH</description>
66304 <description>Read: Disabled</description>
66309 <description>Read: Enabled</description>
66317 <description>Enable</description>
66324 <description>Write '1' to enable interrupt for event EDEND</description>
66331 <description>Read: Disabled</description>
66336 <description>Read: Enabled</description>
66344 <description>Enable</description>
66351 <description>Write '1' to enable interrupt for event EDSTOPPED</description>
66358 <description>Read: Disabled</description>
66363 <description>Read: Enabled</description>
66371 <description>Enable</description>
66378 <description>Write '1' to enable interrupt for event CCAIDLE</description>
66385 <description>Read: Disabled</description>
66390 <description>Read: Enabled</description>
66398 <description>Enable</description>
66405 <description>Write '1' to enable interrupt for event CCABUSY</description>
66412 <description>Read: Disabled</description>
66417 <description>Read: Enabled</description>
66425 <description>Enable</description>
66432 <description>Write '1' to enable interrupt for event CCASTOPPED</description>
66439 <description>Read: Disabled</description>
66444 <description>Read: Enabled</description>
66452 <description>Enable</description>
66459 <description>Write '1' to enable interrupt for event RATEBOOST</description>
66466 <description>Read: Disabled</description>
66471 <description>Read: Enabled</description>
66479 <description>Enable</description>
66486 <description>Write '1' to enable interrupt for event MHRMATCH</description>
66493 <description>Read: Disabled</description>
66498 <description>Read: Enabled</description>
66506 <description>Enable</description>
66513 <description>Write '1' to enable interrupt for event SYNC</description>
66520 <description>Read: Disabled</description>
66525 <description>Read: Enabled</description>
66533 <description>Enable</description>
66540 <description>Write '1' to enable interrupt for event CTEPRESENT</description>
66547 <description>Read: Disabled</description>
66552 <description>Read: Enabled</description>
66560 <description>Enable</description>
66569 <description>Disable interrupt</description>
66577 <description>Write '1' to disable interrupt for event READY</description>
66584 <description>Read: Disabled</description>
66589 <description>Read: Enabled</description>
66597 <description>Disable</description>
66604 <description>Write '1' to disable interrupt for event TXREADY</description>
66611 <description>Read: Disabled</description>
66616 <description>Read: Enabled</description>
66624 <description>Disable</description>
66631 <description>Write '1' to disable interrupt for event RXREADY</description>
66638 <description>Read: Disabled</description>
66643 <description>Read: Enabled</description>
66651 <description>Disable</description>
66658 <description>Write '1' to disable interrupt for event ADDRESS</description>
66665 <description>Read: Disabled</description>
66670 <description>Read: Enabled</description>
66678 <description>Disable</description>
66685 <description>Write '1' to disable interrupt for event FRAMESTART</description>
66692 <description>Read: Disabled</description>
66697 <description>Read: Enabled</description>
66705 <description>Disable</description>
66712 <description>Write '1' to disable interrupt for event PAYLOAD</description>
66719 <description>Read: Disabled</description>
66724 <description>Read: Enabled</description>
66732 <description>Disable</description>
66739 <description>Write '1' to disable interrupt for event END</description>
66746 <description>Read: Disabled</description>
66751 <description>Read: Enabled</description>
66759 <description>Disable</description>
66766 <description>Write '1' to disable interrupt for event PHYEND</description>
66773 <description>Read: Disabled</description>
66778 <description>Read: Enabled</description>
66786 <description>Disable</description>
66793 <description>Write '1' to disable interrupt for event DISABLED</description>
66800 <description>Read: Disabled</description>
66805 <description>Read: Enabled</description>
66813 <description>Disable</description>
66820 <description>Write '1' to disable interrupt for event DEVMATCH</description>
66827 <description>Read: Disabled</description>
66832 <description>Read: Enabled</description>
66840 <description>Disable</description>
66847 <description>Write '1' to disable interrupt for event DEVMISS</description>
66854 <description>Read: Disabled</description>
66859 <description>Read: Enabled</description>
66867 <description>Disable</description>
66874 <description>Write '1' to disable interrupt for event CRCOK</description>
66881 <description>Read: Disabled</description>
66886 <description>Read: Enabled</description>
66894 <description>Disable</description>
66901 <description>Write '1' to disable interrupt for event CRCERROR</description>
66908 <description>Read: Disabled</description>
66913 <description>Read: Enabled</description>
66921 <description>Disable</description>
66928 <description>Write '1' to disable interrupt for event BCMATCH</description>
66935 <description>Read: Disabled</description>
66940 <description>Read: Enabled</description>
66948 <description>Disable</description>
66955 <description>Write '1' to disable interrupt for event EDEND</description>
66962 <description>Read: Disabled</description>
66967 <description>Read: Enabled</description>
66975 <description>Disable</description>
66982 <description>Write '1' to disable interrupt for event EDSTOPPED</description>
66989 <description>Read: Disabled</description>
66994 <description>Read: Enabled</description>
67002 <description>Disable</description>
67009 <description>Write '1' to disable interrupt for event CCAIDLE</description>
67016 <description>Read: Disabled</description>
67021 <description>Read: Enabled</description>
67029 <description>Disable</description>
67036 <description>Write '1' to disable interrupt for event CCABUSY</description>
67043 <description>Read: Disabled</description>
67048 <description>Read: Enabled</description>
67056 <description>Disable</description>
67063 <description>Write '1' to disable interrupt for event CCASTOPPED</description>
67070 <description>Read: Disabled</description>
67075 <description>Read: Enabled</description>
67083 <description>Disable</description>
67090 <description>Write '1' to disable interrupt for event RATEBOOST</description>
67097 <description>Read: Disabled</description>
67102 <description>Read: Enabled</description>
67110 <description>Disable</description>
67117 <description>Write '1' to disable interrupt for event MHRMATCH</description>
67124 <description>Read: Disabled</description>
67129 <description>Read: Enabled</description>
67137 <description>Disable</description>
67144 <description>Write '1' to disable interrupt for event SYNC</description>
67151 <description>Read: Disabled</description>
67156 <description>Read: Enabled</description>
67164 <description>Disable</description>
67171 <description>Write '1' to disable interrupt for event CTEPRESENT</description>
67178 <description>Read: Disabled</description>
67183 <description>Read: Enabled</description>
67191 <description>Disable</description>
67200 <description>Data rate and modulation</description>
67208 …<description>Radio data rate and modulation setting. The radio supports frequency-shift keying (FS…
67214 <description>1 Mbps Nordic proprietary radio mode</description>
67219 <description>2 Mbps Nordic proprietary radio mode</description>
67224 <description>1 Mbps BLE</description>
67229 <description>2 Mbps BLE</description>
67234 <description>Long range 125 kbps TX, 125 kbps and 500 kbps RX</description>
67239 <description>Long range 500 kbps TX, 125 kbps and 500 kbps RX</description>
67244 <description>4 Mbps Nordic proprietary radio mode (BT=0.6/h=0.5)</description>
67249 <description>4 Mbps Nordic proprietary radio mode (BT=0.4/h=0.5)</description>
67254 <description>IEEE 802.15.4-2006 250 kbps</description>
67263 <description>Current radio state</description>
67271 <description>Current radio state</description>
67277 <description>RADIO is in the DISABLED state</description>
67282 <description>RADIO is in the RXRU state</description>
67287 <description>RADIO is in the RXIDLE state</description>
67292 <description>RADIO is in the RX state</description>
67297 <description>RADIO is in the RXDISABLE state</description>
67302 <description>RADIO is in the TXRU state</description>
67307 <description>RADIO is in the TXIDLE state</description>
67312 <description>RADIO is in the TX state</description>
67317 <description>RADIO is in the TXDISABLE state</description>
67326 <description>IEEE 802.15.4 energy detect control</description>
67334 <description>IEEE 802.15.4 energy detect loop count</description>
67340 …<description>IEEE 802.15.4 energy detect period, 4us resolution, no averaging except the IEEE 802.…
67346 <description>Unspecified</description>
67355 <description>IEEE 802.15.4 energy detect level</description>
67363 <description>IEEE 802.15.4 energy detect level</description>
67371 <description>IEEE 802.15.4 clear channel assessment control</description>
67379 <description>CCA mode of operation</description>
67385 <description>Energy above threshold</description>
67390 <description>Carrier seen</description>
67395 <description>Energy above threshold AND carrier seen</description>
67400 <description>Energy above threshold OR carrier seen</description>
67405 …<description>Energy above threshold test mode that will abort when first ED measurement over thres…
67412 …<description>CCA energy busy threshold. Used in all the CCA modes except CarrierMode.</description>
67418 …<description>CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode, and Ca…
67424 …<description>Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based …
67432 <description>Data whitening configuration</description>
67440 <description>Whitening initial value</description>
67446 <description>Whitening polynomial</description>
67454 <description>Timing</description>
67462 <description>Ramp-up time</description>
67468 <description>Legacy ramp-up time</description>
67473 <description>Fast ramp-up (default)</description>
67482 <description>Frequency</description>
67490 … <description>Radio channel frequency. Frequency = 2400 + FREQUENCY (MHz).</description>
67496 …description>Channel map selection. 0: Channel map between 2400 MHZ to 2500 MHz, Frequency = 2400 +…
67504 <description>Output power</description>
67512 <description>RADIO output power</description>
67518 <description>+8 dBm</description>
67523 <description>+8 dBm</description>
67528 <description>+7 dBm</description>
67533 <description>+6 dBm</description>
67538 <description>+5 dBm</description>
67543 <description>+4 dBm</description>
67548 <description>+3 dBm</description>
67553 <description>+2 dBm</description>
67558 <description>+1 dBm</description>
67563 <description>0 dBm</description>
67568 <description>-1 dBm</description>
67573 <description>-2 dBm</description>
67578 <description>-3 dBm</description>
67583 <description>-4 dBm</description>
67588 <description>-5 dBm</description>
67593 <description>-6 dBm</description>
67598 <description>-7 dBm</description>
67603 <description>-8 dBm</description>
67608 <description>-9 dBm</description>
67613 <description>-10 dBm</description>
67618 <description>-12 dBm</description>
67623 <description>-14 dBm</description>
67628 <description>-16 dBm</description>
67633 <description>-18 dBm</description>
67638 <description>-20 dBm</description>
67643 <description>-22 dBm</description>
67648 <description>-28 dBm</description>
67653 <description>-40 dBm</description>
67658 <description>-46 dBm</description>
67663 <description>-46 dBm</description>
67672 <description>Interframe spacing in us</description>
67680 …description>Interframe spacing in us. Interframe space is the time interval between two consecutiv…
67688 <description>RSSI sample</description>
67696 …description>RSSI sample result. The value of this register is read as a positive value while the a…
67704 <description>Config register</description>
67712 <description>Mode for narrow scaling output.</description>
67718 <description>Classic log based scaling mode.</description>
67723 <description>LUT based scaling mode.</description>
67732 … <description>Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure (AOD)</description>
67740 <description>Direction finding operation mode</description>
67746 <description>Direction finding mode disabled</description>
67751 <description>Direction finding mode set to AoD</description>
67756 <description>Direction finding mode set to AoA</description>
67765 <description>DFE status information</description>
67773 <description>Internal state of switching state machine</description>
67779 <description>Switching state Idle</description>
67784 <description>Switching state Offset</description>
67789 <description>Switching state Guard</description>
67794 <description>Switching state Ref</description>
67799 <description>Switching state Switching</description>
67804 <description>Switching state Ending</description>
67811 <description>Internal state of sampling state machine</description>
67817 <description>Sampling state Idle</description>
67822 <description>Sampling state Sampling</description>
67831 <description>Various configuration for Direction finding</description>
67839 <description>Length of the AoA/AoD procedure in number of 8 us units</description>
67845 … <description>Add CTE extension and do antenna switching/sampling in this extension</description>
67851 <description>AoA/AoD procedure triggered at end of CRC</description>
67856 … <description>Antenna switching/sampling is done in the packet payload</description>
67863 …<description>Interval between every time the antenna is changed in the SWITCHING state</descriptio…
67869 <description>4us</description>
67874 <description>2us</description>
67879 <description>1us</description>
67886 <description>Interval between samples in the REFERENCE period</description>
67892 <description>4us</description>
67897 <description>2us</description>
67902 <description>1us</description>
67907 <description>0.5us</description>
67912 <description>0.25us</description>
67917 <description>0.125us</description>
67924 <description>Whether to sample I/Q or magnitude/phase</description>
67930 <description>Complex samples in I and Q</description>
67935 <description>Complex samples as magnitude and phase</description>
67942 …<description>Interval between samples in the SWITCHING period when CTEINLINECTRLEN is 0</descripti…
67948 <description>4us</description>
67953 <description>2us</description>
67958 <description>1us</description>
67963 <description>0.5us</description>
67968 <description>0.25us</description>
67973 <description>0.125us</description>
67980 <description>Repeat every antenna pattern N times.</description>
67986 <description>Do not repeat (1 time in total)</description>
67993 …<description>Gain will be lowered by the specified number of gain steps at the start of CTE</descr…
68001 <description>Start offset for Direction finding</description>
68009 …<description>Signed value offset after the end of the CRC before starting switching in number of 1…
68015 …description>Signed value offset before starting sampling in number of 16M cycles relative to the b…
68023 <description>GPIO patterns to be used for each antenna</description>
68031 <description>Fill array of GPIO patterns for antenna control</description>
68039 <description>Clear the GPIO pattern array for antenna control</description>
68047 …<description>Clear the GPIO pattern array for antenna control Behaves as a task register, but does…
68055 <description>Unspecified</description>
68063 <description>Description collection: Pin select for DFE pin n</description>
68071 <description>Pin number</description>
68077 <description>Port number</description>
68083 <description>Connection</description>
68089 <description>Disconnect</description>
68094 <description>Connect</description>
68104 <description>DFE packet EasyDMA channel</description>
68110 <description>Data pointer</description>
68118 <description>Data pointer</description>
68126 <description>Maximum number of bytes to transfer</description>
68134 <description>Maximum number of bytes to transfer</description>
68142 <description>Number of bytes transferred in the last transaction</description>
68150 <description>Number of bytes transferred in the last transaction</description>
68158 <description>Number of bytes transferred in the current transaction</description>
68166 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
68175 <description>CRC status</description>
68183 <description>CRC status of packet received</description>
68189 <description>Packet received with CRC error</description>
68194 <description>Packet received with CRC ok</description>
68203 <description>Received address</description>
68211 <description>Received address</description>
68219 <description>CRC field of previously received packet</description>
68227 <description>CRC field of previously received packet</description>
68235 <description>Device address match index</description>
68243 <description>Device address match index</description>
68251 <description>Payload status</description>
68259 <description>Status on payload length vs. PCNF1.MAXLEN</description>
68265 <description>Payload less than PCNF1.MAXLEN</description>
68270 <description>Payload greater than PCNF1.MAXLEN</description>
68277 <description>Status on what rate packet is received with in Long Range</description>
68283 <description>Frame is received at 125 kbps</description>
68288 <description>Frame is received at 500 kbps</description>
68297 <description>Packet configuration register 0</description>
68305 <description>Length on air of LENGTH field in number of bits.</description>
68311 <description>Length on air of S0 field in number of bytes.</description>
68317 <description>Length on air of S1 field in number of bits.</description>
68323 <description>Include or exclude S1 field in RAM</description>
68329 <description>Include S1 field in RAM only if S1LEN &gt; 0</description>
68334 <description>Always include S1 field in RAM independent of S1LEN</description>
68341 <description>Length of code indicator - long range</description>
68347 <description>Length of preamble on air. Decision point: TASKS_START task</description>
68353 <description>8-bit preamble</description>
68358 <description>16-bit preamble</description>
68363 <description>32-bit zero preamble - used for IEEE 802.15.4</description>
68368 <description>Preamble - used for BLE long range</description>
68375 <description>Indicates if LENGTH field contains CRC or not</description>
68381 <description>LENGTH does not contain CRC</description>
68386 <description>LENGTH includes CRC</description>
68393 <description>Length of TERM field in Long Range operation</description>
68401 <description>Packet configuration register 1</description>
68409 …<description>Maximum length of packet payload. If the packet payload is larger than MAXLEN, the ra…
68415 <description>Static length in number of bytes</description>
68421 <description>Base address length in number of bytes</description>
68427 …<description>On-air endianness of packet, this applies to the S0, LENGTH, S1, and the PAYLOAD fiel…
68433 <description>Least significant bit on air first</description>
68438 <description>Most significant bit on air first</description>
68445 <description>Enable or disable packet whitening</description>
68451 <description>Disable</description>
68456 <description>Enable</description>
68463 …<description>If whitening is enabled S0 can be configured to be excluded from whitening</descripti…
68469 <description>S0 included in whitening</description>
68474 <description>S0 excluded from whitening</description>
68483 <description>Base address 0</description>
68491 <description>Base address 0</description>
68499 <description>Base address 1</description>
68507 <description>Base address 1</description>
68515 <description>Prefixes bytes for logical addresses 0-3</description>
68523 <description>Address prefix 0</description>
68529 <description>Address prefix 1</description>
68535 <description>Address prefix 2</description>
68541 <description>Address prefix 3</description>
68549 <description>Prefixes bytes for logical addresses 4-7</description>
68557 <description>Address prefix 4</description>
68563 <description>Address prefix 5</description>
68569 <description>Address prefix 6</description>
68575 <description>Address prefix 7</description>
68583 <description>Transmit address select</description>
68591 <description>Transmit address select</description>
68599 <description>Receive address select</description>
68607 <description>Enable or disable reception on logical address 0</description>
68613 <description>Disable</description>
68618 <description>Enable</description>
68625 <description>Enable or disable reception on logical address 1</description>
68631 <description>Disable</description>
68636 <description>Enable</description>
68643 <description>Enable or disable reception on logical address 2</description>
68649 <description>Disable</description>
68654 <description>Enable</description>
68661 <description>Enable or disable reception on logical address 3</description>
68667 <description>Disable</description>
68672 <description>Enable</description>
68679 <description>Enable or disable reception on logical address 4</description>
68685 <description>Disable</description>
68690 <description>Enable</description>
68697 <description>Enable or disable reception on logical address 5</description>
68703 <description>Disable</description>
68708 <description>Enable</description>
68715 <description>Enable or disable reception on logical address 6</description>
68721 <description>Disable</description>
68726 <description>Enable</description>
68733 <description>Enable or disable reception on logical address 7</description>
68739 <description>Disable</description>
68744 <description>Enable</description>
68753 <description>CRC configuration</description>
68761 <description>CRC length in number of bytes.</description>
68767 <description>CRC length is zero and CRC calculation is disabled</description>
68772 <description>CRC length is one byte and CRC calculation is enabled</description>
68777 <description>CRC length is two bytes and CRC calculation is enabled</description>
68782 … <description>CRC length is three bytes and CRC calculation is enabled</description>
68789 …<description>Control whether CRC calculation skips the address field. Other fields can also be ski…
68795 <description>CRC calculation includes address field</description>
68800 … <description>CRC calculation starting at first byte after address field.</description>
68805 …<description>CRC calculation starting at first byte after length field (as per 802.15.4 standard).…
68810 <description>CRC calculation starting at first byte after S0 field.</description>
68815 <description>CRC calculation starting at first byte after S1 field.</description>
68824 <description>CRC polynomial</description>
68832 <description>CRC polynomial</description>
68840 <description>CRC initial value</description>
68848 <description>CRC initial value</description>
68858 <description>Description collection: Device address base segment n</description>
68866 <description>Device address base segment n</description>
68876 <description>Description collection: Device address prefix n</description>
68884 <description>Device address prefix n</description>
68892 <description>Device address match configuration</description>
68900 … <description>Enable or disable device address matching using device address 0</description>
68906 <description>Disabled</description>
68911 <description>Enabled</description>
68918 … <description>Enable or disable device address matching using device address 1</description>
68924 <description>Disabled</description>
68929 <description>Enabled</description>
68936 … <description>Enable or disable device address matching using device address 2</description>
68942 <description>Disabled</description>
68947 <description>Enabled</description>
68954 … <description>Enable or disable device address matching using device address 3</description>
68960 <description>Disabled</description>
68965 <description>Enabled</description>
68972 … <description>Enable or disable device address matching using device address 4</description>
68978 <description>Disabled</description>
68983 <description>Enabled</description>
68990 … <description>Enable or disable device address matching using device address 5</description>
68996 <description>Disabled</description>
69001 <description>Enabled</description>
69008 … <description>Enable or disable device address matching using device address 6</description>
69014 <description>Disabled</description>
69019 <description>Enabled</description>
69026 … <description>Enable or disable device address matching using device address 7</description>
69032 <description>Disabled</description>
69037 <description>Enabled</description>
69044 <description>TxAdd for device address 0</description>
69050 <description>TxAdd for device address 1</description>
69056 <description>TxAdd for device address 2</description>
69062 <description>TxAdd for device address 3</description>
69068 <description>TxAdd for device address 4</description>
69074 <description>TxAdd for device address 5</description>
69080 <description>TxAdd for device address 6</description>
69086 <description>TxAdd for device address 7</description>
69094 <description>Bit counter compare</description>
69102 <description>Bit counter compare</description>
69110 <description>CTEInfo parsed from received packet</description>
69118 <description>CTETime parsed from packet</description>
69124 <description>RFU parsed from packet</description>
69130 <description>CTEType parsed from packet</description>
69138 <description>Search pattern configuration</description>
69146 <description>Search pattern configuration</description>
69154 <description>Pattern mask</description>
69162 <description>Pattern mask</description>
69170 <description>IEEE 802.15.4 start of frame delimiter</description>
69178 …<description>IEEE 802.15.4 start of frame delimiter. Note: the least significant 4 bits of the SFD…
69186 <description>Configuration for CTE inline mode</description>
69194 <description>Enable parsing of CTEInfo from received packet in BLE modes</description>
69200 <description>Parsing of CTEInfo is enabled</description>
69205 <description>Parsing of CTEInfo is disabled</description>
69212 <description>CTEInfo is S1 byte or not</description>
69218 <description>CTEInfo is in S1 byte (data PDU)</description>
69223 <description>CTEInfo is NOT in S1 byte (advertising PDU)</description>
69230 <description>Sampling/switching if CRC is not OK</description>
69236 <description>Sampling and antenna switching also when CRC is not OK</description>
69241 <description>No sampling and antenna switching when CRC is not OK</description>
69248 <description>Max range of CTETime</description>
69254 … <description>20 in 8us unit (default) Set to 20 if parsed CTETime is larger han 20</description>
69259 <description>31 in 8us unit</description>
69264 <description>63 in 8us unit</description>
69271 …<description>Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is…
69277 <description>4us</description>
69282 <description>2us</description>
69287 <description>1us</description>
69292 <description>0.5us</description>
69297 <description>0.25us</description>
69302 <description>0.125us</description>
69309 …<description>Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is…
69315 <description>4us</description>
69320 <description>2us</description>
69325 <description>1us</description>
69330 <description>0.5us</description>
69335 <description>0.25us</description>
69340 <description>0.125us</description>
69347 <description>S0 bit pattern to match</description>
69353 <description>S0 bit mask to set which bit to match</description>
69361 <description>Packet pointer</description>
69369 <description>Data pointer</description>
69377 <description>Unspecified</description>
69383 <description>Selects the mode(s) that are activated on the start signal</description>
69391 <description>Enable or disable TPM</description>
69397 <description>TPM is disabled</description>
69402 <description>TPM is enabled</description>
69409 <description>Enable or disable TFM</description>
69415 <description>TFM is disabled</description>
69420 <description>TFM is enabled</description>
69429 <description>Number of input samples at 2MHz sample rate</description>
69437 <description>Maximum value supported is 160</description>
69445 <description>The value of FREQUENCY that will be used in the next step</description>
69453 <description>Frequency = 2400 + FREQUENCY (MHz)</description>
69461 …description>Override value of FFO (Fractional Frequency Offset) if not to be based on the frequenc…
69469 <description>Units 62.5 ppb. Max range +/-100 ppm plus margin.</description>
69477 <description>Source of FFO</description>
69485 <description>Use external or internal FFOSOURCE</description>
69491 <description>Use FFOIN</description>
69496 <description>Calc FFO from CnAcc</description>
69505 …<description>FAEPEER (Frequency Actuation Error) of peer if known. Used during Mode 0 steps.</desc…
69513 <description>Units 31.25 ppb.</description>
69521 <description>Parameter used in TPM, provided by software</description>
69529 <description>Phase shift used in TPM calculation</description>
69537 <description>Parameter used in TPM, provided by software</description>
69545 …<description>Coefficient 2**16/(numSamples/16) in Q1.15 format (Default numsamples value is 160)</…
69553 <description>Mean magnitude and mean phase converted to IQ</description>
69561 <description>Inphase</description>
69567 <description>Quadrature</description>
69575 … <description>Mean magnitude and phase of the signal before it is converted to PCT16</description>
69583 <description>Mean phase</description>
69589 <description>Mean magnitude</description>
69597 <description>Mean of IQ values</description>
69605 <description>Inphase</description>
69611 <description>Quadrature</description>
69619 <description>Magnitude standard deviation approximation</description>
69627 <description>Magnitude standard deviation approximation</description>
69635 <description>Output of the autocorrelation of the accumulated IQ signal</description>
69655 <description>FFO estimate</description>
69663 <description>Units 62.5 ppb. Max range +/-100 ppm plus margin.</description>
69671 <description>Turn on/off down sample of input IQ-signals</description>
69679 <description>Turn on/off down sample of input IQ-signals</description>
69685 <description>Disable filter</description>
69690 <description>Enable filter</description>
69697 <description>Indicating if BLE1M or BLE2M is used</description>
69703 <description>Radio mode BLE1M is used</description>
69708 <description>Radio mode BLE2M is used</description>
69717 <description>Number of full ADPLL finetune steps</description>
69725 <description>Units of 488.28125 Hz</description>
69733 <description>Cordic output of CnAcc</description>
69748 <description>Frequency offset estimate</description>
69763 …<description>Mean magnitude and mean phase converted to IQ. IQ values limited to [-1024,1023].</de…
69771 <description>Inphase</description>
69777 <description>Quadrature</description>
69785 …description>Quantization error between ADPLL frequency and the desired value of FFO * RF Frequency…
69793 <description>Inphase</description>
69802 <description>Unspecified</description>
69808 <description>RTT Config.</description>
69816 … <description>Enable RTT Functionality. Only valid for BLE 1MBPS and 2MBPS mode</description>
69822 <description>Disable RTT Block</description>
69827 <description>Enable RTT Block</description>
69834 <description>Enabling/Disable ping over the entire access address.</description>
69840 …<description>Disable ping over the entire access address, i.e., enable only over the first 16-bit …
69845 <description>Enable ping over the entire access address</description>
69852 <description>Role as a Initiator or Reflector.</description>
69858 <description>Initiator</description>
69863 <description>Reflector</description>
69870 …<description>Number of 16bit payload segments available for ToA detection. Allowed values are 0, 2…
69876 …description>Early Frame Sync Delay, i.e., number of cycles to wait for access address to anchor co…
69884 <description>RTT segments 0 and 1</description>
69892 <description>Data Bits 31 - 0</description>
69900 <description>RTT segments 2 and 3</description>
69908 <description>Data Bits 63 - 32</description>
69916 <description>RTT segments 4 and 5</description>
69924 <description>Data Bits 95 - 64</description>
69932 <description>RTT segments 6 and 7</description>
69940 <description>Data Bits 127 - 96</description>
69951 <description>2.4 GHz radio 1</description>
69966 <description>System protection unit 2</description>
69977 <description>Distributed programmable peripheral interconnect controller 4</description>
69985 <description>Distributed programmable peripheral interconnect controller 5</description>
69993 <description>PPIB APB registers 8</description>
70000 <description>PPIB APB registers 9</description>
70007 <description>PPIB APB registers 10</description>
70014 <description>PPIB APB registers 11</description>
70021 <description>PPIB APB registers 12</description>
70028 <description>PPIB APB registers 13</description>
70035 <description>Serial Peripheral Interface Master with EasyDMA 2</description>
70046 <description>SPI Slave 2</description>
70058 <description>I2C compatible Two-Wire Master Interface with EasyDMA 0</description>
70078 …<description>Stop TWI transaction. Must be issued while the TWI master is not suspended.</descript…
70086 …<description>Stop TWI transaction. Must be issued while the TWI master is not suspended.</descript…
70092 <description>Trigger task</description>
70101 <description>Suspend TWI transaction</description>
70109 <description>Suspend TWI transaction</description>
70115 <description>Trigger task</description>
70124 <description>Resume TWI transaction</description>
70132 <description>Resume TWI transaction</description>
70138 <description>Trigger task</description>
70147 <description>Peripheral tasks.</description>
70153 <description>Peripheral tasks.</description>
70159 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
70167 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
70173 <description>Trigger task</description>
70182 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
70190 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
70196 <description>Trigger task</description>
70207 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
70215 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
70221 <description>Trigger task</description>
70232 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
70240 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
70246 <description>Trigger task</description>
70256 <description>Peripheral tasks.</description>
70262 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
70270 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
70276 <description>Trigger task</description>
70285 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
70293 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
70299 <description>Trigger task</description>
70310 <description>Subscribe configuration for task STOP</description>
70318 <description>DPPI channel that task STOP will subscribe to</description>
70329 <description>Disable subscription</description>
70334 <description>Enable subscription</description>
70343 <description>Subscribe configuration for task SUSPEND</description>
70351 <description>DPPI channel that task SUSPEND will subscribe to</description>
70362 <description>Disable subscription</description>
70367 <description>Enable subscription</description>
70376 <description>Subscribe configuration for task RESUME</description>
70384 <description>DPPI channel that task RESUME will subscribe to</description>
70395 <description>Disable subscription</description>
70400 <description>Enable subscription</description>
70409 <description>Subscribe configuration for tasks</description>
70415 <description>Subscribe configuration for tasks</description>
70421 <description>Subscribe configuration for task START</description>
70429 <description>DPPI channel that task START will subscribe to</description>
70440 <description>Disable subscription</description>
70445 <description>Enable subscription</description>
70454 <description>Subscribe configuration for task STOP</description>
70462 <description>DPPI channel that task STOP will subscribe to</description>
70473 <description>Disable subscription</description>
70478 <description>Enable subscription</description>
70489 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
70497 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
70508 <description>Disable subscription</description>
70513 <description>Enable subscription</description>
70524 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
70532 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
70543 <description>Disable subscription</description>
70548 <description>Enable subscription</description>
70558 <description>Subscribe configuration for tasks</description>
70564 <description>Subscribe configuration for task START</description>
70572 <description>DPPI channel that task START will subscribe to</description>
70583 <description>Disable subscription</description>
70588 <description>Enable subscription</description>
70597 <description>Subscribe configuration for task STOP</description>
70605 <description>DPPI channel that task STOP will subscribe to</description>
70616 <description>Disable subscription</description>
70621 <description>Enable subscription</description>
70632 <description>TWI stopped</description>
70640 <description>TWI stopped</description>
70646 <description>Event not generated</description>
70651 <description>Event generated</description>
70660 <description>TWI error</description>
70668 <description>TWI error</description>
70674 <description>Event not generated</description>
70679 <description>Event generated</description>
70688 <description>SUSPEND task has been issued, TWI traffic is now suspended.</description>
70696 <description>SUSPEND task has been issued, TWI traffic is now suspended.</description>
70702 <description>Event not generated</description>
70707 <description>Event generated</description>
70716 <description>Byte boundary, starting to receive the last byte</description>
70724 <description>Byte boundary, starting to receive the last byte</description>
70730 <description>Event not generated</description>
70735 <description>Event generated</description>
70744 <description>Byte boundary, starting to transmit the last byte</description>
70752 <description>Byte boundary, starting to transmit the last byte</description>
70758 <description>Event not generated</description>
70763 <description>Event generated</description>
70772 <description>Peripheral events.</description>
70778 <description>Peripheral events.</description>
70784 <description>Generated after all MAXCNT bytes have been transferred</description>
70792 <description>Generated after all MAXCNT bytes have been transferred</description>
70798 <description>Event not generated</description>
70803 <description>Event generated</description>
70812 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
70820 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
70826 <description>Event not generated</description>
70831 <description>Event generated</description>
70840 <description>An error occured during the bus transfer.</description>
70848 <description>An error occured during the bus transfer.</description>
70854 <description>Event not generated</description>
70859 <description>Event generated</description>
70870 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
70878 <description>Pattern match is detected on the DMA data bus.</description>
70884 <description>Event not generated</description>
70889 <description>Event generated</description>
70899 <description>Peripheral events.</description>
70905 <description>Generated after all MAXCNT bytes have been transferred</description>
70913 <description>Generated after all MAXCNT bytes have been transferred</description>
70919 <description>Event not generated</description>
70924 <description>Event generated</description>
70933 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
70941 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
70947 <description>Event not generated</description>
70952 <description>Event generated</description>
70961 <description>An error occured during the bus transfer.</description>
70969 <description>An error occured during the bus transfer.</description>
70975 <description>Event not generated</description>
70980 <description>Event generated</description>
70991 <description>Publish configuration for event STOPPED</description>
70999 <description>DPPI channel that event STOPPED will publish to</description>
71010 <description>Disable publishing</description>
71015 <description>Enable publishing</description>
71024 <description>Publish configuration for event ERROR</description>
71032 <description>DPPI channel that event ERROR will publish to</description>
71043 <description>Disable publishing</description>
71048 <description>Enable publishing</description>
71057 <description>Publish configuration for event SUSPENDED</description>
71065 <description>DPPI channel that event SUSPENDED will publish to</description>
71076 <description>Disable publishing</description>
71081 <description>Enable publishing</description>
71090 <description>Publish configuration for event LASTRX</description>
71098 <description>DPPI channel that event LASTRX will publish to</description>
71109 <description>Disable publishing</description>
71114 <description>Enable publishing</description>
71123 <description>Publish configuration for event LASTTX</description>
71131 <description>DPPI channel that event LASTTX will publish to</description>
71142 <description>Disable publishing</description>
71147 <description>Enable publishing</description>
71156 <description>Publish configuration for events</description>
71162 <description>Publish configuration for events</description>
71168 <description>Publish configuration for event END</description>
71176 <description>DPPI channel that event END will publish to</description>
71187 <description>Disable publishing</description>
71192 <description>Enable publishing</description>
71201 <description>Publish configuration for event READY</description>
71209 <description>DPPI channel that event READY will publish to</description>
71220 <description>Disable publishing</description>
71225 <description>Enable publishing</description>
71234 <description>Publish configuration for event BUSERROR</description>
71242 <description>DPPI channel that event BUSERROR will publish to</description>
71253 <description>Disable publishing</description>
71258 <description>Enable publishing</description>
71269 … <description>Description collection: Publish configuration for event MATCH[n]</description>
71277 <description>DPPI channel that event MATCH[n] will publish to</description>
71288 <description>Disable publishing</description>
71293 <description>Enable publishing</description>
71303 <description>Publish configuration for events</description>
71309 <description>Publish configuration for event END</description>
71317 <description>DPPI channel that event END will publish to</description>
71328 <description>Disable publishing</description>
71333 <description>Enable publishing</description>
71342 <description>Publish configuration for event READY</description>
71350 <description>DPPI channel that event READY will publish to</description>
71361 <description>Disable publishing</description>
71366 <description>Enable publishing</description>
71375 <description>Publish configuration for event BUSERROR</description>
71383 <description>DPPI channel that event BUSERROR will publish to</description>
71394 <description>Disable publishing</description>
71399 <description>Enable publishing</description>
71410 <description>Shortcuts between local events and tasks</description>
71418 <description>Shortcut between event LASTTX and task DMA.RX.START</description>
71424 <description>Disable shortcut</description>
71429 <description>Enable shortcut</description>
71436 <description>Shortcut between event LASTTX and task SUSPEND</description>
71442 <description>Disable shortcut</description>
71447 <description>Enable shortcut</description>
71454 <description>Shortcut between event LASTTX and task STOP</description>
71460 <description>Disable shortcut</description>
71465 <description>Enable shortcut</description>
71472 <description>Shortcut between event LASTRX and task DMA.TX.START</description>
71478 <description>Disable shortcut</description>
71483 <description>Enable shortcut</description>
71490 <description>Shortcut between event LASTRX and task STOP</description>
71496 <description>Disable shortcut</description>
71501 <description>Enable shortcut</description>
71508 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
71514 <description>Disable shortcut</description>
71519 <description>Enable shortcut</description>
71526 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
71532 <description>Disable shortcut</description>
71537 <description>Enable shortcut</description>
71544 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
71550 <description>Disable shortcut</description>
71555 <description>Enable shortcut</description>
71562 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
71568 <description>Disable shortcut</description>
71573 <description>Enable shortcut</description>
71580 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
71586 <description>Disable shortcut</description>
71591 <description>Enable shortcut</description>
71598 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
71604 <description>Disable shortcut</description>
71609 <description>Enable shortcut</description>
71616 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
71622 <description>Disable shortcut</description>
71627 <description>Enable shortcut</description>
71634 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
71640 <description>Disable shortcut</description>
71645 <description>Enable shortcut</description>
71654 <description>Enable or disable interrupt</description>
71662 <description>Enable or disable interrupt for event STOPPED</description>
71668 <description>Disable</description>
71673 <description>Enable</description>
71680 <description>Enable or disable interrupt for event ERROR</description>
71686 <description>Disable</description>
71691 <description>Enable</description>
71698 <description>Enable or disable interrupt for event SUSPENDED</description>
71704 <description>Disable</description>
71709 <description>Enable</description>
71716 <description>Enable or disable interrupt for event LASTRX</description>
71722 <description>Disable</description>
71727 <description>Enable</description>
71734 <description>Enable or disable interrupt for event LASTTX</description>
71740 <description>Disable</description>
71745 <description>Enable</description>
71752 <description>Enable or disable interrupt for event DMARXEND</description>
71758 <description>Disable</description>
71763 <description>Enable</description>
71770 <description>Enable or disable interrupt for event DMARXREADY</description>
71776 <description>Disable</description>
71781 <description>Enable</description>
71788 <description>Enable or disable interrupt for event DMARXBUSERROR</description>
71794 <description>Disable</description>
71799 <description>Enable</description>
71806 <description>Enable or disable interrupt for event DMARXMATCH[0]</description>
71812 <description>Disable</description>
71817 <description>Enable</description>
71824 <description>Enable or disable interrupt for event DMARXMATCH[1]</description>
71830 <description>Disable</description>
71835 <description>Enable</description>
71842 <description>Enable or disable interrupt for event DMARXMATCH[2]</description>
71848 <description>Disable</description>
71853 <description>Enable</description>
71860 <description>Enable or disable interrupt for event DMARXMATCH[3]</description>
71866 <description>Disable</description>
71871 <description>Enable</description>
71878 <description>Enable or disable interrupt for event DMATXEND</description>
71884 <description>Disable</description>
71889 <description>Enable</description>
71896 <description>Enable or disable interrupt for event DMATXREADY</description>
71902 <description>Disable</description>
71907 <description>Enable</description>
71914 <description>Enable or disable interrupt for event DMATXBUSERROR</description>
71920 <description>Disable</description>
71925 <description>Enable</description>
71934 <description>Enable interrupt</description>
71942 <description>Write '1' to enable interrupt for event STOPPED</description>
71949 <description>Read: Disabled</description>
71954 <description>Read: Enabled</description>
71962 <description>Enable</description>
71969 <description>Write '1' to enable interrupt for event ERROR</description>
71976 <description>Read: Disabled</description>
71981 <description>Read: Enabled</description>
71989 <description>Enable</description>
71996 <description>Write '1' to enable interrupt for event SUSPENDED</description>
72003 <description>Read: Disabled</description>
72008 <description>Read: Enabled</description>
72016 <description>Enable</description>
72023 <description>Write '1' to enable interrupt for event LASTRX</description>
72030 <description>Read: Disabled</description>
72035 <description>Read: Enabled</description>
72043 <description>Enable</description>
72050 <description>Write '1' to enable interrupt for event LASTTX</description>
72057 <description>Read: Disabled</description>
72062 <description>Read: Enabled</description>
72070 <description>Enable</description>
72077 <description>Write '1' to enable interrupt for event DMARXEND</description>
72084 <description>Read: Disabled</description>
72089 <description>Read: Enabled</description>
72097 <description>Enable</description>
72104 <description>Write '1' to enable interrupt for event DMARXREADY</description>
72111 <description>Read: Disabled</description>
72116 <description>Read: Enabled</description>
72124 <description>Enable</description>
72131 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
72138 <description>Read: Disabled</description>
72143 <description>Read: Enabled</description>
72151 <description>Enable</description>
72158 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
72165 <description>Read: Disabled</description>
72170 <description>Read: Enabled</description>
72178 <description>Enable</description>
72185 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
72192 <description>Read: Disabled</description>
72197 <description>Read: Enabled</description>
72205 <description>Enable</description>
72212 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
72219 <description>Read: Disabled</description>
72224 <description>Read: Enabled</description>
72232 <description>Enable</description>
72239 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
72246 <description>Read: Disabled</description>
72251 <description>Read: Enabled</description>
72259 <description>Enable</description>
72266 <description>Write '1' to enable interrupt for event DMATXEND</description>
72273 <description>Read: Disabled</description>
72278 <description>Read: Enabled</description>
72286 <description>Enable</description>
72293 <description>Write '1' to enable interrupt for event DMATXREADY</description>
72300 <description>Read: Disabled</description>
72305 <description>Read: Enabled</description>
72313 <description>Enable</description>
72320 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
72327 <description>Read: Disabled</description>
72332 <description>Read: Enabled</description>
72340 <description>Enable</description>
72349 <description>Disable interrupt</description>
72357 <description>Write '1' to disable interrupt for event STOPPED</description>
72364 <description>Read: Disabled</description>
72369 <description>Read: Enabled</description>
72377 <description>Disable</description>
72384 <description>Write '1' to disable interrupt for event ERROR</description>
72391 <description>Read: Disabled</description>
72396 <description>Read: Enabled</description>
72404 <description>Disable</description>
72411 <description>Write '1' to disable interrupt for event SUSPENDED</description>
72418 <description>Read: Disabled</description>
72423 <description>Read: Enabled</description>
72431 <description>Disable</description>
72438 <description>Write '1' to disable interrupt for event LASTRX</description>
72445 <description>Read: Disabled</description>
72450 <description>Read: Enabled</description>
72458 <description>Disable</description>
72465 <description>Write '1' to disable interrupt for event LASTTX</description>
72472 <description>Read: Disabled</description>
72477 <description>Read: Enabled</description>
72485 <description>Disable</description>
72492 <description>Write '1' to disable interrupt for event DMARXEND</description>
72499 <description>Read: Disabled</description>
72504 <description>Read: Enabled</description>
72512 <description>Disable</description>
72519 <description>Write '1' to disable interrupt for event DMARXREADY</description>
72526 <description>Read: Disabled</description>
72531 <description>Read: Enabled</description>
72539 <description>Disable</description>
72546 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
72553 <description>Read: Disabled</description>
72558 <description>Read: Enabled</description>
72566 <description>Disable</description>
72573 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
72580 <description>Read: Disabled</description>
72585 <description>Read: Enabled</description>
72593 <description>Disable</description>
72600 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
72607 <description>Read: Disabled</description>
72612 <description>Read: Enabled</description>
72620 <description>Disable</description>
72627 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
72634 <description>Read: Disabled</description>
72639 <description>Read: Enabled</description>
72647 <description>Disable</description>
72654 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
72661 <description>Read: Disabled</description>
72666 <description>Read: Enabled</description>
72674 <description>Disable</description>
72681 <description>Write '1' to disable interrupt for event DMATXEND</description>
72688 <description>Read: Disabled</description>
72693 <description>Read: Enabled</description>
72701 <description>Disable</description>
72708 <description>Write '1' to disable interrupt for event DMATXREADY</description>
72715 <description>Read: Disabled</description>
72720 <description>Read: Enabled</description>
72728 <description>Disable</description>
72735 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
72742 <description>Read: Disabled</description>
72747 <description>Read: Enabled</description>
72755 <description>Disable</description>
72764 <description>Error source</description>
72773 <description>Overrun error</description>
72779 <description>Error did not occur</description>
72784 <description>Error occurred</description>
72791 … <description>NACK received after sending the address (write '1' to clear)</description>
72797 <description>Error did not occur</description>
72802 <description>Error occurred</description>
72809 … <description>NACK received after sending a data byte (write '1' to clear)</description>
72815 <description>Error did not occur</description>
72820 <description>Error occurred</description>
72829 <description>Enable TWIM</description>
72837 <description>Enable or disable TWIM</description>
72843 <description>Disable TWIM</description>
72848 <description>Enable TWIM</description>
72857 <description>TWI frequency. Accuracy depends on the HFCLK source selected.</description>
72865 <description>TWI master clock frequency</description>
72871 <description>100 kbps</description>
72876 <description>250 kbps</description>
72881 <description>400 kbps</description>
72890 <description>Address used in the TWI transfer</description>
72898 <description>Address used in the TWI transfer</description>
72906 <description>Unspecified</description>
72912 <description>Pin select for SCL signal</description>
72920 <description>Pin number</description>
72926 <description>Port number</description>
72932 <description>Connection</description>
72938 <description>Disconnect</description>
72943 <description>Connect</description>
72952 <description>Pin select for SDA signal</description>
72960 <description>Pin number</description>
72966 <description>Port number</description>
72972 <description>Connection</description>
72978 <description>Disconnect</description>
72983 <description>Connect</description>
72993 <description>Unspecified</description>
72999 <description>Unspecified</description>
73005 <description>RAM buffer start address</description>
73013 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
73021 <description>Maximum number of bytes in channel buffer</description>
73029 <description>Maximum number of bytes in channel buffer</description>
73037 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
73045 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
73053 <description>Terminate the transaction if a BUSERROR event is detected.</description>
73066 <description>Disable</description>
73071 <description>Enable</description>
73080 … <description>Address of transaction that generated the last BUSERROR event.</description>
73095 … <description>Registers to control the behavior of the pattern matcher engine</description>
73101 <description>Configure individual match events</description>
73109 <description>Enable match filter 0</description>
73115 <description>Match filter disabled</description>
73120 <description>Match filter enabled</description>
73127 <description>Enable match filter 1</description>
73133 <description>Match filter disabled</description>
73138 <description>Match filter enabled</description>
73145 <description>Enable match filter 2</description>
73151 <description>Match filter disabled</description>
73156 <description>Match filter enabled</description>
73163 <description>Enable match filter 3</description>
73169 <description>Match filter disabled</description>
73174 <description>Match filter enabled</description>
73181 <description>Configure match filter 0 as one-shot or sticky</description>
73187 <description>Match filter stays enabled until disabled by task</description>
73192 … <description>Match filter stays enabled until next data word is received</description>
73199 <description>Configure match filter 1 as one-shot or sticky</description>
73205 <description>Match filter stays enabled until disabled by task</description>
73210 … <description>Match filter stays enabled until next data word is received</description>
73217 <description>Configure match filter 2 as one-shot or sticky</description>
73223 <description>Match filter stays enabled until disabled by task</description>
73228 … <description>Match filter stays enabled until next data word is received</description>
73235 <description>Configure match filter 3 as one-shot or sticky</description>
73241 <description>Match filter stays enabled until disabled by task</description>
73246 … <description>Match filter stays enabled until next data word is received</description>
73257 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
73265 <description>Data to look for</description>
73275 <description>Unspecified</description>
73281 <description>RAM buffer start address</description>
73289 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
73297 <description>Maximum number of bytes in channel buffer</description>
73305 <description>Maximum number of bytes in channel buffer</description>
73313 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
73321 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
73329 <description>Terminate the transaction if a BUSERROR event is detected.</description>
73342 <description>Disable</description>
73347 <description>Enable</description>
73356 … <description>Address of transaction that generated the last BUSERROR event.</description>
73375 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 0</description>
73395 <description>Stop TWI transaction</description>
73403 <description>Stop TWI transaction</description>
73409 <description>Trigger task</description>
73418 <description>Suspend TWI transaction</description>
73426 <description>Suspend TWI transaction</description>
73432 <description>Trigger task</description>
73441 <description>Resume TWI transaction</description>
73449 <description>Resume TWI transaction</description>
73455 <description>Trigger task</description>
73464 <description>Prepare the TWI slave to respond to a write command</description>
73472 <description>Prepare the TWI slave to respond to a write command</description>
73478 <description>Trigger task</description>
73487 <description>Prepare the TWI slave to respond to a read command</description>
73495 <description>Prepare the TWI slave to respond to a read command</description>
73501 <description>Trigger task</description>
73510 <description>Peripheral tasks.</description>
73516 <description>Peripheral tasks.</description>
73524 …<description>Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in th…
73532 …<description>Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register.</desc…
73538 <description>Trigger task</description>
73549 …<description>Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in …
73557 …<description>Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register.</de…
73563 <description>Trigger task</description>
73574 <description>Subscribe configuration for task STOP</description>
73582 <description>DPPI channel that task STOP will subscribe to</description>
73593 <description>Disable subscription</description>
73598 <description>Enable subscription</description>
73607 <description>Subscribe configuration for task SUSPEND</description>
73615 <description>DPPI channel that task SUSPEND will subscribe to</description>
73626 <description>Disable subscription</description>
73631 <description>Enable subscription</description>
73640 <description>Subscribe configuration for task RESUME</description>
73648 <description>DPPI channel that task RESUME will subscribe to</description>
73659 <description>Disable subscription</description>
73664 <description>Enable subscription</description>
73673 <description>Subscribe configuration for task PREPARERX</description>
73681 <description>DPPI channel that task PREPARERX will subscribe to</description>
73692 <description>Disable subscription</description>
73697 <description>Enable subscription</description>
73706 <description>Subscribe configuration for task PREPARETX</description>
73714 <description>DPPI channel that task PREPARETX will subscribe to</description>
73725 <description>Disable subscription</description>
73730 <description>Enable subscription</description>
73739 <description>Subscribe configuration for tasks</description>
73745 <description>Subscribe configuration for tasks</description>
73753 … <description>Description collection: Subscribe configuration for task ENABLEMATCH[n]</description>
73761 <description>DPPI channel that task ENABLEMATCH[n] will subscribe to</description>
73772 <description>Disable subscription</description>
73777 <description>Enable subscription</description>
73788 …<description>Description collection: Subscribe configuration for task DISABLEMATCH[n]</description>
73796 … <description>DPPI channel that task DISABLEMATCH[n] will subscribe to</description>
73807 <description>Disable subscription</description>
73812 <description>Enable subscription</description>
73823 <description>TWI stopped</description>
73831 <description>TWI stopped</description>
73837 <description>Event not generated</description>
73842 <description>Event generated</description>
73851 <description>TWI error</description>
73859 <description>TWI error</description>
73865 <description>Event not generated</description>
73870 <description>Event generated</description>
73879 <description>Write command received</description>
73887 <description>Write command received</description>
73893 <description>Event not generated</description>
73898 <description>Event generated</description>
73907 <description>Read command received</description>
73915 <description>Read command received</description>
73921 <description>Event not generated</description>
73926 <description>Event generated</description>
73935 <description>Peripheral events.</description>
73941 <description>Peripheral events.</description>
73947 <description>Generated after all MAXCNT bytes have been transferred</description>
73955 <description>Generated after all MAXCNT bytes have been transferred</description>
73961 <description>Event not generated</description>
73966 <description>Event generated</description>
73975 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
73983 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
73989 <description>Event not generated</description>
73994 <description>Event generated</description>
74003 <description>An error occured during the bus transfer.</description>
74011 <description>An error occured during the bus transfer.</description>
74017 <description>Event not generated</description>
74022 <description>Event generated</description>
74033 … <description>Description collection: Pattern match is detected on the DMA data bus.</description>
74041 <description>Pattern match is detected on the DMA data bus.</description>
74047 <description>Event not generated</description>
74052 <description>Event generated</description>
74062 <description>Peripheral events.</description>
74068 <description>Generated after all MAXCNT bytes have been transferred</description>
74076 <description>Generated after all MAXCNT bytes have been transferred</description>
74082 <description>Event not generated</description>
74087 <description>Event generated</description>
74096 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
74104 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
74110 <description>Event not generated</description>
74115 <description>Event generated</description>
74124 <description>An error occured during the bus transfer.</description>
74132 <description>An error occured during the bus transfer.</description>
74138 <description>Event not generated</description>
74143 <description>Event generated</description>
74154 <description>Publish configuration for event STOPPED</description>
74162 <description>DPPI channel that event STOPPED will publish to</description>
74173 <description>Disable publishing</description>
74178 <description>Enable publishing</description>
74187 <description>Publish configuration for event ERROR</description>
74195 <description>DPPI channel that event ERROR will publish to</description>
74206 <description>Disable publishing</description>
74211 <description>Enable publishing</description>
74220 <description>Publish configuration for event WRITE</description>
74228 <description>DPPI channel that event WRITE will publish to</description>
74239 <description>Disable publishing</description>
74244 <description>Enable publishing</description>
74253 <description>Publish configuration for event READ</description>
74261 <description>DPPI channel that event READ will publish to</description>
74272 <description>Disable publishing</description>
74277 <description>Enable publishing</description>
74286 <description>Publish configuration for events</description>
74292 <description>Publish configuration for events</description>
74298 <description>Publish configuration for event END</description>
74306 <description>DPPI channel that event END will publish to</description>
74317 <description>Disable publishing</description>
74322 <description>Enable publishing</description>
74331 <description>Publish configuration for event READY</description>
74339 <description>DPPI channel that event READY will publish to</description>
74350 <description>Disable publishing</description>
74355 <description>Enable publishing</description>
74364 <description>Publish configuration for event BUSERROR</description>
74372 <description>DPPI channel that event BUSERROR will publish to</description>
74383 <description>Disable publishing</description>
74388 <description>Enable publishing</description>
74399 … <description>Description collection: Publish configuration for event MATCH[n]</description>
74407 <description>DPPI channel that event MATCH[n] will publish to</description>
74418 <description>Disable publishing</description>
74423 <description>Enable publishing</description>
74433 <description>Publish configuration for events</description>
74439 <description>Publish configuration for event END</description>
74447 <description>DPPI channel that event END will publish to</description>
74458 <description>Disable publishing</description>
74463 <description>Enable publishing</description>
74472 <description>Publish configuration for event READY</description>
74480 <description>DPPI channel that event READY will publish to</description>
74491 <description>Disable publishing</description>
74496 <description>Enable publishing</description>
74505 <description>Publish configuration for event BUSERROR</description>
74513 <description>DPPI channel that event BUSERROR will publish to</description>
74524 <description>Disable publishing</description>
74529 <description>Enable publishing</description>
74540 <description>Shortcuts between local events and tasks</description>
74548 <description>Shortcut between event WRITE and task SUSPEND</description>
74554 <description>Disable shortcut</description>
74559 <description>Enable shortcut</description>
74566 <description>Shortcut between event READ and task SUSPEND</description>
74572 <description>Disable shortcut</description>
74577 <description>Enable shortcut</description>
74584 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-ch…
74590 <description>Disable shortcut</description>
74595 <description>Enable shortcut</description>
74602 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-ch…
74608 <description>Disable shortcut</description>
74613 <description>Enable shortcut</description>
74620 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-ch…
74626 <description>Disable shortcut</description>
74631 <description>Enable shortcut</description>
74638 …<description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-ch…
74644 <description>Disable shortcut</description>
74649 <description>Enable shortcut</description>
74656 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
74662 <description>Disable shortcut</description>
74667 <description>Enable shortcut</description>
74674 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
74680 <description>Disable shortcut</description>
74685 <description>Enable shortcut</description>
74692 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
74698 <description>Disable shortcut</description>
74703 <description>Enable shortcut</description>
74710 … <description>Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]</description>
74716 <description>Disable shortcut</description>
74721 <description>Enable shortcut</description>
74730 <description>Enable or disable interrupt</description>
74738 <description>Enable or disable interrupt for event STOPPED</description>
74744 <description>Disable</description>
74749 <description>Enable</description>
74756 <description>Enable or disable interrupt for event ERROR</description>
74762 <description>Disable</description>
74767 <description>Enable</description>
74774 <description>Enable or disable interrupt for event WRITE</description>
74780 <description>Disable</description>
74785 <description>Enable</description>
74792 <description>Enable or disable interrupt for event READ</description>
74798 <description>Disable</description>
74803 <description>Enable</description>
74810 <description>Enable or disable interrupt for event DMARXEND</description>
74816 <description>Disable</description>
74821 <description>Enable</description>
74828 <description>Enable or disable interrupt for event DMARXREADY</description>
74834 <description>Disable</description>
74839 <description>Enable</description>
74846 <description>Enable or disable interrupt for event DMARXBUSERROR</description>
74852 <description>Disable</description>
74857 <description>Enable</description>
74864 <description>Enable or disable interrupt for event DMARXMATCH[0]</description>
74870 <description>Disable</description>
74875 <description>Enable</description>
74882 <description>Enable or disable interrupt for event DMARXMATCH[1]</description>
74888 <description>Disable</description>
74893 <description>Enable</description>
74900 <description>Enable or disable interrupt for event DMARXMATCH[2]</description>
74906 <description>Disable</description>
74911 <description>Enable</description>
74918 <description>Enable or disable interrupt for event DMARXMATCH[3]</description>
74924 <description>Disable</description>
74929 <description>Enable</description>
74936 <description>Enable or disable interrupt for event DMATXEND</description>
74942 <description>Disable</description>
74947 <description>Enable</description>
74954 <description>Enable or disable interrupt for event DMATXREADY</description>
74960 <description>Disable</description>
74965 <description>Enable</description>
74972 <description>Enable or disable interrupt for event DMATXBUSERROR</description>
74978 <description>Disable</description>
74983 <description>Enable</description>
74992 <description>Enable interrupt</description>
75000 <description>Write '1' to enable interrupt for event STOPPED</description>
75007 <description>Read: Disabled</description>
75012 <description>Read: Enabled</description>
75020 <description>Enable</description>
75027 <description>Write '1' to enable interrupt for event ERROR</description>
75034 <description>Read: Disabled</description>
75039 <description>Read: Enabled</description>
75047 <description>Enable</description>
75054 <description>Write '1' to enable interrupt for event WRITE</description>
75061 <description>Read: Disabled</description>
75066 <description>Read: Enabled</description>
75074 <description>Enable</description>
75081 <description>Write '1' to enable interrupt for event READ</description>
75088 <description>Read: Disabled</description>
75093 <description>Read: Enabled</description>
75101 <description>Enable</description>
75108 <description>Write '1' to enable interrupt for event DMARXEND</description>
75115 <description>Read: Disabled</description>
75120 <description>Read: Enabled</description>
75128 <description>Enable</description>
75135 <description>Write '1' to enable interrupt for event DMARXREADY</description>
75142 <description>Read: Disabled</description>
75147 <description>Read: Enabled</description>
75155 <description>Enable</description>
75162 <description>Write '1' to enable interrupt for event DMARXBUSERROR</description>
75169 <description>Read: Disabled</description>
75174 <description>Read: Enabled</description>
75182 <description>Enable</description>
75189 <description>Write '1' to enable interrupt for event DMARXMATCH[0]</description>
75196 <description>Read: Disabled</description>
75201 <description>Read: Enabled</description>
75209 <description>Enable</description>
75216 <description>Write '1' to enable interrupt for event DMARXMATCH[1]</description>
75223 <description>Read: Disabled</description>
75228 <description>Read: Enabled</description>
75236 <description>Enable</description>
75243 <description>Write '1' to enable interrupt for event DMARXMATCH[2]</description>
75250 <description>Read: Disabled</description>
75255 <description>Read: Enabled</description>
75263 <description>Enable</description>
75270 <description>Write '1' to enable interrupt for event DMARXMATCH[3]</description>
75277 <description>Read: Disabled</description>
75282 <description>Read: Enabled</description>
75290 <description>Enable</description>
75297 <description>Write '1' to enable interrupt for event DMATXEND</description>
75304 <description>Read: Disabled</description>
75309 <description>Read: Enabled</description>
75317 <description>Enable</description>
75324 <description>Write '1' to enable interrupt for event DMATXREADY</description>
75331 <description>Read: Disabled</description>
75336 <description>Read: Enabled</description>
75344 <description>Enable</description>
75351 <description>Write '1' to enable interrupt for event DMATXBUSERROR</description>
75358 <description>Read: Disabled</description>
75363 <description>Read: Enabled</description>
75371 <description>Enable</description>
75380 <description>Disable interrupt</description>
75388 <description>Write '1' to disable interrupt for event STOPPED</description>
75395 <description>Read: Disabled</description>
75400 <description>Read: Enabled</description>
75408 <description>Disable</description>
75415 <description>Write '1' to disable interrupt for event ERROR</description>
75422 <description>Read: Disabled</description>
75427 <description>Read: Enabled</description>
75435 <description>Disable</description>
75442 <description>Write '1' to disable interrupt for event WRITE</description>
75449 <description>Read: Disabled</description>
75454 <description>Read: Enabled</description>
75462 <description>Disable</description>
75469 <description>Write '1' to disable interrupt for event READ</description>
75476 <description>Read: Disabled</description>
75481 <description>Read: Enabled</description>
75489 <description>Disable</description>
75496 <description>Write '1' to disable interrupt for event DMARXEND</description>
75503 <description>Read: Disabled</description>
75508 <description>Read: Enabled</description>
75516 <description>Disable</description>
75523 <description>Write '1' to disable interrupt for event DMARXREADY</description>
75530 <description>Read: Disabled</description>
75535 <description>Read: Enabled</description>
75543 <description>Disable</description>
75550 <description>Write '1' to disable interrupt for event DMARXBUSERROR</description>
75557 <description>Read: Disabled</description>
75562 <description>Read: Enabled</description>
75570 <description>Disable</description>
75577 <description>Write '1' to disable interrupt for event DMARXMATCH[0]</description>
75584 <description>Read: Disabled</description>
75589 <description>Read: Enabled</description>
75597 <description>Disable</description>
75604 <description>Write '1' to disable interrupt for event DMARXMATCH[1]</description>
75611 <description>Read: Disabled</description>
75616 <description>Read: Enabled</description>
75624 <description>Disable</description>
75631 <description>Write '1' to disable interrupt for event DMARXMATCH[2]</description>
75638 <description>Read: Disabled</description>
75643 <description>Read: Enabled</description>
75651 <description>Disable</description>
75658 <description>Write '1' to disable interrupt for event DMARXMATCH[3]</description>
75665 <description>Read: Disabled</description>
75670 <description>Read: Enabled</description>
75678 <description>Disable</description>
75685 <description>Write '1' to disable interrupt for event DMATXEND</description>
75692 <description>Read: Disabled</description>
75697 <description>Read: Enabled</description>
75705 <description>Disable</description>
75712 <description>Write '1' to disable interrupt for event DMATXREADY</description>
75719 <description>Read: Disabled</description>
75724 <description>Read: Enabled</description>
75732 <description>Disable</description>
75739 <description>Write '1' to disable interrupt for event DMATXBUSERROR</description>
75746 <description>Read: Disabled</description>
75751 <description>Read: Enabled</description>
75759 <description>Disable</description>
75768 <description>Error source</description>
75777 <description>RX buffer overflow detected, and prevented</description>
75783 <description>Error did not occur</description>
75788 <description>Error occurred</description>
75795 <description>NACK sent after receiving a data byte</description>
75801 <description>Error did not occur</description>
75806 <description>Error occurred</description>
75813 <description>TX buffer over-read detected, and prevented</description>
75819 <description>Error did not occur</description>
75824 <description>Error occurred</description>
75833 <description>Status register indicating which address had a match</description>
75841 …<description>Indication of which address in ADDRESS that matched the incoming address</description>
75849 <description>Enable TWIS</description>
75857 <description>Enable or disable TWIS</description>
75863 <description>Disable TWIS</description>
75868 <description>Enable TWIS</description>
75879 <description>Description collection: TWI slave address n</description>
75887 <description>TWI slave address</description>
75895 <description>Configuration register for the address match mechanism</description>
75903 <description>Enable or disable address matching on ADDRESS[0]</description>
75909 <description>Disabled</description>
75914 <description>Enabled</description>
75921 <description>Enable or disable address matching on ADDRESS[1]</description>
75927 <description>Disabled</description>
75932 <description>Enabled</description>
75941 …<description>Over-read character. Character sent out in case of an over-read of the transmit buffe…
75949 …<description>Over-read character. Character sent out in case of an over-read of the transmit buffe…
75957 <description>Unspecified</description>
75963 <description>Pin select for SCL signal</description>
75971 <description>Pin number</description>
75977 <description>Port number</description>
75983 <description>Connection</description>
75989 <description>Disconnect</description>
75994 <description>Connect</description>
76003 <description>Pin select for SDA signal</description>
76011 <description>Pin number</description>
76017 <description>Port number</description>
76023 <description>Connection</description>
76029 <description>Disconnect</description>
76034 <description>Connect</description>
76044 <description>Unspecified</description>
76050 <description>Unspecified</description>
76056 <description>RAM buffer start address</description>
76064 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
76072 <description>Maximum number of bytes in channel buffer</description>
76080 <description>Maximum number of bytes in channel buffer</description>
76088 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
76096 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
76104 <description>Terminate the transaction if a BUSERROR event is detected.</description>
76117 <description>Disable</description>
76122 <description>Enable</description>
76131 … <description>Address of transaction that generated the last BUSERROR event.</description>
76146 … <description>Registers to control the behavior of the pattern matcher engine</description>
76152 <description>Configure individual match events</description>
76160 <description>Enable match filter 0</description>
76166 <description>Match filter disabled</description>
76171 <description>Match filter enabled</description>
76178 <description>Enable match filter 1</description>
76184 <description>Match filter disabled</description>
76189 <description>Match filter enabled</description>
76196 <description>Enable match filter 2</description>
76202 <description>Match filter disabled</description>
76207 <description>Match filter enabled</description>
76214 <description>Enable match filter 3</description>
76220 <description>Match filter disabled</description>
76225 <description>Match filter enabled</description>
76232 <description>Configure match filter 0 as one-shot or sticky</description>
76238 <description>Match filter stays enabled until disabled by task</description>
76243 … <description>Match filter stays enabled until next data word is received</description>
76250 <description>Configure match filter 1 as one-shot or sticky</description>
76256 <description>Match filter stays enabled until disabled by task</description>
76261 … <description>Match filter stays enabled until next data word is received</description>
76268 <description>Configure match filter 2 as one-shot or sticky</description>
76274 <description>Match filter stays enabled until disabled by task</description>
76279 … <description>Match filter stays enabled until next data word is received</description>
76286 <description>Configure match filter 3 as one-shot or sticky</description>
76292 <description>Match filter stays enabled until disabled by task</description>
76297 … <description>Match filter stays enabled until next data word is received</description>
76308 …<description>Description collection: The data to look for - any match will trigger the MATCH[n] ev…
76316 <description>Data to look for</description>
76326 <description>Unspecified</description>
76332 <description>RAM buffer start address</description>
76340 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
76348 <description>Maximum number of bytes in channel buffer</description>
76356 <description>Maximum number of bytes in channel buffer</description>
76364 …<description>Number of bytes transferred in the last transaction, updated after the END event. Als…
76372 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
76380 <description>Terminate the transaction if a BUSERROR event is detected.</description>
76393 <description>Disable</description>
76398 <description>Enable</description>
76407 … <description>Address of transaction that generated the last BUSERROR event.</description>
76426 <description>UART with EasyDMA 2</description>
76438 <description>Serial Peripheral Interface Master with EasyDMA 3</description>
76449 <description>SPI Slave 3</description>
76461 <description>I2C compatible Two-Wire Master Interface with EasyDMA 1</description>
76473 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 1</description>
76485 <description>UART with EasyDMA 3</description>
76497 <description>Serial Peripheral Interface Master with EasyDMA 4</description>
76508 <description>SPI Slave 4</description>
76520 <description>I2C compatible Two-Wire Master Interface with EasyDMA 2</description>
76532 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 2</description>
76544 <description>UART with EasyDMA 4</description>
76556 <description>Serial Peripheral Interface Master with EasyDMA 5</description>
76567 <description>SPI Slave 5</description>
76579 <description>I2C compatible Two-Wire Master Interface with EasyDMA 3</description>
76591 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 3</description>
76603 <description>UART with EasyDMA 5</description>
76615 <description>Serial Peripheral Interface Master with EasyDMA 6</description>
76626 <description>SPI Slave 6</description>
76638 <description>I2C compatible Two-Wire Master Interface with EasyDMA 4</description>
76650 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 4</description>
76662 <description>UART with EasyDMA 6</description>
76674 <description>Serial Peripheral Interface Master with EasyDMA 7</description>
76685 <description>SPI Slave 7</description>
76697 <description>I2C compatible Two-Wire Master Interface with EasyDMA 5</description>
76709 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 5</description>
76721 <description>UART with EasyDMA 7</description>
76733 <description>Event generator unit 4</description>
76744 <description>Event generator unit 5</description>
76755 <description>Timer/Counter 4</description>
76766 <description>Timer/Counter 5</description>
76777 <description>Timer/Counter 6</description>
76788 <description>Timer/Counter 7</description>
76799 <description>Timer/Counter 8</description>
76810 <description>Timer/Counter 9</description>
76821 <description>Timer/Counter 10</description>
76832 <description>Timer/Counter 11</description>
76843 <description>Timer/Counter 12</description>
76854 <description>Timer/Counter 13</description>
76865 <description>Memory configuration 0</description>
76882 <description>Unspecified</description>
76888 <description>Description cluster: Control memory block power.</description>
76896 … <description>Keep the memory block MEM[0] on or off when in System ON mode.</description>
76902 <description>Power down</description>
76907 <description>Power up</description>
76914 … <description>Keep the memory block MEM[1] on or off when in System ON mode.</description>
76920 <description>Power down</description>
76925 <description>Power up</description>
76932 … <description>Keep the memory block MEM[2] on or off when in System ON mode.</description>
76938 <description>Power down</description>
76943 <description>Power up</description>
76950 … <description>Keep the memory block MEM[3] on or off when in System ON mode.</description>
76956 <description>Power down</description>
76961 <description>Power up</description>
76968 … <description>Keep the memory block MEM[4] on or off when in System ON mode.</description>
76974 <description>Power down</description>
76979 <description>Power up</description>
76986 … <description>Keep the memory block MEM[5] on or off when in System ON mode.</description>
76992 <description>Power down</description>
76997 <description>Power up</description>
77004 … <description>Keep the memory block MEM[6] on or off when in System ON mode.</description>
77010 <description>Power down</description>
77015 <description>Power up</description>
77022 … <description>Keep the memory block MEM[7] on or off when in System ON mode.</description>
77028 <description>Power down</description>
77033 <description>Power up</description>
77040 … <description>Keep the memory block MEM[8] on or off when in System ON mode.</description>
77046 <description>Power down</description>
77051 <description>Power up</description>
77058 … <description>Keep the memory block MEM[9] on or off when in System ON mode.</description>
77064 <description>Power down</description>
77069 <description>Power up</description>
77076 … <description>Keep the memory block MEM[10] on or off when in System ON mode.</description>
77082 <description>Power down</description>
77087 <description>Power up</description>
77094 … <description>Keep the memory block MEM[11] on or off when in System ON mode.</description>
77100 <description>Power down</description>
77105 <description>Power up</description>
77112 … <description>Keep the memory block MEM[12] on or off when in System ON mode.</description>
77118 <description>Power down</description>
77123 <description>Power up</description>
77130 … <description>Keep the memory block MEM[13] on or off when in System ON mode.</description>
77136 <description>Power down</description>
77141 <description>Power up</description>
77148 … <description>Keep the memory block MEM[14] on or off when in System ON mode.</description>
77154 <description>Power down</description>
77159 <description>Power up</description>
77166 … <description>Keep the memory block MEM[15] on or off when in System ON mode.</description>
77172 <description>Power down</description>
77177 <description>Power up</description>
77184 … <description>Keep the memory block MEM[16] on or off when in System ON mode.</description>
77190 <description>Power down</description>
77195 <description>Power up</description>
77202 … <description>Keep the memory block MEM[17] on or off when in System ON mode.</description>
77208 <description>Power down</description>
77213 <description>Power up</description>
77220 … <description>Keep the memory block MEM[18] on or off when in System ON mode.</description>
77226 <description>Power down</description>
77231 <description>Power up</description>
77238 … <description>Keep the memory block MEM[19] on or off when in System ON mode.</description>
77244 <description>Power down</description>
77249 <description>Power up</description>
77256 … <description>Keep the memory block MEM[20] on or off when in System ON mode.</description>
77262 <description>Power down</description>
77267 <description>Power up</description>
77274 … <description>Keep the memory block MEM[21] on or off when in System ON mode.</description>
77280 <description>Power down</description>
77285 <description>Power up</description>
77292 … <description>Keep the memory block MEM[22] on or off when in System ON mode.</description>
77298 <description>Power down</description>
77303 <description>Power up</description>
77310 … <description>Keep the memory block MEM[23] on or off when in System ON mode.</description>
77316 <description>Power down</description>
77321 <description>Power up</description>
77328 … <description>Keep the memory block MEM[24] on or off when in System ON mode.</description>
77334 <description>Power down</description>
77339 <description>Power up</description>
77346 … <description>Keep the memory block MEM[25] on or off when in System ON mode.</description>
77352 <description>Power down</description>
77357 <description>Power up</description>
77364 … <description>Keep the memory block MEM[26] on or off when in System ON mode.</description>
77370 <description>Power down</description>
77375 <description>Power up</description>
77382 … <description>Keep the memory block MEM[27] on or off when in System ON mode.</description>
77388 <description>Power down</description>
77393 <description>Power up</description>
77400 … <description>Keep the memory block MEM[28] on or off when in System ON mode.</description>
77406 <description>Power down</description>
77411 <description>Power up</description>
77418 … <description>Keep the memory block MEM[29] on or off when in System ON mode.</description>
77424 <description>Power down</description>
77429 <description>Power up</description>
77436 … <description>Keep the memory block MEM[30] on or off when in System ON mode.</description>
77442 <description>Power down</description>
77447 <description>Power up</description>
77454 … <description>Keep the memory block MEM[31] on or off when in System ON mode.</description>
77460 <description>Power down</description>
77465 <description>Power up</description>
77474 <description>Description cluster: RAM retention for RAM [n].</description>
77482 … <description>Keep the RAM block MEM[0] retained when in System OFF mode.</description>
77488 <description>Retention off</description>
77493 <description>Retention on</description>
77500 … <description>Keep the RAM block MEM[1] retained when in System OFF mode.</description>
77506 <description>Retention off</description>
77511 <description>Retention on</description>
77518 … <description>Keep the RAM block MEM[2] retained when in System OFF mode.</description>
77524 <description>Retention off</description>
77529 <description>Retention on</description>
77536 … <description>Keep the RAM block MEM[3] retained when in System OFF mode.</description>
77542 <description>Retention off</description>
77547 <description>Retention on</description>
77554 … <description>Keep the RAM block MEM[4] retained when in System OFF mode.</description>
77560 <description>Retention off</description>
77565 <description>Retention on</description>
77572 … <description>Keep the RAM block MEM[5] retained when in System OFF mode.</description>
77578 <description>Retention off</description>
77583 <description>Retention on</description>
77590 … <description>Keep the RAM block MEM[6] retained when in System OFF mode.</description>
77596 <description>Retention off</description>
77601 <description>Retention on</description>
77608 … <description>Keep the RAM block MEM[7] retained when in System OFF mode.</description>
77614 <description>Retention off</description>
77619 <description>Retention on</description>
77626 … <description>Keep the RAM block MEM[8] retained when in System OFF mode.</description>
77632 <description>Retention off</description>
77637 <description>Retention on</description>
77644 … <description>Keep the RAM block MEM[9] retained when in System OFF mode.</description>
77650 <description>Retention off</description>
77655 <description>Retention on</description>
77662 … <description>Keep the RAM block MEM[10] retained when in System OFF mode.</description>
77668 <description>Retention off</description>
77673 <description>Retention on</description>
77680 … <description>Keep the RAM block MEM[11] retained when in System OFF mode.</description>
77686 <description>Retention off</description>
77691 <description>Retention on</description>
77698 … <description>Keep the RAM block MEM[12] retained when in System OFF mode.</description>
77704 <description>Retention off</description>
77709 <description>Retention on</description>
77716 … <description>Keep the RAM block MEM[13] retained when in System OFF mode.</description>
77722 <description>Retention off</description>
77727 <description>Retention on</description>
77734 … <description>Keep the RAM block MEM[14] retained when in System OFF mode.</description>
77740 <description>Retention off</description>
77745 <description>Retention on</description>
77752 … <description>Keep the RAM block MEM[15] retained when in System OFF mode.</description>
77758 <description>Retention off</description>
77763 <description>Retention on</description>
77770 … <description>Keep the RAM block MEM[16] retained when in System OFF mode.</description>
77776 <description>Retention off</description>
77781 <description>Retention on</description>
77788 … <description>Keep the RAM block MEM[17] retained when in System OFF mode.</description>
77794 <description>Retention off</description>
77799 <description>Retention on</description>
77806 … <description>Keep the RAM block MEM[18] retained when in System OFF mode.</description>
77812 <description>Retention off</description>
77817 <description>Retention on</description>
77824 … <description>Keep the RAM block MEM[19] retained when in System OFF mode.</description>
77830 <description>Retention off</description>
77835 <description>Retention on</description>
77842 … <description>Keep the RAM block MEM[20] retained when in System OFF mode.</description>
77848 <description>Retention off</description>
77853 <description>Retention on</description>
77860 … <description>Keep the RAM block MEM[21] retained when in System OFF mode.</description>
77866 <description>Retention off</description>
77871 <description>Retention on</description>
77878 … <description>Keep the RAM block MEM[22] retained when in System OFF mode.</description>
77884 <description>Retention off</description>
77889 <description>Retention on</description>
77896 … <description>Keep the RAM block MEM[23] retained when in System OFF mode.</description>
77902 <description>Retention off</description>
77907 <description>Retention on</description>
77914 … <description>Keep the RAM block MEM[24] retained when in System OFF mode.</description>
77920 <description>Retention off</description>
77925 <description>Retention on</description>
77932 … <description>Keep the RAM block MEM[25] retained when in System OFF mode.</description>
77938 <description>Retention off</description>
77943 <description>Retention on</description>
77950 … <description>Keep the RAM block MEM[26] retained when in System OFF mode.</description>
77956 <description>Retention off</description>
77961 <description>Retention on</description>
77968 … <description>Keep the RAM block MEM[27] retained when in System OFF mode.</description>
77974 <description>Retention off</description>
77979 <description>Retention on</description>
77986 … <description>Keep the RAM block MEM[28] retained when in System OFF mode.</description>
77992 <description>Retention off</description>
77997 <description>Retention on</description>
78004 … <description>Keep the RAM block MEM[29] retained when in System OFF mode.</description>
78010 <description>Retention off</description>
78015 <description>Retention on</description>
78022 … <description>Keep the RAM block MEM[30] retained when in System OFF mode.</description>
78028 <description>Retention off</description>
78033 <description>Retention on</description>
78040 … <description>Keep the RAM block MEM[31] retained when in System OFF mode.</description>
78046 <description>Retention off</description>
78051 <description>Retention on</description>
78063 <description>Memory configuration 1</description>
78070 <description>Pulse Density Modulation (Digital Microphone) Interface 0</description>
78089 <description>Starts continuous PDM transfer</description>
78097 <description>Starts continuous PDM transfer</description>
78103 <description>Trigger task</description>
78112 <description>Stops PDM transfer</description>
78120 <description>Stops PDM transfer</description>
78126 <description>Trigger task</description>
78135 <description>Subscribe configuration for task START</description>
78143 <description>DPPI channel that task START will subscribe to</description>
78154 <description>Disable subscription</description>
78159 <description>Enable subscription</description>
78168 <description>Subscribe configuration for task STOP</description>
78176 <description>DPPI channel that task STOP will subscribe to</description>
78187 <description>Disable subscription</description>
78192 <description>Enable subscription</description>
78201 <description>PDM transfer has started</description>
78209 <description>PDM transfer has started</description>
78215 <description>Event not generated</description>
78220 <description>Event generated</description>
78229 <description>PDM transfer has finished</description>
78237 <description>PDM transfer has finished</description>
78243 <description>Event not generated</description>
78248 <description>Event generated</description>
78257 …description>The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample aft…
78265 …description>The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample aft…
78271 <description>Event not generated</description>
78276 <description>Event generated</description>
78285 <description>Peripheral events.</description>
78291 … <description>This event is generated if an error occurs during the bus transfer.</description>
78299 … <description>This event is generated if an error occurs during the bus transfer.</description>
78305 <description>Event not generated</description>
78310 <description>Event generated</description>
78320 <description>Publish configuration for event STARTED</description>
78328 <description>DPPI channel that event STARTED will publish to</description>
78339 <description>Disable publishing</description>
78344 <description>Enable publishing</description>
78353 <description>Publish configuration for event STOPPED</description>
78361 <description>DPPI channel that event STOPPED will publish to</description>
78372 <description>Disable publishing</description>
78377 <description>Enable publishing</description>
78386 <description>Publish configuration for event END</description>
78394 <description>DPPI channel that event END will publish to</description>
78405 <description>Disable publishing</description>
78410 <description>Enable publishing</description>
78419 <description>Publish configuration for events</description>
78425 <description>Publish configuration for event DMA.BUSERROR</description>
78433 <description>DPPI channel that event DMA.BUSERROR will publish to</description>
78444 <description>Disable publishing</description>
78449 <description>Enable publishing</description>
78459 <description>Enable or disable interrupt</description>
78467 <description>Enable or disable interrupt for event STARTED</description>
78473 <description>Disable</description>
78478 <description>Enable</description>
78485 <description>Enable or disable interrupt for event STOPPED</description>
78491 <description>Disable</description>
78496 <description>Enable</description>
78503 <description>Enable or disable interrupt for event END</description>
78509 <description>Disable</description>
78514 <description>Enable</description>
78521 <description>Enable or disable interrupt for event DMABUSERROR</description>
78527 <description>Disable</description>
78532 <description>Enable</description>
78541 <description>Enable interrupt</description>
78549 <description>Write '1' to enable interrupt for event STARTED</description>
78556 <description>Read: Disabled</description>
78561 <description>Read: Enabled</description>
78569 <description>Enable</description>
78576 <description>Write '1' to enable interrupt for event STOPPED</description>
78583 <description>Read: Disabled</description>
78588 <description>Read: Enabled</description>
78596 <description>Enable</description>
78603 <description>Write '1' to enable interrupt for event END</description>
78610 <description>Read: Disabled</description>
78615 <description>Read: Enabled</description>
78623 <description>Enable</description>
78630 <description>Write '1' to enable interrupt for event DMABUSERROR</description>
78637 <description>Read: Disabled</description>
78642 <description>Read: Enabled</description>
78650 <description>Enable</description>
78659 <description>Disable interrupt</description>
78667 <description>Write '1' to disable interrupt for event STARTED</description>
78674 <description>Read: Disabled</description>
78679 <description>Read: Enabled</description>
78687 <description>Disable</description>
78694 <description>Write '1' to disable interrupt for event STOPPED</description>
78701 <description>Read: Disabled</description>
78706 <description>Read: Enabled</description>
78714 <description>Disable</description>
78721 <description>Write '1' to disable interrupt for event END</description>
78728 <description>Read: Disabled</description>
78733 <description>Read: Enabled</description>
78741 <description>Disable</description>
78748 <description>Write '1' to disable interrupt for event DMABUSERROR</description>
78755 <description>Read: Disabled</description>
78760 <description>Read: Enabled</description>
78768 <description>Disable</description>
78777 <description>Pending interrupts</description>
78785 <description>Read pending status of interrupt for event STARTED</description>
78792 <description>Read: Not pending</description>
78797 <description>Read: Pending</description>
78804 <description>Read pending status of interrupt for event STOPPED</description>
78811 <description>Read: Not pending</description>
78816 <description>Read: Pending</description>
78823 <description>Read pending status of interrupt for event END</description>
78830 <description>Read: Not pending</description>
78835 <description>Read: Pending</description>
78842 <description>Read pending status of interrupt for event DMABUSERROR</description>
78849 <description>Read: Not pending</description>
78854 <description>Read: Pending</description>
78863 <description>PDM module enable register</description>
78871 <description>Enable or disable PDM module</description>
78877 <description>Disable</description>
78882 <description>Enable</description>
78891 <description>Defines the routing of the connected PDM microphone signals</description>
78899 <description>Mono or stereo operation</description>
78905 …<description>Sample and store one pair (left + right) of 16-bit samples per RAM word R=[31:16]; L=…
78910 …<description>Sample and store two successive left samples (16 bits each) per RAM word L1=[31:16]; …
78917 <description>Defines on which PDM_CLK edge left (or mono) is sampled.</description>
78923 <description>Left (or mono) is sampled on falling edge of PDM_CLK</description>
78928 <description>Left (or mono) is sampled on rising edge of PDM_CLK</description>
78937 <description>Left output gain adjustment</description>
78945 …description>Left output gain adjustment, in 0.5 dB steps, around the default module gain (see elec…
78951 <description>-20 dB gain adjustment (minimum)</description>
78956 <description>0 dB gain adjustment</description>
78961 <description>+20 dB gain adjustment (maximum)</description>
78970 <description>Right output gain adjustment</description>
78978 …<description>Right output gain adjustment, in 0.5 dB steps, around the default module gain (see el…
78984 <description>-20 dB gain adjustment (minimum)</description>
78989 <description>0 dB gain adjustment</description>
78994 <description>+20 dB gain adjustment (maximum)</description>
79003 …description>Selects the decimation ratio between PDM_CLK and output sample rate. When RATIO is sel…
79011 … <description>Selects the decimation ratio between PDM_CLK and output sample rate</description>
79017 <description>Ratio of 48</description>
79022 <description>Ratio of 50</description>
79027 <description>Ratio of 64</description>
79032 <description>Ratio of 80</description>
79037 <description>Ratio of 96</description>
79042 <description>Ratio of 100</description>
79047 <description>Ratio of 192</description>
79052 …<description>Custom. The decimation rate can be changed using the FILTER.CTRL[31:25] bits</descrip…
79061 <description>Unspecified</description>
79067 <description>Aditional PDM configurability</description>
79075 <description>Override soft mute enable for right channel</description>
79081 <description>No action</description>
79086 <description>override and disable soft mute</description>
79093 <description>Override soft mute enable for left channel</description>
79099 <description>No action</description>
79104 <description>override and disable soft mute</description>
79111 <description>Add +0.25dB to the gain stage</description>
79117 <description>Nothing added</description>
79122 <description>+0.25dB added</description>
79129 <description>Compensates Gain with +0.25dB</description>
79135 <description>Nothing added</description>
79140 <description>+0.25dB added</description>
79147 <description>Compensates Gain with +0.5dB steps</description>
79153 …<description>Custom number of cycles for soft gain/mute function 32*(Multiplication+1) steps</desc…
79159 <description>Input data sampling point delay in PDM_CLK cycels</description>
79165 <description>No added delay</description>
79170 <description>1 clock cycle delay on left channel</description>
79175 <description>1 clock cycle delay on right channel</description>
79180 <description>1 clock cycle delay on both channels</description>
79187 <description>Defines MSB for CIC fliter when RATIO is set to 'custom'</description>
79193 <description>OSR range low 4 OSR range high 32</description>
79198 <description>OSR range low 34 OSR range high 36</description>
79203 <description>OSR range low 38 OSR range high 42</description>
79208 <description>OSR range low 44 OSR range high 48</description>
79213 <description>OSR range low 50 OSR range high 54</description>
79218 <description>OSR range low 56 OSR range high 64</description>
79223 <description>OSR range low 66 OSR range high 72</description>
79228 <description>OSR range low 74 OSR range high 84</description>
79233 <description>OSR range low 86 OSR range high 96</description>
79238 <description>OSR range low 98 OSR range high 110</description>
79243 <description>OSR range low 112 OSR range high 128</description>
79248 <description>OSR range low 130 OSR range high 146</description>
79253 <description>OSR range low 148 OSR range high 168</description>
79258 <description>OSR range low 170 OSR range high 194</description>
79263 <description>OSR range low 196 OSR range high 222</description>
79268 <description>OSR range low 224 OSR range high 256</description>
79275 … <description>Configures decimation ratio to any even number between 4 and 256</description>
79283 <description>Settings for the high-pass filter</description>
79291 …<description>Settings for the high-pass filter -3dB gain pole, assuming filter source clock of 16K…
79297 <description>0.16 Hz</description>
79302 <description>0.32 Hz</description>
79307 <description>0.64 Hz</description>
79312 <description>1.25 Hz</description>
79317 <description>2.5 Hz</description>
79322 <description>5 Hz</description>
79327 <description>10 Hz</description>
79332 <description>20 Hz</description>
79337 <description>40 Hz</description>
79342 <description>79 Hz</description>
79347 <description>157 Hz</description>
79352 <description>310 Hz</description>
79357 <description>603 Hz</description>
79362 <description>1152 Hz</description>
79367 <description>2110 Hz</description>
79376 <description>High pass filter disable</description>
79384 <description>High pass filter disable</description>
79390 <description>High pass filter enabled</description>
79395 <description>High pass filter disabled</description>
79404 <description>Soft mute function</description>
79412 <description>Soft mute function</description>
79418 <description>Disable soft mute function</description>
79423 <description>Enable soft mute function</description>
79432 <description>Soft mute settings</description>
79440 <description>Soft mute settings: amount of cycles for transition</description>
79446 <description>2 filter source clock cycles</description>
79451 <description>8 filter source clock cycles</description>
79456 <description>32 filter source clock cycles</description>
79461 <description>64 filter source clock cycles</description>
79466 <description>128 filter source clock cycles</description>
79471 <description>256 filter source clock cycles</description>
79476 <description>512 filter source clock cycles</description>
79481 … <description>The number of cycles can be set using FILTER.CTRL[17:14] bits</description>
79490 …description>Input Data Sampling with Number of ckFilterL (double frequency of PDM_CLK) Clock Cycle…
79498 …<description>Input Data Sampling with Number of ckFilterL (double frequency of PDM_CLK) Clock Cycl…
79504 <description>No delay</description>
79509 <description>1 cycle</description>
79519 <description>Unspecified</description>
79525 <description>Pin number configuration for PDM CLK signal</description>
79533 <description>Pin number</description>
79539 <description>Port number</description>
79545 <description>Connection</description>
79551 <description>Disconnect</description>
79556 <description>Connect</description>
79565 <description>Pin number configuration for PDM DIN signal</description>
79573 <description>Pin number</description>
79579 <description>Port number</description>
79585 <description>Connection</description>
79591 <description>Disconnect</description>
79596 <description>Connect</description>
79606 <description>Master clock generator configuration</description>
79614 <description>Master clock source selection</description>
79620 <description>32 MHz peripheral clock</description>
79625 <description>24 MHz peripheral clock</description>
79634 <description>Unspecified</description>
79640 <description>RAM address pointer to write samples to with EasyDMA</description>
79648 <description>Address to write PCM samples to over DMA</description>
79656 <description>Number of bytes to allocate memory for in EasyDMA mode</description>
79664 <description>Length of DMA RAM allocation in number of bytes</description>
79673 <description>The prescaler is used to set the PDM frequency</description>
79681 <description>Core clock to PDM divisor</description>
79689 <description>Unspecified</description>
79695 <description>Terminate the transaction if a BUSERROR event is detected.</description>
79708 <description>Disable</description>
79713 <description>Enable</description>
79722 … <description>Address of transaction that generated the last BUSERROR event.</description>
79740 <description>Pulse Density Modulation (Digital Microphone) Interface 1</description>
79751 <description>Pulse Density Modulation (Digital Microphone) Interface 2</description>
79762 <description>Pulse Density Modulation (Digital Microphone) Interface 3</description>
79773 <description>Pulse width modulation unit 0</description>
79792 …<description>Stops PWM pulse generation on all channels at the end of current PWM period, and stop…
79800 …<description>Stops PWM pulse generation on all channels at the end of current PWM period, and stop…
79806 <description>Trigger task</description>
79815 …description>Steps by one value in the current sequence on all enabled channels if DECODER.MODE=Nex…
79823 …description>Steps by one value in the current sequence on all enabled channels if DECODER.MODE=Nex…
79829 <description>Trigger task</description>
79838 <description>Peripheral tasks.</description>
79846 <description>Peripheral tasks.</description>
79852 …description>Description cluster: Starts operation using easyDMA to load the values. See peripheral…
79860 …<description>Starts operation using easyDMA to load the values. See peripheral description for ope…
79866 <description>Trigger task</description>
79875 …<description>Description cluster: Stops operation using easyDMA. This does not trigger an END even…
79883 … <description>Stops operation using easyDMA. This does not trigger an END event.</description>
79889 <description>Trigger task</description>
79900 <description>Subscribe configuration for task STOP</description>
79908 <description>DPPI channel that task STOP will subscribe to</description>
79919 <description>Disable subscription</description>
79924 <description>Enable subscription</description>
79933 <description>Subscribe configuration for task NEXTSTEP</description>
79941 <description>DPPI channel that task NEXTSTEP will subscribe to</description>
79952 <description>Disable subscription</description>
79957 <description>Enable subscription</description>
79966 <description>Subscribe configuration for tasks</description>
79974 <description>Subscribe configuration for tasks</description>
79980 <description>Description cluster: Subscribe configuration for task START</description>
79988 <description>DPPI channel that task START will subscribe to</description>
79999 <description>Disable subscription</description>
80004 <description>Enable subscription</description>
80013 <description>Description cluster: Subscribe configuration for task STOP</description>
80021 <description>DPPI channel that task STOP will subscribe to</description>
80032 <description>Disable subscription</description>
80037 <description>Enable subscription</description>
80048 … <description>Response to STOP task, emitted when PWM pulses are no longer generated</description>
80056 … <description>Response to STOP task, emitted when PWM pulses are no longer generated</description>
80062 <description>Event not generated</description>
80067 <description>Event generated</description>
80078 <description>Description collection: First PWM period started on sequence n</description>
80086 <description>First PWM period started on sequence n</description>
80092 <description>Event not generated</description>
80097 <description>Event generated</description>
80108 …<description>Description collection: Emitted at end of every sequence n, when last value from RAM …
80116 …<description>Emitted at end of every sequence n, when last value from RAM has been applied to wave…
80122 <description>Event not generated</description>
80127 <description>Event generated</description>
80136 <description>Emitted at the end of each PWM period</description>
80144 <description>Emitted at the end of each PWM period</description>
80150 <description>Event not generated</description>
80155 <description>Event generated</description>
80164 …<description>Concatenated sequences have been played the amount of times defined in LOOP.CNT</desc…
80172 …<description>Concatenated sequences have been played the amount of times defined in LOOP.CNT</desc…
80178 <description>Event not generated</description>
80183 <description>Event generated</description>
80192 …<description>Emitted when retrieving from RAM does not complete in time for the PWM module</descri…
80200 …<description>Emitted when retrieving from RAM does not complete in time for the PWM module</descri…
80206 <description>Event not generated</description>
80211 <description>Event generated</description>
80220 <description>Peripheral events.</description>
80228 <description>Peripheral events.</description>
80234 …<description>Description cluster: Generated after all MAXCNT bytes have been transferred</descript…
80242 <description>Generated after all MAXCNT bytes have been transferred</description>
80248 <description>Event not generated</description>
80253 <description>Event generated</description>
80262 …description>Description cluster: Generated when EasyDMA has buffered the .PTR and .MAXCNT register…
80270 …description>Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, al…
80276 <description>Event not generated</description>
80281 <description>Event generated</description>
80290 … <description>Description cluster: An error occured during the bus transfer.</description>
80298 <description>An error occured during the bus transfer.</description>
80304 <description>Event not generated</description>
80309 <description>Event generated</description>
80322 …<description>Description collection: This event is generated when the compare matches for the comp…
80330 …<description>This event is generated when the compare matches for the compare channel [n].</descri…
80336 <description>Event not generated</description>
80341 <description>Event generated</description>
80350 <description>Publish configuration for event STOPPED</description>
80358 <description>DPPI channel that event STOPPED will publish to</description>
80369 <description>Disable publishing</description>
80374 <description>Enable publishing</description>
80385 … <description>Description collection: Publish configuration for event SEQSTARTED[n]</description>
80393 <description>DPPI channel that event SEQSTARTED[n] will publish to</description>
80404 <description>Disable publishing</description>
80409 <description>Enable publishing</description>
80420 … <description>Description collection: Publish configuration for event SEQEND[n]</description>
80428 <description>DPPI channel that event SEQEND[n] will publish to</description>
80439 <description>Disable publishing</description>
80444 <description>Enable publishing</description>
80453 <description>Publish configuration for event PWMPERIODEND</description>
80461 <description>DPPI channel that event PWMPERIODEND will publish to</description>
80472 <description>Disable publishing</description>
80477 <description>Enable publishing</description>
80486 <description>Publish configuration for event LOOPSDONE</description>
80494 <description>DPPI channel that event LOOPSDONE will publish to</description>
80505 <description>Disable publishing</description>
80510 <description>Enable publishing</description>
80519 <description>Publish configuration for event RAMUNDERFLOW</description>
80527 <description>DPPI channel that event RAMUNDERFLOW will publish to</description>
80538 <description>Disable publishing</description>
80543 <description>Enable publishing</description>
80552 <description>Publish configuration for events</description>
80560 <description>Publish configuration for events</description>
80566 <description>Description cluster: Publish configuration for event END</description>
80574 <description>DPPI channel that event END will publish to</description>
80585 <description>Disable publishing</description>
80590 <description>Enable publishing</description>
80599 <description>Description cluster: Publish configuration for event READY</description>
80607 <description>DPPI channel that event READY will publish to</description>
80618 <description>Disable publishing</description>
80623 <description>Enable publishing</description>
80632 … <description>Description cluster: Publish configuration for event BUSERROR</description>
80640 <description>DPPI channel that event BUSERROR will publish to</description>
80651 <description>Disable publishing</description>
80656 <description>Enable publishing</description>
80669 … <description>Description collection: Publish configuration for event COMPAREMATCH[n]</description>
80677 <description>DPPI channel that event COMPAREMATCH[n] will publish to</description>
80688 <description>Disable publishing</description>
80693 <description>Enable publishing</description>
80702 <description>Shortcuts between local events and tasks</description>
80710 <description>Shortcut between event SEQEND[n] and task STOP</description>
80716 <description>Disable shortcut</description>
80721 <description>Enable shortcut</description>
80728 <description>Shortcut between event SEQEND[n] and task STOP</description>
80734 <description>Disable shortcut</description>
80739 <description>Enable shortcut</description>
80746 <description>Shortcut between event LOOPSDONE and task DMA.SEQ[n].START</description>
80752 <description>Disable shortcut</description>
80757 <description>Enable shortcut</description>
80764 <description>Shortcut between event LOOPSDONE and task DMA.SEQ[n].START</description>
80770 <description>Disable shortcut</description>
80775 <description>Enable shortcut</description>
80782 <description>Shortcut between event LOOPSDONE and task STOP</description>
80788 <description>Disable shortcut</description>
80793 <description>Enable shortcut</description>
80800 <description>Shortcut between event RAMUNDERFLOW and task STOP</description>
80806 <description>Disable shortcut</description>
80811 <description>Enable shortcut</description>
80818 <description>Shortcut between event DMA.SEQ[n].BUSERROR and task STOP</description>
80824 <description>Disable shortcut</description>
80829 <description>Enable shortcut</description>
80836 <description>Shortcut between event DMA.SEQ[n].BUSERROR and task STOP</description>
80842 <description>Disable shortcut</description>
80847 <description>Enable shortcut</description>
80856 <description>Enable or disable interrupt</description>
80864 <description>Enable or disable interrupt for event STOPPED</description>
80870 <description>Disable</description>
80875 <description>Enable</description>
80882 <description>Enable or disable interrupt for event SEQSTARTED[0]</description>
80888 <description>Disable</description>
80893 <description>Enable</description>
80900 <description>Enable or disable interrupt for event SEQSTARTED[1]</description>
80906 <description>Disable</description>
80911 <description>Enable</description>
80918 <description>Enable or disable interrupt for event SEQEND[0]</description>
80924 <description>Disable</description>
80929 <description>Enable</description>
80936 <description>Enable or disable interrupt for event SEQEND[1]</description>
80942 <description>Disable</description>
80947 <description>Enable</description>
80954 <description>Enable or disable interrupt for event PWMPERIODEND</description>
80960 <description>Disable</description>
80965 <description>Enable</description>
80972 <description>Enable or disable interrupt for event LOOPSDONE</description>
80978 <description>Disable</description>
80983 <description>Enable</description>
80990 <description>Enable or disable interrupt for event RAMUNDERFLOW</description>
80996 <description>Disable</description>
81001 <description>Enable</description>
81008 <description>Enable or disable interrupt for event DMASEQ0END</description>
81014 <description>Disable</description>
81019 <description>Enable</description>
81026 <description>Enable or disable interrupt for event DMASEQ0READY</description>
81032 <description>Disable</description>
81037 <description>Enable</description>
81044 <description>Enable or disable interrupt for event DMASEQ0BUSERROR</description>
81050 <description>Disable</description>
81055 <description>Enable</description>
81062 <description>Enable or disable interrupt for event DMASEQ1END</description>
81068 <description>Disable</description>
81073 <description>Enable</description>
81080 <description>Enable or disable interrupt for event DMASEQ1READY</description>
81086 <description>Disable</description>
81091 <description>Enable</description>
81098 <description>Enable or disable interrupt for event DMASEQ1BUSERROR</description>
81104 <description>Disable</description>
81109 <description>Enable</description>
81116 <description>Enable or disable interrupt for event COMPAREMATCH[0]</description>
81122 <description>Disable</description>
81127 <description>Enable</description>
81134 <description>Enable or disable interrupt for event COMPAREMATCH[1]</description>
81140 <description>Disable</description>
81145 <description>Enable</description>
81152 <description>Enable or disable interrupt for event COMPAREMATCH[2]</description>
81158 <description>Disable</description>
81163 <description>Enable</description>
81170 <description>Enable or disable interrupt for event COMPAREMATCH[3]</description>
81176 <description>Disable</description>
81181 <description>Enable</description>
81190 <description>Enable interrupt</description>
81198 <description>Write '1' to enable interrupt for event STOPPED</description>
81205 <description>Read: Disabled</description>
81210 <description>Read: Enabled</description>
81218 <description>Enable</description>
81225 <description>Write '1' to enable interrupt for event SEQSTARTED[0]</description>
81232 <description>Read: Disabled</description>
81237 <description>Read: Enabled</description>
81245 <description>Enable</description>
81252 <description>Write '1' to enable interrupt for event SEQSTARTED[1]</description>
81259 <description>Read: Disabled</description>
81264 <description>Read: Enabled</description>
81272 <description>Enable</description>
81279 <description>Write '1' to enable interrupt for event SEQEND[0]</description>
81286 <description>Read: Disabled</description>
81291 <description>Read: Enabled</description>
81299 <description>Enable</description>
81306 <description>Write '1' to enable interrupt for event SEQEND[1]</description>
81313 <description>Read: Disabled</description>
81318 <description>Read: Enabled</description>
81326 <description>Enable</description>
81333 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
81340 <description>Read: Disabled</description>
81345 <description>Read: Enabled</description>
81353 <description>Enable</description>
81360 <description>Write '1' to enable interrupt for event LOOPSDONE</description>
81367 <description>Read: Disabled</description>
81372 <description>Read: Enabled</description>
81380 <description>Enable</description>
81387 <description>Write '1' to enable interrupt for event RAMUNDERFLOW</description>
81394 <description>Read: Disabled</description>
81399 <description>Read: Enabled</description>
81407 <description>Enable</description>
81414 <description>Write '1' to enable interrupt for event DMASEQ0END</description>
81421 <description>Read: Disabled</description>
81426 <description>Read: Enabled</description>
81434 <description>Enable</description>
81441 <description>Write '1' to enable interrupt for event DMASEQ0READY</description>
81448 <description>Read: Disabled</description>
81453 <description>Read: Enabled</description>
81461 <description>Enable</description>
81468 <description>Write '1' to enable interrupt for event DMASEQ0BUSERROR</description>
81475 <description>Read: Disabled</description>
81480 <description>Read: Enabled</description>
81488 <description>Enable</description>
81495 <description>Write '1' to enable interrupt for event DMASEQ1END</description>
81502 <description>Read: Disabled</description>
81507 <description>Read: Enabled</description>
81515 <description>Enable</description>
81522 <description>Write '1' to enable interrupt for event DMASEQ1READY</description>
81529 <description>Read: Disabled</description>
81534 <description>Read: Enabled</description>
81542 <description>Enable</description>
81549 <description>Write '1' to enable interrupt for event DMASEQ1BUSERROR</description>
81556 <description>Read: Disabled</description>
81561 <description>Read: Enabled</description>
81569 <description>Enable</description>
81576 <description>Write '1' to enable interrupt for event COMPAREMATCH[0]</description>
81583 <description>Read: Disabled</description>
81588 <description>Read: Enabled</description>
81596 <description>Enable</description>
81603 <description>Write '1' to enable interrupt for event COMPAREMATCH[1]</description>
81610 <description>Read: Disabled</description>
81615 <description>Read: Enabled</description>
81623 <description>Enable</description>
81630 <description>Write '1' to enable interrupt for event COMPAREMATCH[2]</description>
81637 <description>Read: Disabled</description>
81642 <description>Read: Enabled</description>
81650 <description>Enable</description>
81657 <description>Write '1' to enable interrupt for event COMPAREMATCH[3]</description>
81664 <description>Read: Disabled</description>
81669 <description>Read: Enabled</description>
81677 <description>Enable</description>
81686 <description>Disable interrupt</description>
81694 <description>Write '1' to disable interrupt for event STOPPED</description>
81701 <description>Read: Disabled</description>
81706 <description>Read: Enabled</description>
81714 <description>Disable</description>
81721 <description>Write '1' to disable interrupt for event SEQSTARTED[0]</description>
81728 <description>Read: Disabled</description>
81733 <description>Read: Enabled</description>
81741 <description>Disable</description>
81748 <description>Write '1' to disable interrupt for event SEQSTARTED[1]</description>
81755 <description>Read: Disabled</description>
81760 <description>Read: Enabled</description>
81768 <description>Disable</description>
81775 <description>Write '1' to disable interrupt for event SEQEND[0]</description>
81782 <description>Read: Disabled</description>
81787 <description>Read: Enabled</description>
81795 <description>Disable</description>
81802 <description>Write '1' to disable interrupt for event SEQEND[1]</description>
81809 <description>Read: Disabled</description>
81814 <description>Read: Enabled</description>
81822 <description>Disable</description>
81829 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
81836 <description>Read: Disabled</description>
81841 <description>Read: Enabled</description>
81849 <description>Disable</description>
81856 <description>Write '1' to disable interrupt for event LOOPSDONE</description>
81863 <description>Read: Disabled</description>
81868 <description>Read: Enabled</description>
81876 <description>Disable</description>
81883 <description>Write '1' to disable interrupt for event RAMUNDERFLOW</description>
81890 <description>Read: Disabled</description>
81895 <description>Read: Enabled</description>
81903 <description>Disable</description>
81910 <description>Write '1' to disable interrupt for event DMASEQ0END</description>
81917 <description>Read: Disabled</description>
81922 <description>Read: Enabled</description>
81930 <description>Disable</description>
81937 <description>Write '1' to disable interrupt for event DMASEQ0READY</description>
81944 <description>Read: Disabled</description>
81949 <description>Read: Enabled</description>
81957 <description>Disable</description>
81964 <description>Write '1' to disable interrupt for event DMASEQ0BUSERROR</description>
81971 <description>Read: Disabled</description>
81976 <description>Read: Enabled</description>
81984 <description>Disable</description>
81991 <description>Write '1' to disable interrupt for event DMASEQ1END</description>
81998 <description>Read: Disabled</description>
82003 <description>Read: Enabled</description>
82011 <description>Disable</description>
82018 <description>Write '1' to disable interrupt for event DMASEQ1READY</description>
82025 <description>Read: Disabled</description>
82030 <description>Read: Enabled</description>
82038 <description>Disable</description>
82045 <description>Write '1' to disable interrupt for event DMASEQ1BUSERROR</description>
82052 <description>Read: Disabled</description>
82057 <description>Read: Enabled</description>
82065 <description>Disable</description>
82072 <description>Write '1' to disable interrupt for event COMPAREMATCH[0]</description>
82079 <description>Read: Disabled</description>
82084 <description>Read: Enabled</description>
82092 <description>Disable</description>
82099 <description>Write '1' to disable interrupt for event COMPAREMATCH[1]</description>
82106 <description>Read: Disabled</description>
82111 <description>Read: Enabled</description>
82119 <description>Disable</description>
82126 <description>Write '1' to disable interrupt for event COMPAREMATCH[2]</description>
82133 <description>Read: Disabled</description>
82138 <description>Read: Enabled</description>
82146 <description>Disable</description>
82153 <description>Write '1' to disable interrupt for event COMPAREMATCH[3]</description>
82160 <description>Read: Disabled</description>
82165 <description>Read: Enabled</description>
82173 <description>Disable</description>
82182 <description>Pending interrupts</description>
82190 <description>Read pending status of interrupt for event STOPPED</description>
82197 <description>Read: Not pending</description>
82202 <description>Read: Pending</description>
82209 <description>Read pending status of interrupt for event SEQSTARTED[0]</description>
82216 <description>Read: Not pending</description>
82221 <description>Read: Pending</description>
82228 <description>Read pending status of interrupt for event SEQSTARTED[1]</description>
82235 <description>Read: Not pending</description>
82240 <description>Read: Pending</description>
82247 <description>Read pending status of interrupt for event SEQEND[0]</description>
82254 <description>Read: Not pending</description>
82259 <description>Read: Pending</description>
82266 <description>Read pending status of interrupt for event SEQEND[1]</description>
82273 <description>Read: Not pending</description>
82278 <description>Read: Pending</description>
82285 <description>Read pending status of interrupt for event PWMPERIODEND</description>
82292 <description>Read: Not pending</description>
82297 <description>Read: Pending</description>
82304 <description>Read pending status of interrupt for event LOOPSDONE</description>
82311 <description>Read: Not pending</description>
82316 <description>Read: Pending</description>
82323 <description>Read pending status of interrupt for event RAMUNDERFLOW</description>
82330 <description>Read: Not pending</description>
82335 <description>Read: Pending</description>
82342 <description>Read pending status of interrupt for event DMASEQ0END</description>
82349 <description>Read: Not pending</description>
82354 <description>Read: Pending</description>
82361 <description>Read pending status of interrupt for event DMASEQ0READY</description>
82368 <description>Read: Not pending</description>
82373 <description>Read: Pending</description>
82380 <description>Read pending status of interrupt for event DMASEQ0BUSERROR</description>
82387 <description>Read: Not pending</description>
82392 <description>Read: Pending</description>
82399 <description>Read pending status of interrupt for event DMASEQ1END</description>
82406 <description>Read: Not pending</description>
82411 <description>Read: Pending</description>
82418 <description>Read pending status of interrupt for event DMASEQ1READY</description>
82425 <description>Read: Not pending</description>
82430 <description>Read: Pending</description>
82437 <description>Read pending status of interrupt for event DMASEQ1BUSERROR</description>
82444 <description>Read: Not pending</description>
82449 <description>Read: Pending</description>
82456 <description>Read pending status of interrupt for event COMPAREMATCH[0]</description>
82463 <description>Read: Not pending</description>
82468 <description>Read: Pending</description>
82475 <description>Read pending status of interrupt for event COMPAREMATCH[1]</description>
82482 <description>Read: Not pending</description>
82487 <description>Read: Pending</description>
82494 <description>Read pending status of interrupt for event COMPAREMATCH[2]</description>
82501 <description>Read: Not pending</description>
82506 <description>Read: Pending</description>
82513 <description>Read pending status of interrupt for event COMPAREMATCH[3]</description>
82520 <description>Read: Not pending</description>
82525 <description>Read: Pending</description>
82534 <description>PWM module enable register</description>
82542 <description>Enable or disable PWM module</description>
82548 <description>Disabled</description>
82553 <description>Enable</description>
82562 <description>Selects operating mode of the wave counter</description>
82570 <description>Selects up mode or up-and-down mode for the counter</description>
82576 <description>Up counter, edge-aligned PWM duty cycle</description>
82581 <description>Up and down counter, center-aligned PWM duty cycle</description>
82590 <description>Value up to which the pulse generator counter counts</description>
82598 …description>Value up to which the pulse generator counter counts. This register is ignored when DE…
82606 <description>Configuration for PWM_CLK</description>
82614 <description>Prescaler of PWM_CLK</description>
82620 <description>Divide by 1 (16 MHz)</description>
82625 <description>Divide by 2 (8 MHz)</description>
82630 <description>Divide by 4 (4 MHz)</description>
82635 <description>Divide by 8 (2 MHz)</description>
82640 <description>Divide by 16 (1 MHz)</description>
82645 <description>Divide by 32 (500 kHz)</description>
82650 <description>Divide by 64 (250 kHz)</description>
82655 <description>Divide by 128 (125 kHz)</description>
82664 <description>Configuration of the decoder</description>
82672 … <description>How a sequence is read from RAM and spread to the compare register</description>
82678 <description>1st half word (16-bit) used in all PWM channels 0..3</description>
82683 … <description>1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3</description>
82688 … <description>1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3</description>
82693 … <description>1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP</description>
82700 <description>Selects source for advancing the active sequence</description>
82706 … <description>SEQ[n].REFRESH is used to determine loading internal compare registers</description>
82711 …<description>NEXTSTEP task causes a new value to be loaded to internal compare registers</descript…
82720 <description>Number of playbacks of a loop</description>
82728 <description>Number of playbacks of pattern cycles</description>
82734 <description>Looping disabled (stop at the end of the sequence)</description>
82743 <description>Configure the output value on the PWM channel during idle</description>
82751 <description>Idle output value for PWM channel [0]</description>
82757 <description>Idle output value for PWM channel [1]</description>
82763 <description>Idle output value for PWM channel [2]</description>
82769 <description>Idle output value for PWM channel [3]</description>
82779 <description>Unspecified</description>
82785 …<description>Description cluster: Number of additional PWM periods between samples loaded into com…
82793 …<description>Number of additional PWM periods between samples loaded into compare register (load e…
82799 <description>Update every PWM period</description>
82808 <description>Description cluster: Time added after the sequence</description>
82816 <description>Time added after the sequence in PWM periods</description>
82825 <description>Unspecified</description>
82833 <description>Description collection: Output pin select for PWM channel n</description>
82841 <description>Pin number</description>
82847 <description>Port number</description>
82853 <description>Connection</description>
82859 <description>Disconnect</description>
82864 <description>Connect</description>
82874 <description>Unspecified</description>
82882 <description>Unspecified</description>
82888 <description>Description cluster: RAM buffer start address</description>
82896 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
82904 … <description>Description cluster: Maximum number of bytes in channel buffer</description>
82912 <description>Maximum number of bytes in channel buffer</description>
82920 …<description>Description cluster: Number of bytes transferred in the last transaction, updated aft…
82928 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
82936 …<description>Description cluster: Number of bytes transferred in the current transaction</descript…
82944 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
82952 …<description>Description cluster: Terminate the transaction if a BUSERROR event is detected.</desc…
82965 <description>Disable</description>
82970 <description>Enable</description>
82979 …<description>Description cluster: Address of transaction that generated the last BUSERROR event.</…
82998 <description>Pulse width modulation unit 1</description>
83009 <description>Pulse width modulation unit 2</description>
83020 <description>Pulse width modulation unit 3</description>
83031 <description>Pulse width modulation unit 4</description>
83042 <description>Pulse width modulation unit 5</description>
83053 <description>Analog to Digital Converter 0</description>
83072 <description>Start the ADC and prepare the result buffer in RAM</description>
83080 <description>Start the ADC and prepare the result buffer in RAM</description>
83086 <description>Trigger task</description>
83095 …description>Take one ADC sample, if scan is enabled all channels are sampled. This task requires t…
83103 …description>Take one ADC sample, if scan is enabled all channels are sampled. This task requires t…
83109 <description>Trigger task</description>
83118 <description>Stop the ADC and terminate any on-going conversion</description>
83126 <description>Stop the ADC and terminate any on-going conversion</description>
83132 <description>Trigger task</description>
83141 <description>Starts offset auto-calibration</description>
83149 <description>Starts offset auto-calibration</description>
83155 <description>Trigger task</description>
83164 <description>Subscribe configuration for task START</description>
83172 <description>DPPI channel that task START will subscribe to</description>
83183 <description>Disable subscription</description>
83188 <description>Enable subscription</description>
83197 <description>Subscribe configuration for task SAMPLE</description>
83205 <description>DPPI channel that task SAMPLE will subscribe to</description>
83216 <description>Disable subscription</description>
83221 <description>Enable subscription</description>
83230 <description>Subscribe configuration for task STOP</description>
83238 <description>DPPI channel that task STOP will subscribe to</description>
83249 <description>Disable subscription</description>
83254 <description>Enable subscription</description>
83263 <description>Subscribe configuration for task CALIBRATEOFFSET</description>
83271 <description>DPPI channel that task CALIBRATEOFFSET will subscribe to</description>
83282 <description>Disable subscription</description>
83287 <description>Enable subscription</description>
83296 <description>The ADC has started</description>
83304 <description>The ADC has started</description>
83310 <description>Event not generated</description>
83315 <description>Event generated</description>
83324 <description>The ADC has filled up the Result buffer</description>
83332 <description>The ADC has filled up the Result buffer</description>
83338 <description>Event not generated</description>
83343 <description>Event generated</description>
83352 …description>A conversion task has been completed. Depending on the mode, multiple conversions migh…
83360 …description>A conversion task has been completed. Depending on the mode, multiple conversions migh…
83366 <description>Event not generated</description>
83371 <description>Event generated</description>
83380 <description>A result is ready to get transferred to RAM.</description>
83388 <description>A result is ready to get transferred to RAM.</description>
83394 <description>Event not generated</description>
83399 <description>Event generated</description>
83408 <description>Calibration is complete</description>
83416 <description>Calibration is complete</description>
83422 <description>Event not generated</description>
83427 <description>Event generated</description>
83436 <description>The ADC has stopped</description>
83444 <description>The ADC has stopped</description>
83450 <description>Event not generated</description>
83455 <description>Event generated</description>
83466 <description>Peripheral events.</description>
83472 … <description>Description cluster: Last results is equal or above CH[n].LIMIT.HIGH</description>
83480 <description>Last results is equal or above CH[n].LIMIT.HIGH</description>
83486 <description>Event not generated</description>
83491 <description>Event generated</description>
83500 … <description>Description cluster: Last results is equal or below CH[n].LIMIT.LOW</description>
83508 <description>Last results is equal or below CH[n].LIMIT.LOW</description>
83514 <description>Event not generated</description>
83519 <description>Event generated</description>
83529 <description>Publish configuration for event STARTED</description>
83537 <description>DPPI channel that event STARTED will publish to</description>
83548 <description>Disable publishing</description>
83553 <description>Enable publishing</description>
83562 <description>Publish configuration for event END</description>
83570 <description>DPPI channel that event END will publish to</description>
83581 <description>Disable publishing</description>
83586 <description>Enable publishing</description>
83595 <description>Publish configuration for event DONE</description>
83603 <description>DPPI channel that event DONE will publish to</description>
83614 <description>Disable publishing</description>
83619 <description>Enable publishing</description>
83628 <description>Publish configuration for event RESULTDONE</description>
83636 <description>DPPI channel that event RESULTDONE will publish to</description>
83647 <description>Disable publishing</description>
83652 <description>Enable publishing</description>
83661 <description>Publish configuration for event CALIBRATEDONE</description>
83669 <description>DPPI channel that event CALIBRATEDONE will publish to</description>
83680 <description>Disable publishing</description>
83685 <description>Enable publishing</description>
83694 <description>Publish configuration for event STOPPED</description>
83702 <description>DPPI channel that event STOPPED will publish to</description>
83713 <description>Disable publishing</description>
83718 <description>Enable publishing</description>
83729 <description>Publish configuration for events</description>
83735 … <description>Description cluster: Publish configuration for event CH[n].LIMITH</description>
83743 <description>DPPI channel that event CH[n].LIMITH will publish to</description>
83754 <description>Disable publishing</description>
83759 <description>Enable publishing</description>
83768 … <description>Description cluster: Publish configuration for event CH[n].LIMITL</description>
83776 <description>DPPI channel that event CH[n].LIMITL will publish to</description>
83787 <description>Disable publishing</description>
83792 <description>Enable publishing</description>
83802 <description>Enable or disable interrupt</description>
83810 <description>Enable or disable interrupt for event STARTED</description>
83816 <description>Disable</description>
83821 <description>Enable</description>
83828 <description>Enable or disable interrupt for event END</description>
83834 <description>Disable</description>
83839 <description>Enable</description>
83846 <description>Enable or disable interrupt for event DONE</description>
83852 <description>Disable</description>
83857 <description>Enable</description>
83864 <description>Enable or disable interrupt for event RESULTDONE</description>
83870 <description>Disable</description>
83875 <description>Enable</description>
83882 <description>Enable or disable interrupt for event CALIBRATEDONE</description>
83888 <description>Disable</description>
83893 <description>Enable</description>
83900 <description>Enable or disable interrupt for event STOPPED</description>
83906 <description>Disable</description>
83911 <description>Enable</description>
83918 <description>Enable or disable interrupt for event CH0LIMITH</description>
83924 <description>Disable</description>
83929 <description>Enable</description>
83936 <description>Enable or disable interrupt for event CH0LIMITL</description>
83942 <description>Disable</description>
83947 <description>Enable</description>
83954 <description>Enable or disable interrupt for event CH1LIMITH</description>
83960 <description>Disable</description>
83965 <description>Enable</description>
83972 <description>Enable or disable interrupt for event CH1LIMITL</description>
83978 <description>Disable</description>
83983 <description>Enable</description>
83990 <description>Enable or disable interrupt for event CH2LIMITH</description>
83996 <description>Disable</description>
84001 <description>Enable</description>
84008 <description>Enable or disable interrupt for event CH2LIMITL</description>
84014 <description>Disable</description>
84019 <description>Enable</description>
84026 <description>Enable or disable interrupt for event CH3LIMITH</description>
84032 <description>Disable</description>
84037 <description>Enable</description>
84044 <description>Enable or disable interrupt for event CH3LIMITL</description>
84050 <description>Disable</description>
84055 <description>Enable</description>
84062 <description>Enable or disable interrupt for event CH4LIMITH</description>
84068 <description>Disable</description>
84073 <description>Enable</description>
84080 <description>Enable or disable interrupt for event CH4LIMITL</description>
84086 <description>Disable</description>
84091 <description>Enable</description>
84098 <description>Enable or disable interrupt for event CH5LIMITH</description>
84104 <description>Disable</description>
84109 <description>Enable</description>
84116 <description>Enable or disable interrupt for event CH5LIMITL</description>
84122 <description>Disable</description>
84127 <description>Enable</description>
84134 <description>Enable or disable interrupt for event CH6LIMITH</description>
84140 <description>Disable</description>
84145 <description>Enable</description>
84152 <description>Enable or disable interrupt for event CH6LIMITL</description>
84158 <description>Disable</description>
84163 <description>Enable</description>
84170 <description>Enable or disable interrupt for event CH7LIMITH</description>
84176 <description>Disable</description>
84181 <description>Enable</description>
84188 <description>Enable or disable interrupt for event CH7LIMITL</description>
84194 <description>Disable</description>
84199 <description>Enable</description>
84208 <description>Enable interrupt</description>
84216 <description>Write '1' to enable interrupt for event STARTED</description>
84223 <description>Read: Disabled</description>
84228 <description>Read: Enabled</description>
84236 <description>Enable</description>
84243 <description>Write '1' to enable interrupt for event END</description>
84250 <description>Read: Disabled</description>
84255 <description>Read: Enabled</description>
84263 <description>Enable</description>
84270 <description>Write '1' to enable interrupt for event DONE</description>
84277 <description>Read: Disabled</description>
84282 <description>Read: Enabled</description>
84290 <description>Enable</description>
84297 <description>Write '1' to enable interrupt for event RESULTDONE</description>
84304 <description>Read: Disabled</description>
84309 <description>Read: Enabled</description>
84317 <description>Enable</description>
84324 <description>Write '1' to enable interrupt for event CALIBRATEDONE</description>
84331 <description>Read: Disabled</description>
84336 <description>Read: Enabled</description>
84344 <description>Enable</description>
84351 <description>Write '1' to enable interrupt for event STOPPED</description>
84358 <description>Read: Disabled</description>
84363 <description>Read: Enabled</description>
84371 <description>Enable</description>
84378 <description>Write '1' to enable interrupt for event CH0LIMITH</description>
84385 <description>Read: Disabled</description>
84390 <description>Read: Enabled</description>
84398 <description>Enable</description>
84405 <description>Write '1' to enable interrupt for event CH0LIMITL</description>
84412 <description>Read: Disabled</description>
84417 <description>Read: Enabled</description>
84425 <description>Enable</description>
84432 <description>Write '1' to enable interrupt for event CH1LIMITH</description>
84439 <description>Read: Disabled</description>
84444 <description>Read: Enabled</description>
84452 <description>Enable</description>
84459 <description>Write '1' to enable interrupt for event CH1LIMITL</description>
84466 <description>Read: Disabled</description>
84471 <description>Read: Enabled</description>
84479 <description>Enable</description>
84486 <description>Write '1' to enable interrupt for event CH2LIMITH</description>
84493 <description>Read: Disabled</description>
84498 <description>Read: Enabled</description>
84506 <description>Enable</description>
84513 <description>Write '1' to enable interrupt for event CH2LIMITL</description>
84520 <description>Read: Disabled</description>
84525 <description>Read: Enabled</description>
84533 <description>Enable</description>
84540 <description>Write '1' to enable interrupt for event CH3LIMITH</description>
84547 <description>Read: Disabled</description>
84552 <description>Read: Enabled</description>
84560 <description>Enable</description>
84567 <description>Write '1' to enable interrupt for event CH3LIMITL</description>
84574 <description>Read: Disabled</description>
84579 <description>Read: Enabled</description>
84587 <description>Enable</description>
84594 <description>Write '1' to enable interrupt for event CH4LIMITH</description>
84601 <description>Read: Disabled</description>
84606 <description>Read: Enabled</description>
84614 <description>Enable</description>
84621 <description>Write '1' to enable interrupt for event CH4LIMITL</description>
84628 <description>Read: Disabled</description>
84633 <description>Read: Enabled</description>
84641 <description>Enable</description>
84648 <description>Write '1' to enable interrupt for event CH5LIMITH</description>
84655 <description>Read: Disabled</description>
84660 <description>Read: Enabled</description>
84668 <description>Enable</description>
84675 <description>Write '1' to enable interrupt for event CH5LIMITL</description>
84682 <description>Read: Disabled</description>
84687 <description>Read: Enabled</description>
84695 <description>Enable</description>
84702 <description>Write '1' to enable interrupt for event CH6LIMITH</description>
84709 <description>Read: Disabled</description>
84714 <description>Read: Enabled</description>
84722 <description>Enable</description>
84729 <description>Write '1' to enable interrupt for event CH6LIMITL</description>
84736 <description>Read: Disabled</description>
84741 <description>Read: Enabled</description>
84749 <description>Enable</description>
84756 <description>Write '1' to enable interrupt for event CH7LIMITH</description>
84763 <description>Read: Disabled</description>
84768 <description>Read: Enabled</description>
84776 <description>Enable</description>
84783 <description>Write '1' to enable interrupt for event CH7LIMITL</description>
84790 <description>Read: Disabled</description>
84795 <description>Read: Enabled</description>
84803 <description>Enable</description>
84812 <description>Disable interrupt</description>
84820 <description>Write '1' to disable interrupt for event STARTED</description>
84827 <description>Read: Disabled</description>
84832 <description>Read: Enabled</description>
84840 <description>Disable</description>
84847 <description>Write '1' to disable interrupt for event END</description>
84854 <description>Read: Disabled</description>
84859 <description>Read: Enabled</description>
84867 <description>Disable</description>
84874 <description>Write '1' to disable interrupt for event DONE</description>
84881 <description>Read: Disabled</description>
84886 <description>Read: Enabled</description>
84894 <description>Disable</description>
84901 <description>Write '1' to disable interrupt for event RESULTDONE</description>
84908 <description>Read: Disabled</description>
84913 <description>Read: Enabled</description>
84921 <description>Disable</description>
84928 <description>Write '1' to disable interrupt for event CALIBRATEDONE</description>
84935 <description>Read: Disabled</description>
84940 <description>Read: Enabled</description>
84948 <description>Disable</description>
84955 <description>Write '1' to disable interrupt for event STOPPED</description>
84962 <description>Read: Disabled</description>
84967 <description>Read: Enabled</description>
84975 <description>Disable</description>
84982 <description>Write '1' to disable interrupt for event CH0LIMITH</description>
84989 <description>Read: Disabled</description>
84994 <description>Read: Enabled</description>
85002 <description>Disable</description>
85009 <description>Write '1' to disable interrupt for event CH0LIMITL</description>
85016 <description>Read: Disabled</description>
85021 <description>Read: Enabled</description>
85029 <description>Disable</description>
85036 <description>Write '1' to disable interrupt for event CH1LIMITH</description>
85043 <description>Read: Disabled</description>
85048 <description>Read: Enabled</description>
85056 <description>Disable</description>
85063 <description>Write '1' to disable interrupt for event CH1LIMITL</description>
85070 <description>Read: Disabled</description>
85075 <description>Read: Enabled</description>
85083 <description>Disable</description>
85090 <description>Write '1' to disable interrupt for event CH2LIMITH</description>
85097 <description>Read: Disabled</description>
85102 <description>Read: Enabled</description>
85110 <description>Disable</description>
85117 <description>Write '1' to disable interrupt for event CH2LIMITL</description>
85124 <description>Read: Disabled</description>
85129 <description>Read: Enabled</description>
85137 <description>Disable</description>
85144 <description>Write '1' to disable interrupt for event CH3LIMITH</description>
85151 <description>Read: Disabled</description>
85156 <description>Read: Enabled</description>
85164 <description>Disable</description>
85171 <description>Write '1' to disable interrupt for event CH3LIMITL</description>
85178 <description>Read: Disabled</description>
85183 <description>Read: Enabled</description>
85191 <description>Disable</description>
85198 <description>Write '1' to disable interrupt for event CH4LIMITH</description>
85205 <description>Read: Disabled</description>
85210 <description>Read: Enabled</description>
85218 <description>Disable</description>
85225 <description>Write '1' to disable interrupt for event CH4LIMITL</description>
85232 <description>Read: Disabled</description>
85237 <description>Read: Enabled</description>
85245 <description>Disable</description>
85252 <description>Write '1' to disable interrupt for event CH5LIMITH</description>
85259 <description>Read: Disabled</description>
85264 <description>Read: Enabled</description>
85272 <description>Disable</description>
85279 <description>Write '1' to disable interrupt for event CH5LIMITL</description>
85286 <description>Read: Disabled</description>
85291 <description>Read: Enabled</description>
85299 <description>Disable</description>
85306 <description>Write '1' to disable interrupt for event CH6LIMITH</description>
85313 <description>Read: Disabled</description>
85318 <description>Read: Enabled</description>
85326 <description>Disable</description>
85333 <description>Write '1' to disable interrupt for event CH6LIMITL</description>
85340 <description>Read: Disabled</description>
85345 <description>Read: Enabled</description>
85353 <description>Disable</description>
85360 <description>Write '1' to disable interrupt for event CH7LIMITH</description>
85367 <description>Read: Disabled</description>
85372 <description>Read: Enabled</description>
85380 <description>Disable</description>
85387 <description>Write '1' to disable interrupt for event CH7LIMITL</description>
85394 <description>Read: Disabled</description>
85399 <description>Read: Enabled</description>
85407 <description>Disable</description>
85416 <description>Status</description>
85424 <description>Status</description>
85430 <description>ADC is ready. No on-going conversion.</description>
85435 <description>ADC is busy. Single conversion in progress.</description>
85444 <description>Unspecified</description>
85452 <description>Description collection: Linearity calibration coefficient</description>
85460 <description>value</description>
85469 <description>Enable or disable ADC</description>
85477 <description>Enable or disable ADC</description>
85483 <description>Disable ADC</description>
85488 <description>Enable ADC</description>
85499 <description>Unspecified</description>
85505 <description>Description cluster: Input positive pin selection for CH[n]</description>
85513 <description>GPIO pin selection.</description>
85519 <description>GPIO port selection</description>
85525 …<description>Internal input selection for analog positive input when CH[n].PSELP.CONNECT = Interna…
85531 <description>Connected to the internal 0.9V analog supply rail</description>
85536 <description>Connected to the internal 0.9V digital supply rail</description>
85541 <description>Connected to VDD</description>
85548 <description>Connection</description>
85554 <description>Not connected</description>
85559 <description>Select analog input</description>
85564 <description>Selects internal inputs.</description>
85573 <description>Description cluster: Input negative pin selection for CH[n]</description>
85581 <description>GPIO pin selection.</description>
85587 <description>GPIO Port selection</description>
85593 <description>Connection</description>
85599 <description>Not connected</description>
85604 <description>Select analog input</description>
85613 <description>Description cluster: Input configuration for CH[n]</description>
85621 <description>Gain control</description>
85627 <description>2</description>
85632 <description>1</description>
85637 <description>2/3</description>
85642 <description>2/4</description>
85647 <description>2/5</description>
85652 <description>2/6</description>
85657 <description>2/7</description>
85662 <description>2/8</description>
85669 <description>Enable burst mode</description>
85675 <description>Burst mode is disabled (normal operation)</description>
85680 …<description>Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, …
85687 <description>Reference control</description>
85693 <description>Internal reference (0.9 V)</description>
85698 <description>External reference given at PADC_EXT_REF_1V2</description>
85705 <description>Enable differential mode</description>
85711 …<description>Single ended, PSELN will be ignored, negative input to ADC shorted to GND</descriptio…
85716 <description>Differential</description>
85723 …<description>Acquisition time, the time the ADC uses to sample the input voltage. Resulting acquis…
85729 … <description>Conversion time. Resulting conversion time is ((TCONV+1) x 250 ns)</description>
85737 … <description>Description cluster: High/low limits for event monitoring a channel</description>
85745 <description>Low level limit</description>
85751 <description>High level limit</description>
85760 <description>Resolution configuration</description>
85768 <description>Set the resolution</description>
85774 <description>8 bit</description>
85779 <description>10 bit</description>
85784 <description>12 bit</description>
85789 <description>14 bit</description>
85798 …description>Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTIO…
85806 <description>Oversample control</description>
85812 <description>Bypass oversampling</description>
85817 <description>Oversample 2x</description>
85822 <description>Oversample 4x</description>
85827 <description>Oversample 8x</description>
85832 <description>Oversample 16x</description>
85837 <description>Oversample 32x</description>
85842 <description>Oversample 64x</description>
85847 <description>Oversample 128x</description>
85852 <description>Oversample 256x</description>
85861 <description>Controls normal or continuous sample rate</description>
85869 <description>Capture and compare value. Sample rate is 16 MHz/CC</description>
85875 <description>Select mode for sample rate control</description>
85881 <description>Rate is controlled from SAMPLE task</description>
85886 … <description>Rate is controlled from local timer (use CC to control the rate)</description>
85895 <description>RESULT EasyDMA channel</description>
85901 <description>Data pointer</description>
85909 <description>Data pointer</description>
85917 <description>Maximum number of buffer bytes to transfer</description>
85925 <description>Maximum number of buffer bytes to transfer</description>
85933 …<description>Number of buffer bytes transferred since last START, updated after the END or STOPPED…
85941 …<description>Number of buffer bytes transferred since last START, updated after the END or STOPPED…
85949 …<description>Number of buffer bytes transferred since last START, continuously updated</descriptio…
85957 …<description>Number of buffer bytes transferred since last START, continuously updated.</descripti…
85966 <description>Enable noise shaping</description>
85974 <description>Enable noise shaping</description>
85980 … <description>Disable noiseshaping. Oversampling based on accumulate and average.</description>
85985 …description>Noiseshaping and decimating. Larger passband. Provides a 50kS/s cut off frequency, 8x …
85990 …description>Noiseshaping and decimating. Smaller passband. Recommended resolution setting is 14 bi…
86001 <description>Analog to Digital Converter 1</description>
86012 <description>NFC-A compatible radio NFC-A compatible radio 0</description>
86031 …<description>Activate NFCT peripheral for incoming and outgoing frames, change state to activated<…
86039 …<description>Activate NFCT peripheral for incoming and outgoing frames, change state to activated<…
86045 <description>Trigger task</description>
86054 <description>Disable NFCT peripheral</description>
86062 <description>Disable NFCT peripheral</description>
86068 <description>Trigger task</description>
86077 <description>Enable NFC sense field mode, change state to sense mode</description>
86085 <description>Enable NFC sense field mode, change state to sense mode</description>
86091 <description>Trigger task</description>
86100 … <description>Start transmission of an outgoing frame, change state to transmit</description>
86108 … <description>Start transmission of an outgoing frame, change state to transmit</description>
86114 <description>Trigger task</description>
86123 <description>Stops an issued transmission of a frame</description>
86131 <description>Stops an issued transmission of a frame</description>
86137 <description>Trigger task</description>
86146 <description>Initializes the EasyDMA for receive.</description>
86154 <description>Initializes the EasyDMA for receive.</description>
86160 <description>Trigger task</description>
86169 <description>Force state machine to IDLE state</description>
86177 <description>Force state machine to IDLE state</description>
86183 <description>Trigger task</description>
86192 <description>Force state machine to SLEEP_A state</description>
86200 <description>Force state machine to SLEEP_A state</description>
86206 <description>Trigger task</description>
86215 <description>Subscribe configuration for task ACTIVATE</description>
86223 <description>DPPI channel that task ACTIVATE will subscribe to</description>
86234 <description>Disable subscription</description>
86239 <description>Enable subscription</description>
86248 <description>Subscribe configuration for task DISABLE</description>
86256 <description>DPPI channel that task DISABLE will subscribe to</description>
86267 <description>Disable subscription</description>
86272 <description>Enable subscription</description>
86281 <description>Subscribe configuration for task SENSE</description>
86289 <description>DPPI channel that task SENSE will subscribe to</description>
86300 <description>Disable subscription</description>
86305 <description>Enable subscription</description>
86314 <description>Subscribe configuration for task STARTTX</description>
86322 <description>DPPI channel that task STARTTX will subscribe to</description>
86333 <description>Disable subscription</description>
86338 <description>Enable subscription</description>
86347 <description>Subscribe configuration for task STOPTX</description>
86355 <description>DPPI channel that task STOPTX will subscribe to</description>
86366 <description>Disable subscription</description>
86371 <description>Enable subscription</description>
86380 <description>Subscribe configuration for task ENABLERXDATA</description>
86388 <description>DPPI channel that task ENABLERXDATA will subscribe to</description>
86399 <description>Disable subscription</description>
86404 <description>Enable subscription</description>
86413 <description>Subscribe configuration for task GOIDLE</description>
86421 <description>DPPI channel that task GOIDLE will subscribe to</description>
86432 <description>Disable subscription</description>
86437 <description>Enable subscription</description>
86446 <description>Subscribe configuration for task GOSLEEP</description>
86454 <description>DPPI channel that task GOSLEEP will subscribe to</description>
86465 <description>Disable subscription</description>
86470 <description>Enable subscription</description>
86479 <description>The NFCT peripheral is ready to receive and send frames</description>
86487 <description>The NFCT peripheral is ready to receive and send frames</description>
86493 <description>Event not generated</description>
86498 <description>Event generated</description>
86507 <description>Remote NFC field detected</description>
86515 <description>Remote NFC field detected</description>
86521 <description>Event not generated</description>
86526 <description>Event generated</description>
86535 <description>Remote NFC field lost</description>
86543 <description>Remote NFC field lost</description>
86549 <description>Event not generated</description>
86554 <description>Event generated</description>
86563 <description>Marks the start of the first symbol of a transmitted frame</description>
86571 <description>Marks the start of the first symbol of a transmitted frame</description>
86577 <description>Event not generated</description>
86582 <description>Event generated</description>
86591 <description>Marks the end of the last transmitted on-air symbol of a frame</description>
86599 … <description>Marks the end of the last transmitted on-air symbol of a frame</description>
86605 <description>Event not generated</description>
86610 <description>Event generated</description>
86619 <description>Marks the end of the first symbol of a received frame</description>
86627 <description>Marks the end of the first symbol of a received frame</description>
86633 <description>Event not generated</description>
86638 <description>Event generated</description>
86647 …<description>Received data has been checked (CRC, parity) and transferred to RAM, and EasyDMA has …
86655 …<description>Received data has been checked (CRC, parity) and transferred to RAM, and EasyDMA has …
86661 <description>Event not generated</description>
86666 <description>Event generated</description>
86675 …<description>NFC error reported. The ERRORSTATUS register contains details on the source of the er…
86683 …<description>NFC error reported. The ERRORSTATUS register contains details on the source of the er…
86689 <description>Event not generated</description>
86694 <description>Event generated</description>
86703 …<description>NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the sour…
86711 …<description>NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the sour…
86717 <description>Event not generated</description>
86722 <description>Event generated</description>
86731 … <description>RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full.</description>
86739 … <description>RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full.</description>
86745 <description>Event not generated</description>
86750 <description>Event generated</description>
86759 …<description>Transmission of data in RAM has ended, and EasyDMA has ended accessing the TX buffer<…
86767 …<description>Transmission of data in RAM has ended, and EasyDMA has ended accessing the TX buffer<…
86773 <description>Event not generated</description>
86778 <description>Event generated</description>
86787 <description>Auto collision resolution process has started</description>
86795 <description>Auto collision resolution process has started</description>
86801 <description>Event not generated</description>
86806 <description>Event generated</description>
86815 <description>NFC auto collision resolution error reported.</description>
86823 <description>NFC auto collision resolution error reported.</description>
86829 <description>Event not generated</description>
86834 <description>Event generated</description>
86843 <description>NFC auto collision resolution successfully completed</description>
86851 <description>NFC auto collision resolution successfully completed</description>
86857 <description>Event not generated</description>
86862 <description>Event generated</description>
86871 <description>EasyDMA is ready to receive or send frames.</description>
86879 <description>EasyDMA is ready to receive or send frames.</description>
86885 <description>Event not generated</description>
86890 <description>Event generated</description>
86899 <description>Publish configuration for event READY</description>
86907 <description>DPPI channel that event READY will publish to</description>
86918 <description>Disable publishing</description>
86923 <description>Enable publishing</description>
86932 <description>Publish configuration for event FIELDDETECTED</description>
86940 <description>DPPI channel that event FIELDDETECTED will publish to</description>
86951 <description>Disable publishing</description>
86956 <description>Enable publishing</description>
86965 <description>Publish configuration for event FIELDLOST</description>
86973 <description>DPPI channel that event FIELDLOST will publish to</description>
86984 <description>Disable publishing</description>
86989 <description>Enable publishing</description>
86998 <description>Publish configuration for event TXFRAMESTART</description>
87006 <description>DPPI channel that event TXFRAMESTART will publish to</description>
87017 <description>Disable publishing</description>
87022 <description>Enable publishing</description>
87031 <description>Publish configuration for event TXFRAMEEND</description>
87039 <description>DPPI channel that event TXFRAMEEND will publish to</description>
87050 <description>Disable publishing</description>
87055 <description>Enable publishing</description>
87064 <description>Publish configuration for event RXFRAMESTART</description>
87072 <description>DPPI channel that event RXFRAMESTART will publish to</description>
87083 <description>Disable publishing</description>
87088 <description>Enable publishing</description>
87097 <description>Publish configuration for event RXFRAMEEND</description>
87105 <description>DPPI channel that event RXFRAMEEND will publish to</description>
87116 <description>Disable publishing</description>
87121 <description>Enable publishing</description>
87130 <description>Publish configuration for event ERROR</description>
87138 <description>DPPI channel that event ERROR will publish to</description>
87149 <description>Disable publishing</description>
87154 <description>Enable publishing</description>
87163 <description>Publish configuration for event RXERROR</description>
87171 <description>DPPI channel that event RXERROR will publish to</description>
87182 <description>Disable publishing</description>
87187 <description>Enable publishing</description>
87196 <description>Publish configuration for event ENDRX</description>
87204 <description>DPPI channel that event ENDRX will publish to</description>
87215 <description>Disable publishing</description>
87220 <description>Enable publishing</description>
87229 <description>Publish configuration for event ENDTX</description>
87237 <description>DPPI channel that event ENDTX will publish to</description>
87248 <description>Disable publishing</description>
87253 <description>Enable publishing</description>
87262 <description>Publish configuration for event AUTOCOLRESSTARTED</description>
87270 <description>DPPI channel that event AUTOCOLRESSTARTED will publish to</description>
87281 <description>Disable publishing</description>
87286 <description>Enable publishing</description>
87295 <description>Publish configuration for event COLLISION</description>
87303 <description>DPPI channel that event COLLISION will publish to</description>
87314 <description>Disable publishing</description>
87319 <description>Enable publishing</description>
87328 <description>Publish configuration for event SELECTED</description>
87336 <description>DPPI channel that event SELECTED will publish to</description>
87347 <description>Disable publishing</description>
87352 <description>Enable publishing</description>
87361 <description>Publish configuration for event STARTED</description>
87369 <description>DPPI channel that event STARTED will publish to</description>
87380 <description>Disable publishing</description>
87385 <description>Enable publishing</description>
87394 <description>Shortcuts between local events and tasks</description>
87402 <description>Shortcut between event FIELDDETECTED and task ACTIVATE</description>
87408 <description>Disable shortcut</description>
87413 <description>Enable shortcut</description>
87420 <description>Shortcut between event FIELDLOST and task SENSE</description>
87426 <description>Disable shortcut</description>
87431 <description>Enable shortcut</description>
87438 <description>Shortcut between event TXFRAMEEND and task ENABLERXDATA</description>
87444 <description>Disable shortcut</description>
87449 <description>Enable shortcut</description>
87458 <description>Enable or disable interrupt</description>
87466 <description>Enable or disable interrupt for event READY</description>
87472 <description>Disable</description>
87477 <description>Enable</description>
87484 <description>Enable or disable interrupt for event FIELDDETECTED</description>
87490 <description>Disable</description>
87495 <description>Enable</description>
87502 <description>Enable or disable interrupt for event FIELDLOST</description>
87508 <description>Disable</description>
87513 <description>Enable</description>
87520 <description>Enable or disable interrupt for event TXFRAMESTART</description>
87526 <description>Disable</description>
87531 <description>Enable</description>
87538 <description>Enable or disable interrupt for event TXFRAMEEND</description>
87544 <description>Disable</description>
87549 <description>Enable</description>
87556 <description>Enable or disable interrupt for event RXFRAMESTART</description>
87562 <description>Disable</description>
87567 <description>Enable</description>
87574 <description>Enable or disable interrupt for event RXFRAMEEND</description>
87580 <description>Disable</description>
87585 <description>Enable</description>
87592 <description>Enable or disable interrupt for event ERROR</description>
87598 <description>Disable</description>
87603 <description>Enable</description>
87610 <description>Enable or disable interrupt for event RXERROR</description>
87616 <description>Disable</description>
87621 <description>Enable</description>
87628 <description>Enable or disable interrupt for event ENDRX</description>
87634 <description>Disable</description>
87639 <description>Enable</description>
87646 <description>Enable or disable interrupt for event ENDTX</description>
87652 <description>Disable</description>
87657 <description>Enable</description>
87664 <description>Enable or disable interrupt for event AUTOCOLRESSTARTED</description>
87670 <description>Disable</description>
87675 <description>Enable</description>
87682 <description>Enable or disable interrupt for event COLLISION</description>
87688 <description>Disable</description>
87693 <description>Enable</description>
87700 <description>Enable or disable interrupt for event SELECTED</description>
87706 <description>Disable</description>
87711 <description>Enable</description>
87718 <description>Enable or disable interrupt for event STARTED</description>
87724 <description>Disable</description>
87729 <description>Enable</description>
87738 <description>Enable interrupt</description>
87746 <description>Write '1' to enable interrupt for event READY</description>
87753 <description>Read: Disabled</description>
87758 <description>Read: Enabled</description>
87766 <description>Enable</description>
87773 <description>Write '1' to enable interrupt for event FIELDDETECTED</description>
87780 <description>Read: Disabled</description>
87785 <description>Read: Enabled</description>
87793 <description>Enable</description>
87800 <description>Write '1' to enable interrupt for event FIELDLOST</description>
87807 <description>Read: Disabled</description>
87812 <description>Read: Enabled</description>
87820 <description>Enable</description>
87827 <description>Write '1' to enable interrupt for event TXFRAMESTART</description>
87834 <description>Read: Disabled</description>
87839 <description>Read: Enabled</description>
87847 <description>Enable</description>
87854 <description>Write '1' to enable interrupt for event TXFRAMEEND</description>
87861 <description>Read: Disabled</description>
87866 <description>Read: Enabled</description>
87874 <description>Enable</description>
87881 <description>Write '1' to enable interrupt for event RXFRAMESTART</description>
87888 <description>Read: Disabled</description>
87893 <description>Read: Enabled</description>
87901 <description>Enable</description>
87908 <description>Write '1' to enable interrupt for event RXFRAMEEND</description>
87915 <description>Read: Disabled</description>
87920 <description>Read: Enabled</description>
87928 <description>Enable</description>
87935 <description>Write '1' to enable interrupt for event ERROR</description>
87942 <description>Read: Disabled</description>
87947 <description>Read: Enabled</description>
87955 <description>Enable</description>
87962 <description>Write '1' to enable interrupt for event RXERROR</description>
87969 <description>Read: Disabled</description>
87974 <description>Read: Enabled</description>
87982 <description>Enable</description>
87989 <description>Write '1' to enable interrupt for event ENDRX</description>
87996 <description>Read: Disabled</description>
88001 <description>Read: Enabled</description>
88009 <description>Enable</description>
88016 <description>Write '1' to enable interrupt for event ENDTX</description>
88023 <description>Read: Disabled</description>
88028 <description>Read: Enabled</description>
88036 <description>Enable</description>
88043 <description>Write '1' to enable interrupt for event AUTOCOLRESSTARTED</description>
88050 <description>Read: Disabled</description>
88055 <description>Read: Enabled</description>
88063 <description>Enable</description>
88070 <description>Write '1' to enable interrupt for event COLLISION</description>
88077 <description>Read: Disabled</description>
88082 <description>Read: Enabled</description>
88090 <description>Enable</description>
88097 <description>Write '1' to enable interrupt for event SELECTED</description>
88104 <description>Read: Disabled</description>
88109 <description>Read: Enabled</description>
88117 <description>Enable</description>
88124 <description>Write '1' to enable interrupt for event STARTED</description>
88131 <description>Read: Disabled</description>
88136 <description>Read: Enabled</description>
88144 <description>Enable</description>
88153 <description>Disable interrupt</description>
88161 <description>Write '1' to disable interrupt for event READY</description>
88168 <description>Read: Disabled</description>
88173 <description>Read: Enabled</description>
88181 <description>Disable</description>
88188 <description>Write '1' to disable interrupt for event FIELDDETECTED</description>
88195 <description>Read: Disabled</description>
88200 <description>Read: Enabled</description>
88208 <description>Disable</description>
88215 <description>Write '1' to disable interrupt for event FIELDLOST</description>
88222 <description>Read: Disabled</description>
88227 <description>Read: Enabled</description>
88235 <description>Disable</description>
88242 <description>Write '1' to disable interrupt for event TXFRAMESTART</description>
88249 <description>Read: Disabled</description>
88254 <description>Read: Enabled</description>
88262 <description>Disable</description>
88269 <description>Write '1' to disable interrupt for event TXFRAMEEND</description>
88276 <description>Read: Disabled</description>
88281 <description>Read: Enabled</description>
88289 <description>Disable</description>
88296 <description>Write '1' to disable interrupt for event RXFRAMESTART</description>
88303 <description>Read: Disabled</description>
88308 <description>Read: Enabled</description>
88316 <description>Disable</description>
88323 <description>Write '1' to disable interrupt for event RXFRAMEEND</description>
88330 <description>Read: Disabled</description>
88335 <description>Read: Enabled</description>
88343 <description>Disable</description>
88350 <description>Write '1' to disable interrupt for event ERROR</description>
88357 <description>Read: Disabled</description>
88362 <description>Read: Enabled</description>
88370 <description>Disable</description>
88377 <description>Write '1' to disable interrupt for event RXERROR</description>
88384 <description>Read: Disabled</description>
88389 <description>Read: Enabled</description>
88397 <description>Disable</description>
88404 <description>Write '1' to disable interrupt for event ENDRX</description>
88411 <description>Read: Disabled</description>
88416 <description>Read: Enabled</description>
88424 <description>Disable</description>
88431 <description>Write '1' to disable interrupt for event ENDTX</description>
88438 <description>Read: Disabled</description>
88443 <description>Read: Enabled</description>
88451 <description>Disable</description>
88458 <description>Write '1' to disable interrupt for event AUTOCOLRESSTARTED</description>
88465 <description>Read: Disabled</description>
88470 <description>Read: Enabled</description>
88478 <description>Disable</description>
88485 <description>Write '1' to disable interrupt for event COLLISION</description>
88492 <description>Read: Disabled</description>
88497 <description>Read: Enabled</description>
88505 <description>Disable</description>
88512 <description>Write '1' to disable interrupt for event SELECTED</description>
88519 <description>Read: Disabled</description>
88524 <description>Read: Enabled</description>
88532 <description>Disable</description>
88539 <description>Write '1' to disable interrupt for event STARTED</description>
88546 <description>Read: Disabled</description>
88551 <description>Read: Enabled</description>
88559 <description>Disable</description>
88568 <description>NFC Error Status register</description>
88577 …<description>No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX</descrip…
88585 <description>Unspecified</description>
88591 <description>Result of last incoming frame</description>
88600 <description>No valid end of frame (EoF) detected</description>
88606 <description>Valid CRC detected</description>
88611 <description>CRC received does not match local check</description>
88618 <description>Parity status of received frame</description>
88624 <description>Frame received with parity OK</description>
88629 <description>Frame received with parity error</description>
88636 <description>Overrun detected</description>
88642 <description>No overrun detected</description>
88647 <description>Overrun error</description>
88657 <description>Current operating state of NFC tag</description>
88665 <description>NfcTag state</description>
88671 <description>Disabled or sense</description>
88676 <description>RampUp</description>
88681 <description>Idle</description>
88686 <description>Receive</description>
88691 <description>FrameDelay</description>
88696 <description>Transmit</description>
88705 <description>Sleep state during automatic collision resolution</description>
88713 … <description>Reflects the sleep state during automatic collision resolution. Set to IDLE
88715 GOSLEEP task.</description>
88721 <description>State is IDLE.</description>
88726 <description>State is SLEEP_A.</description>
88735 <description>Indicates the presence or not of a valid field</description>
88743 …<description>Indicates if a valid field is present. Available only in the activated state.</descri…
88749 <description>No valid field detected</description>
88754 <description>Valid field detected</description>
88761 <description>Indicates if the low level has locked to the field</description>
88767 <description>Not locked to field</description>
88772 <description>Locked to field</description>
88781 <description>Minimum frame delay</description>
88789 <description>Minimum frame delay in number of 13.56 MHz clock cycles</description>
88797 <description>Maximum frame delay</description>
88805 <description>Maximum frame delay in number of 13.56 MHz clock cycles</description>
88813 <description>Configuration register for the Frame Delay Timer</description>
88821 <description>Configuration register for the Frame Delay Timer</description>
88827 …<description>Transmission is independent of frame timer and will start when the STARTTX task is tr…
88832 … <description>Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX</description>
88837 <description>Frame is transmitted exactly at FRAMEDELAYMAX</description>
88842 …<description>Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX</descripti…
88851 <description>Packet pointer for TXD and RXD data storage in Data RAM</description>
88859 …<description>Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte-align…
88867 … <description>Size of the RAM buffer allocated to TXD and RXD data storage each</description>
88875 … <description>Size of the RAM buffer allocated to TXD and RXD data storage each</description>
88883 <description>Unspecified</description>
88889 <description>Configuration of outgoing frames</description>
88897 <description>Indicates if parity is added to the frame</description>
88903 <description>Parity is not added to TX frames</description>
88908 <description>Parity is added to TX frames</description>
88915 <description>Discarding unused bits at start or end of a frame</description>
88921 <description>Unused bits are discarded at end of frame (EoF)</description>
88926 <description>Unused bits are discarded at start of frame (SoF)</description>
88933 <description>Adding SoF or not in TX frames</description>
88939 <description>SoF symbol not added</description>
88944 <description>SoF symbol added</description>
88951 <description>CRC mode for outgoing frames</description>
88957 <description>CRC is not added to the frame</description>
88962 …<description>16 bit CRC added to the frame based on all the data read from RAM that is used in the…
88971 <description>Size of outgoing frame</description>
88979 …<description>Number of bits in the last or first byte read from RAM that shall be included in the …
88985 …<description>Number of complete bytes that shall be included in the frame, excluding CRC, parity, …
88994 <description>Unspecified</description>
89000 <description>Configuration of incoming frames</description>
89008 <description>Indicates if parity expected in RX frame</description>
89014 <description>Parity is not expected in RX frames</description>
89019 <description>Parity is expected in RX frames</description>
89026 <description>SoF expected or not in RX frames</description>
89032 <description>SoF symbol is not expected in RX frames</description>
89037 <description>SoF symbol is expected in RX frames</description>
89044 <description>CRC mode for incoming frames</description>
89050 <description>CRC is not expected in RX frames</description>
89055 … <description>Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated</description>
89064 <description>Size of last incoming frame</description>
89072 …<description>Number of bits in the last byte in the frame, if less than 8 (including CRC, but excl…
89078 …<description>Number of complete bytes received in the frame (including CRC, but excluding parity a…
89087 …<description>Enables the modulation output to a GPIO pin which can be connected to a second extern…
89095 <description>Configuration of modulation control.</description>
89101 <description>Invalid, defaults to same behaviour as for Internal</description>
89106 <description>Use internal modulator only</description>
89111 <description>Output digital modulation signal to a GPIO pin.</description>
89116 …<description>Use internal modulator and output digital modulation signal to a GPIO pin.</descripti…
89125 <description>Pin select for Modulation control</description>
89133 <description>Pin number</description>
89139 <description>Port number</description>
89145 <description>Connection</description>
89151 <description>Disconnect</description>
89156 <description>Connect</description>
89165 <description>Configure EasyDMA mode</description>
89173 <description>Enable low-power operation, or use low-latency</description>
89179 <description>Low-latency operation</description>
89184 <description>Low-power operation</description>
89189 <description>Full Low-power operation</description>
89198 <description>Unspecified</description>
89204 <description>Last NFCID1 part (4, 7 or 10 bytes ID)</description>
89212 <description>NFCID1 byte Z (very last byte sent)</description>
89218 <description>NFCID1 byte Y</description>
89224 <description>NFCID1 byte X</description>
89230 <description>NFCID1 byte W</description>
89238 <description>Second last NFCID1 part (7 or 10 bytes ID)</description>
89246 <description>NFCID1 byte V</description>
89252 <description>NFCID1 byte U</description>
89258 <description>NFCID1 byte T</description>
89266 <description>Third last NFCID1 part (10 bytes ID)</description>
89274 <description>NFCID1 byte S</description>
89280 <description>NFCID1 byte R</description>
89286 <description>NFCID1 byte Q</description>
89295 …<description>Controls the auto collision resolution function. This setting must be done before the…
89303 <description>Enables/disables auto collision resolution</description>
89309 <description>Auto collision resolution enabled</description>
89314 <description>Auto collision resolution disabled</description>
89323 <description>NFC-A SENS_RES auto-response settings</description>
89331 …description>Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum,…
89337 <description>SDD pattern 00000</description>
89342 <description>SDD pattern 00001</description>
89347 <description>SDD pattern 00010</description>
89352 <description>SDD pattern 00100</description>
89357 <description>SDD pattern 01000</description>
89362 <description>SDD pattern 10000</description>
89369 <description>Reserved for future use. Shall be 0.</description>
89375 …<description>NFCID1 size. This value is used by the auto collision resolution engine.</description>
89381 <description>NFCID1 size: single (4 bytes)</description>
89386 <description>NFCID1 size: double (7 bytes)</description>
89391 <description>NFCID1 size: triple (10 bytes)</description>
89398 …description>Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in t…
89404 <description>Reserved for future use. Shall be 0.</description>
89412 <description>NFC-A SEL_RES auto-response settings</description>
89420 <description>Reserved for future use. Shall be 0.</description>
89426 …description>Cascade as defined by the b3 of SEL_RES response in the NFC Forum, NFC Digital Protoco…
89432 <description>Reserved for future use. Shall be 0.</description>
89438 …<description>Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum, NFC Digital Pr…
89444 <description>Reserved for future use. Shall be 0.</description>
89452 <description>NFC pad configuration</description>
89460 <description>Enable NFC pads</description>
89466 <description>NFC pads are used as GPIO pins</description>
89471 <description>The NFC pads are configured as NFC antenna pins</description>
89482 <description>NFC-A compatible radio NFC-A compatible radio 1</description>
89493 <description>Temperature Sensor 0</description>
89512 <description>Start temperature measurement</description>
89520 <description>Start temperature measurement</description>
89526 <description>Trigger task</description>
89535 <description>Stop temperature measurement</description>
89543 <description>Stop temperature measurement</description>
89549 <description>Trigger task</description>
89558 <description>Subscribe configuration for task START</description>
89566 <description>DPPI channel that task START will subscribe to</description>
89577 <description>Disable subscription</description>
89582 <description>Enable subscription</description>
89591 <description>Subscribe configuration for task STOP</description>
89599 <description>DPPI channel that task STOP will subscribe to</description>
89610 <description>Disable subscription</description>
89615 <description>Enable subscription</description>
89624 <description>Temperature measurement complete, data ready</description>
89632 <description>Temperature measurement complete, data ready</description>
89638 <description>Event not generated</description>
89643 <description>Event generated</description>
89652 <description>Publish configuration for event DATARDY</description>
89660 <description>DPPI channel that event DATARDY will publish to</description>
89671 <description>Disable publishing</description>
89676 <description>Enable publishing</description>
89685 <description>Enable interrupt</description>
89693 <description>Write '1' to enable interrupt for event DATARDY</description>
89700 <description>Read: Disabled</description>
89705 <description>Read: Enabled</description>
89713 <description>Enable</description>
89722 <description>Disable interrupt</description>
89730 <description>Write '1' to disable interrupt for event DATARDY</description>
89737 <description>Read: Disabled</description>
89742 <description>Read: Enabled</description>
89750 <description>Disable</description>
89759 <description>Temperature in degC (0.25deg steps)</description>
89768 <description>Temperature in degC (0.25deg steps)</description>
89776 <description>Slope of 1st piece wise linear function</description>
89784 <description>Slope of 1st piece wise linear function</description>
89792 <description>Slope of 2nd piece wise linear function</description>
89800 <description>Slope of 2nd piece wise linear function</description>
89808 <description>Slope of 3rd piece wise linear function</description>
89816 <description>Slope of 3rd piece wise linear function</description>
89824 <description>Slope of 4th piece wise linear function</description>
89832 <description>Slope of 4th piece wise linear function</description>
89840 <description>Slope of 5th piece wise linear function</description>
89848 <description>Slope of 5th piece wise linear function</description>
89856 <description>Slope of 6th piece wise linear function</description>
89864 <description>Slope of 6th piece wise linear function</description>
89872 <description>Slope of 7th piece wise linear function</description>
89880 <description>Slope of 7th piece wise linear function</description>
89888 <description>y-intercept of 1st piece wise linear function</description>
89896 <description>y-intercept of 1st piece wise linear function</description>
89904 <description>y-intercept of 2nd piece wise linear function</description>
89912 <description>y-intercept of 2nd piece wise linear function</description>
89920 <description>y-intercept of 3rd piece wise linear function</description>
89928 <description>y-intercept of 3rd piece wise linear function</description>
89936 <description>y-intercept of 4th piece wise linear function</description>
89944 <description>y-intercept of 4th piece wise linear function</description>
89952 <description>y-intercept of 5th piece wise linear function</description>
89960 <description>y-intercept of 5th piece wise linear function</description>
89968 <description>y-intercept of 6th piece wise linear function</description>
89976 <description>y-intercept of 6th piece wise linear function</description>
89984 <description>y-intercept of 7th piece wise linear function</description>
89992 <description>y-intercept of 7th piece wise linear function</description>
90000 <description>End point of 1st piece wise linear function</description>
90008 <description>End point of 1st piece wise linear function</description>
90016 <description>End point of 2nd piece wise linear function</description>
90024 <description>End point of 2nd piece wise linear function</description>
90032 <description>End point of 3rd piece wise linear function</description>
90040 <description>End point of 3rd piece wise linear function</description>
90048 <description>End point of 4th piece wise linear function</description>
90056 <description>End point of 4th piece wise linear function</description>
90064 <description>End point of 5th piece wise linear function</description>
90072 <description>End point of 5th piece wise linear function</description>
90080 <description>End point of 6th piece wise linear function</description>
90088 <description>End point of 6th piece wise linear function</description>
90098 <description>Temperature Sensor 1</description>
90109 <description>GPIO Port 2</description>
90117 <description>GPIO Port 3</description>
90125 <description>GPIO Port 4</description>
90133 <description>GPIO Port 5</description>
90141 <description>GPIO Tasks and Events 0</description>
90167 …description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on…
90175 …<description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in C…
90181 <description>Trigger task</description>
90192 …<description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action o…
90200 …<description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.…
90206 <description>Trigger task</description>
90217 …<description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action o…
90225 …<description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.<…
90231 <description>Trigger task</description>
90242 <description>Description collection: Subscribe configuration for task OUT[n]</description>
90250 <description>DPPI channel that task OUT[n] will subscribe to</description>
90261 <description>Disable subscription</description>
90266 <description>Enable subscription</description>
90277 <description>Description collection: Subscribe configuration for task SET[n]</description>
90285 <description>DPPI channel that task SET[n] will subscribe to</description>
90296 <description>Disable subscription</description>
90301 <description>Enable subscription</description>
90312 <description>Description collection: Subscribe configuration for task CLR[n]</description>
90320 <description>DPPI channel that task CLR[n] will subscribe to</description>
90331 <description>Disable subscription</description>
90336 <description>Enable subscription</description>
90347 … <description>Description collection: Event from pin specified in CONFIG[n].PSEL</description>
90355 <description>Event from pin specified in CONFIG[n].PSEL</description>
90361 <description>Event not generated</description>
90366 <description>Event generated</description>
90377 <description>Peripheral events.</description>
90383 <description>Description cluster: Non-secure port event from owner n</description>
90392 <description>Non-secure port event from owner n</description>
90398 <description>Event not generated</description>
90403 <description>Event generated</description>
90412 <description>Description cluster: Secure port event from owner n</description>
90421 <description>Secure port event from owner n</description>
90427 <description>Event not generated</description>
90432 <description>Event generated</description>
90444 <description>Description collection: Publish configuration for event IN[n]</description>
90452 <description>DPPI channel that event IN[n] will publish to</description>
90463 <description>Disable publishing</description>
90468 <description>Enable publishing</description>
90479 <description>Publish configuration for events</description>
90485 … <description>Description cluster: Publish configuration for event PORT[n].NONSECURE</description>
90494 <description>DPPI channel that event PORT[n].NONSECURE will publish to</description>
90505 <description>Disable publishing</description>
90510 <description>Enable publishing</description>
90519 … <description>Description cluster: Publish configuration for event PORT[n].SECURE</description>
90528 <description>DPPI channel that event PORT[n].SECURE will publish to</description>
90539 <description>Disable publishing</description>
90544 <description>Enable publishing</description>
90554 <description>Enable interrupt</description>
90562 <description>Write '1' to enable interrupt for event IN[0]</description>
90569 <description>Read: Disabled</description>
90574 <description>Read: Enabled</description>
90582 <description>Enable</description>
90589 <description>Write '1' to enable interrupt for event IN[1]</description>
90596 <description>Read: Disabled</description>
90601 <description>Read: Enabled</description>
90609 <description>Enable</description>
90616 <description>Write '1' to enable interrupt for event IN[2]</description>
90623 <description>Read: Disabled</description>
90628 <description>Read: Enabled</description>
90636 <description>Enable</description>
90643 <description>Write '1' to enable interrupt for event IN[3]</description>
90650 <description>Read: Disabled</description>
90655 <description>Read: Enabled</description>
90663 <description>Enable</description>
90670 <description>Write '1' to enable interrupt for event IN[4]</description>
90677 <description>Read: Disabled</description>
90682 <description>Read: Enabled</description>
90690 <description>Enable</description>
90697 <description>Write '1' to enable interrupt for event IN[5]</description>
90704 <description>Read: Disabled</description>
90709 <description>Read: Enabled</description>
90717 <description>Enable</description>
90724 <description>Write '1' to enable interrupt for event IN[6]</description>
90731 <description>Read: Disabled</description>
90736 <description>Read: Enabled</description>
90744 <description>Enable</description>
90751 <description>Write '1' to enable interrupt for event IN[7]</description>
90758 <description>Read: Disabled</description>
90763 <description>Read: Enabled</description>
90771 <description>Enable</description>
90778 <description>Write '1' to enable interrupt for event PORT0NONSECURE</description>
90785 <description>Read: Disabled</description>
90790 <description>Read: Enabled</description>
90798 <description>Enable</description>
90805 <description>Write '1' to enable interrupt for event PORT0SECURE</description>
90812 <description>Read: Disabled</description>
90817 <description>Read: Enabled</description>
90825 <description>Enable</description>
90834 <description>Disable interrupt</description>
90842 <description>Write '1' to disable interrupt for event IN[0]</description>
90849 <description>Read: Disabled</description>
90854 <description>Read: Enabled</description>
90862 <description>Disable</description>
90869 <description>Write '1' to disable interrupt for event IN[1]</description>
90876 <description>Read: Disabled</description>
90881 <description>Read: Enabled</description>
90889 <description>Disable</description>
90896 <description>Write '1' to disable interrupt for event IN[2]</description>
90903 <description>Read: Disabled</description>
90908 <description>Read: Enabled</description>
90916 <description>Disable</description>
90923 <description>Write '1' to disable interrupt for event IN[3]</description>
90930 <description>Read: Disabled</description>
90935 <description>Read: Enabled</description>
90943 <description>Disable</description>
90950 <description>Write '1' to disable interrupt for event IN[4]</description>
90957 <description>Read: Disabled</description>
90962 <description>Read: Enabled</description>
90970 <description>Disable</description>
90977 <description>Write '1' to disable interrupt for event IN[5]</description>
90984 <description>Read: Disabled</description>
90989 <description>Read: Enabled</description>
90997 <description>Disable</description>
91004 <description>Write '1' to disable interrupt for event IN[6]</description>
91011 <description>Read: Disabled</description>
91016 <description>Read: Enabled</description>
91024 <description>Disable</description>
91031 <description>Write '1' to disable interrupt for event IN[7]</description>
91038 <description>Read: Disabled</description>
91043 <description>Read: Enabled</description>
91051 <description>Disable</description>
91058 <description>Write '1' to disable interrupt for event PORT0NONSECURE</description>
91065 <description>Read: Disabled</description>
91070 <description>Read: Enabled</description>
91078 <description>Disable</description>
91085 <description>Write '1' to disable interrupt for event PORT0SECURE</description>
91092 <description>Read: Disabled</description>
91097 <description>Read: Enabled</description>
91105 <description>Disable</description>
91114 <description>Enable interrupt</description>
91122 <description>Write '1' to enable interrupt for event IN[0]</description>
91129 <description>Read: Disabled</description>
91134 <description>Read: Enabled</description>
91142 <description>Enable</description>
91149 <description>Write '1' to enable interrupt for event IN[1]</description>
91156 <description>Read: Disabled</description>
91161 <description>Read: Enabled</description>
91169 <description>Enable</description>
91176 <description>Write '1' to enable interrupt for event IN[2]</description>
91183 <description>Read: Disabled</description>
91188 <description>Read: Enabled</description>
91196 <description>Enable</description>
91203 <description>Write '1' to enable interrupt for event IN[3]</description>
91210 <description>Read: Disabled</description>
91215 <description>Read: Enabled</description>
91223 <description>Enable</description>
91230 <description>Write '1' to enable interrupt for event IN[4]</description>
91237 <description>Read: Disabled</description>
91242 <description>Read: Enabled</description>
91250 <description>Enable</description>
91257 <description>Write '1' to enable interrupt for event IN[5]</description>
91264 <description>Read: Disabled</description>
91269 <description>Read: Enabled</description>
91277 <description>Enable</description>
91284 <description>Write '1' to enable interrupt for event IN[6]</description>
91291 <description>Read: Disabled</description>
91296 <description>Read: Enabled</description>
91304 <description>Enable</description>
91311 <description>Write '1' to enable interrupt for event IN[7]</description>
91318 <description>Read: Disabled</description>
91323 <description>Read: Enabled</description>
91331 <description>Enable</description>
91338 <description>Write '1' to enable interrupt for event PORT0NONSECURE</description>
91345 <description>Read: Disabled</description>
91350 <description>Read: Enabled</description>
91358 <description>Enable</description>
91365 <description>Write '1' to enable interrupt for event PORT0SECURE</description>
91372 <description>Read: Disabled</description>
91377 <description>Read: Enabled</description>
91385 <description>Enable</description>
91394 <description>Disable interrupt</description>
91402 <description>Write '1' to disable interrupt for event IN[0]</description>
91409 <description>Read: Disabled</description>
91414 <description>Read: Enabled</description>
91422 <description>Disable</description>
91429 <description>Write '1' to disable interrupt for event IN[1]</description>
91436 <description>Read: Disabled</description>
91441 <description>Read: Enabled</description>
91449 <description>Disable</description>
91456 <description>Write '1' to disable interrupt for event IN[2]</description>
91463 <description>Read: Disabled</description>
91468 <description>Read: Enabled</description>
91476 <description>Disable</description>
91483 <description>Write '1' to disable interrupt for event IN[3]</description>
91490 <description>Read: Disabled</description>
91495 <description>Read: Enabled</description>
91503 <description>Disable</description>
91510 <description>Write '1' to disable interrupt for event IN[4]</description>
91517 <description>Read: Disabled</description>
91522 <description>Read: Enabled</description>
91530 <description>Disable</description>
91537 <description>Write '1' to disable interrupt for event IN[5]</description>
91544 <description>Read: Disabled</description>
91549 <description>Read: Enabled</description>
91557 <description>Disable</description>
91564 <description>Write '1' to disable interrupt for event IN[6]</description>
91571 <description>Read: Disabled</description>
91576 <description>Read: Enabled</description>
91584 <description>Disable</description>
91591 <description>Write '1' to disable interrupt for event IN[7]</description>
91598 <description>Read: Disabled</description>
91603 <description>Read: Enabled</description>
91611 <description>Disable</description>
91618 <description>Write '1' to disable interrupt for event PORT0NONSECURE</description>
91625 <description>Read: Disabled</description>
91630 <description>Read: Enabled</description>
91638 <description>Disable</description>
91645 <description>Write '1' to disable interrupt for event PORT0SECURE</description>
91652 <description>Read: Disabled</description>
91657 <description>Read: Enabled</description>
91665 <description>Disable</description>
91676 …<description>Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] …
91684 <description>Mode</description>
91690 …<description>Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.</descripti…
91695 <description>Event mode</description>
91700 <description>Task mode</description>
91707 …<description>GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event</descrip…
91713 <description>Port number</description>
91719 …description>When In task mode: Operation to be performed on output when OUT[n] task is triggered. …
91725 …<description>Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on…
91730 …<description>Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edg…
91735 …<description>Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling …
91740 …<description>Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.…
91747 …<description>When in task mode: Initial value of the output when the GPIOTE channel is configured.…
91753 … <description>Task mode: Initial value of pin before task triggering is low</description>
91758 … <description>Task mode: Initial value of pin before task triggering is high</description>
91769 <description>GPIO Tasks and Events 1</description>
91785 <description>Quadrature Decoder 0</description>
91804 <description>Task starting the quadrature decoder</description>
91812 <description>Task starting the quadrature decoder</description>
91818 <description>Trigger task</description>
91827 <description>Task stopping the quadrature decoder</description>
91835 <description>Task stopping the quadrature decoder</description>
91841 <description>Trigger task</description>
91850 <description>Read and clear ACC and ACCDBL</description>
91858 <description>Read and clear ACC and ACCDBL</description>
91864 <description>Trigger task</description>
91873 <description>Read and clear ACC</description>
91881 <description>Read and clear ACC</description>
91887 <description>Trigger task</description>
91896 <description>Read and clear ACCDBL</description>
91904 <description>Read and clear ACCDBL</description>
91910 <description>Trigger task</description>
91919 <description>Subscribe configuration for task START</description>
91927 <description>DPPI channel that task START will subscribe to</description>
91938 <description>Disable subscription</description>
91943 <description>Enable subscription</description>
91952 <description>Subscribe configuration for task STOP</description>
91960 <description>DPPI channel that task STOP will subscribe to</description>
91971 <description>Disable subscription</description>
91976 <description>Enable subscription</description>
91985 <description>Subscribe configuration for task READCLRACC</description>
91993 <description>DPPI channel that task READCLRACC will subscribe to</description>
92004 <description>Disable subscription</description>
92009 <description>Enable subscription</description>
92018 <description>Subscribe configuration for task RDCLRACC</description>
92026 <description>DPPI channel that task RDCLRACC will subscribe to</description>
92037 <description>Disable subscription</description>
92042 <description>Enable subscription</description>
92051 <description>Subscribe configuration for task RDCLRDBL</description>
92059 <description>DPPI channel that task RDCLRDBL will subscribe to</description>
92070 <description>Disable subscription</description>
92075 <description>Enable subscription</description>
92084 …<description>Event being generated for every new sample value written to the SAMPLE register</desc…
92092 …<description>Event being generated for every new sample value written to the SAMPLE register</desc…
92098 <description>Event not generated</description>
92103 <description>Event generated</description>
92112 <description>Non-null report ready</description>
92120 <description>Non-null report ready</description>
92126 <description>Event not generated</description>
92131 <description>Event generated</description>
92140 <description>ACC or ACCDBL register overflow</description>
92148 <description>ACC or ACCDBL register overflow</description>
92154 <description>Event not generated</description>
92159 <description>Event generated</description>
92168 <description>Double displacement(s) detected</description>
92176 <description>Double displacement(s) detected</description>
92182 <description>Event not generated</description>
92187 <description>Event generated</description>
92196 <description>QDEC has been stopped</description>
92204 <description>QDEC has been stopped</description>
92210 <description>Event not generated</description>
92215 <description>Event generated</description>
92224 <description>Publish configuration for event SAMPLERDY</description>
92232 <description>DPPI channel that event SAMPLERDY will publish to</description>
92243 <description>Disable publishing</description>
92248 <description>Enable publishing</description>
92257 <description>Publish configuration for event REPORTRDY</description>
92265 <description>DPPI channel that event REPORTRDY will publish to</description>
92276 <description>Disable publishing</description>
92281 <description>Enable publishing</description>
92290 <description>Publish configuration for event ACCOF</description>
92298 <description>DPPI channel that event ACCOF will publish to</description>
92309 <description>Disable publishing</description>
92314 <description>Enable publishing</description>
92323 <description>Publish configuration for event DBLRDY</description>
92331 <description>DPPI channel that event DBLRDY will publish to</description>
92342 <description>Disable publishing</description>
92347 <description>Enable publishing</description>
92356 <description>Publish configuration for event STOPPED</description>
92364 <description>DPPI channel that event STOPPED will publish to</description>
92375 <description>Disable publishing</description>
92380 <description>Enable publishing</description>
92389 <description>Shortcuts between local events and tasks</description>
92397 <description>Shortcut between event REPORTRDY and task READCLRACC</description>
92403 <description>Disable shortcut</description>
92408 <description>Enable shortcut</description>
92415 <description>Shortcut between event SAMPLERDY and task STOP</description>
92421 <description>Disable shortcut</description>
92426 <description>Enable shortcut</description>
92433 <description>Shortcut between event REPORTRDY and task RDCLRACC</description>
92439 <description>Disable shortcut</description>
92444 <description>Enable shortcut</description>
92451 <description>Shortcut between event REPORTRDY and task STOP</description>
92457 <description>Disable shortcut</description>
92462 <description>Enable shortcut</description>
92469 <description>Shortcut between event DBLRDY and task RDCLRDBL</description>
92475 <description>Disable shortcut</description>
92480 <description>Enable shortcut</description>
92487 <description>Shortcut between event DBLRDY and task STOP</description>
92493 <description>Disable shortcut</description>
92498 <description>Enable shortcut</description>
92505 <description>Shortcut between event SAMPLERDY and task READCLRACC</description>
92511 <description>Disable shortcut</description>
92516 <description>Enable shortcut</description>
92525 <description>Enable interrupt</description>
92533 <description>Write '1' to enable interrupt for event SAMPLERDY</description>
92540 <description>Read: Disabled</description>
92545 <description>Read: Enabled</description>
92553 <description>Enable</description>
92560 <description>Write '1' to enable interrupt for event REPORTRDY</description>
92567 <description>Read: Disabled</description>
92572 <description>Read: Enabled</description>
92580 <description>Enable</description>
92587 <description>Write '1' to enable interrupt for event ACCOF</description>
92594 <description>Read: Disabled</description>
92599 <description>Read: Enabled</description>
92607 <description>Enable</description>
92614 <description>Write '1' to enable interrupt for event DBLRDY</description>
92621 <description>Read: Disabled</description>
92626 <description>Read: Enabled</description>
92634 <description>Enable</description>
92641 <description>Write '1' to enable interrupt for event STOPPED</description>
92648 <description>Read: Disabled</description>
92653 <description>Read: Enabled</description>
92661 <description>Enable</description>
92670 <description>Disable interrupt</description>
92678 <description>Write '1' to disable interrupt for event SAMPLERDY</description>
92685 <description>Read: Disabled</description>
92690 <description>Read: Enabled</description>
92698 <description>Disable</description>
92705 <description>Write '1' to disable interrupt for event REPORTRDY</description>
92712 <description>Read: Disabled</description>
92717 <description>Read: Enabled</description>
92725 <description>Disable</description>
92732 <description>Write '1' to disable interrupt for event ACCOF</description>
92739 <description>Read: Disabled</description>
92744 <description>Read: Enabled</description>
92752 <description>Disable</description>
92759 <description>Write '1' to disable interrupt for event DBLRDY</description>
92766 <description>Read: Disabled</description>
92771 <description>Read: Enabled</description>
92779 <description>Disable</description>
92786 <description>Write '1' to disable interrupt for event STOPPED</description>
92793 <description>Read: Disabled</description>
92798 <description>Read: Enabled</description>
92806 <description>Disable</description>
92815 <description>Enable the quadrature decoder</description>
92823 <description>Enable or disable the quadrature decoder</description>
92829 <description>Disable</description>
92834 <description>Enable</description>
92843 <description>LED output pin polarity</description>
92851 <description>LED output pin polarity</description>
92857 <description>Led active on output pin low</description>
92862 <description>Led active on output pin high</description>
92871 <description>Sample period</description>
92879 … <description>Sample period. The SAMPLE register will be updated for every new sample</description>
92885 <description>128 us</description>
92890 <description>256 us</description>
92895 <description>512 us</description>
92900 <description>1024 us</description>
92905 <description>2048 us</description>
92910 <description>4096 us</description>
92915 <description>8192 us</description>
92920 <description>16384 us</description>
92925 <description>32768 us</description>
92930 <description>65536 us</description>
92935 <description>131072 us</description>
92944 <description>Motion sample value</description>
92953 <description>Last motion sample</description>
92961 …<description>Number of samples to be taken before REPORTRDY and DBLRDY events can be generated</de…
92969 …<description>Specifies the number of samples to be accumulated in the ACC register before the REPO…
92975 <description>10 samples/report</description>
92980 <description>40 samples/report</description>
92985 <description>80 samples/report</description>
92990 <description>120 samples/report</description>
92995 <description>160 samples/report</description>
93000 <description>200 samples/report</description>
93005 <description>240 samples/report</description>
93010 <description>280 samples/report</description>
93015 <description>1 sample/report</description>
93024 <description>Register accumulating the valid transitions</description>
93033 …<description>Register accumulating all valid samples (not double transition) read from the SAMPLE …
93041 …<description>Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task</description>
93050 <description>Snapshot of the ACC register.</description>
93058 <description>Unspecified</description>
93064 <description>Pin select for LED signal</description>
93072 <description>Pin number</description>
93078 <description>Port number</description>
93084 <description>Connection</description>
93090 <description>Disconnect</description>
93095 <description>Connect</description>
93104 <description>Pin select for A signal</description>
93112 <description>Pin number</description>
93118 <description>Port number</description>
93124 <description>Connection</description>
93130 <description>Disconnect</description>
93135 <description>Connect</description>
93144 <description>Pin select for B signal</description>
93152 <description>Pin number</description>
93158 <description>Port number</description>
93164 <description>Connection</description>
93170 <description>Disconnect</description>
93175 <description>Connect</description>
93185 <description>Enable input debounce filters</description>
93193 <description>Enable input debounce filters</description>
93199 <description>Debounce input filters disabled</description>
93204 <description>Debounce input filters enabled</description>
93213 <description>Time period the LED is switched ON prior to sampling</description>
93221 <description>Period in us the LED is switched on prior to sampling</description>
93229 <description>Register accumulating the number of detected double transitions</description>
93237 …<description>Register accumulating the number of detected double or illegal transitions. ( SAMPLE …
93245 … <description>Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task</description>
93253 …<description>Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDB…
93263 <description>Quadrature Decoder 1</description>
93274 <description>Quadrature Decoder 2</description>
93285 <description>Quadrature Decoder 3</description>
93296 <description>Global Real-time counter 0</description>
93330 … <description>Description collection: Capture the counter value to CC[n] register</description>
93338 <description>Capture the counter value to CC[n] register</description>
93344 <description>Trigger task</description>
93353 <description>Start the counter</description>
93361 <description>Start the counter</description>
93367 <description>Trigger task</description>
93376 <description>Stop the counter</description>
93384 <description>Stop the counter</description>
93390 <description>Trigger task</description>
93399 <description>Clear the counter</description>
93407 <description>Clear the counter</description>
93413 <description>Trigger task</description>
93422 <description>Start the PWM</description>
93430 <description>Start the PWM</description>
93436 <description>Trigger task</description>
93445 <description>Stop the PWM</description>
93453 <description>Stop the PWM</description>
93459 <description>Trigger task</description>
93470 … <description>Description collection: Subscribe configuration for task CAPTURE[n]</description>
93478 <description>DPPI channel that task CAPTURE[n] will subscribe to</description>
93489 <description>Disable subscription</description>
93494 <description>Enable subscription</description>
93505 <description>Description collection: Compare event on CC[n] match</description>
93513 <description>Compare event on CC[n] match</description>
93519 <description>Event not generated</description>
93524 <description>Event generated</description>
93533 … <description>The GRTC low frequency timer is synchronized with the SYSCOUNTER</description>
93541 … <description>The GRTC low frequency timer is synchronized with the SYSCOUNTER</description>
93547 <description>Event not generated</description>
93552 <description>Event generated</description>
93561 <description>Event on end of each PWM period</description>
93569 <description>Event on end of each PWM period</description>
93575 <description>Event not generated</description>
93580 <description>Event generated</description>
93591 … <description>Description collection: Publish configuration for event COMPARE[n]</description>
93599 <description>DPPI channel that event COMPARE[n] will publish to</description>
93610 <description>Disable publishing</description>
93615 <description>Enable publishing</description>
93624 <description>Shortcuts between local events and tasks</description>
93632 <description>Shortcut between event RTCOMPARE and task CLEAR</description>
93638 <description>Disable shortcut</description>
93643 <description>Enable shortcut</description>
93652 <description>Enable or disable interrupt</description>
93660 <description>Enable or disable interrupt for event COMPARE[0]</description>
93666 <description>Disable</description>
93671 <description>Enable</description>
93678 <description>Enable or disable interrupt for event COMPARE[1]</description>
93684 <description>Disable</description>
93689 <description>Enable</description>
93696 <description>Enable or disable interrupt for event COMPARE[2]</description>
93702 <description>Disable</description>
93707 <description>Enable</description>
93714 <description>Enable or disable interrupt for event COMPARE[3]</description>
93720 <description>Disable</description>
93725 <description>Enable</description>
93732 <description>Enable or disable interrupt for event COMPARE[4]</description>
93738 <description>Disable</description>
93743 <description>Enable</description>
93750 <description>Enable or disable interrupt for event COMPARE[5]</description>
93756 <description>Disable</description>
93761 <description>Enable</description>
93768 <description>Enable or disable interrupt for event COMPARE[6]</description>
93774 <description>Disable</description>
93779 <description>Enable</description>
93786 <description>Enable or disable interrupt for event COMPARE[7]</description>
93792 <description>Disable</description>
93797 <description>Enable</description>
93804 <description>Enable or disable interrupt for event COMPARE[8]</description>
93810 <description>Disable</description>
93815 <description>Enable</description>
93822 <description>Enable or disable interrupt for event COMPARE[9]</description>
93828 <description>Disable</description>
93833 <description>Enable</description>
93840 <description>Enable or disable interrupt for event COMPARE[10]</description>
93846 <description>Disable</description>
93851 <description>Enable</description>
93858 <description>Enable or disable interrupt for event COMPARE[11]</description>
93864 <description>Disable</description>
93869 <description>Enable</description>
93876 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
93882 <description>Disable</description>
93887 <description>Enable</description>
93894 <description>Enable or disable interrupt for event PWMPERIODEND</description>
93900 <description>Disable</description>
93905 <description>Enable</description>
93914 <description>Enable interrupt</description>
93922 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
93929 <description>Read: Disabled</description>
93934 <description>Read: Enabled</description>
93942 <description>Enable</description>
93949 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
93956 <description>Read: Disabled</description>
93961 <description>Read: Enabled</description>
93969 <description>Enable</description>
93976 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
93983 <description>Read: Disabled</description>
93988 <description>Read: Enabled</description>
93996 <description>Enable</description>
94003 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
94010 <description>Read: Disabled</description>
94015 <description>Read: Enabled</description>
94023 <description>Enable</description>
94030 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
94037 <description>Read: Disabled</description>
94042 <description>Read: Enabled</description>
94050 <description>Enable</description>
94057 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
94064 <description>Read: Disabled</description>
94069 <description>Read: Enabled</description>
94077 <description>Enable</description>
94084 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
94091 <description>Read: Disabled</description>
94096 <description>Read: Enabled</description>
94104 <description>Enable</description>
94111 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
94118 <description>Read: Disabled</description>
94123 <description>Read: Enabled</description>
94131 <description>Enable</description>
94138 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
94145 <description>Read: Disabled</description>
94150 <description>Read: Enabled</description>
94158 <description>Enable</description>
94165 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
94172 <description>Read: Disabled</description>
94177 <description>Read: Enabled</description>
94185 <description>Enable</description>
94192 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
94199 <description>Read: Disabled</description>
94204 <description>Read: Enabled</description>
94212 <description>Enable</description>
94219 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
94226 <description>Read: Disabled</description>
94231 <description>Read: Enabled</description>
94239 <description>Enable</description>
94246 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
94253 <description>Read: Disabled</description>
94258 <description>Read: Enabled</description>
94266 <description>Enable</description>
94273 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
94280 <description>Read: Disabled</description>
94285 <description>Read: Enabled</description>
94293 <description>Enable</description>
94302 <description>Disable interrupt</description>
94310 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
94317 <description>Read: Disabled</description>
94322 <description>Read: Enabled</description>
94330 <description>Disable</description>
94337 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
94344 <description>Read: Disabled</description>
94349 <description>Read: Enabled</description>
94357 <description>Disable</description>
94364 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
94371 <description>Read: Disabled</description>
94376 <description>Read: Enabled</description>
94384 <description>Disable</description>
94391 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
94398 <description>Read: Disabled</description>
94403 <description>Read: Enabled</description>
94411 <description>Disable</description>
94418 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
94425 <description>Read: Disabled</description>
94430 <description>Read: Enabled</description>
94438 <description>Disable</description>
94445 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
94452 <description>Read: Disabled</description>
94457 <description>Read: Enabled</description>
94465 <description>Disable</description>
94472 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
94479 <description>Read: Disabled</description>
94484 <description>Read: Enabled</description>
94492 <description>Disable</description>
94499 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
94506 <description>Read: Disabled</description>
94511 <description>Read: Enabled</description>
94519 <description>Disable</description>
94526 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
94533 <description>Read: Disabled</description>
94538 <description>Read: Enabled</description>
94546 <description>Disable</description>
94553 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
94560 <description>Read: Disabled</description>
94565 <description>Read: Enabled</description>
94573 <description>Disable</description>
94580 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
94587 <description>Read: Disabled</description>
94592 <description>Read: Enabled</description>
94600 <description>Disable</description>
94607 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
94614 <description>Read: Disabled</description>
94619 <description>Read: Enabled</description>
94627 <description>Disable</description>
94634 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
94641 <description>Read: Disabled</description>
94646 <description>Read: Enabled</description>
94654 <description>Disable</description>
94661 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
94668 <description>Read: Disabled</description>
94673 <description>Read: Enabled</description>
94681 <description>Disable</description>
94690 <description>Pending interrupts</description>
94698 <description>Read pending status of interrupt for event COMPARE[0]</description>
94705 <description>Read: Not pending</description>
94710 <description>Read: Pending</description>
94717 <description>Read pending status of interrupt for event COMPARE[1]</description>
94724 <description>Read: Not pending</description>
94729 <description>Read: Pending</description>
94736 <description>Read pending status of interrupt for event COMPARE[2]</description>
94743 <description>Read: Not pending</description>
94748 <description>Read: Pending</description>
94755 <description>Read pending status of interrupt for event COMPARE[3]</description>
94762 <description>Read: Not pending</description>
94767 <description>Read: Pending</description>
94774 <description>Read pending status of interrupt for event COMPARE[4]</description>
94781 <description>Read: Not pending</description>
94786 <description>Read: Pending</description>
94793 <description>Read pending status of interrupt for event COMPARE[5]</description>
94800 <description>Read: Not pending</description>
94805 <description>Read: Pending</description>
94812 <description>Read pending status of interrupt for event COMPARE[6]</description>
94819 <description>Read: Not pending</description>
94824 <description>Read: Pending</description>
94831 <description>Read pending status of interrupt for event COMPARE[7]</description>
94838 <description>Read: Not pending</description>
94843 <description>Read: Pending</description>
94850 <description>Read pending status of interrupt for event COMPARE[8]</description>
94857 <description>Read: Not pending</description>
94862 <description>Read: Pending</description>
94869 <description>Read pending status of interrupt for event COMPARE[9]</description>
94876 <description>Read: Not pending</description>
94881 <description>Read: Pending</description>
94888 <description>Read pending status of interrupt for event COMPARE[10]</description>
94895 <description>Read: Not pending</description>
94900 <description>Read: Pending</description>
94907 <description>Read pending status of interrupt for event COMPARE[11]</description>
94914 <description>Read: Not pending</description>
94919 <description>Read: Pending</description>
94926 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
94933 <description>Read: Not pending</description>
94938 <description>Read: Pending</description>
94945 <description>Read pending status of interrupt for event PWMPERIODEND</description>
94952 <description>Read: Not pending</description>
94957 <description>Read: Pending</description>
94966 <description>Enable or disable interrupt</description>
94974 <description>Enable or disable interrupt for event COMPARE[0]</description>
94980 <description>Disable</description>
94985 <description>Enable</description>
94992 <description>Enable or disable interrupt for event COMPARE[1]</description>
94998 <description>Disable</description>
95003 <description>Enable</description>
95010 <description>Enable or disable interrupt for event COMPARE[2]</description>
95016 <description>Disable</description>
95021 <description>Enable</description>
95028 <description>Enable or disable interrupt for event COMPARE[3]</description>
95034 <description>Disable</description>
95039 <description>Enable</description>
95046 <description>Enable or disable interrupt for event COMPARE[4]</description>
95052 <description>Disable</description>
95057 <description>Enable</description>
95064 <description>Enable or disable interrupt for event COMPARE[5]</description>
95070 <description>Disable</description>
95075 <description>Enable</description>
95082 <description>Enable or disable interrupt for event COMPARE[6]</description>
95088 <description>Disable</description>
95093 <description>Enable</description>
95100 <description>Enable or disable interrupt for event COMPARE[7]</description>
95106 <description>Disable</description>
95111 <description>Enable</description>
95118 <description>Enable or disable interrupt for event COMPARE[8]</description>
95124 <description>Disable</description>
95129 <description>Enable</description>
95136 <description>Enable or disable interrupt for event COMPARE[9]</description>
95142 <description>Disable</description>
95147 <description>Enable</description>
95154 <description>Enable or disable interrupt for event COMPARE[10]</description>
95160 <description>Disable</description>
95165 <description>Enable</description>
95172 <description>Enable or disable interrupt for event COMPARE[11]</description>
95178 <description>Disable</description>
95183 <description>Enable</description>
95190 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
95196 <description>Disable</description>
95201 <description>Enable</description>
95208 <description>Enable or disable interrupt for event PWMPERIODEND</description>
95214 <description>Disable</description>
95219 <description>Enable</description>
95228 <description>Enable interrupt</description>
95236 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
95243 <description>Read: Disabled</description>
95248 <description>Read: Enabled</description>
95256 <description>Enable</description>
95263 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
95270 <description>Read: Disabled</description>
95275 <description>Read: Enabled</description>
95283 <description>Enable</description>
95290 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
95297 <description>Read: Disabled</description>
95302 <description>Read: Enabled</description>
95310 <description>Enable</description>
95317 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
95324 <description>Read: Disabled</description>
95329 <description>Read: Enabled</description>
95337 <description>Enable</description>
95344 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
95351 <description>Read: Disabled</description>
95356 <description>Read: Enabled</description>
95364 <description>Enable</description>
95371 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
95378 <description>Read: Disabled</description>
95383 <description>Read: Enabled</description>
95391 <description>Enable</description>
95398 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
95405 <description>Read: Disabled</description>
95410 <description>Read: Enabled</description>
95418 <description>Enable</description>
95425 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
95432 <description>Read: Disabled</description>
95437 <description>Read: Enabled</description>
95445 <description>Enable</description>
95452 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
95459 <description>Read: Disabled</description>
95464 <description>Read: Enabled</description>
95472 <description>Enable</description>
95479 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
95486 <description>Read: Disabled</description>
95491 <description>Read: Enabled</description>
95499 <description>Enable</description>
95506 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
95513 <description>Read: Disabled</description>
95518 <description>Read: Enabled</description>
95526 <description>Enable</description>
95533 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
95540 <description>Read: Disabled</description>
95545 <description>Read: Enabled</description>
95553 <description>Enable</description>
95560 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
95567 <description>Read: Disabled</description>
95572 <description>Read: Enabled</description>
95580 <description>Enable</description>
95587 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
95594 <description>Read: Disabled</description>
95599 <description>Read: Enabled</description>
95607 <description>Enable</description>
95616 <description>Disable interrupt</description>
95624 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
95631 <description>Read: Disabled</description>
95636 <description>Read: Enabled</description>
95644 <description>Disable</description>
95651 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
95658 <description>Read: Disabled</description>
95663 <description>Read: Enabled</description>
95671 <description>Disable</description>
95678 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
95685 <description>Read: Disabled</description>
95690 <description>Read: Enabled</description>
95698 <description>Disable</description>
95705 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
95712 <description>Read: Disabled</description>
95717 <description>Read: Enabled</description>
95725 <description>Disable</description>
95732 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
95739 <description>Read: Disabled</description>
95744 <description>Read: Enabled</description>
95752 <description>Disable</description>
95759 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
95766 <description>Read: Disabled</description>
95771 <description>Read: Enabled</description>
95779 <description>Disable</description>
95786 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
95793 <description>Read: Disabled</description>
95798 <description>Read: Enabled</description>
95806 <description>Disable</description>
95813 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
95820 <description>Read: Disabled</description>
95825 <description>Read: Enabled</description>
95833 <description>Disable</description>
95840 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
95847 <description>Read: Disabled</description>
95852 <description>Read: Enabled</description>
95860 <description>Disable</description>
95867 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
95874 <description>Read: Disabled</description>
95879 <description>Read: Enabled</description>
95887 <description>Disable</description>
95894 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
95901 <description>Read: Disabled</description>
95906 <description>Read: Enabled</description>
95914 <description>Disable</description>
95921 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
95928 <description>Read: Disabled</description>
95933 <description>Read: Enabled</description>
95941 <description>Disable</description>
95948 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
95955 <description>Read: Disabled</description>
95960 <description>Read: Enabled</description>
95968 <description>Disable</description>
95975 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
95982 <description>Read: Disabled</description>
95987 <description>Read: Enabled</description>
95995 <description>Disable</description>
96004 <description>Pending interrupts</description>
96012 <description>Read pending status of interrupt for event COMPARE[0]</description>
96019 <description>Read: Not pending</description>
96024 <description>Read: Pending</description>
96031 <description>Read pending status of interrupt for event COMPARE[1]</description>
96038 <description>Read: Not pending</description>
96043 <description>Read: Pending</description>
96050 <description>Read pending status of interrupt for event COMPARE[2]</description>
96057 <description>Read: Not pending</description>
96062 <description>Read: Pending</description>
96069 <description>Read pending status of interrupt for event COMPARE[3]</description>
96076 <description>Read: Not pending</description>
96081 <description>Read: Pending</description>
96088 <description>Read pending status of interrupt for event COMPARE[4]</description>
96095 <description>Read: Not pending</description>
96100 <description>Read: Pending</description>
96107 <description>Read pending status of interrupt for event COMPARE[5]</description>
96114 <description>Read: Not pending</description>
96119 <description>Read: Pending</description>
96126 <description>Read pending status of interrupt for event COMPARE[6]</description>
96133 <description>Read: Not pending</description>
96138 <description>Read: Pending</description>
96145 <description>Read pending status of interrupt for event COMPARE[7]</description>
96152 <description>Read: Not pending</description>
96157 <description>Read: Pending</description>
96164 <description>Read pending status of interrupt for event COMPARE[8]</description>
96171 <description>Read: Not pending</description>
96176 <description>Read: Pending</description>
96183 <description>Read pending status of interrupt for event COMPARE[9]</description>
96190 <description>Read: Not pending</description>
96195 <description>Read: Pending</description>
96202 <description>Read pending status of interrupt for event COMPARE[10]</description>
96209 <description>Read: Not pending</description>
96214 <description>Read: Pending</description>
96221 <description>Read pending status of interrupt for event COMPARE[11]</description>
96228 <description>Read: Not pending</description>
96233 <description>Read: Pending</description>
96240 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
96247 <description>Read: Not pending</description>
96252 <description>Read: Pending</description>
96259 <description>Read pending status of interrupt for event PWMPERIODEND</description>
96266 <description>Read: Not pending</description>
96271 <description>Read: Pending</description>
96280 <description>Enable or disable interrupt</description>
96288 <description>Enable or disable interrupt for event COMPARE[0]</description>
96294 <description>Disable</description>
96299 <description>Enable</description>
96306 <description>Enable or disable interrupt for event COMPARE[1]</description>
96312 <description>Disable</description>
96317 <description>Enable</description>
96324 <description>Enable or disable interrupt for event COMPARE[2]</description>
96330 <description>Disable</description>
96335 <description>Enable</description>
96342 <description>Enable or disable interrupt for event COMPARE[3]</description>
96348 <description>Disable</description>
96353 <description>Enable</description>
96360 <description>Enable or disable interrupt for event COMPARE[4]</description>
96366 <description>Disable</description>
96371 <description>Enable</description>
96378 <description>Enable or disable interrupt for event COMPARE[5]</description>
96384 <description>Disable</description>
96389 <description>Enable</description>
96396 <description>Enable or disable interrupt for event COMPARE[6]</description>
96402 <description>Disable</description>
96407 <description>Enable</description>
96414 <description>Enable or disable interrupt for event COMPARE[7]</description>
96420 <description>Disable</description>
96425 <description>Enable</description>
96432 <description>Enable or disable interrupt for event COMPARE[8]</description>
96438 <description>Disable</description>
96443 <description>Enable</description>
96450 <description>Enable or disable interrupt for event COMPARE[9]</description>
96456 <description>Disable</description>
96461 <description>Enable</description>
96468 <description>Enable or disable interrupt for event COMPARE[10]</description>
96474 <description>Disable</description>
96479 <description>Enable</description>
96486 <description>Enable or disable interrupt for event COMPARE[11]</description>
96492 <description>Disable</description>
96497 <description>Enable</description>
96504 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
96510 <description>Disable</description>
96515 <description>Enable</description>
96522 <description>Enable or disable interrupt for event PWMPERIODEND</description>
96528 <description>Disable</description>
96533 <description>Enable</description>
96542 <description>Enable interrupt</description>
96550 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
96557 <description>Read: Disabled</description>
96562 <description>Read: Enabled</description>
96570 <description>Enable</description>
96577 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
96584 <description>Read: Disabled</description>
96589 <description>Read: Enabled</description>
96597 <description>Enable</description>
96604 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
96611 <description>Read: Disabled</description>
96616 <description>Read: Enabled</description>
96624 <description>Enable</description>
96631 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
96638 <description>Read: Disabled</description>
96643 <description>Read: Enabled</description>
96651 <description>Enable</description>
96658 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
96665 <description>Read: Disabled</description>
96670 <description>Read: Enabled</description>
96678 <description>Enable</description>
96685 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
96692 <description>Read: Disabled</description>
96697 <description>Read: Enabled</description>
96705 <description>Enable</description>
96712 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
96719 <description>Read: Disabled</description>
96724 <description>Read: Enabled</description>
96732 <description>Enable</description>
96739 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
96746 <description>Read: Disabled</description>
96751 <description>Read: Enabled</description>
96759 <description>Enable</description>
96766 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
96773 <description>Read: Disabled</description>
96778 <description>Read: Enabled</description>
96786 <description>Enable</description>
96793 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
96800 <description>Read: Disabled</description>
96805 <description>Read: Enabled</description>
96813 <description>Enable</description>
96820 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
96827 <description>Read: Disabled</description>
96832 <description>Read: Enabled</description>
96840 <description>Enable</description>
96847 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
96854 <description>Read: Disabled</description>
96859 <description>Read: Enabled</description>
96867 <description>Enable</description>
96874 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
96881 <description>Read: Disabled</description>
96886 <description>Read: Enabled</description>
96894 <description>Enable</description>
96901 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
96908 <description>Read: Disabled</description>
96913 <description>Read: Enabled</description>
96921 <description>Enable</description>
96930 <description>Disable interrupt</description>
96938 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
96945 <description>Read: Disabled</description>
96950 <description>Read: Enabled</description>
96958 <description>Disable</description>
96965 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
96972 <description>Read: Disabled</description>
96977 <description>Read: Enabled</description>
96985 <description>Disable</description>
96992 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
96999 <description>Read: Disabled</description>
97004 <description>Read: Enabled</description>
97012 <description>Disable</description>
97019 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
97026 <description>Read: Disabled</description>
97031 <description>Read: Enabled</description>
97039 <description>Disable</description>
97046 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
97053 <description>Read: Disabled</description>
97058 <description>Read: Enabled</description>
97066 <description>Disable</description>
97073 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
97080 <description>Read: Disabled</description>
97085 <description>Read: Enabled</description>
97093 <description>Disable</description>
97100 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
97107 <description>Read: Disabled</description>
97112 <description>Read: Enabled</description>
97120 <description>Disable</description>
97127 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
97134 <description>Read: Disabled</description>
97139 <description>Read: Enabled</description>
97147 <description>Disable</description>
97154 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
97161 <description>Read: Disabled</description>
97166 <description>Read: Enabled</description>
97174 <description>Disable</description>
97181 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
97188 <description>Read: Disabled</description>
97193 <description>Read: Enabled</description>
97201 <description>Disable</description>
97208 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
97215 <description>Read: Disabled</description>
97220 <description>Read: Enabled</description>
97228 <description>Disable</description>
97235 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
97242 <description>Read: Disabled</description>
97247 <description>Read: Enabled</description>
97255 <description>Disable</description>
97262 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
97269 <description>Read: Disabled</description>
97274 <description>Read: Enabled</description>
97282 <description>Disable</description>
97289 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
97296 <description>Read: Disabled</description>
97301 <description>Read: Enabled</description>
97309 <description>Disable</description>
97318 <description>Pending interrupts</description>
97326 <description>Read pending status of interrupt for event COMPARE[0]</description>
97333 <description>Read: Not pending</description>
97338 <description>Read: Pending</description>
97345 <description>Read pending status of interrupt for event COMPARE[1]</description>
97352 <description>Read: Not pending</description>
97357 <description>Read: Pending</description>
97364 <description>Read pending status of interrupt for event COMPARE[2]</description>
97371 <description>Read: Not pending</description>
97376 <description>Read: Pending</description>
97383 <description>Read pending status of interrupt for event COMPARE[3]</description>
97390 <description>Read: Not pending</description>
97395 <description>Read: Pending</description>
97402 <description>Read pending status of interrupt for event COMPARE[4]</description>
97409 <description>Read: Not pending</description>
97414 <description>Read: Pending</description>
97421 <description>Read pending status of interrupt for event COMPARE[5]</description>
97428 <description>Read: Not pending</description>
97433 <description>Read: Pending</description>
97440 <description>Read pending status of interrupt for event COMPARE[6]</description>
97447 <description>Read: Not pending</description>
97452 <description>Read: Pending</description>
97459 <description>Read pending status of interrupt for event COMPARE[7]</description>
97466 <description>Read: Not pending</description>
97471 <description>Read: Pending</description>
97478 <description>Read pending status of interrupt for event COMPARE[8]</description>
97485 <description>Read: Not pending</description>
97490 <description>Read: Pending</description>
97497 <description>Read pending status of interrupt for event COMPARE[9]</description>
97504 <description>Read: Not pending</description>
97509 <description>Read: Pending</description>
97516 <description>Read pending status of interrupt for event COMPARE[10]</description>
97523 <description>Read: Not pending</description>
97528 <description>Read: Pending</description>
97535 <description>Read pending status of interrupt for event COMPARE[11]</description>
97542 <description>Read: Not pending</description>
97547 <description>Read: Pending</description>
97554 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
97561 <description>Read: Not pending</description>
97566 <description>Read: Pending</description>
97573 <description>Read pending status of interrupt for event PWMPERIODEND</description>
97580 <description>Read: Not pending</description>
97585 <description>Read: Pending</description>
97594 <description>Enable or disable interrupt</description>
97602 <description>Enable or disable interrupt for event COMPARE[0]</description>
97608 <description>Disable</description>
97613 <description>Enable</description>
97620 <description>Enable or disable interrupt for event COMPARE[1]</description>
97626 <description>Disable</description>
97631 <description>Enable</description>
97638 <description>Enable or disable interrupt for event COMPARE[2]</description>
97644 <description>Disable</description>
97649 <description>Enable</description>
97656 <description>Enable or disable interrupt for event COMPARE[3]</description>
97662 <description>Disable</description>
97667 <description>Enable</description>
97674 <description>Enable or disable interrupt for event COMPARE[4]</description>
97680 <description>Disable</description>
97685 <description>Enable</description>
97692 <description>Enable or disable interrupt for event COMPARE[5]</description>
97698 <description>Disable</description>
97703 <description>Enable</description>
97710 <description>Enable or disable interrupt for event COMPARE[6]</description>
97716 <description>Disable</description>
97721 <description>Enable</description>
97728 <description>Enable or disable interrupt for event COMPARE[7]</description>
97734 <description>Disable</description>
97739 <description>Enable</description>
97746 <description>Enable or disable interrupt for event COMPARE[8]</description>
97752 <description>Disable</description>
97757 <description>Enable</description>
97764 <description>Enable or disable interrupt for event COMPARE[9]</description>
97770 <description>Disable</description>
97775 <description>Enable</description>
97782 <description>Enable or disable interrupt for event COMPARE[10]</description>
97788 <description>Disable</description>
97793 <description>Enable</description>
97800 <description>Enable or disable interrupt for event COMPARE[11]</description>
97806 <description>Disable</description>
97811 <description>Enable</description>
97818 <description>Enable or disable interrupt for event RTCOMPARESYNC</description>
97824 <description>Disable</description>
97829 <description>Enable</description>
97836 <description>Enable or disable interrupt for event PWMPERIODEND</description>
97842 <description>Disable</description>
97847 <description>Enable</description>
97856 <description>Enable interrupt</description>
97864 <description>Write '1' to enable interrupt for event COMPARE[0]</description>
97871 <description>Read: Disabled</description>
97876 <description>Read: Enabled</description>
97884 <description>Enable</description>
97891 <description>Write '1' to enable interrupt for event COMPARE[1]</description>
97898 <description>Read: Disabled</description>
97903 <description>Read: Enabled</description>
97911 <description>Enable</description>
97918 <description>Write '1' to enable interrupt for event COMPARE[2]</description>
97925 <description>Read: Disabled</description>
97930 <description>Read: Enabled</description>
97938 <description>Enable</description>
97945 <description>Write '1' to enable interrupt for event COMPARE[3]</description>
97952 <description>Read: Disabled</description>
97957 <description>Read: Enabled</description>
97965 <description>Enable</description>
97972 <description>Write '1' to enable interrupt for event COMPARE[4]</description>
97979 <description>Read: Disabled</description>
97984 <description>Read: Enabled</description>
97992 <description>Enable</description>
97999 <description>Write '1' to enable interrupt for event COMPARE[5]</description>
98006 <description>Read: Disabled</description>
98011 <description>Read: Enabled</description>
98019 <description>Enable</description>
98026 <description>Write '1' to enable interrupt for event COMPARE[6]</description>
98033 <description>Read: Disabled</description>
98038 <description>Read: Enabled</description>
98046 <description>Enable</description>
98053 <description>Write '1' to enable interrupt for event COMPARE[7]</description>
98060 <description>Read: Disabled</description>
98065 <description>Read: Enabled</description>
98073 <description>Enable</description>
98080 <description>Write '1' to enable interrupt for event COMPARE[8]</description>
98087 <description>Read: Disabled</description>
98092 <description>Read: Enabled</description>
98100 <description>Enable</description>
98107 <description>Write '1' to enable interrupt for event COMPARE[9]</description>
98114 <description>Read: Disabled</description>
98119 <description>Read: Enabled</description>
98127 <description>Enable</description>
98134 <description>Write '1' to enable interrupt for event COMPARE[10]</description>
98141 <description>Read: Disabled</description>
98146 <description>Read: Enabled</description>
98154 <description>Enable</description>
98161 <description>Write '1' to enable interrupt for event COMPARE[11]</description>
98168 <description>Read: Disabled</description>
98173 <description>Read: Enabled</description>
98181 <description>Enable</description>
98188 <description>Write '1' to enable interrupt for event RTCOMPARESYNC</description>
98195 <description>Read: Disabled</description>
98200 <description>Read: Enabled</description>
98208 <description>Enable</description>
98215 <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
98222 <description>Read: Disabled</description>
98227 <description>Read: Enabled</description>
98235 <description>Enable</description>
98244 <description>Disable interrupt</description>
98252 <description>Write '1' to disable interrupt for event COMPARE[0]</description>
98259 <description>Read: Disabled</description>
98264 <description>Read: Enabled</description>
98272 <description>Disable</description>
98279 <description>Write '1' to disable interrupt for event COMPARE[1]</description>
98286 <description>Read: Disabled</description>
98291 <description>Read: Enabled</description>
98299 <description>Disable</description>
98306 <description>Write '1' to disable interrupt for event COMPARE[2]</description>
98313 <description>Read: Disabled</description>
98318 <description>Read: Enabled</description>
98326 <description>Disable</description>
98333 <description>Write '1' to disable interrupt for event COMPARE[3]</description>
98340 <description>Read: Disabled</description>
98345 <description>Read: Enabled</description>
98353 <description>Disable</description>
98360 <description>Write '1' to disable interrupt for event COMPARE[4]</description>
98367 <description>Read: Disabled</description>
98372 <description>Read: Enabled</description>
98380 <description>Disable</description>
98387 <description>Write '1' to disable interrupt for event COMPARE[5]</description>
98394 <description>Read: Disabled</description>
98399 <description>Read: Enabled</description>
98407 <description>Disable</description>
98414 <description>Write '1' to disable interrupt for event COMPARE[6]</description>
98421 <description>Read: Disabled</description>
98426 <description>Read: Enabled</description>
98434 <description>Disable</description>
98441 <description>Write '1' to disable interrupt for event COMPARE[7]</description>
98448 <description>Read: Disabled</description>
98453 <description>Read: Enabled</description>
98461 <description>Disable</description>
98468 <description>Write '1' to disable interrupt for event COMPARE[8]</description>
98475 <description>Read: Disabled</description>
98480 <description>Read: Enabled</description>
98488 <description>Disable</description>
98495 <description>Write '1' to disable interrupt for event COMPARE[9]</description>
98502 <description>Read: Disabled</description>
98507 <description>Read: Enabled</description>
98515 <description>Disable</description>
98522 <description>Write '1' to disable interrupt for event COMPARE[10]</description>
98529 <description>Read: Disabled</description>
98534 <description>Read: Enabled</description>
98542 <description>Disable</description>
98549 <description>Write '1' to disable interrupt for event COMPARE[11]</description>
98556 <description>Read: Disabled</description>
98561 <description>Read: Enabled</description>
98569 <description>Disable</description>
98576 <description>Write '1' to disable interrupt for event RTCOMPARESYNC</description>
98583 <description>Read: Disabled</description>
98588 <description>Read: Enabled</description>
98596 <description>Disable</description>
98603 <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
98610 <description>Read: Disabled</description>
98615 <description>Read: Enabled</description>
98623 <description>Disable</description>
98632 <description>Pending interrupts</description>
98640 <description>Read pending status of interrupt for event COMPARE[0]</description>
98647 <description>Read: Not pending</description>
98652 <description>Read: Pending</description>
98659 <description>Read pending status of interrupt for event COMPARE[1]</description>
98666 <description>Read: Not pending</description>
98671 <description>Read: Pending</description>
98678 <description>Read pending status of interrupt for event COMPARE[2]</description>
98685 <description>Read: Not pending</description>
98690 <description>Read: Pending</description>
98697 <description>Read pending status of interrupt for event COMPARE[3]</description>
98704 <description>Read: Not pending</description>
98709 <description>Read: Pending</description>
98716 <description>Read pending status of interrupt for event COMPARE[4]</description>
98723 <description>Read: Not pending</description>
98728 <description>Read: Pending</description>
98735 <description>Read pending status of interrupt for event COMPARE[5]</description>
98742 <description>Read: Not pending</description>
98747 <description>Read: Pending</description>
98754 <description>Read pending status of interrupt for event COMPARE[6]</description>
98761 <description>Read: Not pending</description>
98766 <description>Read: Pending</description>
98773 <description>Read pending status of interrupt for event COMPARE[7]</description>
98780 <description>Read: Not pending</description>
98785 <description>Read: Pending</description>
98792 <description>Read pending status of interrupt for event COMPARE[8]</description>
98799 <description>Read: Not pending</description>
98804 <description>Read: Pending</description>
98811 <description>Read pending status of interrupt for event COMPARE[9]</description>
98818 <description>Read: Not pending</description>
98823 <description>Read: Pending</description>
98830 <description>Read pending status of interrupt for event COMPARE[10]</description>
98837 <description>Read: Not pending</description>
98842 <description>Read: Pending</description>
98849 <description>Read pending status of interrupt for event COMPARE[11]</description>
98856 <description>Read: Not pending</description>
98861 <description>Read: Pending</description>
98868 <description>Read pending status of interrupt for event RTCOMPARESYNC</description>
98875 <description>Read: Not pending</description>
98880 <description>Read: Pending</description>
98887 <description>Read pending status of interrupt for event PWMPERIODEND</description>
98894 <description>Read: Not pending</description>
98899 <description>Read: Pending</description>
98908 <description>Enable or disable event routing</description>
98916 <description>Enable or disable event routing for event PWMPERIODEND</description>
98922 <description>Disable</description>
98927 <description>Enable</description>
98936 <description>Enable event routing</description>
98944 <description>Write '1' to enable event routing for event PWMPERIODEND</description>
98951 <description>Read: Disabled</description>
98956 <description>Read: Enabled</description>
98964 <description>Enable</description>
98973 <description>Disable event routing</description>
98981 <description>Write '1' to disable event routing for event PWMPERIODEND</description>
98988 <description>Read: Disabled</description>
98993 <description>Read: Enabled</description>
99001 <description>Disable</description>
99010 <description>Counter mode selection</description>
99018 <description>Automatic enable to keep the SYSCOUNTER active.</description>
99024 <description>Default configuration to keep the SYSCOUNTER active.</description>
99029 …<description>In addition to the above mode, any local CPU that is not sleeping keep the SYSCOUNTER…
99036 <description>Enable the SYSCOUNTER</description>
99042 <description>SYSCOUNTER disabled</description>
99047 <description>SYSCOUNTER enabled</description>
99058 <description>Unspecified</description>
99064 …<description>Description cluster: The lower 32-bits of Capture/Compare register CC[n]</description>
99072 <description>Capture/Compare low value in 1 us</description>
99080 …<description>Description cluster: The higher 32-bits of Capture/Compare register CC[n]</descriptio…
99088 <description>Capture/Compare high value in 1 us</description>
99096 …<description>Description cluster: Count to add to CC[n] when this register is written.</descriptio…
99104 <description>Count to add to CC[n]</description>
99110 <description>Configure the Capture/Compare register</description>
99116 <description>Adds SYSCOUNTER value.</description>
99121 <description>Adds CC value.</description>
99130 <description>Description cluster: Configure Capture/Compare register CC[n]</description>
99138 <description>Configure the Capture/Compare register</description>
99144 <description>Capture/Compare register CC[n] Disabled.</description>
99149 <description>Capture/Compare register CC[n] enabled.</description>
99156 …<description>Status of event EVENTS_COMPARE[n] caused by the configured CC value is in past</descr…
99162 <description>Inactive</description>
99167 <description>Active</description>
99177 … <description>Timeout after all CPUs gone into sleep state to stop the SYSCOUNTER</description>
99185 <description>Number of 32Ki cycles</description>
99193 … <description>Count to add to CC[0] when the event EVENTS_COMPARE[0] triggers.</description>
99201 <description>Count to add to CC[0]</description>
99209 <description>GRTC wake up time.</description>
99217 …<description>Number of LFCLK clock cycles to wake up before the next scheduled EVENTS_COMPARE even…
99225 <description>PWM configuration.</description>
99233 <description>The PWM compare value</description>
99241 <description>Configuration of clock output</description>
99249 <description>Enable 32Ki clock output on pin</description>
99255 <description>Disabled</description>
99260 <description>Enabled</description>
99267 <description>Enable fast clock output on pin</description>
99273 <description>Disabled</description>
99278 <description>Enabled</description>
99287 <description>Clock Configuration</description>
99295 <description>Fast clock divisor value of clock output</description>
99301 <description>GRTC LFCLK clock source selection</description>
99308 <description>GRTC LFCLK clock source is LFXO</description>
99313 <description>GRTC LFCLK clock source is system LFCLK</description>
99318 <description>GRTC LFCLK clock source is LFLPRC</description>
99329 <description>Unspecified</description>
99335 … <description>Description cluster: The lower 32-bits of the SYSCOUNTER for index [n]</description>
99343 <description>The lower 32-bits of the SYSCOUNTER value.</description>
99351 … <description>Description cluster: The higher 20-bits of the SYSCOUNTER for index [n]</description>
99359 <description>The higher 20-bits of the SYSCOUNTER value.</description>
99365 <description>SYSCOUNTER loaded status</description>
99371 <description>SYSCOUNTER is not loaded</description>
99376 <description>SYSCOUNTER is loaded</description>
99383 <description>SYSCOUNTER busy status</description>
99389 <description>SYSCOUNTER is ready for read</description>
99394 …<description>SYSCOUNTER is busy, so not ready for read (value returned in the VALUE field of this …
99401 <description>The SYSCOUNTERL overflow indication after reading it.</description>
99407 <description>SYSCOUNTERL is not overflown</description>
99412 <description>SYSCOUNTERL overflown</description>
99421 …<description>Description cluster: Request to keep the SYSCOUNTER in the active state and prevent g…
99429 <description>Keep SYSCOUNTER in active state</description>
99435 <description>Allow SYSCOUNTER to go to sleep</description>
99440 <description>Keep SYSCOUNTER active</description>
99452 <description>Global Real-time counter 1</description>
99476 <description>Time division multiplexed audio interface 0</description>
99495 … <description>Starts continuous TDM transfer. Also starts MCK when this is enabled</description>
99503 … <description>Starts continuous TDM transfer. Also starts MCK when this is enabled</description>
99509 <description>Trigger task</description>
99518 <description>Stops TDM transfer after the completion of MAXCNT words. Triggering this
99519 task will cause the STOPPED event to be generated.</description>
99527 <description>Stops TDM transfer after the completion of MAXCNT words. Triggering this
99528 task will cause the STOPPED event to be generated.</description>
99534 <description>Trigger task</description>
99543 <description>Abort TDM transfer without completing MAXCNT words. Triggering this task
99544 will cause the ABORTED event to be generated.</description>
99552 <description>Abort TDM transfer without completing MAXCNT words. Triggering this task
99553 will cause the ABORTED event to be generated.</description>
99559 <description>Trigger task</description>
99568 <description>Subscribe configuration for task START</description>
99576 <description>DPPI channel that task START will subscribe to</description>
99587 <description>Disable subscription</description>
99592 <description>Enable subscription</description>
99601 <description>Subscribe configuration for task STOP</description>
99609 <description>DPPI channel that task STOP will subscribe to</description>
99620 <description>Disable subscription</description>
99625 <description>Enable subscription</description>
99634 <description>Subscribe configuration for task ABORT</description>
99642 <description>DPPI channel that task ABORT will subscribe to</description>
99653 <description>Disable subscription</description>
99658 <description>Enable subscription</description>
99667 <description>The RXD.PTR register has been copied to internal double-buffers.
99668 …, this event will be generated for every RXTXD.MAXCNT words received on the SDIN pin.</description>
99676 <description>The RXD.PTR register has been copied to internal double-buffers.
99677 …, this event will be generated for every RXTXD.MAXCNT words received on the SDIN pin.</description>
99683 <description>Event not generated</description>
99688 <description>Event generated</description>
99697 <description>Transfer stopped.</description>
99705 <description>Transfer stopped.</description>
99711 <description>Event not generated</description>
99716 <description>Event generated</description>
99725 <description>Transfer aborted.</description>
99733 <description>Transfer aborted.</description>
99739 <description>Event not generated</description>
99744 <description>Event generated</description>
99753 <description>The TDX.PTR register has been copied to internal double-buffers.
99754 … event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin.</description>
99762 <description>The TDX.PTR register has been copied to internal double-buffers.
99763 … event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin.</description>
99769 <description>Event not generated</description>
99774 <description>Event generated</description>
99783 …<description>MAXCNT block event, generated on the active edge of FSYNC of every MAXCNT block</desc…
99791 …<description>MAXCNT block event, generated on the active edge of FSYNC of every MAXCNT block</desc…
99797 <description>Event not generated</description>
99802 <description>Event generated</description>
99811 <description>Publish configuration for event RXPTRUPD</description>
99819 <description>DPPI channel that event RXPTRUPD will publish to</description>
99830 <description>Disable publishing</description>
99835 <description>Enable publishing</description>
99844 <description>Publish configuration for event STOPPED</description>
99852 <description>DPPI channel that event STOPPED will publish to</description>
99863 <description>Disable publishing</description>
99868 <description>Enable publishing</description>
99877 <description>Publish configuration for event ABORTED</description>
99885 <description>DPPI channel that event ABORTED will publish to</description>
99896 <description>Disable publishing</description>
99901 <description>Enable publishing</description>
99910 <description>Publish configuration for event TXPTRUPD</description>
99918 <description>DPPI channel that event TXPTRUPD will publish to</description>
99929 <description>Disable publishing</description>
99934 <description>Enable publishing</description>
99943 <description>Publish configuration for event MAXCNT</description>
99951 <description>DPPI channel that event MAXCNT will publish to</description>
99962 <description>Disable publishing</description>
99967 <description>Enable publishing</description>
99976 <description>Enable or disable interrupt</description>
99984 <description>Enable or disable interrupt for event RXPTRUPD</description>
99990 <description>Disable</description>
99995 <description>Enable</description>
100002 <description>Enable or disable interrupt for event STOPPED</description>
100008 <description>Disable</description>
100013 <description>Enable</description>
100020 <description>Enable or disable interrupt for event ABORTED</description>
100026 <description>Disable</description>
100031 <description>Enable</description>
100038 <description>Enable or disable interrupt for event TXPTRUPD</description>
100044 <description>Disable</description>
100049 <description>Enable</description>
100056 <description>Enable or disable interrupt for event MAXCNT</description>
100062 <description>Disable</description>
100067 <description>Enable</description>
100076 <description>Enable interrupt</description>
100084 <description>Write '1' to enable interrupt for event RXPTRUPD</description>
100091 <description>Read: Disabled</description>
100096 <description>Read: Enabled</description>
100104 <description>Enable</description>
100111 <description>Write '1' to enable interrupt for event STOPPED</description>
100118 <description>Read: Disabled</description>
100123 <description>Read: Enabled</description>
100131 <description>Enable</description>
100138 <description>Write '1' to enable interrupt for event ABORTED</description>
100145 <description>Read: Disabled</description>
100150 <description>Read: Enabled</description>
100158 <description>Enable</description>
100165 <description>Write '1' to enable interrupt for event TXPTRUPD</description>
100172 <description>Read: Disabled</description>
100177 <description>Read: Enabled</description>
100185 <description>Enable</description>
100192 <description>Write '1' to enable interrupt for event MAXCNT</description>
100199 <description>Read: Disabled</description>
100204 <description>Read: Enabled</description>
100212 <description>Enable</description>
100221 <description>Disable interrupt</description>
100229 <description>Write '1' to disable interrupt for event RXPTRUPD</description>
100236 <description>Read: Disabled</description>
100241 <description>Read: Enabled</description>
100249 <description>Disable</description>
100256 <description>Write '1' to disable interrupt for event STOPPED</description>
100263 <description>Read: Disabled</description>
100268 <description>Read: Enabled</description>
100276 <description>Disable</description>
100283 <description>Write '1' to disable interrupt for event ABORTED</description>
100290 <description>Read: Disabled</description>
100295 <description>Read: Enabled</description>
100303 <description>Disable</description>
100310 <description>Write '1' to disable interrupt for event TXPTRUPD</description>
100317 <description>Read: Disabled</description>
100322 <description>Read: Enabled</description>
100330 <description>Disable</description>
100337 <description>Write '1' to disable interrupt for event MAXCNT</description>
100344 <description>Read: Disabled</description>
100349 <description>Read: Enabled</description>
100357 <description>Disable</description>
100366 <description>Enable TDM</description>
100374 <description>Enable TDM</description>
100380 <description>Disable</description>
100385 <description>Enable</description>
100394 <description>Configuration registers.</description>
100400 <description>Mode configuration</description>
100408 <description>Mode configuration</description>
100414 …<description>Master mode. SCK and FSYNC generated from internal master clock (MCK) and output on P…
100419 …<description>Slave mode. SCK and FSYNC generated by external master and received on PSEL.SCK and P…
100428 <description>Reception (RX) and transmission (TX) enable.</description>
100436 <description>Enable reception or transmission.</description>
100442 …description>Enable both reception and transmission. Data will be written to the RXD.PTR address an…
100447 …<description>Enable reception, disable transmission. Data will be written to the RXD.PTR address.<…
100452 …<description>Enable transmission, disable reception. Data will be transmitted from the TXD.PTR add…
100461 <description>Unspecified</description>
100467 <description>Master clock generator enable.</description>
100475 <description>Master clock generator enable.</description>
100481 <description>Master clock generator disabled.</description>
100486 <description>Master clock generator enabled.</description>
100495 <description>MCK divider.</description>
100503 <description>MCK frequency configuration</description>
100509 <description>CK divided by 2</description>
100514 <description>CK divided by 3</description>
100519 <description>CK divided by 4</description>
100524 <description>CK divided by 5</description>
100529 <description>CK divided by 6</description>
100534 <description>CK divided by 8</description>
100539 <description>CK divided by 10</description>
100544 <description>CK divided by 11</description>
100549 <description>CK divided by 15</description>
100554 <description>CK divided by 16</description>
100559 <description>CK divided by 21</description>
100564 <description>CK divided by 23</description>
100569 <description>CK divided by 30</description>
100574 <description>CK divided by 31</description>
100579 <description>CK divided by 32</description>
100584 <description>CK divided by 42</description>
100589 <description>CK divided by 63</description>
100594 <description>CK divided by 125</description>
100603 <description>MCK clock source selection</description>
100611 <description>Clock source selection</description>
100617 <description>32MHz peripheral clock</description>
100622 <description>Audio PLL clock</description>
100629 …<description>Bypass clock generator. MCK will be equal to source input. If bypass is enabled the M…
100635 <description>Disable bypass</description>
100640 <description>Enable bypass</description>
100650 <description>Unspecified</description>
100656 <description>SCK divider.</description>
100664 <description>SCK frequency configuration</description>
100670 <description>CK divided by 2</description>
100675 <description>CK divided by 3</description>
100680 <description>CK divided by 4</description>
100685 <description>CK divided by 5</description>
100690 <description>CK divided by 6</description>
100695 <description>CK divided by 8</description>
100700 <description>CK divided by 10</description>
100705 <description>CK divided by 11</description>
100710 <description>CK divided by 15</description>
100715 <description>CK divided by 16</description>
100720 <description>CK divided by 21</description>
100725 <description>CK divided by 23</description>
100730 <description>CK divided by 30</description>
100735 <description>CK divided by 31</description>
100740 <description>CK divided by 32</description>
100745 <description>CK divided by 42</description>
100750 <description>CK divided by 63</description>
100755 <description>CK divided by 125</description>
100764 <description>SCK clock source selection</description>
100772 <description>Clock source selection</description>
100778 <description>32MHz peripheral clock</description>
100783 <description>Audio PLL clock</description>
100790 …<description>Bypass clock generator. SCK will be equal to source input. If bypass is enabled the S…
100796 <description>Disable bypass</description>
100801 <description>Enable bypass</description>
100810 <description>Set SCK Polarity.</description>
100818 <description>Set the polarity of the active SCK edge.</description>
100824 … <description>TX data is written to the SDOUT pin on the falling edge of SCK, ready to be
100825 received on the rising edge of SCK.</description>
100830 … <description>TX data is written to the SDOUT pin on the rising edge of SCK, ready to be
100831 received on the falling edge of SCK.</description>
100841 <description>Sample and word width configuration.</description>
100849 <description>Sample and word width</description>
100855 <description>8 bit sample in an 8-bit word.</description>
100860 <description>16 bit sample in a 16-bit word.</description>
100865 <description>24 bit sample in a 24-bit word.</description>
100870 <description>32 bit sample in a 32-bit word.</description>
100875 <description>8 bit sample in a 16-bit word.</description>
100880 <description>8 bit sample in a 32-bit word.</description>
100885 <description>16 bit sample in a 32-bit word.</description>
100890 <description>24 bit sample in a 32-bit word.</description>
100899 <description>Alignment of sample within the audio data word.</description>
100907 <description>Alignment of sample within the audio data word.</description>
100913 <description>Left-aligned.</description>
100918 <description>Right-aligned.</description>
100927 <description>Unspecified</description>
100933 <description>Select which channels are to be used.</description>
100946 <description>Disable Rx channel data.</description>
100951 <description>Enable Rx channel data.</description>
100963 <description>Disable Rx channel data.</description>
100968 <description>Enable Rx channel data.</description>
100980 <description>Disable Rx channel data.</description>
100985 <description>Enable Rx channel data.</description>
100997 <description>Disable Rx channel data.</description>
101002 <description>Enable Rx channel data.</description>
101014 <description>Disable Rx channel data.</description>
101019 <description>Enable Rx channel data.</description>
101031 <description>Disable Rx channel data.</description>
101036 <description>Enable Rx channel data.</description>
101048 <description>Disable Rx channel data.</description>
101053 <description>Enable Rx channel data.</description>
101065 <description>Disable Rx channel data.</description>
101070 <description>Enable Rx channel data.</description>
101082 <description>Disable Tx channel data.</description>
101087 <description>Enable Tx channel data.</description>
101099 <description>Disable Tx channel data.</description>
101104 <description>Enable Tx channel data.</description>
101116 <description>Disable Tx channel data.</description>
101121 <description>Enable Tx channel data.</description>
101133 <description>Disable Tx channel data.</description>
101138 <description>Enable Tx channel data.</description>
101150 <description>Disable Tx channel data.</description>
101155 <description>Enable Tx channel data.</description>
101167 <description>Disable Tx channel data.</description>
101172 <description>Enable Tx channel data.</description>
101184 <description>Disable Tx channel data.</description>
101189 <description>Enable Tx channel data.</description>
101201 <description>Disable Tx channel data.</description>
101206 <description>Enable Tx channel data.</description>
101215 <description>Select number of channels.</description>
101223 <description>Select number of channels.</description>
101229 <description>1-channel audio (mono).</description>
101234 <description>2-channel audio (stereo).</description>
101239 <description>3-channel audio.</description>
101244 <description>4-channel audio.</description>
101249 <description>5-channel audio.</description>
101254 <description>6-channel audio.</description>
101259 <description>7-channel audio.</description>
101264 <description>8-channel audio.</description>
101273 <description>Set channel delay.</description>
101281 …<description>Configure number of inactive SCK periods from edge of FSYNC until start of first data…
101287 <description>No delay. Used with I2S DSP/Aligned format.</description>
101292 … <description>One clock pulse delay. Used with Original I2S format.</description>
101297 <description>Two clock pulses delay.</description>
101307 <description>Unspecified</description>
101313 <description>Set FSYNC Polarity.</description>
101321 <description>Set the polarity of the active period of FSYNC.</description>
101327 <description>Frame starts at falling edge of FSYNC.</description>
101332 <description>Frame starts at rising edge of FSYNC.</description>
101341 <description>Set FSYNC Duration.</description>
101349 … <description>Set the duration of the active period of FSYNC in Master mode.</description>
101355 <description>FSYNC is active for the duration of one SCK pulse</description>
101360 <description>FSYNC is active for the duration of channel</description>
101370 … <description>Over-read sample: Extra sample bytes that are transmitted after TXD.MAXCNT bytes
101371 have been transmitted, in the case when RXD.MAXCNT is greater than TXD.MAXCNT.</description>
101379 … <description>Data transmitted after TXD.MAXCNT bytes have been transmitted in the case when
101380 RXD.MAXCNT is greater than TXD.MAXCNT.</description>
101389 <description>Unspecified</description>
101395 <description>Pin select for MCK signal</description>
101403 <description>Pin number</description>
101409 <description>Port number</description>
101415 <description>Connection</description>
101421 <description>Disconnect</description>
101426 <description>Connect</description>
101435 <description>Pin select for SCK signal</description>
101443 <description>Pin number</description>
101449 <description>Port number</description>
101455 <description>Connection</description>
101461 <description>Disconnect</description>
101466 <description>Connect</description>
101475 <description>Pin select for FSYNC signal</description>
101483 <description>Pin number</description>
101489 <description>Port number</description>
101495 <description>Connection</description>
101501 <description>Disconnect</description>
101506 <description>Connect</description>
101515 <description>Pin select for SDIN signal</description>
101523 <description>Pin number</description>
101529 <description>Port number</description>
101535 <description>Connection</description>
101541 <description>Disconnect</description>
101546 <description>Connect</description>
101555 <description>Pin select for SDOUT signal</description>
101563 <description>Pin number</description>
101569 <description>Port number</description>
101575 <description>Connection</description>
101581 <description>Disconnect</description>
101586 <description>Connect</description>
101596 <description>Unspecified</description>
101602 <description>RAM buffer start address</description>
101610 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
101618 <description>Maximum number of bytes in channel buffer</description>
101626 <description>Maximum number of bytes in channel buffer</description>
101634 …<description>Number of bytes transferred in the last transaction, updated after the END event.</de…
101642 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
101650 <description>Number of bytes transferred in the current transaction</description>
101658 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
101666 <description>Configure EasyDMA mode</description>
101674 <description>Enable low-power operation, or use low-latency</description>
101680 <description>Low-latency operation</description>
101685 <description>Low-power operation</description>
101694 <description>Terminate the transaction if a BUSERROR event is detected.</description>
101707 <description>Disable</description>
101712 <description>Enable</description>
101721 … <description>Address of transaction that generated the last BUSERROR event.</description>
101737 <description>Unspecified</description>
101743 <description>RAM buffer start address</description>
101751 …<description>RAM buffer start address for this EasyDMA channel. This address is a word aligned Dat…
101759 <description>Maximum number of bytes in channel buffer</description>
101767 <description>Maximum number of bytes in channel buffer</description>
101775 …<description>Number of bytes transferred in the last transaction, updated after the END event.</de…
101783 …<description>Number of bytes transferred in the last transaction. In case of NACK error, includes …
101791 <description>Number of bytes transferred in the current transaction</description>
101799 …<description>Number of bytes transferred in the current transaction. Continuously updated.</descri…
101807 <description>Configure EasyDMA mode</description>
101815 <description>Enable low-power operation, or use low-latency</description>
101821 <description>Low-latency operation</description>
101826 <description>Low-power operation</description>
101835 <description>Terminate the transaction if a BUSERROR event is detected.</description>
101848 <description>Disable</description>
101853 <description>Enable</description>
101862 … <description>Address of transaction that generated the last BUSERROR event.</description>
101880 <description>Time division multiplexed audio interface 1</description>
101891 <description>Serial Peripheral Interface Master with EasyDMA 8</description>
101902 <description>SPI Slave 8</description>
101914 <description>I2C compatible Two-Wire Master Interface with EasyDMA 6</description>
101926 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 6</description>
101938 <description>UART with EasyDMA 8</description>
101950 <description>Serial Peripheral Interface Master with EasyDMA 9</description>
101961 <description>SPI Slave 9</description>
101973 <description>I2C compatible Two-Wire Master Interface with EasyDMA 7</description>
101985 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 7</description>
101997 <description>UART with EasyDMA 9</description>
102009 <description>Serial Peripheral Interface Master with EasyDMA 10</description>
102020 <description>SPI Slave 10</description>
102032 <description>I2C compatible Two-Wire Master Interface with EasyDMA 8</description>
102044 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 8</description>
102056 <description>UART with EasyDMA 10</description>
102068 <description>Serial Peripheral Interface Master with EasyDMA 11</description>
102079 <description>SPI Slave 11</description>
102091 <description>I2C compatible Two-Wire Master Interface with EasyDMA 9</description>
102103 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 9</description>
102115 <description>UART with EasyDMA 11</description>
102127 <description>Tamper controller</description>
102146 <description>Tamper controller detected an error.</description>
102154 <description>Tamper controller detected an error.</description>
102160 <description>Event not generated</description>
102165 <description>Event generated</description>
102174 …<description>Attempt to write a VALUE in PROTECT registers without clearing the WRITEPROTECT.</des…
102182 …<description>Attempt to write a VALUE in PROTECT registers without clearing the WRITEPROTECT.</des…
102188 <description>Event not generated</description>
102193 <description>Event generated</description>
102202 <description>Enable or disable interrupt</description>
102210 <description>Enable or disable interrupt for event TAMPER</description>
102216 <description>Disable</description>
102221 <description>Enable</description>
102228 <description>Enable or disable interrupt for event WRITEERROR</description>
102234 <description>Disable</description>
102239 <description>Enable</description>
102248 <description>Enable interrupt</description>
102256 <description>Write '1' to enable interrupt for event TAMPER</description>
102263 <description>Read: Disabled</description>
102268 <description>Read: Enabled</description>
102276 <description>Enable</description>
102283 <description>Write '1' to enable interrupt for event WRITEERROR</description>
102290 <description>Read: Disabled</description>
102295 <description>Read: Enabled</description>
102303 <description>Enable</description>
102312 <description>Disable interrupt</description>
102320 <description>Write '1' to disable interrupt for event TAMPER</description>
102327 <description>Read: Disabled</description>
102332 <description>Read: Enabled</description>
102340 <description>Disable</description>
102347 <description>Write '1' to disable interrupt for event WRITEERROR</description>
102354 <description>Read: Disabled</description>
102359 <description>Read: Enabled</description>
102367 <description>Disable</description>
102376 <description>Pending interrupts</description>
102384 <description>Read pending status of interrupt for event TAMPER</description>
102391 <description>Read: Not pending</description>
102396 <description>Read: Pending</description>
102403 <description>Read pending status of interrupt for event WRITEERROR</description>
102410 <description>Read: Not pending</description>
102415 <description>Read: Pending</description>
102424 <description>The tamper controller status.</description>
102433 <description>Active shield detector detected an error.</description>
102439 <description>Not detected.</description>
102444 <description>Detected.</description>
102451 <description>Error detected for the protected signals.</description>
102457 <description>Not detected.</description>
102462 <description>Detected.</description>
102469 <description>CRACEN detected an error.</description>
102475 <description>Not detected.</description>
102480 <description>Detected.</description>
102487 <description>Slow domain glitch detector 0 detected an error.</description>
102493 <description>Not detected.</description>
102498 <description>Detected.</description>
102505 <description>Fast domain glitch detector 0 detected an error.</description>
102511 <description>Not detected.</description>
102516 <description>Detected.</description>
102523 <description>Fast domain glitch detector 1 detected an error.</description>
102529 <description>Not detected.</description>
102534 <description>Detected.</description>
102541 <description>Fast domain glitch detector 2 detected an error.</description>
102547 <description>Not detected.</description>
102552 <description>Detected.</description>
102559 <description>Fast domain glitch detector 3 detected an error.</description>
102565 <description>Not detected.</description>
102570 <description>Detected.</description>
102579 <description>Unspecified</description>
102585 <description>Active shield detector channel enable register.</description>
102593 <description>Enable or disable active shield channel 0.</description>
102599 <description>Disable channel.</description>
102604 <description>Enable channel.</description>
102611 <description>Enable or disable active shield channel 1.</description>
102617 <description>Disable channel.</description>
102622 <description>Enable channel.</description>
102629 <description>Enable or disable active shield channel 2.</description>
102635 <description>Disable channel.</description>
102640 <description>Enable channel.</description>
102647 <description>Enable or disable active shield channel 3.</description>
102653 <description>Disable channel.</description>
102658 <description>Enable channel.</description>
102668 <description>Unspecified</description>
102676 <description>Unspecified</description>
102682 <description>Unspecified</description>
102688 …<description>Description cluster: Control register for invasive (halting) debug enable for the loc…
102696 <description>Set value of dbgen signal.</description>
102702 <description>Signal is logic 0.</description>
102707 <description>Signal is logic 1.</description>
102714 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
102722 <description>Lock disabled.</description>
102727 <description>Lock enabled.</description>
102734 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
102740 <description>Read: Write protection is disabled.</description>
102745 <description>Read: Write protection is enabled.</description>
102750 <description>Write: Value to clear write protection.</description>
102757 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
102764 <description>Write key value.</description>
102773 …<description>Description cluster: Status register for invasive (halting) debug enable for domain n…
102782 <description>Error detection status.</description>
102788 <description>No error detected.</description>
102793 <description>Error detected.</description>
102803 <description>Unspecified</description>
102809 …<description>Description cluster: Control register for non-invasive debug enable for the local deb…
102817 <description>Set value of niden signal.</description>
102823 <description>Signal is logic 0.</description>
102828 <description>Signal is logic 1.</description>
102835 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
102843 <description>Lock disabled.</description>
102848 <description>Lock enabled.</description>
102855 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
102861 <description>Read: Write protection is disabled.</description>
102866 <description>Read: Write protection is enabled.</description>
102871 <description>Write: Value to clear write protection.</description>
102878 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
102885 <description>Write key value.</description>
102894 …<description>Description cluster: Status register for non-invasive debug enable for domain n.</des…
102903 <description>Error detection status.</description>
102909 <description>No error detected.</description>
102914 <description>Error detected.</description>
102924 <description>Unspecified</description>
102930 …description>Description cluster: Control register for secure priviliged invasive (halting) debug e…
102938 <description>Set value of spiden signal.</description>
102944 <description>Signal is logic 0.</description>
102949 <description>Signal is logic 1.</description>
102956 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
102964 <description>Lock disabled.</description>
102969 <description>Lock enabled.</description>
102976 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
102982 <description>Read: Write protection is disabled.</description>
102987 <description>Read: Write protection is enabled.</description>
102992 <description>Write: Value to clear write protection.</description>
102999 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103006 <description>Write key value.</description>
103015 …<description>Description cluster: Status register for secure priviliged invasive (halting) debug e…
103024 <description>Error detection status.</description>
103030 <description>No error detected.</description>
103035 <description>Error detected.</description>
103045 <description>Unspecified</description>
103051 …description>Description cluster: Control register for secure priviliged non-invasive debug enable …
103059 <description>Set value of spniden signal.</description>
103065 <description>Signal is logic 0.</description>
103070 <description>Signal is logic 1.</description>
103077 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
103085 <description>Lock disabled.</description>
103090 <description>Lock enabled.</description>
103097 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
103103 <description>Read: Write protection is disabled.</description>
103108 <description>Read: Write protection is enabled.</description>
103113 <description>Write: Value to clear write protection.</description>
103120 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103127 <description>Write key value.</description>
103136 …<description>Description cluster: Status register for secure priviliged non-invasive debug enable …
103145 <description>Error detection status.</description>
103151 <description>No error detected.</description>
103156 <description>Error detected.</description>
103169 <description>Unspecified</description>
103175 <description>Unspecified</description>
103181 …<description>Description cluster: Control register to enable invasive (halting) debug in domain n'…
103189 <description>Set value of dbgen signal.</description>
103195 <description>Signal is logic 0.</description>
103200 <description>Signal is logic 1.</description>
103207 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
103215 <description>Lock disabled.</description>
103220 <description>Lock enabled.</description>
103227 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
103233 <description>Read: Write protection is disabled.</description>
103238 <description>Read: Write protection is enabled.</description>
103243 <description>Write: Value to clear write protection.</description>
103250 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103257 <description>Write key value.</description>
103266 …<description>Description cluster: Status register for invasive (halting) debug enable for domain n…
103275 <description>Error detection status.</description>
103281 <description>No error detected.</description>
103286 <description>Error detected.</description>
103297 <description>Enable active shield detector.</description>
103303 <description>Control register for active shield detector enable signal.</description>
103311 <description>Set value of active shield enable signal.</description>
103317 <description>Signal is logic 0.</description>
103322 <description>Signal is logic 1.</description>
103329 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
103337 <description>Lock disabled.</description>
103342 <description>Lock enabled.</description>
103349 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
103355 <description>Read: Write protection is disabled.</description>
103360 <description>Read: Write protection is enabled.</description>
103365 <description>Write: Value to clear write protection.</description>
103372 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103379 <description>Write key value.</description>
103388 <description>Status register for active shield detector enable signal.</description>
103397 <description>Error detection status.</description>
103403 <description>No error detected.</description>
103408 <description>Error detected.</description>
103418 <description>Enable tamper detector from CRACEN.</description>
103424 <description>Control register for CRACEN tamper detector enable signal.</description>
103432 <description>Set value of CRACEN tamper detector enable signal.</description>
103438 <description>Signal is logic 0.</description>
103443 <description>Signal is logic 1.</description>
103450 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
103458 <description>Lock disabled.</description>
103463 <description>Lock enabled.</description>
103470 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
103476 <description>Read: Write protection is disabled.</description>
103481 <description>Read: Write protection is enabled.</description>
103486 <description>Write: Value to clear write protection.</description>
103493 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103500 <description>Write key value.</description>
103509 <description>Status register for CRACEN tamper detector enable signal.</description>
103518 <description>Error detection status.</description>
103524 <description>No error detected.</description>
103529 <description>Error detected.</description>
103539 <description>Enable slow domain glitch detectors.</description>
103545 … <description>Control register for slow domain glitch detectors enable signal.</description>
103553 … <description>Set value of slow domain glitch detectors enable signal.</description>
103559 <description>Signal is logic 0.</description>
103564 <description>Signal is logic 1.</description>
103571 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
103579 <description>Lock disabled.</description>
103584 <description>Lock enabled.</description>
103591 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
103597 <description>Read: Write protection is disabled.</description>
103602 <description>Read: Write protection is enabled.</description>
103607 <description>Write: Value to clear write protection.</description>
103614 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103621 <description>Write key value.</description>
103630 … <description>Status register for slow domain glitch detectors enable signal.</description>
103639 <description>Error detection status.</description>
103645 <description>No error detected.</description>
103650 <description>Error detected.</description>
103660 <description>Enable fast domain glitch detectors.</description>
103666 … <description>Control register for fast domain glitch detectors enable signal.</description>
103674 … <description>Set value of fast domain glitch detector's enable signal.</description>
103680 <description>Signal is logic 0.</description>
103685 <description>Signal is logic 1.</description>
103692 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
103700 <description>Lock disabled.</description>
103705 <description>Lock enabled.</description>
103712 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
103718 <description>Read: Write protection is disabled.</description>
103723 <description>Read: Write protection is enabled.</description>
103728 <description>Write: Value to clear write protection.</description>
103735 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103742 <description>Write key value.</description>
103751 … <description>Status register for fast domain glitch detectors enable signal.</description>
103760 <description>Error detection status.</description>
103766 <description>No error detected.</description>
103771 <description>Error detected.</description>
103781 …<description>Trigger a reset when tamper is detected by the external tamper detectors.</descriptio…
103787 <description>Control register for external tamper reset enable signal.</description>
103795 <description>Set value of external tamper reset enable signal.</description>
103801 <description>Signal is logic 0.</description>
103806 <description>Signal is logic 1.</description>
103813 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
103821 <description>Lock disabled.</description>
103826 <description>Lock enabled.</description>
103833 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
103839 <description>Read: Write protection is disabled.</description>
103844 <description>Read: Write protection is enabled.</description>
103849 <description>Write: Value to clear write protection.</description>
103856 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103863 <description>Write key value.</description>
103872 <description>Status register for external tamper reset enable signal.</description>
103881 <description>Error detection status.</description>
103887 <description>No error detected.</description>
103892 <description>Error detected.</description>
103902 …<description>Trigger a reset when tamper is detected by the glitch detectors, signal protector or …
103908 <description>Control register for internal tamper reset enable signal.</description>
103916 <description>Set value of internal tamper reset enable signal.</description>
103922 <description>Signal is logic 0.</description>
103927 <description>Signal is logic 1.</description>
103934 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
103942 <description>Lock disabled.</description>
103947 <description>Lock enabled.</description>
103954 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
103960 <description>Read: Write protection is disabled.</description>
103965 <description>Read: Write protection is enabled.</description>
103970 <description>Write: Value to clear write protection.</description>
103977 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
103984 <description>Write key value.</description>
103993 <description>Status register for internal tamper reset enable signal.</description>
104002 <description>Error detection status.</description>
104008 <description>No error detected.</description>
104013 <description>Error detected.</description>
104023 <description>Device erase protection.</description>
104029 <description>Control register for erase protection.</description>
104037 <description>Set value of eraseprotect signal.</description>
104043 <description>Signal is logic 0.</description>
104048 <description>Signal is logic 1.</description>
104055 …<description>Lock this register to prevent changes to the VALUE field until next reset.</descripti…
104063 <description>Lock disabled.</description>
104068 <description>Lock enabled.</description>
104075 …<description>The write protection must be cleared to allow updates to the VALUE field.</descriptio…
104081 <description>Read: Write protection is disabled.</description>
104086 <description>Read: Write protection is enabled.</description>
104091 <description>Write: Value to clear write protection.</description>
104098 …<description>Required write key for upper 16 bits. Must be included in all register write operatio…
104105 <description>Write key value.</description>
104114 <description>Status register for eraseprotect.</description>
104123 <description>Error detection status.</description>
104129 <description>No error detected.</description>
104134 <description>Error detected.</description>
104147 <description>System protection unit 3</description>
104158 <description>Distributed programmable peripheral interconnect controller 6</description>
104166 <description>Distributed programmable peripheral interconnect controller 7</description>
104174 <description>PPIB APB registers 14</description>
104181 <description>PPIB APB registers 15</description>
104188 <description>Serial Peripheral Interface Master with EasyDMA 12</description>
104199 <description>SPI Slave 12</description>
104211 <description>I2C compatible Two-Wire Master Interface with EasyDMA 10</description>
104223 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 10</description>
104235 <description>UART with EasyDMA 12</description>
104247 <description>Serial Peripheral Interface Master with EasyDMA 13</description>
104258 <description>SPI Slave 13</description>
104270 <description>I2C compatible Two-Wire Master Interface with EasyDMA 11</description>
104282 <description>I2C compatible Two-Wire Slave Interface with EasyDMA 11</description>
104294 <description>UART with EasyDMA 13</description>
104306 <description>Comparator 0</description>
104325 <description>Start comparator</description>
104333 <description>Start comparator</description>
104339 <description>Trigger task</description>
104348 <description>Stop comparator</description>
104356 <description>Stop comparator</description>
104362 <description>Trigger task</description>
104371 …<description>Sample comparator value. This task requires that COMP has been started by the START T…
104379 …<description>Sample comparator value. This task requires that COMP has been started by the START T…
104385 <description>Trigger task</description>
104394 <description>Subscribe configuration for task START</description>
104402 <description>DPPI channel that task START will subscribe to</description>
104413 <description>Disable subscription</description>
104418 <description>Enable subscription</description>
104427 <description>Subscribe configuration for task STOP</description>
104435 <description>DPPI channel that task STOP will subscribe to</description>
104446 <description>Disable subscription</description>
104451 <description>Enable subscription</description>
104460 <description>Subscribe configuration for task SAMPLE</description>
104468 <description>DPPI channel that task SAMPLE will subscribe to</description>
104479 <description>Disable subscription</description>
104484 <description>Enable subscription</description>
104493 <description>COMP is ready and output is valid</description>
104501 <description>COMP is ready and output is valid</description>
104507 <description>Event not generated</description>
104512 <description>Event generated</description>
104521 <description>Downward crossing</description>
104529 <description>Downward crossing</description>
104535 <description>Event not generated</description>
104540 <description>Event generated</description>
104549 <description>Upward crossing</description>
104557 <description>Upward crossing</description>
104563 <description>Event not generated</description>
104568 <description>Event generated</description>
104577 <description>Downward or upward crossing</description>
104585 <description>Downward or upward crossing</description>
104591 <description>Event not generated</description>
104596 <description>Event generated</description>
104605 <description>Publish configuration for event READY</description>
104613 <description>DPPI channel that event READY will publish to</description>
104624 <description>Disable publishing</description>
104629 <description>Enable publishing</description>
104638 <description>Publish configuration for event DOWN</description>
104646 <description>DPPI channel that event DOWN will publish to</description>
104657 <description>Disable publishing</description>
104662 <description>Enable publishing</description>
104671 <description>Publish configuration for event UP</description>
104679 <description>DPPI channel that event UP will publish to</description>
104690 <description>Disable publishing</description>
104695 <description>Enable publishing</description>
104704 <description>Publish configuration for event CROSS</description>
104712 <description>DPPI channel that event CROSS will publish to</description>
104723 <description>Disable publishing</description>
104728 <description>Enable publishing</description>
104737 <description>Shortcuts between local events and tasks</description>
104745 <description>Shortcut between event READY and task SAMPLE</description>
104751 <description>Disable shortcut</description>
104756 <description>Enable shortcut</description>
104763 <description>Shortcut between event READY and task STOP</description>
104769 <description>Disable shortcut</description>
104774 <description>Enable shortcut</description>
104781 <description>Shortcut between event DOWN and task STOP</description>
104787 <description>Disable shortcut</description>
104792 <description>Enable shortcut</description>
104799 <description>Shortcut between event UP and task STOP</description>
104805 <description>Disable shortcut</description>
104810 <description>Enable shortcut</description>
104817 <description>Shortcut between event CROSS and task STOP</description>
104823 <description>Disable shortcut</description>
104828 <description>Enable shortcut</description>
104837 <description>Enable or disable interrupt</description>
104845 <description>Enable or disable interrupt for event READY</description>
104851 <description>Disable</description>
104856 <description>Enable</description>
104863 <description>Enable or disable interrupt for event DOWN</description>
104869 <description>Disable</description>
104874 <description>Enable</description>
104881 <description>Enable or disable interrupt for event UP</description>
104887 <description>Disable</description>
104892 <description>Enable</description>
104899 <description>Enable or disable interrupt for event CROSS</description>
104905 <description>Disable</description>
104910 <description>Enable</description>
104919 <description>Enable interrupt</description>
104927 <description>Write '1' to enable interrupt for event READY</description>
104934 <description>Read: Disabled</description>
104939 <description>Read: Enabled</description>
104947 <description>Enable</description>
104954 <description>Write '1' to enable interrupt for event DOWN</description>
104961 <description>Read: Disabled</description>
104966 <description>Read: Enabled</description>
104974 <description>Enable</description>
104981 <description>Write '1' to enable interrupt for event UP</description>
104988 <description>Read: Disabled</description>
104993 <description>Read: Enabled</description>
105001 <description>Enable</description>
105008 <description>Write '1' to enable interrupt for event CROSS</description>
105015 <description>Read: Disabled</description>
105020 <description>Read: Enabled</description>
105028 <description>Enable</description>
105037 <description>Disable interrupt</description>
105045 <description>Write '1' to disable interrupt for event READY</description>
105052 <description>Read: Disabled</description>
105057 <description>Read: Enabled</description>
105065 <description>Disable</description>
105072 <description>Write '1' to disable interrupt for event DOWN</description>
105079 <description>Read: Disabled</description>
105084 <description>Read: Enabled</description>
105092 <description>Disable</description>
105099 <description>Write '1' to disable interrupt for event UP</description>
105106 <description>Read: Disabled</description>
105111 <description>Read: Enabled</description>
105119 <description>Disable</description>
105126 <description>Write '1' to disable interrupt for event CROSS</description>
105133 <description>Read: Disabled</description>
105138 <description>Read: Enabled</description>
105146 <description>Disable</description>
105155 <description>Pending interrupts</description>
105163 <description>Read pending status of interrupt for event READY</description>
105170 <description>Read: Not pending</description>
105175 <description>Read: Pending</description>
105182 <description>Read pending status of interrupt for event DOWN</description>
105189 <description>Read: Not pending</description>
105194 <description>Read: Pending</description>
105201 <description>Read pending status of interrupt for event UP</description>
105208 <description>Read: Not pending</description>
105213 <description>Read: Pending</description>
105220 <description>Read pending status of interrupt for event CROSS</description>
105227 <description>Read: Not pending</description>
105232 <description>Read: Pending</description>
105241 <description>Compare result</description>
105249 <description>Result of last compare. Decision point SAMPLE task.</description>
105255 … <description>Input voltage is below the threshold (VIN+ &lt; VIN-)</description>
105260 … <description>Input voltage is above the threshold (VIN+ &gt; VIN-)</description>
105269 <description>COMP enable</description>
105277 <description>Enable or disable COMP</description>
105283 <description>Disable</description>
105288 <description>Enable</description>
105297 <description>Pin select</description>
105305 <description>Analog pin select</description>
105311 <description>GPIO Port selection</description>
105319 <description>Reference source select for single-ended mode</description>
105327 <description>Reference select</description>
105333 <description>VREF = internal 1.2 V reference</description>
105338 <description>VREF = VDD</description>
105343 <description>VREF = AREF</description>
105352 <description>External reference select</description>
105360 <description>External analog reference pin select</description>
105366 <description>GPIO Port selection</description>
105374 <description>Threshold configuration for hysteresis unit</description>
105382 <description>VDOWN = (THDOWN+1)/64*VREF</description>
105388 <description>VUP = (THUP+1)/64*VREF</description>
105396 <description>Mode configuration</description>
105404 <description>Speed and power modes</description>
105410 <description>Low-power mode</description>
105415 <description>Normal mode</description>
105420 <description>High-speed mode</description>
105427 <description>Main operation modes</description>
105433 <description>Single-ended mode</description>
105438 <description>Differential mode</description>
105447 <description>Comparator hysteresis enable</description>
105455 <description>Comparator hysteresis</description>
105461 <description>Comparator hysteresis disabled</description>
105466 <description>Comparator hysteresis enabled</description>
105475 <description>Current source select on analog input</description>
105483 <description>Current source select on analog input</description>
105489 <description>Current source disabled</description>
105494 <description>Current source enabled (+/- 2.5 uA)</description>
105499 <description>Current source enabled (+/- 5 uA)</description>
105504 <description>Current source enabled (+/- 10 uA)</description>
105515 <description>Low-power comparator 0</description>
105535 <description>Start comparator</description>
105543 <description>Start comparator</description>
105549 <description>Trigger task</description>
105558 <description>Stop comparator</description>
105566 <description>Stop comparator</description>
105572 <description>Trigger task</description>
105581 …<description>Sample comparator value. This task requires that LPCOMP has been started by the START…
105589 …<description>Sample comparator value. This task requires that LPCOMP has been started by the START…
105595 <description>Trigger task</description>
105604 <description>Subscribe configuration for task START</description>
105612 <description>DPPI channel that task START will subscribe to</description>
105623 <description>Disable subscription</description>
105628 <description>Enable subscription</description>
105637 <description>Subscribe configuration for task STOP</description>
105645 <description>DPPI channel that task STOP will subscribe to</description>
105656 <description>Disable subscription</description>
105661 <description>Enable subscription</description>
105670 <description>Subscribe configuration for task SAMPLE</description>
105678 <description>DPPI channel that task SAMPLE will subscribe to</description>
105689 <description>Disable subscription</description>
105694 <description>Enable subscription</description>
105703 <description>LPCOMP is ready and output is valid</description>
105711 <description>LPCOMP is ready and output is valid</description>
105717 <description>Event not generated</description>
105722 <description>Event generated</description>
105731 <description>Downward crossing</description>
105739 <description>Downward crossing</description>
105745 <description>Event not generated</description>
105750 <description>Event generated</description>
105759 <description>Upward crossing</description>
105767 <description>Upward crossing</description>
105773 <description>Event not generated</description>
105778 <description>Event generated</description>
105787 <description>Downward or upward crossing</description>
105795 <description>Downward or upward crossing</description>
105801 <description>Event not generated</description>
105806 <description>Event generated</description>
105815 <description>Publish configuration for event READY</description>
105823 <description>DPPI channel that event READY will publish to</description>
105834 <description>Disable publishing</description>
105839 <description>Enable publishing</description>
105848 <description>Publish configuration for event DOWN</description>
105856 <description>DPPI channel that event DOWN will publish to</description>
105867 <description>Disable publishing</description>
105872 <description>Enable publishing</description>
105881 <description>Publish configuration for event UP</description>
105889 <description>DPPI channel that event UP will publish to</description>
105900 <description>Disable publishing</description>
105905 <description>Enable publishing</description>
105914 <description>Publish configuration for event CROSS</description>
105922 <description>DPPI channel that event CROSS will publish to</description>
105933 <description>Disable publishing</description>
105938 <description>Enable publishing</description>
105947 <description>Shortcuts between local events and tasks</description>
105955 <description>Shortcut between event READY and task SAMPLE</description>
105961 <description>Disable shortcut</description>
105966 <description>Enable shortcut</description>
105973 <description>Shortcut between event READY and task STOP</description>
105979 <description>Disable shortcut</description>
105984 <description>Enable shortcut</description>
105991 <description>Shortcut between event DOWN and task STOP</description>
105997 <description>Disable shortcut</description>
106002 <description>Enable shortcut</description>
106009 <description>Shortcut between event UP and task STOP</description>
106015 <description>Disable shortcut</description>
106020 <description>Enable shortcut</description>
106027 <description>Shortcut between event CROSS and task STOP</description>
106033 <description>Disable shortcut</description>
106038 <description>Enable shortcut</description>
106047 <description>Enable or disable interrupt</description>
106055 <description>Enable or disable interrupt for event READY</description>
106061 <description>Disable</description>
106066 <description>Enable</description>
106073 <description>Enable or disable interrupt for event DOWN</description>
106079 <description>Disable</description>
106084 <description>Enable</description>
106091 <description>Enable or disable interrupt for event UP</description>
106097 <description>Disable</description>
106102 <description>Enable</description>
106109 <description>Enable or disable interrupt for event CROSS</description>
106115 <description>Disable</description>
106120 <description>Enable</description>
106129 <description>Enable interrupt</description>
106137 <description>Write '1' to enable interrupt for event READY</description>
106144 <description>Read: Disabled</description>
106149 <description>Read: Enabled</description>
106157 <description>Enable</description>
106164 <description>Write '1' to enable interrupt for event DOWN</description>
106171 <description>Read: Disabled</description>
106176 <description>Read: Enabled</description>
106184 <description>Enable</description>
106191 <description>Write '1' to enable interrupt for event UP</description>
106198 <description>Read: Disabled</description>
106203 <description>Read: Enabled</description>
106211 <description>Enable</description>
106218 <description>Write '1' to enable interrupt for event CROSS</description>
106225 <description>Read: Disabled</description>
106230 <description>Read: Enabled</description>
106238 <description>Enable</description>
106247 <description>Disable interrupt</description>
106255 <description>Write '1' to disable interrupt for event READY</description>
106262 <description>Read: Disabled</description>
106267 <description>Read: Enabled</description>
106275 <description>Disable</description>
106282 <description>Write '1' to disable interrupt for event DOWN</description>
106289 <description>Read: Disabled</description>
106294 <description>Read: Enabled</description>
106302 <description>Disable</description>
106309 <description>Write '1' to disable interrupt for event UP</description>
106316 <description>Read: Disabled</description>
106321 <description>Read: Enabled</description>
106329 <description>Disable</description>
106336 <description>Write '1' to disable interrupt for event CROSS</description>
106343 <description>Read: Disabled</description>
106348 <description>Read: Enabled</description>
106356 <description>Disable</description>
106365 <description>Pending interrupts</description>
106373 <description>Read pending status of interrupt for event READY</description>
106380 <description>Read: Not pending</description>
106385 <description>Read: Pending</description>
106392 <description>Read pending status of interrupt for event DOWN</description>
106399 <description>Read: Not pending</description>
106404 <description>Read: Pending</description>
106411 <description>Read pending status of interrupt for event UP</description>
106418 <description>Read: Not pending</description>
106423 <description>Read: Pending</description>
106430 <description>Read pending status of interrupt for event CROSS</description>
106437 <description>Read: Not pending</description>
106442 <description>Read: Pending</description>
106451 <description>Compare result</description>
106459 <description>Result of last compare. Decision point SAMPLE task.</description>
106465 … <description>Input voltage is below the reference threshold (VIN+ &lt; VIN-)</description>
106470 … <description>Input voltage is above the reference threshold (VIN+ &gt; VIN-)</description>
106479 <description>Enable LPCOMP</description>
106487 <description>Enable or disable LPCOMP</description>
106493 <description>Disable</description>
106498 <description>Enable</description>
106507 <description>Input pin select</description>
106515 <description>Analog pin select</description>
106521 <description>GPIO Port selection</description>
106529 <description>Reference select</description>
106537 <description>Reference select</description>
106543 <description>VDD * 1/8 selected as reference</description>
106548 <description>VDD * 2/8 selected as reference</description>
106553 <description>VDD * 3/8 selected as reference</description>
106558 <description>VDD * 4/8 selected as reference</description>
106563 <description>VDD * 5/8 selected as reference</description>
106568 <description>VDD * 6/8 selected as reference</description>
106573 <description>VDD * 7/8 selected as reference</description>
106578 <description>External analog reference selected</description>
106583 <description>VDD * 1/16 selected as reference</description>
106588 <description>VDD * 3/16 selected as reference</description>
106593 <description>VDD * 5/16 selected as reference</description>
106598 <description>VDD * 7/16 selected as reference</description>
106603 <description>VDD * 9/16 selected as reference</description>
106608 <description>VDD * 11/16 selected as reference</description>
106613 <description>VDD * 13/16 selected as reference</description>
106618 <description>VDD * 15/16 selected as reference</description>
106627 <description>External reference select</description>
106635 <description>External analog reference pin select</description>
106641 <description>GPIO Port selection</description>
106649 <description>Analog detect configuration</description>
106657 <description>Analog detect configuration</description>
106663 …<description>Generate ANADETECT on crossing, both upward crossing and downward crossing</descripti…
106668 <description>Generate ANADETECT on upward crossing only</description>
106673 <description>Generate ANADETECT on downward crossing only</description>
106682 <description>Comparator hysteresis enable</description>
106690 <description>Comparator hysteresis enable</description>
106696 <description>Comparator hysteresis disabled</description>
106701 <description>Comparator hysteresis enabled</description>
106712 <description>Comparator 1</description>
106723 <description>Low-power comparator 1</description>
106735 <description>Watchdog Timer 0</description>
106754 <description>Start WDT</description>
106762 <description>Start WDT</description>
106768 <description>Trigger task</description>
106777 <description>Stop WDT</description>
106785 <description>Stop WDT</description>
106791 <description>Trigger task</description>
106800 <description>Subscribe configuration for task START</description>
106808 <description>DPPI channel that task START will subscribe to</description>
106819 <description>Disable subscription</description>
106824 <description>Enable subscription</description>
106833 <description>Subscribe configuration for task STOP</description>
106841 <description>DPPI channel that task STOP will subscribe to</description>
106852 <description>Disable subscription</description>
106857 <description>Enable subscription</description>
106866 <description>Watchdog timeout</description>
106874 <description>Watchdog timeout</description>
106880 <description>Event not generated</description>
106885 <description>Event generated</description>
106894 <description>Watchdog stopped</description>
106902 <description>Watchdog stopped</description>
106908 <description>Event not generated</description>
106913 <description>Event generated</description>
106922 <description>Publish configuration for event TIMEOUT</description>
106930 <description>DPPI channel that event TIMEOUT will publish to</description>
106941 <description>Disable publishing</description>
106946 <description>Enable publishing</description>
106955 <description>Publish configuration for event STOPPED</description>
106963 <description>DPPI channel that event STOPPED will publish to</description>
106974 <description>Disable publishing</description>
106979 <description>Enable publishing</description>
106988 <description>Enable interrupt</description>
106996 <description>Write '1' to enable interrupt for event TIMEOUT</description>
107003 <description>Read: Disabled</description>
107008 <description>Read: Enabled</description>
107016 <description>Enable</description>
107023 <description>Write '1' to enable interrupt for event STOPPED</description>
107030 <description>Read: Disabled</description>
107035 <description>Read: Enabled</description>
107043 <description>Enable</description>
107052 <description>Disable interrupt</description>
107060 <description>Write '1' to disable interrupt for event TIMEOUT</description>
107067 <description>Read: Disabled</description>
107072 <description>Read: Enabled</description>
107080 <description>Disable</description>
107087 <description>Write '1' to disable interrupt for event STOPPED</description>
107094 <description>Read: Disabled</description>
107099 <description>Read: Enabled</description>
107107 <description>Disable</description>
107116 <description>Enable interrupt</description>
107124 <description>Write '1' to enable interrupt for event TIMEOUT</description>
107131 <description>Read: Disabled</description>
107136 <description>Read: Enabled</description>
107144 <description>Enable</description>
107151 <description>Write '1' to enable interrupt for event STOPPED</description>
107158 <description>Read: Disabled</description>
107163 <description>Read: Enabled</description>
107171 <description>Enable</description>
107180 <description>Disable interrupt</description>
107188 <description>Write '1' to disable interrupt for event TIMEOUT</description>
107195 <description>Read: Disabled</description>
107200 <description>Read: Enabled</description>
107208 <description>Disable</description>
107215 <description>Write '1' to disable interrupt for event STOPPED</description>
107222 <description>Read: Disabled</description>
107227 <description>Read: Enabled</description>
107235 <description>Disable</description>
107244 <description>Run status</description>
107252 <description>Indicates whether or not WDT is running</description>
107258 <description>Watchdog is not running</description>
107263 <description>Watchdog is running</description>
107272 <description>Request status</description>
107280 <description>Request status for RR[0] register</description>
107286 … <description>RR[0] register is not enabled, or are already requesting reload</description>
107291 … <description>RR[0] register is enabled, and are not yet requesting reload</description>
107298 <description>Request status for RR[1] register</description>
107304 … <description>RR[1] register is not enabled, or are already requesting reload</description>
107309 … <description>RR[1] register is enabled, and are not yet requesting reload</description>
107316 <description>Request status for RR[2] register</description>
107322 … <description>RR[2] register is not enabled, or are already requesting reload</description>
107327 … <description>RR[2] register is enabled, and are not yet requesting reload</description>
107334 <description>Request status for RR[3] register</description>
107340 … <description>RR[3] register is not enabled, or are already requesting reload</description>
107345 … <description>RR[3] register is enabled, and are not yet requesting reload</description>
107352 <description>Request status for RR[4] register</description>
107358 … <description>RR[4] register is not enabled, or are already requesting reload</description>
107363 … <description>RR[4] register is enabled, and are not yet requesting reload</description>
107370 <description>Request status for RR[5] register</description>
107376 … <description>RR[5] register is not enabled, or are already requesting reload</description>
107381 … <description>RR[5] register is enabled, and are not yet requesting reload</description>
107388 <description>Request status for RR[6] register</description>
107394 … <description>RR[6] register is not enabled, or are already requesting reload</description>
107399 … <description>RR[6] register is enabled, and are not yet requesting reload</description>
107406 <description>Request status for RR[7] register</description>
107412 … <description>RR[7] register is not enabled, or are already requesting reload</description>
107417 … <description>RR[7] register is enabled, and are not yet requesting reload</description>
107426 <description>Counter reload value</description>
107434 … <description>Counter reload value in number of cycles of the 32.768 kHz clock</description>
107442 <description>Enable register for reload request registers</description>
107450 <description>Enable or disable RR[0] register</description>
107456 <description>Disable RR[0] register</description>
107461 <description>Enable RR[0] register</description>
107468 <description>Enable or disable RR[1] register</description>
107474 <description>Disable RR[1] register</description>
107479 <description>Enable RR[1] register</description>
107486 <description>Enable or disable RR[2] register</description>
107492 <description>Disable RR[2] register</description>
107497 <description>Enable RR[2] register</description>
107504 <description>Enable or disable RR[3] register</description>
107510 <description>Disable RR[3] register</description>
107515 <description>Enable RR[3] register</description>
107522 <description>Enable or disable RR[4] register</description>
107528 <description>Disable RR[4] register</description>
107533 <description>Enable RR[4] register</description>
107540 <description>Enable or disable RR[5] register</description>
107546 <description>Disable RR[5] register</description>
107551 <description>Enable RR[5] register</description>
107558 <description>Enable or disable RR[6] register</description>
107564 <description>Disable RR[6] register</description>
107569 <description>Enable RR[6] register</description>
107576 <description>Enable or disable RR[7] register</description>
107582 <description>Disable RR[7] register</description>
107587 <description>Enable RR[7] register</description>
107596 <description>Configuration register</description>
107604 …<description>Configure WDT to either be paused, or kept running, while the CPU is sleeping</descri…
107610 <description>Pause WDT while the CPU is sleeping</description>
107615 <description>Keep WDT running while the CPU is sleeping</description>
107622 …<description>Configure WDT to either be paused, or kept running, while the CPU is halted by the de…
107628 <description>Pause WDT while the CPU is halted by the debugger</description>
107633 … <description>Keep WDT running while the CPU is halted by the debugger</description>
107640 <description>Allow stopping WDT</description>
107646 <description>Do not allow stopping WDT</description>
107651 <description>Allow stopping WDT</description>
107660 <description>Task stop enable</description>
107668 <description>Allow stopping WDT</description>
107674 <description>Value to allow stopping WDT</description>
107685 <description>Description collection: Reload request n</description>
107693 <description>Reload request register</description>
107699 <description>Value to request a reload of the watchdog timer</description>
107710 <description>Watchdog Timer 1</description>
107721 <description>Watchdog Timer 2</description>
107732 <description>GPIO Port 6</description>
107740 <description>GPIO Port 7</description>
107748 <description>GPIO Tasks and Events 2</description>
107764 <description>GPIO Tasks and Events 3</description>
107780 <description>Clock management 0</description>
107799 <description>Start crystal oscillator (HFXO)</description>
107807 <description>Start crystal oscillator (HFXO)</description>
107813 <description>Trigger task</description>
107822 <description>Stop crystal oscillator (HFXO)</description>
107830 <description>Stop crystal oscillator (HFXO)</description>
107836 <description>Trigger task</description>
107845 …<description>Start PLL and keep it running, regardless of the automatic clock requests</descriptio…
107853 …<description>Start PLL and keep it running, regardless of the automatic clock requests</descriptio…
107859 <description>Trigger task</description>
107868 <description>Stop PLL</description>
107876 <description>Stop PLL</description>
107882 <description>Trigger task</description>
107891 <description>Start LFCLK source as selected in LFCLK.SRC</description>
107899 <description>Start LFCLK source as selected in LFCLK.SRC</description>
107905 <description>Trigger task</description>
107914 <description>Stop LFCLK source</description>
107922 <description>Stop LFCLK source</description>
107928 <description>Trigger task</description>
107937 <description>Start calibration of LFRC oscillator</description>
107945 <description>Start calibration of LFRC oscillator</description>
107951 <description>Trigger task</description>
107960 <description>Request tuning for HFXO</description>
107968 <description>Request tuning for HFXO</description>
107974 <description>Trigger task</description>
107983 <description>Abort tuning for HFXO</description>
107991 <description>Abort tuning for HFXO</description>
107997 <description>Trigger task</description>
108006 …<description>Start XO24M and keep it running, regardless of the automatic clock requests</descript…
108014 …<description>Start XO24M and keep it running, regardless of the automatic clock requests</descript…
108020 <description>Trigger task</description>
108029 <description>Stop XO24M</description>
108037 <description>Stop XO24M</description>
108043 <description>Trigger task</description>
108052 <description>Subscribe configuration for task XOSTART</description>
108060 <description>DPPI channel that task XOSTART will subscribe to</description>
108071 <description>Disable subscription</description>
108076 <description>Enable subscription</description>
108085 <description>Subscribe configuration for task XOSTOP</description>
108093 <description>DPPI channel that task XOSTOP will subscribe to</description>
108104 <description>Disable subscription</description>
108109 <description>Enable subscription</description>
108118 <description>Subscribe configuration for task PLLSTART</description>
108126 <description>DPPI channel that task PLLSTART will subscribe to</description>
108137 <description>Disable subscription</description>
108142 <description>Enable subscription</description>
108151 <description>Subscribe configuration for task PLLSTOP</description>
108159 <description>DPPI channel that task PLLSTOP will subscribe to</description>
108170 <description>Disable subscription</description>
108175 <description>Enable subscription</description>
108184 <description>Subscribe configuration for task LFCLKSTART</description>
108192 <description>DPPI channel that task LFCLKSTART will subscribe to</description>
108203 <description>Disable subscription</description>
108208 <description>Enable subscription</description>
108217 <description>Subscribe configuration for task LFCLKSTOP</description>
108225 <description>DPPI channel that task LFCLKSTOP will subscribe to</description>
108236 <description>Disable subscription</description>
108241 <description>Enable subscription</description>
108250 <description>Subscribe configuration for task CAL</description>
108258 <description>DPPI channel that task CAL will subscribe to</description>
108269 <description>Disable subscription</description>
108274 <description>Enable subscription</description>
108283 <description>Subscribe configuration for task XOTUNE</description>
108291 <description>DPPI channel that task XOTUNE will subscribe to</description>
108302 <description>Disable subscription</description>
108307 <description>Enable subscription</description>
108316 <description>Subscribe configuration for task XOTUNEABORT</description>
108324 <description>DPPI channel that task XOTUNEABORT will subscribe to</description>
108335 <description>Disable subscription</description>
108340 <description>Enable subscription</description>
108349 <description>Subscribe configuration for task XO24MSTART</description>
108357 <description>DPPI channel that task XO24MSTART will subscribe to</description>
108368 <description>Disable subscription</description>
108373 <description>Enable subscription</description>
108382 <description>Subscribe configuration for task XO24MSTOP</description>
108390 <description>DPPI channel that task XO24MSTOP will subscribe to</description>
108401 <description>Disable subscription</description>
108406 <description>Enable subscription</description>
108415 <description>Crystal oscillator has started</description>
108423 <description>Crystal oscillator has started</description>
108429 <description>Event not generated</description>
108434 <description>Event generated</description>
108443 <description>PLL started</description>
108451 <description>PLL started</description>
108457 <description>Event not generated</description>
108462 <description>Event generated</description>
108471 <description>LFCLK source started</description>
108479 <description>LFCLK source started</description>
108485 <description>Event not generated</description>
108490 <description>Event generated</description>
108499 <description>Calibration of LFRC oscillator complete event</description>
108507 <description>Calibration of LFRC oscillator complete event</description>
108513 <description>Event not generated</description>
108518 <description>Event generated</description>
108527 …<description>HFXO tuning is done. XOTUNED is generated after TASKS_XOSTART or after TASKS_XOTUNE h…
108535 …<description>HFXO tuning is done. XOTUNED is generated after TASKS_XOSTART or after TASKS_XOTUNE h…
108541 <description>Event not generated</description>
108546 <description>Event generated</description>
108555 <description>HFXO quality issue detected, XOTUNE is needed</description>
108563 <description>HFXO quality issue detected, XOTUNE is needed</description>
108569 <description>Event not generated</description>
108574 <description>Event generated</description>
108583 <description>HFXO tuning could not be completed</description>
108591 <description>HFXO tuning could not be completed</description>
108597 <description>Event not generated</description>
108602 <description>Event generated</description>
108611 <description>XO24M started</description>
108619 <description>XO24M started</description>
108625 <description>Event not generated</description>
108630 <description>Event generated</description>
108639 <description>Publish configuration for event XOSTARTED</description>
108647 <description>DPPI channel that event XOSTARTED will publish to</description>
108658 <description>Disable publishing</description>
108663 <description>Enable publishing</description>
108672 <description>Publish configuration for event PLLSTARTED</description>
108680 <description>DPPI channel that event PLLSTARTED will publish to</description>
108691 <description>Disable publishing</description>
108696 <description>Enable publishing</description>
108705 <description>Publish configuration for event LFCLKSTARTED</description>
108713 <description>DPPI channel that event LFCLKSTARTED will publish to</description>
108724 <description>Disable publishing</description>
108729 <description>Enable publishing</description>
108738 <description>Publish configuration for event DONE</description>
108746 <description>DPPI channel that event DONE will publish to</description>
108757 <description>Disable publishing</description>
108762 <description>Enable publishing</description>
108771 <description>Publish configuration for event XOTUNED</description>
108779 <description>DPPI channel that event XOTUNED will publish to</description>
108790 <description>Disable publishing</description>
108795 <description>Enable publishing</description>
108804 <description>Publish configuration for event XOTUNEERROR</description>
108812 <description>DPPI channel that event XOTUNEERROR will publish to</description>
108823 <description>Disable publishing</description>
108828 <description>Enable publishing</description>
108837 <description>Publish configuration for event XOTUNEFAILED</description>
108845 <description>DPPI channel that event XOTUNEFAILED will publish to</description>
108856 <description>Disable publishing</description>
108861 <description>Enable publishing</description>
108870 <description>Publish configuration for event XO24MSTARTED</description>
108878 <description>DPPI channel that event XO24MSTARTED will publish to</description>
108889 <description>Disable publishing</description>
108894 <description>Enable publishing</description>
108903 <description>Enable or disable interrupt</description>
108911 <description>Enable or disable interrupt for event XOSTARTED</description>
108917 <description>Disable</description>
108922 <description>Enable</description>
108929 <description>Enable or disable interrupt for event PLLSTARTED</description>
108935 <description>Disable</description>
108940 <description>Enable</description>
108947 <description>Enable or disable interrupt for event LFCLKSTARTED</description>
108953 <description>Disable</description>
108958 <description>Enable</description>
108965 <description>Enable or disable interrupt for event DONE</description>
108971 <description>Disable</description>
108976 <description>Enable</description>
108983 <description>Enable or disable interrupt for event XOTUNED</description>
108989 <description>Disable</description>
108994 <description>Enable</description>
109001 <description>Enable or disable interrupt for event XOTUNEERROR</description>
109007 <description>Disable</description>
109012 <description>Enable</description>
109019 <description>Enable or disable interrupt for event XOTUNEFAILED</description>
109025 <description>Disable</description>
109030 <description>Enable</description>
109037 <description>Enable or disable interrupt for event XO24MSTARTED</description>
109043 <description>Disable</description>
109048 <description>Enable</description>
109057 <description>Enable interrupt</description>
109065 <description>Write '1' to enable interrupt for event XOSTARTED</description>
109072 <description>Read: Disabled</description>
109077 <description>Read: Enabled</description>
109085 <description>Enable</description>
109092 <description>Write '1' to enable interrupt for event PLLSTARTED</description>
109099 <description>Read: Disabled</description>
109104 <description>Read: Enabled</description>
109112 <description>Enable</description>
109119 <description>Write '1' to enable interrupt for event LFCLKSTARTED</description>
109126 <description>Read: Disabled</description>
109131 <description>Read: Enabled</description>
109139 <description>Enable</description>
109146 <description>Write '1' to enable interrupt for event DONE</description>
109153 <description>Read: Disabled</description>
109158 <description>Read: Enabled</description>
109166 <description>Enable</description>
109173 <description>Write '1' to enable interrupt for event XOTUNED</description>
109180 <description>Read: Disabled</description>
109185 <description>Read: Enabled</description>
109193 <description>Enable</description>
109200 <description>Write '1' to enable interrupt for event XOTUNEERROR</description>
109207 <description>Read: Disabled</description>
109212 <description>Read: Enabled</description>
109220 <description>Enable</description>
109227 <description>Write '1' to enable interrupt for event XOTUNEFAILED</description>
109234 <description>Read: Disabled</description>
109239 <description>Read: Enabled</description>
109247 <description>Enable</description>
109254 <description>Write '1' to enable interrupt for event XO24MSTARTED</description>
109261 <description>Read: Disabled</description>
109266 <description>Read: Enabled</description>
109274 <description>Enable</description>
109283 <description>Disable interrupt</description>
109291 <description>Write '1' to disable interrupt for event XOSTARTED</description>
109298 <description>Read: Disabled</description>
109303 <description>Read: Enabled</description>
109311 <description>Disable</description>
109318 <description>Write '1' to disable interrupt for event PLLSTARTED</description>
109325 <description>Read: Disabled</description>
109330 <description>Read: Enabled</description>
109338 <description>Disable</description>
109345 <description>Write '1' to disable interrupt for event LFCLKSTARTED</description>
109352 <description>Read: Disabled</description>
109357 <description>Read: Enabled</description>
109365 <description>Disable</description>
109372 <description>Write '1' to disable interrupt for event DONE</description>
109379 <description>Read: Disabled</description>
109384 <description>Read: Enabled</description>
109392 <description>Disable</description>
109399 <description>Write '1' to disable interrupt for event XOTUNED</description>
109406 <description>Read: Disabled</description>
109411 <description>Read: Enabled</description>
109419 <description>Disable</description>
109426 <description>Write '1' to disable interrupt for event XOTUNEERROR</description>
109433 <description>Read: Disabled</description>
109438 <description>Read: Enabled</description>
109446 <description>Disable</description>
109453 <description>Write '1' to disable interrupt for event XOTUNEFAILED</description>
109460 <description>Read: Disabled</description>
109465 <description>Read: Enabled</description>
109473 <description>Disable</description>
109480 <description>Write '1' to disable interrupt for event XO24MSTARTED</description>
109487 <description>Read: Disabled</description>
109492 <description>Read: Enabled</description>
109500 <description>Disable</description>
109509 <description>Pending interrupts</description>
109517 <description>Read pending status of interrupt for event XOSTARTED</description>
109524 <description>Read: Not pending</description>
109529 <description>Read: Pending</description>
109536 <description>Read pending status of interrupt for event PLLSTARTED</description>
109543 <description>Read: Not pending</description>
109548 <description>Read: Pending</description>
109555 <description>Read pending status of interrupt for event LFCLKSTARTED</description>
109562 <description>Read: Not pending</description>
109567 <description>Read: Pending</description>
109574 <description>Read pending status of interrupt for event DONE</description>
109581 <description>Read: Not pending</description>
109586 <description>Read: Pending</description>
109593 <description>Read pending status of interrupt for event XOTUNED</description>
109600 <description>Read: Not pending</description>
109605 <description>Read: Pending</description>
109612 <description>Read pending status of interrupt for event XOTUNEERROR</description>
109619 <description>Read: Not pending</description>
109624 <description>Read: Pending</description>
109631 <description>Read pending status of interrupt for event XOTUNEFAILED</description>
109638 <description>Read: Not pending</description>
109643 <description>Read: Pending</description>
109650 <description>Read pending status of interrupt for event XO24MSTARTED</description>
109657 <description>Read: Not pending</description>
109662 <description>Read: Pending</description>
109671 <description>Unspecified</description>
109677 <description>Indicates that XOSTART task was triggered</description>
109685 <description>XOSTART task triggered or not</description>
109691 <description>Task not triggered</description>
109696 <description>Task triggered</description>
109705 <description>XO status</description>
109713 <description>XO state (Running between START task and STOPPED event)</description>
109719 <description>XO is not running</description>
109724 <description>XO is running</description>
109734 <description>Unspecified</description>
109740 <description>Indicates that PLLSTART task was triggered</description>
109748 <description>PLLSTART task triggered or not</description>
109754 <description>Task not triggered</description>
109759 <description>Task triggered</description>
109768 <description>Which PLL settings were selected when triggering START task</description>
109776 <description>PLL state (Running between START task and STOPPED event)</description>
109782 <description>PLL is not running</description>
109787 <description>PLL is running</description>
109797 <description>Unspecified</description>
109803 <description>Clock source for LFCLK</description>
109811 … <description>Select which LFCLK source is started by the LFCLKSTART task</description>
109817 <description>32.768 kHz RC oscillator</description>
109822 <description>32.768 kHz crystal oscillator</description>
109827 <description>32.768 kHz synthesized from HFCLK</description>
109836 <description>Indicates that LFCLKSTART task was triggered</description>
109844 <description>LFCLKSTART task triggered or not</description>
109850 <description>Task not triggered</description>
109855 <description>Task triggered</description>
109864 …<description>Copy of LFCLK.SRCCOPY register, set when LFCLKSTARTED event is triggered.</descriptio…
109872 … <description>Value of LFCLK.SRCCOPY register when LFCLKSTARTED event was triggered</description>
109878 <description>32.768 kHz RC oscillator</description>
109883 <description>32.768 kHz crystal oscillator</description>
109888 <description>32.768 kHz synthesized from HFCLK</description>
109895 <description>ALWAYSRUN activated</description>
109901 <description>Automatic clock control enabled</description>
109906 <description>Oscillator is always running</description>
109913 … <description>LFCLK state (Running between START task and STOPPED event)</description>
109919 <description>LFCLK not running</description>
109924 <description>LFCLK running</description>
109933 … <description>Copy of LFCLK.SRC register, set when LFCLKSTART task is triggered</description>
109941 … <description>Value of LFCLK.SRC register when LFCLKSTART task was triggered</description>
109947 <description>32.768 kHz RC oscillator</description>
109952 <description>32.768 kHz crystal oscillator</description>
109957 <description>32.768 kHz synthesized from HFCLK</description>
109967 <description>Unspecified</description>
109973 <description>Indicates that PLL24MSTART task was triggered</description>
109981 <description>PLL24MSTART task triggered or not</description>
109987 <description>Task not triggered</description>
109992 <description>Task triggered</description>
110001 <description>Which PLL settings were selected when triggering START task</description>
110009 <description>PLL state (Running between START task and STOPPED event)</description>
110015 <description>PLL24M is not running</description>
110020 <description>PLL24M is running</description>
110032 <description>Power control 0</description>
110052 <description>Enable Constant Latency mode</description>
110060 <description>Enable Constant Latency mode</description>
110066 <description>Trigger task</description>
110075 <description>Enable Low-power mode (variable latency)</description>
110083 <description>Enable Low-power mode (variable latency)</description>
110089 <description>Trigger task</description>
110098 <description>Subscribe configuration for task CONSTLAT</description>
110106 <description>DPPI channel that task CONSTLAT will subscribe to</description>
110117 <description>Disable subscription</description>
110122 <description>Enable subscription</description>
110131 <description>Subscribe configuration for task LOWPWR</description>
110139 <description>DPPI channel that task LOWPWR will subscribe to</description>
110150 <description>Disable subscription</description>
110155 <description>Enable subscription</description>
110164 <description>Power failure warning</description>
110172 <description>Power failure warning</description>
110178 <description>Event not generated</description>
110183 <description>Event generated</description>
110192 <description>CPU entered WFI/WFE sleep</description>
110200 <description>CPU entered WFI/WFE sleep</description>
110206 <description>Event not generated</description>
110211 <description>Event generated</description>
110220 <description>CPU exited WFI/WFE sleep</description>
110228 <description>CPU exited WFI/WFE sleep</description>
110234 <description>Event not generated</description>
110239 <description>Event generated</description>
110248 <description>Publish configuration for event SLEEPENTER</description>
110256 <description>DPPI channel that event SLEEPENTER will publish to</description>
110267 <description>Disable publishing</description>
110272 <description>Enable publishing</description>
110281 <description>Publish configuration for event SLEEPEXIT</description>
110289 <description>DPPI channel that event SLEEPEXIT will publish to</description>
110300 <description>Disable publishing</description>
110305 <description>Enable publishing</description>
110314 <description>Enable or disable interrupt</description>
110322 <description>Enable or disable interrupt for event POFWARN</description>
110328 <description>Disable</description>
110333 <description>Enable</description>
110340 <description>Enable or disable interrupt for event SLEEPENTER</description>
110346 <description>Disable</description>
110351 <description>Enable</description>
110358 <description>Enable or disable interrupt for event SLEEPEXIT</description>
110364 <description>Disable</description>
110369 <description>Enable</description>
110378 <description>Enable interrupt</description>
110386 <description>Write '1' to enable interrupt for event POFWARN</description>
110393 <description>Read: Disabled</description>
110398 <description>Read: Enabled</description>
110406 <description>Enable</description>
110413 <description>Write '1' to enable interrupt for event SLEEPENTER</description>
110420 <description>Read: Disabled</description>
110425 <description>Read: Enabled</description>
110433 <description>Enable</description>
110440 <description>Write '1' to enable interrupt for event SLEEPEXIT</description>
110447 <description>Read: Disabled</description>
110452 <description>Read: Enabled</description>
110460 <description>Enable</description>
110469 <description>Disable interrupt</description>
110477 <description>Write '1' to disable interrupt for event POFWARN</description>
110484 <description>Read: Disabled</description>
110489 <description>Read: Enabled</description>
110497 <description>Disable</description>
110504 <description>Write '1' to disable interrupt for event SLEEPENTER</description>
110511 <description>Read: Disabled</description>
110516 <description>Read: Enabled</description>
110524 <description>Disable</description>
110531 <description>Write '1' to disable interrupt for event SLEEPEXIT</description>
110538 <description>Read: Disabled</description>
110543 <description>Read: Enabled</description>
110551 <description>Disable</description>
110562 <description>Description collection: General purpose retention register</description>
110570 <description>General purpose retention register</description>
110578 <description>Status of constant latency</description>
110586 <description>Status</description>
110592 <description>Constant latency disabled</description>
110597 <description>Constant latency enabled</description>
110608 <description>Reset control 0</description>
110624 <description>Reset reason</description>
110632 <description>Reset from pin reset detected</description>
110638 <description>Not detected</description>
110643 <description>Detected</description>
110650 <description>Reset from watchdog timer 0 detected</description>
110656 <description>Not detected</description>
110661 <description>Detected</description>
110668 <description>Reset from watchdog timer 1 detected</description>
110674 <description>Not detected</description>
110679 <description>Detected</description>
110686 <description>Soft reset from CTRL-AP detected</description>
110692 <description>Not detected</description>
110697 <description>Detected</description>
110704 <description>Reset due to CTRL-AP hard reset</description>
110710 <description>Not detected</description>
110715 <description>Detected</description>
110722 <description>Reset due to CTRL-AP pin reset</description>
110728 <description>Not detected</description>
110733 <description>Detected</description>
110740 <description>Reset from soft reset detected</description>
110746 <description>Not detected</description>
110751 <description>Detected</description>
110758 <description>Reset from CPU lockup detected</description>
110764 <description>Not detected</description>
110769 <description>Detected</description>
110776 …<description>Reset due to wakeup from System OFF mode when wakeup is triggered by DETECT signal fr…
110782 <description>Not detected</description>
110787 <description>Detected</description>
110794 …<description>Reset due to wakeup from System OFF mode when wakeup is triggered by ANADETECT signal…
110800 <description>Not detected</description>
110805 <description>Detected</description>
110812 <description>Reset triggered by Debug Interface</description>
110818 <description>Not detected</description>
110823 <description>Detected</description>
110830 <description>Reset due to wakeup from GRTC</description>
110836 <description>Not detected</description>
110841 <description>Detected</description>
110848 … <description>Reset after wakeup from System OFF mode due to NFC field being detected</description>
110854 <description>Not detected</description>
110859 <description>Detected</description>
110866 <description>Reset due to illegal tampering of the device</description>
110872 <description>Not detected</description>
110877 <description>Detected</description>
110884 …<description>Reset after wakeup from System OFF mode due to VBUS rising into valid range</descript…
110890 <description>Not detected</description>
110895 <description>Detected</description>
110906 <description>Clock management 1</description>
110917 <description>Power control 1</description>
110929 <description>Reset control 1</description>
110937 <description>Oscillator control 0</description>
110952 <description>32 MHz oscillator control</description>
110958 <description>Unspecified</description>
110964 …description>Crystal load capacitor as seen by the crystal across its terminals, including pin capa…
110972 <description>Crystal load capacitor value</description>
110982 <description>Oscillator control</description>
110988 <description>Set speed of MCU power domain, including CPU</description>
110996 <description>Select CPU speed</description>
111002 <description>128 MHz</description>
111007 <description>64 MHz</description>
111016 <description>Current speed of MCU power domain, including CPU</description>
111024 <description>Active CPU speed</description>
111030 <description>128 MHz</description>
111035 <description>64 MHz</description>
111045 <description>32.768 kHz oscillator control</description>
111051 <description>Programmable capacitance of XL1 and XL2</description>
111059 …description>Crystal load capacitor as seen by the crystal across its terminals, including pin capa…
111070 <description>Voltage regulators 0</description>
111086 <description>System OFF register</description>
111094 <description>Enable System OFF mode</description>
111100 <description>Enable System OFF mode</description>
111109 <description>Power-fail comparator configuration</description>
111117 <description>Enable or disable power-fail comparator</description>
111123 <description>Disable</description>
111128 <description>Enable</description>
111135 <description>Power-fail comparator threshold setting</description>
111141 <description>Set threshold to 1.7 V</description>
111146 <description>Set threshold to 1.8 V</description>
111151 <description>Set threshold to 1.9 V</description>
111156 <description>Set threshold to 2.0 V</description>
111161 <description>Set threshold to 2.1 V</description>
111166 <description>Set threshold to 2.2 V</description>
111171 <description>Set threshold to 2.3 V</description>
111176 <description>Set threshold to 2.4 V</description>
111181 <description>Set threshold to 2.5 V</description>
111186 <description>Set threshold to 2.6 V</description>
111191 <description>Set threshold to 2.7 V</description>
111196 <description>Set threshold to 2.8 V</description>
111203 <description>Disable the POFWARN power-fail warning event</description>
111209 <description>POFWARN event is generated</description>
111214 <description>POFWARN event is not generated</description>
111223 <description>Power-fail comparator status register</description>
111231 <description>Power-fail comparator status</description>
111237 <description>Voltage detected above VPOF threshold</description>
111242 <description>Voltage detected below VPOF threshold</description>
111251 <description>Register interface for main voltage regulator.</description>
111257 <description>Enable DC/DC converter for better power efficiency</description>
111265 <description>Enable DC/DC buck converter</description>
111271 <description>Disable DC/DC converter and use LDO</description>
111276 <description>Enable DC/DC converter</description>
111285 <description>VREGMAIN inductor detection</description>
111298 <description>VREGMAIN inductor not detected</description>
111303 <description>VREGMAIN inductor detected</description>
111315 <description>Oscillator control 1</description>
111322 <description>Voltage regulators 1</description>
111330 <description>VREGUSB peripheral 0</description>
111349 <description>Enable and start VREGUSB so that it can detect VBUS</description>
111357 <description>Enable and start VREGUSB so that it can detect VBUS</description>
111363 <description>Trigger task</description>
111372 <description>Stop and disable VREGUSB</description>
111380 <description>Stop and disable VREGUSB</description>
111386 <description>Trigger task</description>
111395 <description>VBUS detected</description>
111403 <description>VBUS detected</description>
111409 <description>Event not generated</description>
111414 <description>Event generated</description>
111423 <description>VBUS removed</description>
111431 <description>VBUS removed</description>
111437 <description>Event not generated</description>
111442 <description>Event generated</description>
111451 <description>Enable or disable interrupt</description>
111459 <description>Enable or disable interrupt for event VBUSDETECTED</description>
111465 <description>Disable</description>
111470 <description>Enable</description>
111477 <description>Enable or disable interrupt for event VBUSREMOVED</description>
111483 <description>Disable</description>
111488 <description>Enable</description>
111497 <description>Enable interrupt</description>
111505 <description>Write '1' to enable interrupt for event VBUSDETECTED</description>
111512 <description>Read: Disabled</description>
111517 <description>Read: Enabled</description>
111525 <description>Enable</description>
111532 <description>Write '1' to enable interrupt for event VBUSREMOVED</description>
111539 <description>Read: Disabled</description>
111544 <description>Read: Enabled</description>
111552 <description>Enable</description>
111561 <description>Disable interrupt</description>
111569 <description>Write '1' to disable interrupt for event VBUSDETECTED</description>
111576 <description>Read: Disabled</description>
111581 <description>Read: Enabled</description>
111589 <description>Disable</description>
111596 <description>Write '1' to disable interrupt for event VBUSREMOVED</description>
111603 <description>Read: Disabled</description>
111608 <description>Read: Enabled</description>
111616 <description>Disable</description>
111625 <description>Pending interrupts</description>
111633 <description>Read pending status of interrupt for event VBUSDETECTED</description>
111640 <description>Read: Not pending</description>
111645 <description>Read: Pending</description>
111652 <description>Read pending status of interrupt for event VBUSREMOVED</description>
111659 <description>Read: Not pending</description>
111664 <description>Read: Pending</description>
111675 <description>VREGUSB peripheral 1</description>