Lines Matching refs:__OM
157 #ifndef __OM /*!< Fallback for older CMSIS versions …
158 #define __OM __O macro
781 …__OM uint32_t EN; /*!< (@ 0x00000000) Description cluster: Enable chan…
782 …__OM uint32_t DIS; /*!< (@ 0x00000004) Description cluster: Disable cha…
943 …__OM uint32_t KEY0; /*!< (@ 0x00000000) Bits 31:0 of XIP AES KEY …
944 …__OM uint32_t KEY1; /*!< (@ 0x00000004) Bits 63:32 of XIP AES KEY …
945 …__OM uint32_t KEY2; /*!< (@ 0x00000008) Bits 95:64 of XIP AES KEY …
946 …__OM uint32_t KEY3; /*!< (@ 0x0000000C) Bits 127:96 of XIP AES KEY …
947 …__OM uint32_t NONCE0; /*!< (@ 0x00000010) Bits 31:0 of XIP NONCE …
948 …__OM uint32_t NONCE1; /*!< (@ 0x00000014) Bits 63:32 of XIP NONCE …
949 …__OM uint32_t NONCE2; /*!< (@ 0x00000018) Bits 95:64 of XIP NONCE …
958 …__OM uint32_t KEY0; /*!< (@ 0x00000000) Bits 31:0 of DMA AES KEY …
959 …__OM uint32_t KEY1; /*!< (@ 0x00000004) Bits 63:32 of DMA AES KEY …
960 …__OM uint32_t KEY2; /*!< (@ 0x00000008) Bits 95:64 of DMA AES KEY …
961 …__OM uint32_t KEY3; /*!< (@ 0x0000000C) Bits 127:96 of DMA AES KEY …
962 …__OM uint32_t NONCE0; /*!< (@ 0x00000010) Bits 31:0 of DMA NONCE …
963 …__OM uint32_t NONCE1; /*!< (@ 0x00000014) Bits 63:32 of DMA NONCE …
964 …__OM uint32_t NONCE2; /*!< (@ 0x00000018) Bits 95:64 of DMA NONCE …
1198 …__OM uint32_t CTIINTACK; /*!< (@ 0x00000010) CTI Interrupt Acknowledge regist…
1200 …__OM uint32_t CTIAPPCLEAR; /*!< (@ 0x00000018) CTI Application Trigger Clear re…
1201 …__OM uint32_t CTIAPPPULSE; /*!< (@ 0x0000001C) CTI Application Pulse register …
1245 …__OM uint32_t CLOCKSTART; /*!< (@ 0x00000004) Start all trace and debug clocks…
1246 …__OM uint32_t CLOCKSTOP; /*!< (@ 0x00000008) Stop all trace and debug clocks.…
1324 …__OM uint32_t INVALIDATE; /*!< (@ 0x00000504) Invalidate the cache. …
1325 …__OM uint32_t ERASE; /*!< (@ 0x00000508) Erase the cache. …
1327 …__OM uint32_t PROFILINGCLEAR; /*!< (@ 0x00000510) Clear the profiling counters. …
1420 …__OM uint32_t SYSTEMOFF; /*!< (@ 0x00000500) System OFF register …
1443 …__OM uint32_t TASKS_HFCLKSTART; /*!< (@ 0x00000000) Start HFCLK128M/HFCLK64M source …
1445 …__OM uint32_t TASKS_HFCLKSTOP; /*!< (@ 0x00000004) Stop HFCLK128M/HFCLK64M source …
1446 …__OM uint32_t TASKS_LFCLKSTART; /*!< (@ 0x00000008) Start LFCLK source as selected i…
1447 …__OM uint32_t TASKS_LFCLKSTOP; /*!< (@ 0x0000000C) Stop LFCLK source …
1448 …__OM uint32_t TASKS_CAL; /*!< (@ 0x00000010) Start calibration of LFRC oscill…
1450 …__OM uint32_t TASKS_HFCLKAUDIOSTART; /*!< (@ 0x00000018) Start HFCLKAUDIO source …
1451 …__OM uint32_t TASKS_HFCLKAUDIOSTOP; /*!< (@ 0x0000001C) Stop HFCLKAUDIO source …
1452 …__OM uint32_t TASKS_HFCLK192MSTART; /*!< (@ 0x00000020) Start HFCLK192M source as select…
1453 …__OM uint32_t TASKS_HFCLK192MSTOP; /*!< (@ 0x00000024) Stop HFCLK192M source …
1538 …__OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable Constant Latency mode …
1539 …__OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable Low-Power mode (variable …
1616 …__OM uint32_t TASKS_START; /*!< (@ 0x00000010) Start SPI transaction …
1617 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop SPI transaction …
1619 …__OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend SPI transaction …
1620 …__OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume SPI transaction …
1692 …__OM uint32_t TASKS_ACQUIRE; /*!< (@ 0x00000024) Acquire SPI semaphore …
1693 …__OM uint32_t TASKS_RELEASE; /*!< (@ 0x00000028) Release SPI semaphore, enabling …
1746 …__OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start TWI receive sequence …
1748 …__OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start TWI transmit sequence …
1750 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction. Must be is…
1753 …__OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction …
1754 …__OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction …
1823 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction …
1825 …__OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction …
1826 …__OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction …
1828 …__OM uint32_t TASKS_PREPARERX; /*!< (@ 0x00000030) Prepare the TWI slave to respond…
1829 …__OM uint32_t TASKS_PREPARETX; /*!< (@ 0x00000034) Prepare the TWI slave to respond…
1897 …__OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start UART receiver …
1898 …__OM uint32_t TASKS_STOPRX; /*!< (@ 0x00000004) Stop UART receiver …
1899 …__OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start UART transmitter …
1900 …__OM uint32_t TASKS_STOPTX; /*!< (@ 0x0000000C) Stop UART transmitter …
1902 …__OM uint32_t TASKS_FLUSHRX; /*!< (@ 0x0000002C) Flush RX FIFO into RX buffer …
1980 …__OM uint32_t TASKS_OUT[8]; /*!< (@ 0x00000000) Description collection: Task for…
1984 …__OM uint32_t TASKS_SET[8]; /*!< (@ 0x00000030) Description collection: Task for…
1988 …__OM uint32_t TASKS_CLR[8]; /*!< (@ 0x00000060) Description collection: Task for…
2032 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start the ADC and prepare the re…
2034 …__OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000004) Take one ADC sample, if scan is …
2036 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stop the ADC and terminate any o…
2037 …__OM uint32_t TASKS_CALIBRATEOFFSET; /*!< (@ 0x0000000C) Starts offset auto-calibration …
2096 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start Timer …
2097 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop Timer …
2098 …__OM uint32_t TASKS_COUNT; /*!< (@ 0x00000008) Increment Timer (Counter mode on…
2099 …__OM uint32_t TASKS_CLEAR; /*!< (@ 0x0000000C) Clear time …
2100 …__OM uint32_t TASKS_SHUTDOWN; /*!< (@ 0x00000010) Deprecated register - Shut down …
2102 …__OM uint32_t TASKS_CAPTURE[6]; /*!< (@ 0x00000040) Description collection: Capture …
2151 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start RTC counter …
2152 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop RTC counter …
2153 …__OM uint32_t TASKS_CLEAR; /*!< (@ 0x00000008) Clear RTC counter …
2154 …__OM uint32_t TASKS_TRIGOVRFLW; /*!< (@ 0x0000000C) Set counter to 0xFFFFF0 …
2156 …__OM uint32_t TASKS_CAPTURE[4]; /*!< (@ 0x00000040) Description collection: Capture …
2208 …__OM DPPIC_TASKS_CHG_Type TASKS_CHG[6]; /*!< (@ 0x00000000) Channel group tasks …
2234 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start WDT …
2235 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop WDT …
2259 …__OM uint32_t TSEN; /*!< (@ 0x00000520) Task stop enable …
2261 …__OM uint32_t RR[8]; /*!< (@ 0x00000600) Description collection: Reload r…
2276 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start comparator …
2277 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop comparator …
2278 …__OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000008) Sample comparator value …
2325 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start comparator …
2326 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop comparator …
2327 …__OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000008) Sample comparator value …
2372 …__OM uint32_t TASKS_TRIGGER[16]; /*!< (@ 0x00000000) Description collection: Trigger …
2403 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops PWM pulse generation on al…
2406 …__OM uint32_t TASKS_SEQSTART[2]; /*!< (@ 0x00000008) Description collection: Loads th…
2411 …__OM uint32_t TASKS_NEXTSTEP; /*!< (@ 0x00000010) Steps by one value in the curren…
2470 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Starts continuous PDM transfer …
2471 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops PDM transfer …
2519 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Starts continuous I2S transfer. …
2521 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops I2S transfer and MCK gener…
2579 …__OM uint32_t TASKS_SEND[16]; /*!< (@ 0x00000000) Description collection: Trigger …
2617 …__OM uint32_t TASKS_ACTIVATE; /*!< (@ 0x00000000) Activate QSPI interface …
2618 …__OM uint32_t TASKS_READSTART; /*!< (@ 0x00000004) Start transfer from external fla…
2620 …__OM uint32_t TASKS_WRITESTART; /*!< (@ 0x00000008) Start transfer from internal RAM…
2622 …__OM uint32_t TASKS_ERASESTART; /*!< (@ 0x0000000C) Start external flash memory eras…
2623 …__OM uint32_t TASKS_DEACTIVATE; /*!< (@ 0x00000010) Deactivate QSPI interface …
2682 …__OM uint32_t TASKS_ACTIVATE; /*!< (@ 0x00000000) Activate NFCT peripheral for inc…
2684 …__OM uint32_t TASKS_DISABLE; /*!< (@ 0x00000004) Disable NFCT peripheral …
2685 …__OM uint32_t TASKS_SENSE; /*!< (@ 0x00000008) Enable NFC sense field mode, cha…
2687 …__OM uint32_t TASKS_STARTTX; /*!< (@ 0x0000000C) Start transmission of an outgoin…
2690 …__OM uint32_t TASKS_ENABLERXDATA; /*!< (@ 0x0000001C) Initializes the EasyDMA for rece…
2692 …__OM uint32_t TASKS_GOIDLE; /*!< (@ 0x00000024) Force state machine to IDLE stat…
2693 …__OM uint32_t TASKS_GOSLEEP; /*!< (@ 0x00000028) Force state machine to SLEEP_A s…
2822 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Task starting the quadrature dec…
2823 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Task stopping the quadrature dec…
2824 …__OM uint32_t TASKS_READCLRACC; /*!< (@ 0x00000008) Read and clear ACC and ACCDBL …
2825 …__OM uint32_t TASKS_RDCLRACC; /*!< (@ 0x0000000C) Read and clear ACC …
2826 …__OM uint32_t TASKS_RDCLRDBL; /*!< (@ 0x00000010) Read and clear ACCDBL …
2884 …__OM uint32_t TASKS_STARTEPIN[8]; /*!< (@ 0x00000004) Description collection: Captures…
2888 …__OM uint32_t TASKS_STARTISOIN; /*!< (@ 0x00000024) Captures the ISOIN.PTR and ISOIN…
2891 …__OM uint32_t TASKS_STARTEPOUT[8]; /*!< (@ 0x00000028) Description collection: Captures…
2895 …__OM uint32_t TASKS_STARTISOOUT; /*!< (@ 0x00000048) Captures the ISOOUT.PTR and ISOO…
2898 …__OM uint32_t TASKS_EP0RCVOUT; /*!< (@ 0x0000004C) Allows OUT data stage on control…
2899 …__OM uint32_t TASKS_EP0STATUS; /*!< (@ 0x00000050) Allows status stage on control e…
2900 …__OM uint32_t TASKS_EP0STALL; /*!< (@ 0x00000054) Stalls data and status stage on …
2902 …__OM uint32_t TASKS_DPDMDRIVE; /*!< (@ 0x00000058) Forces D+ and D- lines into the …
2904 …__OM uint32_t TASKS_DPDMNODRIVE; /*!< (@ 0x0000005C) Stops forcing D+ and D- lines in…
2997 …__OM uint32_t EPSTALL; /*!< (@ 0x00000518) STALL endpoints …
3055 …__OM uint32_t TASKS_PUSH_KEYSLOT; /*!< (@ 0x00000000) Push a key slot over secure APB …
3094 …__OM uint32_t ERASEALL; /*!< (@ 0x0000050C) Register for erasing all non-vol…
3099 …__OM uint32_t WRITEUICRNS; /*!< (@ 0x00000588) Non-secure APPROTECT enable regi…
3163 …__OM uint32_t AES_KEY_0[8]; /*!< (@ 0x00000400) Description collection: AES key …
3169 …__OM uint32_t AES_KEY_1[8]; /*!< (@ 0x00000420) Description collection: AES key …
3191 …__OM uint32_t AES_CMAC_INIT; /*!< (@ 0x0000047C) Writing to this address triggers…
3206 …__OM uint32_t AES_SW_RESET; /*!< (@ 0x000004F4) Reset the AES engine. …
3208 …__OM uint32_t AES_CMAC_SIZE0_KICK; /*!< (@ 0x00000524) Writing to this address triggers…
3249 …__OM uint32_t CC_SW_RESET; /*!< (@ 0x00000E40) Reset the CRYPTOCELL subsystem. …
3267 …__OM uint32_t CHACHA_KEY[8]; /*!< (@ 0x00000388) Description collection: CHACHA k…
3281 …__OM uint32_t CHACHA_SW_RESET; /*!< (@ 0x000003C0) Reset the CHACHA engine. …
3304 …__OM uint32_t CRYPTO_CTL; /*!< (@ 0x00000900) Defines the cryptographic flow. …
3327 …__OM uint32_t DIN_BUFFER; /*!< (@ 0x00000C00) Used by CPU to write data direct…
3334 …__OM uint32_t SRC_MEM_ADDR; /*!< (@ 0x00000C28) Data source address in memory. …
3335 …__OM uint32_t SRC_MEM_SIZE; /*!< (@ 0x00000C2C) The number of bytes to be read f…
3338 …__OM uint32_t SRC_SRAM_SIZE; /*!< (@ 0x00000C34) The number of bytes to be read f…
3346 …__OM uint32_t DIN_SW_RESET; /*!< (@ 0x00000C44) Reset the DIN DMA engine. …
3347 …__OM uint32_t DIN_CPU_DATA; /*!< (@ 0x00000C48) Specifies the number of bytes th…
3350 …__OM uint32_t DIN_WRITE_ALIGN; /*!< (@ 0x00000C4C) Indicates that the next CPU writ…
3357 …__OM uint32_t DIN_FIFO_RESET; /*!< (@ 0x00000C58) Reset the DIN FIFO, effectively …
3380 …__OM uint32_t DST_MEM_ADDR; /*!< (@ 0x00000D28) Data destination address in memo…
3381 …__OM uint32_t DST_MEM_SIZE; /*!< (@ 0x00000D2C) The number of bytes to be writte…
3383 …__OM uint32_t DST_SRAM_SIZE; /*!< (@ 0x00000D34) The number of bytes to be writte…
3389 …__OM uint32_t DOUT_READ_ALIGN; /*!< (@ 0x00000D44) Indication that the next CPU rea…
3397 …__OM uint32_t DOUT_SW_RESET; /*!< (@ 0x00000D58) Reset the DOUT DMA engine. …
3413 …__OM uint32_t GHASH_SUBKEY[4]; /*!< (@ 0x00000960) Description collection: GHASH su…
3422 …__OM uint32_t GHASH_INIT; /*!< (@ 0x00000984) Configure the GHASH engine for a…
3442 …__OM uint32_t HASH_PAD_AUTO; /*!< (@ 0x00000684) Configure the HASH engine to aut…
3449 …__OM uint32_t HASH_INIT_STATE; /*!< (@ 0x00000694) Configure HASH engine initial st…
3451 …__OM uint32_t HASH_SELECT; /*!< (@ 0x000006A4) Select HASH or GHASH engine as t…
3467 …__OM uint32_t HASH_SW_RESET; /*!< (@ 0x000007E4) Reset the HASH engine. …
3491 …__OM uint32_t ICR; /*!< (@ 0x00000A08) Interrupt clear register. Writin…
3519 …__OM uint32_t AES_CLK; /*!< (@ 0x00000810) Clock control for the AES engine…
3521 …__OM uint32_t HASH_CLK; /*!< (@ 0x00000818) Clock control for the HASH engin…
3522 …__OM uint32_t PKA_CLK; /*!< (@ 0x0000081C) Clock control for the PKA engine…
3523 …__OM uint32_t DMA_CLK; /*!< (@ 0x00000820) Clock control for the DMA engine…
3526 …__OM uint32_t CHACHA_CLK; /*!< (@ 0x00000858) Clock control for the CHACHA eng…
3550 …__OM uint32_t PKA_SW_RESET; /*!< (@ 0x0000008C) Reset the PKA engine. …
3561 …__OM uint32_t PKA_SRAM_WADDR; /*!< (@ 0x000000D4) Start address in PKA SRAM for su…
3563 …__OM uint32_t PKA_SRAM_WDATA; /*!< (@ 0x000000D8) Write data to PKA SRAM. Writing …
3571 …__OM uint32_t PKA_SRAM_WCLEAR; /*!< (@ 0x000000E0) Register for clearing PKA SRAM w…
3572 …__OM uint32_t PKA_SRAM_RADDR; /*!< (@ 0x000000E4) Start address in PKA SRAM for su…
3595 …__OM uint32_t RNG_ICR; /*!< (@ 0x00000108) Interrupt clear register. Writin…
3617 …__OM uint32_t RNG_SW_RESET; /*!< (@ 0x00000140) Reset the RNG engine. …
3620 …__OM uint32_t TRNG_RESET; /*!< (@ 0x000001BC) Reset the TRNG, including intern…
3625 …__OM uint32_t RNG_CLK; /*!< (@ 0x000001C4) Control clock for the RNG engine…
3659 …__OM uint32_t SRAM_ADDR; /*!< (@ 0x00000F04) First address given to RNG SRAM …