Lines Matching refs:__OM
157 #ifndef __OM /*!< Fallback for older CMSIS versions …
158 #define __OM __O macro
252 …__OM uint32_t POWERSET; /*!< (@ 0x00000004) Description cluster: RAMn power …
253 …__OM uint32_t POWERCLR; /*!< (@ 0x00000008) Description cluster: RAMn power …
600 …__OM uint32_t EN; /*!< (@ 0x00000000) Description cluster: Enable chan…
601 …__OM uint32_t DIS; /*!< (@ 0x00000004) Description cluster: Disable cha…
960 …__OM uint32_t TASKS_HFCLKSTART; /*!< (@ 0x00000000) Start HFXO crystal oscillator …
961 …__OM uint32_t TASKS_HFCLKSTOP; /*!< (@ 0x00000004) Stop HFXO crystal oscillator …
962 …__OM uint32_t TASKS_LFCLKSTART; /*!< (@ 0x00000008) Start LFCLK …
963 …__OM uint32_t TASKS_LFCLKSTOP; /*!< (@ 0x0000000C) Stop LFCLK …
964 …__OM uint32_t TASKS_CAL; /*!< (@ 0x00000010) Start calibration of LFRC …
965 …__OM uint32_t TASKS_CTSTART; /*!< (@ 0x00000014) Start calibration timer …
966 …__OM uint32_t TASKS_CTSTOP; /*!< (@ 0x00000018) Stop calibration timer …
1017 …__OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable Constant Latency mode …
1018 …__OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable Low-power mode (variable …
1037 …__OM uint32_t SYSTEMOFF; /*!< (@ 0x00000500) System OFF register …
1095 …__OM uint32_t TASKS_TXEN; /*!< (@ 0x00000000) Enable RADIO in TX mode …
1096 …__OM uint32_t TASKS_RXEN; /*!< (@ 0x00000004) Enable RADIO in RX mode …
1097 …__OM uint32_t TASKS_START; /*!< (@ 0x00000008) Start RADIO …
1098 …__OM uint32_t TASKS_STOP; /*!< (@ 0x0000000C) Stop RADIO …
1099 …__OM uint32_t TASKS_DISABLE; /*!< (@ 0x00000010) Disable RADIO …
1100 …__OM uint32_t TASKS_RSSISTART; /*!< (@ 0x00000014) Start the RSSI and take one sing…
1102 …__OM uint32_t TASKS_RSSISTOP; /*!< (@ 0x00000018) Stop the RSSI measurement …
1103 …__OM uint32_t TASKS_BCSTART; /*!< (@ 0x0000001C) Start the bit counter …
1104 …__OM uint32_t TASKS_BCSTOP; /*!< (@ 0x00000020) Stop the bit counter …
1105 …__OM uint32_t TASKS_EDSTART; /*!< (@ 0x00000024) Start the energy detect measurem…
1107 …__OM uint32_t TASKS_EDSTOP; /*!< (@ 0x00000028) Stop the energy detect measureme…
1108 …__OM uint32_t TASKS_CCASTART; /*!< (@ 0x0000002C) Start the clear channel assessme…
1110 …__OM uint32_t TASKS_CCASTOP; /*!< (@ 0x00000030) Stop the clear channel assessmen…
1214 …__OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start UART receiver …
1215 …__OM uint32_t TASKS_STOPRX; /*!< (@ 0x00000004) Stop UART receiver …
1216 …__OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start UART transmitter …
1217 …__OM uint32_t TASKS_STOPTX; /*!< (@ 0x0000000C) Stop UART transmitter …
1219 …__OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend UART …
1244 …__OM uint32_t TXD; /*!< (@ 0x0000051C) TXD register …
1264 …__OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start UART receiver …
1265 …__OM uint32_t TASKS_STOPRX; /*!< (@ 0x00000004) Stop UART receiver …
1266 …__OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start UART transmitter …
1267 …__OM uint32_t TASKS_STOPTX; /*!< (@ 0x0000000C) Stop UART transmitter …
1269 …__OM uint32_t TASKS_FLUSHRX; /*!< (@ 0x0000002C) Flush RX FIFO into RX buffer …
1357 …__OM uint32_t TASKS_START; /*!< (@ 0x00000010) Start SPI transaction …
1358 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop SPI transaction …
1360 …__OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend SPI transaction …
1361 …__OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume SPI transaction …
1417 …__OM uint32_t TASKS_ACQUIRE; /*!< (@ 0x00000024) Acquire SPI semaphore …
1418 …__OM uint32_t TASKS_RELEASE; /*!< (@ 0x00000028) Release SPI semaphore, enabling …
1462 …__OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start TWI receive sequence …
1464 …__OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start TWI transmit sequence …
1466 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction …
1468 …__OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction …
1469 …__OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction …
1516 …__OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start TWI receive sequence …
1518 …__OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start TWI transmit sequence …
1520 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction. Must be is…
1523 …__OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction …
1524 …__OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction …
1573 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction …
1575 …__OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction …
1576 …__OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction …
1578 …__OM uint32_t TASKS_PREPARERX; /*!< (@ 0x00000030) Prepare the TWI slave to respond…
1579 …__OM uint32_t TASKS_PREPARETX; /*!< (@ 0x00000034) Prepare the TWI slave to respond…
1629 …__OM uint32_t TASKS_ACTIVATE; /*!< (@ 0x00000000) Activate NFCT peripheral for inc…
1631 …__OM uint32_t TASKS_DISABLE; /*!< (@ 0x00000004) Disable NFCT peripheral …
1632 …__OM uint32_t TASKS_SENSE; /*!< (@ 0x00000008) Enable NFC sense field mode, cha…
1634 …__OM uint32_t TASKS_STARTTX; /*!< (@ 0x0000000C) Start transmission of an outgoin…
1637 …__OM uint32_t TASKS_ENABLERXDATA; /*!< (@ 0x0000001C) Initializes the EasyDMA for rece…
1639 …__OM uint32_t TASKS_GOIDLE; /*!< (@ 0x00000024) Force state machine to IDLE stat…
1640 …__OM uint32_t TASKS_GOSLEEP; /*!< (@ 0x00000028) Force state machine to SLEEP_A s…
1719 …__OM uint32_t TASKS_OUT[8]; /*!< (@ 0x00000000) Description collection: Task for…
1723 …__OM uint32_t TASKS_SET[8]; /*!< (@ 0x00000030) Description collection: Task for…
1727 …__OM uint32_t TASKS_CLR[8]; /*!< (@ 0x00000060) Description collection: Task for…
1756 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Starts the SAADC and prepares th…
1758 …__OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000004) Takes one SAADC sample …
1759 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stops the SAADC and terminates a…
1760 …__OM uint32_t TASKS_CALIBRATEOFFSET; /*!< (@ 0x0000000C) Starts offset auto-calibration …
1805 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start Timer …
1806 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop Timer …
1807 …__OM uint32_t TASKS_COUNT; /*!< (@ 0x00000008) Increment Timer (Counter mode on…
1808 …__OM uint32_t TASKS_CLEAR; /*!< (@ 0x0000000C) Clear time …
1809 …__OM uint32_t TASKS_SHUTDOWN; /*!< (@ 0x00000010) Deprecated register - Shut down …
1811 …__OM uint32_t TASKS_CAPTURE[6]; /*!< (@ 0x00000040) Description collection: Capture …
1843 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start RTC COUNTER …
1844 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop RTC COUNTER …
1845 …__OM uint32_t TASKS_CLEAR; /*!< (@ 0x00000008) Clear RTC COUNTER …
1846 …__OM uint32_t TASKS_TRIGOVRFLW; /*!< (@ 0x0000000C) Set COUNTER to 0xFFFFF0 …
1880 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start temperature measurement …
1881 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop temperature measurement …
1923 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Task starting the random number …
1924 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Task stopping the random number …
1950 …__OM uint32_t TASKS_STARTECB; /*!< (@ 0x00000000) Start ECB block encrypt …
1951 …__OM uint32_t TASKS_STOPECB; /*!< (@ 0x00000004) Abort a possible executing ECB o…
1975 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start resolving addresses based …
1978 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stop resolving addresses …
2009 …__OM uint32_t TASKS_KSGEN; /*!< (@ 0x00000000) Start generation of keystream. T…
2011 …__OM uint32_t TASKS_CRYPT; /*!< (@ 0x00000004) Start encryption/decryption. Thi…
2013 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stop encryption/decryption …
2014 …__OM uint32_t TASKS_RATEOVERRIDE; /*!< (@ 0x0000000C) Override DATARATE setting in MOD…
2053 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start the watchdog …
2067 …__OM uint32_t RR[8]; /*!< (@ 0x00000600) Description collection: Reload r…
2082 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Task starting the quadrature dec…
2083 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Task stopping the quadrature dec…
2084 …__OM uint32_t TASKS_READCLRACC; /*!< (@ 0x00000008) Read and clear ACC and ACCDBL …
2085 …__OM uint32_t TASKS_RDCLRACC; /*!< (@ 0x0000000C) Read and clear ACC …
2086 …__OM uint32_t TASKS_RDCLRDBL; /*!< (@ 0x00000010) Read and clear ACCDBL …
2131 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start comparator …
2132 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop comparator …
2133 …__OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000008) Sample comparator value …
2170 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start comparator …
2171 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop comparator …
2172 …__OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000008) Sample comparator value …
2208 …__OM uint32_t TASKS_TRIGGER[16]; /*!< (@ 0x00000000) Description collection: Trigger …
2248 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops PWM pulse generation on al…
2251 …__OM uint32_t TASKS_SEQSTART[2]; /*!< (@ 0x00000008) Description collection: Loads th…
2256 …__OM uint32_t TASKS_NEXTSTEP; /*!< (@ 0x00000010) Steps by one value in the curren…
2302 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Starts continuous PDM transfer …
2303 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops PDM transfer …
2364 …__OM uint32_t ERASEPAGE; /*!< (@ 0x00000508) Register for erasing a page in c…
2365 …__OM uint32_t ERASEALL; /*!< (@ 0x0000050C) Register for erasing all non-vol…
2367 …__OM uint32_t ERASEUICR; /*!< (@ 0x00000514) Register for erasing user inform…
2369 …__OM uint32_t ERASEPAGEPARTIAL; /*!< (@ 0x00000518) Register for partial erase of a …
2391 …__OM PPI_TASKS_CHG_Type TASKS_CHG[6]; /*!< (@ 0x00000000) Channel group tasks …
2452 …__OM uint32_t TASKS_START; /*!< (@ 0x00000000) Starts continuous I2S transfer. …
2454 …__OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops I2S transfer. Also stops M…
2515 …__OM uint32_t TASKS_STARTEPIN[8]; /*!< (@ 0x00000004) Description collection: Captures…
2519 …__OM uint32_t TASKS_STARTISOIN; /*!< (@ 0x00000024) Captures the ISOIN.PTR and ISOIN…
2522 …__OM uint32_t TASKS_STARTEPOUT[8]; /*!< (@ 0x00000028) Description collection: Captures…
2526 …__OM uint32_t TASKS_STARTISOOUT; /*!< (@ 0x00000048) Captures the ISOOUT.PTR and ISOO…
2529 …__OM uint32_t TASKS_EP0RCVOUT; /*!< (@ 0x0000004C) Allows OUT data stage on control…
2530 …__OM uint32_t TASKS_EP0STATUS; /*!< (@ 0x00000050) Allows status stage on control e…
2531 …__OM uint32_t TASKS_EP0STALL; /*!< (@ 0x00000054) Stalls data and status stage on …
2533 …__OM uint32_t TASKS_DPDMDRIVE; /*!< (@ 0x00000058) Forces D+ and D- lines into the …
2535 …__OM uint32_t TASKS_DPDMNODRIVE; /*!< (@ 0x0000005C) Stops forcing D+ and D- lines in…
2602 …__OM uint32_t EPSTALL; /*!< (@ 0x00000518) STALL endpoints …
2632 …__OM uint32_t TASKS_ACTIVATE; /*!< (@ 0x00000000) Activate QSPI interface …
2633 …__OM uint32_t TASKS_READSTART; /*!< (@ 0x00000004) Start transfer from external fla…
2635 …__OM uint32_t TASKS_WRITESTART; /*!< (@ 0x00000008) Start transfer from internal RAM…
2637 …__OM uint32_t TASKS_ERASESTART; /*!< (@ 0x0000000C) Start external flash memory eras…
2638 …__OM uint32_t TASKS_DEACTIVATE; /*!< (@ 0x00000010) Deactivate QSPI interface …
2700 …__OM uint32_t AES_KEY_0[8]; /*!< (@ 0x00000400) Description collection: AES key …
2716 …__OM uint32_t AES_SK; /*!< (@ 0x00000478) Writing to this address trigger …
2718 …__OM uint32_t AES_CMAC_INIT; /*!< (@ 0x0000047C) Writing to this address triggers…
2733 …__OM uint32_t AES_SW_RESET; /*!< (@ 0x000004F4) Reset the AES engine. …
2735 …__OM uint32_t AES_CMAC_SIZE0_KICK; /*!< (@ 0x00000524) Writing to this address triggers…
2756 …__OM uint32_t CHACHA_KEY[8]; /*!< (@ 0x00000388) Description collection: CHACHA k…
2770 …__OM uint32_t CHACHA_SW_RESET; /*!< (@ 0x000003C0) Reset the CHACHA engine. …
2793 …__OM uint32_t CRYPTO_CTL; /*!< (@ 0x00000900) Defines the cryptographic flow. …
2816 …__OM uint32_t DIN_BUFFER; /*!< (@ 0x00000C00) Used by CPU to write data direct…
2823 …__OM uint32_t SRC_MEM_ADDR; /*!< (@ 0x00000C28) Data source address in memory. …
2824 …__OM uint32_t SRC_MEM_SIZE; /*!< (@ 0x00000C2C) The number of bytes to be read f…
2827 …__OM uint32_t SRC_SRAM_SIZE; /*!< (@ 0x00000C34) The number of bytes to be read f…
2835 …__OM uint32_t DIN_SW_RESET; /*!< (@ 0x00000C44) Reset the DIN DMA engine. …
2836 …__OM uint32_t DIN_CPU_DATA; /*!< (@ 0x00000C48) Specifies the number of bytes th…
2839 …__OM uint32_t DIN_WRITE_ALIGN; /*!< (@ 0x00000C4C) Indicates that the next CPU writ…
2846 …__OM uint32_t DIN_FIFO_RESET; /*!< (@ 0x00000C58) Reset the DIN FIFO, effectively …
2869 …__OM uint32_t DST_MEM_ADDR; /*!< (@ 0x00000D28) Data destination address in memo…
2870 …__OM uint32_t DST_MEM_SIZE; /*!< (@ 0x00000D2C) The number of bytes to be writte…
2872 …__OM uint32_t DST_SRAM_SIZE; /*!< (@ 0x00000D34) The number of bytes to be writte…
2878 …__OM uint32_t DOUT_READ_ALIGN; /*!< (@ 0x00000D44) Indication that the next CPU rea…
2886 …__OM uint32_t DOUT_SW_RESET; /*!< (@ 0x00000D58) Reset the DOUT DMA engine. …
2906 …__OM uint32_t HASH_PAD_AUTO; /*!< (@ 0x00000684) Configure the HASH engine to aut…
2910 …__OM uint32_t HASH_INIT_STATE; /*!< (@ 0x00000694) Configure HASH engine initial st…
2927 …__OM uint32_t HASH_SW_RESET; /*!< (@ 0x000007E4) Reset the HASH engine. …
2951 …__OM uint32_t ICR; /*!< (@ 0x00000A08) Interrupt clear register. Writin…
2974 …__OM uint32_t HOST_IOT_KDR1; /*!< (@ 0x00000A54) This register holds bits 63:32 o…
2977 …__OM uint32_t HOST_IOT_KDR2; /*!< (@ 0x00000A58) This register holds bits 95:64 o…
2980 …__OM uint32_t HOST_IOT_KDR3; /*!< (@ 0x00000A5C) This register holds bits 127:96 …
3000 …__OM uint32_t AES_CLK; /*!< (@ 0x00000810) Clock control for the AES engine…
3002 …__OM uint32_t HASH_CLK; /*!< (@ 0x00000818) Clock control for the HASH engin…
3003 …__OM uint32_t PKA_CLK; /*!< (@ 0x0000081C) Clock control for the PKA engine…
3004 …__OM uint32_t DMA_CLK; /*!< (@ 0x00000820) Clock control for the DMA engine…
3007 …__OM uint32_t CHACHA_CLK; /*!< (@ 0x00000858) Clock control for the CHACHA eng…
3031 …__OM uint32_t PKA_SW_RESET; /*!< (@ 0x0000008C) Reset the PKA engine. …
3042 …__OM uint32_t PKA_SRAM_WADDR; /*!< (@ 0x000000D4) Start address in PKA SRAM for su…
3044 …__OM uint32_t PKA_SRAM_WDATA; /*!< (@ 0x000000D8) Write data to PKA SRAM. Writing …
3052 …__OM uint32_t PKA_SRAM_WCLEAR; /*!< (@ 0x000000E0) Register for clearing PKA SRAM w…
3053 …__OM uint32_t PKA_SRAM_RADDR; /*!< (@ 0x000000E4) Start address in PKA SRAM for su…
3076 …__OM uint32_t RNG_ICR; /*!< (@ 0x00000108) Interrupt clear register. Writin…
3098 …__OM uint32_t RNG_SW_RESET; /*!< (@ 0x00000140) Reset the RNG engine. …
3101 …__OM uint32_t TRNG_RESET; /*!< (@ 0x000001BC) Reset the TRNG, including intern…
3106 …__OM uint32_t RNG_CLK; /*!< (@ 0x000001C4) Control clock for the RNG engine…
3140 …__OM uint32_t SRAM_ADDR; /*!< (@ 0x00000F04) First address given to RNG SRAM …