113 #define NRF_UARTE_IS_320MHZ_UARTE(p_reg)                                                     \  argument
114     NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(UARTE120), (p_reg == NRF_UARTE120), (false))
119 #define NRF_UARTE_IS_128MHZ_UARTE(p_reg)                                                     \  argument
121         (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(UARTE00), (p_reg == NRF_UARTE00), (false))), \
127 #define NRF_UARTE_IS_64MHZ_UARTE(p_reg)                                                      \  argument
129         (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(UARTE00), (p_reg == NRF_UARTE00), (false))), \
138 #define NRF_UARTE_BASE_FREQUENCY_GET(p_reg)                                  \  argument
139     ((NRF_UARTE_IS_320MHZ_UARTE(p_reg)) ? (NRF_UARTE_BASE_FREQUENCY_320MHZ): \
140     ((NRF_UARTE_IS_128MHZ_UARTE(p_reg)) ? (NRF_UARTE_BASE_FREQUENCY_128MHZ): \
141     ((NRF_UARTE_IS_64MHZ_UARTE(p_reg))  ? (NRF_UARTE_BASE_FREQUENCY_64MHZ) : \
327 NRF_STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
338 NRF_STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type const * p_reg,
349 NRF_STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type const * p_reg,
358 NRF_STATIC_INLINE void nrf_uarte_shorts_set(NRF_UARTE_Type * p_reg, uint32_t mask);
368 NRF_STATIC_INLINE uint32_t nrf_uarte_shorts_get(NRF_UARTE_Type * p_reg, uint32_t mask);
376 NRF_STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t mask);
384 NRF_STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t mask);
393 NRF_STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t mask);
404 NRF_STATIC_INLINE uint32_t nrf_uarte_int_enable_check(NRF_UARTE_Type const * p_reg, uint32_t mask);
413 NRF_STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t mask);
424 NRF_STATIC_INLINE void nrf_uarte_subscribe_set(NRF_UARTE_Type * p_reg,
435 NRF_STATIC_INLINE void nrf_uarte_subscribe_clear(NRF_UARTE_Type * p_reg,
446 NRF_STATIC_INLINE void nrf_uarte_publish_set(NRF_UARTE_Type *  p_reg,
457 NRF_STATIC_INLINE void nrf_uarte_publish_clear(NRF_UARTE_Type *  p_reg,
468 NRF_STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg);
477 NRF_STATIC_INLINE uint32_t nrf_uarte_errorsrc_get(NRF_UARTE_Type * p_reg);
486 NRF_STATIC_INLINE void nrf_uarte_errorsrc_clear(NRF_UARTE_Type * p_reg, uint32_t errsrc_mask);
493 NRF_STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg);
500 NRF_STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg);
510 NRF_STATIC_INLINE bool nrf_uarte_enable_check(NRF_UARTE_Type const * p_reg);
519 NRF_STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg,
528 NRF_STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg);
536 NRF_STATIC_INLINE void nrf_uarte_tx_pin_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd);
545 NRF_STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type const * p_reg);
553 NRF_STATIC_INLINE void nrf_uarte_rx_pin_set(NRF_UARTE_Type * p_reg, uint32_t pselrxd);
562 NRF_STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type const * p_reg);
570 NRF_STATIC_INLINE void nrf_uarte_rts_pin_set(NRF_UARTE_Type * p_reg, uint32_t pselrts);
579 NRF_STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type const * p_reg);
587 NRF_STATIC_INLINE void nrf_uarte_cts_pin_set(NRF_UARTE_Type * p_reg, uint32_t pselcts);
596 NRF_STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type const * p_reg);
605 NRF_STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg,
614 NRF_STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg);
622 NRF_STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
632 NRF_STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type const * p_reg,
641 NRF_STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type           * p_reg,
650 NRF_STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type *     p_reg,
660 NRF_STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
671 NRF_STATIC_INLINE uint8_t const * nrf_uarte_tx_buffer_get(NRF_UARTE_Type * p_reg);
680 NRF_STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type const * p_reg);
689 NRF_STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
700 NRF_STATIC_INLINE uint8_t * nrf_uarte_rx_buffer_get(NRF_UARTE_Type * p_reg);
709 NRF_STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type const * p_reg);
718 NRF_STATIC_INLINE void nrf_uarte_frame_timeout_set(NRF_UARTE_Type * p_reg, uint32_t timeout);
722 NRF_STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event)  in nrf_uarte_event_clear()  argument
724     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;  in nrf_uarte_event_clear()
725     nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);  in nrf_uarte_event_clear()
728 NRF_STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type const * p_reg,  in nrf_uarte_event_check()  argument
731     return nrf_event_check(p_reg, event);  in nrf_uarte_event_check()
734 NRF_STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type const * p_reg,  in nrf_uarte_event_address_get()  argument
737     return nrf_task_event_address_get(p_reg, event);  in nrf_uarte_event_address_get()
740 NRF_STATIC_INLINE void nrf_uarte_shorts_set(NRF_UARTE_Type * p_reg, uint32_t mask)  in nrf_uarte_shorts_set()  argument
742     p_reg->SHORTS = mask;  in nrf_uarte_shorts_set()
745 NRF_STATIC_INLINE uint32_t nrf_uarte_shorts_get(NRF_UARTE_Type * p_reg, uint32_t mask)  in nrf_uarte_shorts_get()  argument
747     return p_reg->SHORTS & mask;  in nrf_uarte_shorts_get()
750 NRF_STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t mask)  in nrf_uarte_shorts_enable()  argument
752     p_reg->SHORTS |= mask;  in nrf_uarte_shorts_enable()
755 NRF_STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t mask)  in nrf_uarte_shorts_disable()  argument
757     p_reg->SHORTS &= ~(mask);  in nrf_uarte_shorts_disable()
760 NRF_STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t mask)  in nrf_uarte_int_enable()  argument
762     p_reg->INTENSET = mask;  in nrf_uarte_int_enable()
765 NRF_STATIC_INLINE uint32_t nrf_uarte_int_enable_check(NRF_UARTE_Type const * p_reg, uint32_t mask)  in nrf_uarte_int_enable_check()  argument
767     return p_reg->INTENSET & mask;  in nrf_uarte_int_enable_check()
770 NRF_STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t mask)  in nrf_uarte_int_disable()  argument
772     p_reg->INTENCLR = mask;  in nrf_uarte_int_disable()
776 NRF_STATIC_INLINE void nrf_uarte_subscribe_set(NRF_UARTE_Type * p_reg,  in nrf_uarte_subscribe_set()  argument
780     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =  in nrf_uarte_subscribe_set()
784 NRF_STATIC_INLINE void nrf_uarte_subscribe_clear(NRF_UARTE_Type * p_reg,  in nrf_uarte_subscribe_clear()  argument
787     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;  in nrf_uarte_subscribe_clear()
790 NRF_STATIC_INLINE void nrf_uarte_publish_set(NRF_UARTE_Type *  p_reg,  in nrf_uarte_publish_set()  argument
794     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =  in nrf_uarte_publish_set()
798 NRF_STATIC_INLINE void nrf_uarte_publish_clear(NRF_UARTE_Type *  p_reg,  in nrf_uarte_publish_clear()  argument
801     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;  in nrf_uarte_publish_clear()
805 NRF_STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg)  in nrf_uarte_errorsrc_get_and_clear()  argument
807     uint32_t errsrc_mask = p_reg->ERRORSRC;  in nrf_uarte_errorsrc_get_and_clear()
808     p_reg->ERRORSRC = errsrc_mask;  in nrf_uarte_errorsrc_get_and_clear()
812 NRF_STATIC_INLINE uint32_t nrf_uarte_errorsrc_get(NRF_UARTE_Type * p_reg)  in nrf_uarte_errorsrc_get()  argument
814     return p_reg->ERRORSRC;  in nrf_uarte_errorsrc_get()
817 NRF_STATIC_INLINE void nrf_uarte_errorsrc_clear(NRF_UARTE_Type * p_reg, uint32_t errsrc_mask)  in nrf_uarte_errorsrc_clear()  argument
819     p_reg->ERRORSRC = errsrc_mask;  in nrf_uarte_errorsrc_clear()
822 NRF_STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg)  in nrf_uarte_enable()  argument
824     p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;  in nrf_uarte_enable()
827 NRF_STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg)  in nrf_uarte_disable()  argument
829     p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;  in nrf_uarte_disable()
832 NRF_STATIC_INLINE bool nrf_uarte_enable_check(NRF_UARTE_Type const * p_reg)  in nrf_uarte_enable_check()  argument
834     return p_reg->ENABLE == UARTE_ENABLE_ENABLE_Enabled;  in nrf_uarte_enable_check()
837 NRF_STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg,  in nrf_uarte_txrx_pins_set()  argument
841     p_reg->PSEL.TXD = pseltxd;  in nrf_uarte_txrx_pins_set()
842     p_reg->PSEL.RXD = pselrxd;  in nrf_uarte_txrx_pins_set()
845 NRF_STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg)  in nrf_uarte_txrx_pins_disconnect()  argument
847     nrf_uarte_txrx_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED);  in nrf_uarte_txrx_pins_disconnect()
850 NRF_STATIC_INLINE void nrf_uarte_tx_pin_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd)  in nrf_uarte_tx_pin_set()  argument
852     p_reg->PSEL.TXD = pseltxd;  in nrf_uarte_tx_pin_set()
855 NRF_STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type const * p_reg)  in nrf_uarte_tx_pin_get()  argument
857     return p_reg->PSEL.TXD;  in nrf_uarte_tx_pin_get()
860 NRF_STATIC_INLINE void nrf_uarte_rx_pin_set(NRF_UARTE_Type * p_reg, uint32_t pselrxd)  in nrf_uarte_rx_pin_set()  argument
862     p_reg->PSEL.RXD = pselrxd;  in nrf_uarte_rx_pin_set()
865 NRF_STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type const * p_reg)  in nrf_uarte_rx_pin_get()  argument
867     return p_reg->PSEL.RXD;  in nrf_uarte_rx_pin_get()
870 NRF_STATIC_INLINE void nrf_uarte_rts_pin_set(NRF_UARTE_Type * p_reg, uint32_t pselrts)  in nrf_uarte_rts_pin_set()  argument
872     p_reg->PSEL.RTS = pselrts;  in nrf_uarte_rts_pin_set()
875 NRF_STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type const * p_reg)  in nrf_uarte_rts_pin_get()  argument
877     return p_reg->PSEL.RTS;  in nrf_uarte_rts_pin_get()
880 NRF_STATIC_INLINE void nrf_uarte_cts_pin_set(NRF_UARTE_Type * p_reg, uint32_t pselcts)  in nrf_uarte_cts_pin_set()  argument
882     p_reg->PSEL.CTS = pselcts;  in nrf_uarte_cts_pin_set()
885 NRF_STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type const * p_reg)  in nrf_uarte_cts_pin_get()  argument
887     return p_reg->PSEL.CTS;  in nrf_uarte_cts_pin_get()
890 NRF_STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg,  in nrf_uarte_hwfc_pins_set()  argument
894     p_reg->PSEL.RTS = pselrts;  in nrf_uarte_hwfc_pins_set()
895     p_reg->PSEL.CTS = pselcts;  in nrf_uarte_hwfc_pins_set()
898 NRF_STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg)  in nrf_uarte_hwfc_pins_disconnect()  argument
900     nrf_uarte_hwfc_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED);  in nrf_uarte_hwfc_pins_disconnect()
903 NRF_STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task)  in nrf_uarte_task_trigger()  argument
905     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;  in nrf_uarte_task_trigger()
908 NRF_STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type const * p_reg,  in nrf_uarte_task_address_get()  argument
911     return (uint32_t)p_reg + (uint32_t)task;  in nrf_uarte_task_address_get()
914 NRF_STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type           * p_reg,  in nrf_uarte_configure()  argument
917     p_reg->CONFIG = (uint32_t)p_cfg->parity  in nrf_uarte_configure()
930 NRF_STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate)  in nrf_uarte_baudrate_set()  argument
932     p_reg->BAUDRATE = baudrate;  in nrf_uarte_baudrate_set()
935 NRF_STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,  in nrf_uarte_tx_buffer_set()  argument
940     p_reg->DMA.TX.PTR    = (uint32_t)p_buffer;  in nrf_uarte_tx_buffer_set()
941     p_reg->DMA.TX.MAXCNT = length;  in nrf_uarte_tx_buffer_set()
943     p_reg->TXD.PTR    = (uint32_t)p_buffer;  in nrf_uarte_tx_buffer_set()
944     p_reg->TXD.MAXCNT = length;  in nrf_uarte_tx_buffer_set()
948 NRF_STATIC_INLINE uint8_t const * nrf_uarte_tx_buffer_get(NRF_UARTE_Type * p_reg)  in nrf_uarte_tx_buffer_get()  argument
951     return (uint8_t const *)p_reg->DMA.TX.PTR;  in nrf_uarte_tx_buffer_get()
953     return (uint8_t const *)p_reg->TXD.PTR;  in nrf_uarte_tx_buffer_get()
957 NRF_STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type const * p_reg)  in nrf_uarte_tx_amount_get()  argument
960     return p_reg->DMA.TX.AMOUNT;  in nrf_uarte_tx_amount_get()
962     return p_reg->TXD.AMOUNT;  in nrf_uarte_tx_amount_get()
966 NRF_STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,  in nrf_uarte_rx_buffer_set()  argument
971     p_reg->DMA.RX.PTR    = (uint32_t)p_buffer;  in nrf_uarte_rx_buffer_set()
972     p_reg->DMA.RX.MAXCNT = length;  in nrf_uarte_rx_buffer_set()
974     p_reg->RXD.PTR    = (uint32_t)p_buffer;  in nrf_uarte_rx_buffer_set()
975     p_reg->RXD.MAXCNT = length;  in nrf_uarte_rx_buffer_set()
979 NRF_STATIC_INLINE uint8_t * nrf_uarte_rx_buffer_get(NRF_UARTE_Type * p_reg)  in nrf_uarte_rx_buffer_get()  argument
982     return (uint8_t *)p_reg->DMA.RX.PTR;  in nrf_uarte_rx_buffer_get()
984     return (uint8_t *)p_reg->RXD.PTR;  in nrf_uarte_rx_buffer_get()
988 NRF_STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type const * p_reg)  in nrf_uarte_rx_amount_get()  argument
991     return p_reg->DMA.RX.AMOUNT;  in nrf_uarte_rx_amount_get()
993     return p_reg->RXD.AMOUNT;  in nrf_uarte_rx_amount_get()
998 NRF_STATIC_INLINE void nrf_uarte_frame_timeout_set(NRF_UARTE_Type * p_reg, uint32_t timeout)  in nrf_uarte_frame_timeout_set()  argument
1000     p_reg->FRAMETIMEOUT = timeout;  in nrf_uarte_frame_timeout_set()