Lines Matching refs:subindex
720 uint8_t subindex);
734 uint8_t subindex,
753 uint8_t subindex);
769 uint8_t subindex);
788 uint8_t subindex);
804 uint8_t subindex);
821 uint8_t subindex);
835 uint8_t subindex,
1158 uint8_t subindex) in nrf_spu_feature_secattr_get() argument
1190 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT); in nrf_spu_feature_secattr_get()
1191 return (p_reg->FEATURE.GPIOTE[index].CH[subindex] in nrf_spu_feature_secattr_get()
1197 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT); in nrf_spu_feature_secattr_get()
1198 return (p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] in nrf_spu_feature_secattr_get()
1204 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIO_PIN_COUNT); in nrf_spu_feature_secattr_get()
1205 return (p_reg->FEATURE.GPIO[index].PIN[subindex] in nrf_spu_feature_secattr_get()
1230 return (p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] in nrf_spu_feature_secattr_get()
1236 return (p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] in nrf_spu_feature_secattr_get()
1242 return (p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] in nrf_spu_feature_secattr_get()
1248 return (p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] in nrf_spu_feature_secattr_get()
1291 uint8_t subindex) in nrf_spu_feature_lock_get() argument
1323 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT); in nrf_spu_feature_lock_get()
1324 return (p_reg->FEATURE.GPIOTE[index].CH[subindex] in nrf_spu_feature_lock_get()
1330 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT); in nrf_spu_feature_lock_get()
1331 return (p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] in nrf_spu_feature_lock_get()
1337 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIO_PIN_COUNT); in nrf_spu_feature_lock_get()
1338 return (p_reg->FEATURE.GPIO[index].PIN[subindex] in nrf_spu_feature_lock_get()
1363 return (p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] in nrf_spu_feature_lock_get()
1369 return (p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] in nrf_spu_feature_lock_get()
1375 return (p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] in nrf_spu_feature_lock_get()
1381 return (p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] in nrf_spu_feature_lock_get()
1425 uint8_t subindex) in nrf_spu_feature_block_get() argument
1457 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT); in nrf_spu_feature_block_get()
1458 return (p_reg->FEATURE.GPIOTE[index].CH[subindex] in nrf_spu_feature_block_get()
1464 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT); in nrf_spu_feature_block_get()
1465 return (p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] in nrf_spu_feature_block_get()
1471 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIO_PIN_COUNT); in nrf_spu_feature_block_get()
1472 return (p_reg->FEATURE.GPIO[index].PIN[subindex] in nrf_spu_feature_block_get()
1497 return (p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] in nrf_spu_feature_block_get()
1503 return (p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] in nrf_spu_feature_block_get()
1509 return (p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] in nrf_spu_feature_block_get()
1515 return (p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] in nrf_spu_feature_block_get()
1560 uint8_t subindex) in nrf_spu_feature_ownerid_get() argument
1592 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT); in nrf_spu_feature_ownerid_get()
1593 return (nrf_owner_t)((p_reg->FEATURE.GPIOTE[index].CH[subindex] in nrf_spu_feature_ownerid_get()
1599 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT); in nrf_spu_feature_ownerid_get()
1600 return (nrf_owner_t)((p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] in nrf_spu_feature_ownerid_get()
1606 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIO_PIN_COUNT); in nrf_spu_feature_ownerid_get()
1607 return (nrf_owner_t)((p_reg->FEATURE.GPIO[index].PIN[subindex] in nrf_spu_feature_ownerid_get()
1632 return (nrf_owner_t)((p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] in nrf_spu_feature_ownerid_get()
1638 return (nrf_owner_t)((p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] in nrf_spu_feature_ownerid_get()
1644 return (nrf_owner_t)((p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] in nrf_spu_feature_ownerid_get()
1650 return (nrf_owner_t)((p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] in nrf_spu_feature_ownerid_get()
1694 uint8_t subindex, in nrf_spu_feature_secattr_set() argument
1747 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT); in nrf_spu_feature_secattr_set()
1748 p_reg->FEATURE.GPIOTE[index].CH[subindex] = in nrf_spu_feature_secattr_set()
1749 ((p_reg->FEATURE.GPIOTE[index].CH[subindex] & in nrf_spu_feature_secattr_set()
1759 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT); in nrf_spu_feature_secattr_set()
1760 p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] = in nrf_spu_feature_secattr_set()
1761 ((p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] & in nrf_spu_feature_secattr_set()
1771 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIO_PIN_COUNT); in nrf_spu_feature_secattr_set()
1772 p_reg->FEATURE.GPIO[index].PIN[subindex] = in nrf_spu_feature_secattr_set()
1773 ((p_reg->FEATURE.GPIO[index].PIN[subindex] & in nrf_spu_feature_secattr_set()
1817 p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] = in nrf_spu_feature_secattr_set()
1818 ((p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] & in nrf_spu_feature_secattr_set()
1828 p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] = in nrf_spu_feature_secattr_set()
1829 ((p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] & in nrf_spu_feature_secattr_set()
1839 p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] = in nrf_spu_feature_secattr_set()
1840 ((p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] & in nrf_spu_feature_secattr_set()
1850 p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] = in nrf_spu_feature_secattr_set()
1851 ((p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] & in nrf_spu_feature_secattr_set()
1918 uint8_t subindex) in nrf_spu_feature_lock_enable() argument
1962 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT); in nrf_spu_feature_lock_enable()
1963 p_reg->FEATURE.GPIOTE[index].CH[subindex] = in nrf_spu_feature_lock_enable()
1964 ((p_reg->FEATURE.GPIOTE[index].CH[subindex] & in nrf_spu_feature_lock_enable()
1972 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT); in nrf_spu_feature_lock_enable()
1973 p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] = in nrf_spu_feature_lock_enable()
1974 ((p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] & in nrf_spu_feature_lock_enable()
1982 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIO_PIN_COUNT); in nrf_spu_feature_lock_enable()
1983 p_reg->FEATURE.GPIO[index].PIN[subindex] = in nrf_spu_feature_lock_enable()
1984 ((p_reg->FEATURE.GPIO[index].PIN[subindex] & in nrf_spu_feature_lock_enable()
2020 p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] = in nrf_spu_feature_lock_enable()
2021 ((p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] & in nrf_spu_feature_lock_enable()
2029 p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] = in nrf_spu_feature_lock_enable()
2030 ((p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] & in nrf_spu_feature_lock_enable()
2038 p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] = in nrf_spu_feature_lock_enable()
2039 ((p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] & in nrf_spu_feature_lock_enable()
2047 p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] = in nrf_spu_feature_lock_enable()
2048 ((p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] & in nrf_spu_feature_lock_enable()
2106 uint8_t subindex) in nrf_spu_feature_block_enable() argument
2150 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT); in nrf_spu_feature_block_enable()
2151 p_reg->FEATURE.GPIOTE[index].CH[subindex] = in nrf_spu_feature_block_enable()
2152 ((p_reg->FEATURE.GPIOTE[index].CH[subindex] & in nrf_spu_feature_block_enable()
2160 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT); in nrf_spu_feature_block_enable()
2161 p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] = in nrf_spu_feature_block_enable()
2162 ((p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] & in nrf_spu_feature_block_enable()
2170 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIO_PIN_COUNT); in nrf_spu_feature_block_enable()
2171 p_reg->FEATURE.GPIO[index].PIN[subindex] = in nrf_spu_feature_block_enable()
2172 ((p_reg->FEATURE.GPIO[index].PIN[subindex] & in nrf_spu_feature_block_enable()
2208 p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] = in nrf_spu_feature_block_enable()
2209 ((p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] & in nrf_spu_feature_block_enable()
2217 p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] = in nrf_spu_feature_block_enable()
2218 ((p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] & in nrf_spu_feature_block_enable()
2226 p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] = in nrf_spu_feature_block_enable()
2227 ((p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] & in nrf_spu_feature_block_enable()
2235 p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] = in nrf_spu_feature_block_enable()
2236 ((p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] & in nrf_spu_feature_block_enable()
2295 uint8_t subindex, in nrf_spu_feature_ownerid_set() argument
2344 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT); in nrf_spu_feature_ownerid_set()
2345 p_reg->FEATURE.GPIOTE[index].CH[subindex] = in nrf_spu_feature_ownerid_set()
2346 ((p_reg->FEATURE.GPIOTE[index].CH[subindex] & in nrf_spu_feature_ownerid_set()
2355 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT); in nrf_spu_feature_ownerid_set()
2356 p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] = in nrf_spu_feature_ownerid_set()
2357 ((p_reg->FEATURE.GPIOTE[index].INTERRUPT[subindex] & in nrf_spu_feature_ownerid_set()
2366 NRFX_ASSERT(subindex < NRF_SPU_FEATURE_GPIO_PIN_COUNT); in nrf_spu_feature_ownerid_set()
2367 p_reg->FEATURE.GPIO[index].PIN[subindex] = in nrf_spu_feature_ownerid_set()
2368 ((p_reg->FEATURE.GPIO[index].PIN[subindex] & in nrf_spu_feature_ownerid_set()
2408 p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] = in nrf_spu_feature_ownerid_set()
2409 ((p_reg->FEATURE.BELLS.DOMAIN[index].BELL[subindex] & in nrf_spu_feature_ownerid_set()
2418 p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] = in nrf_spu_feature_ownerid_set()
2419 ((p_reg->FEATURE.BELLS.PROCESSOR[index].TASKS[subindex] & in nrf_spu_feature_ownerid_set()
2428 p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] = in nrf_spu_feature_ownerid_set()
2429 ((p_reg->FEATURE.BELLS.PROCESSOR[index].EVENTS[subindex] & in nrf_spu_feature_ownerid_set()
2438 p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] = in nrf_spu_feature_ownerid_set()
2439 ((p_reg->FEATURE.BELLS.PROCESSOR[index].INTERRUPT[subindex] & in nrf_spu_feature_ownerid_set()