987     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_cfg()  local
988     uint32_t cnf = reg->PIN_CNF[pin_number];  in nrf_gpio_cfg()
1013     reg->PIN_CNF[pin_number] = cnf;  in nrf_gpio_cfg()
1023     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_reconfigure()  local
1024     uint32_t cnf = reg->PIN_CNF[pin_number];  in nrf_gpio_reconfigure()
1047     reg->PIN_CNF[pin_number] = cnf;  in nrf_gpio_reconfigure()
1165         NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_dir_set()  local
1166         reg->DIRSET = (1UL << pin_number);  in nrf_gpio_pin_dir_set()
1173     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_set()  local
1175     nrf_gpio_port_out_set(reg, 1UL << pin_number);  in nrf_gpio_pin_set()
1181     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_clear()  local
1183     nrf_gpio_port_out_clear(reg, 1UL << pin_number);  in nrf_gpio_pin_clear()
1189     NRF_GPIO_Type * reg        = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_toggle()  local
1190     uint32_t        pins_state = reg->OUT;  in nrf_gpio_pin_toggle()
1192     reg->OUTSET = (~pins_state & (1UL << pin_number));  in nrf_gpio_pin_toggle()
1193     reg->OUTCLR = (pins_state & (1UL << pin_number));  in nrf_gpio_pin_toggle()
1226     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_read()  local
1228     return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);  in nrf_gpio_pin_read()
1238     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_out_read()  local
1240     return ((nrf_gpio_port_out_read(reg) >> pin_number) & 1UL);  in nrf_gpio_pin_out_read()
1246     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_sense_get()  local
1248     return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &  in nrf_gpio_pin_sense_get()
1255     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_dir_get()  local
1257     return (nrf_gpio_pin_dir_t)((reg->PIN_CNF[pin_number] &  in nrf_gpio_pin_dir_get()
1263     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_input_get()  local
1265     return (nrf_gpio_pin_input_t)((reg->PIN_CNF[pin_number] &  in nrf_gpio_pin_input_get()
1271     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_pull_get()  local
1273     return (nrf_gpio_pin_pull_t)((reg->PIN_CNF[pin_number] &  in nrf_gpio_pin_pull_get()
1374     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_retain_check()  local
1376     return (nrf_gpio_port_retain_get(reg) & (1UL << pin_number)) != 0U;  in nrf_gpio_pin_retain_check()
1393     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_retain_enable()  local
1395     nrf_gpio_port_retain_enable(reg, 1UL << pin_number);  in nrf_gpio_pin_retain_enable()
1400     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_retain_disable()  local
1402     nrf_gpio_port_retain_disable(reg, 1UL << pin_number);  in nrf_gpio_pin_retain_disable()
1454     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_latch_get()  local
1456     return (reg->LATCH & (1 << pin_number)) ? 1 : 0;  in nrf_gpio_pin_latch_get()
1462     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_latch_clear()  local
1464     reg->LATCH = (1 << pin_number);  in nrf_gpio_pin_latch_clear()
1471     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_control_select()  local
1473     uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_MCUSEL_Msk;  in nrf_gpio_pin_control_select()
1474     reg->PIN_CNF[pin_number] = cnf | (ctrl << GPIO_PIN_CNF_MCUSEL_Pos);  in nrf_gpio_pin_control_select()
1476     uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_CTRLSEL_Msk;  in nrf_gpio_pin_control_select()
1477     reg->PIN_CNF[pin_number] = cnf | (ctrl << GPIO_PIN_CNF_CTRLSEL_Pos);  in nrf_gpio_pin_control_select()
1485     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_clock_set()  local
1487     reg->PIN_CNF[pin_number] = ((reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_CLOCKPIN_Msk) |  in nrf_gpio_pin_clock_set()
1494     NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);  in nrf_gpio_pin_clock_check()  local
1496     return (((reg->PIN_CNF[pin_number] & GPIO_PIN_CNF_CLOCKPIN_Msk) >> GPIO_PIN_CNF_CLOCKPIN_Pos)  in nrf_gpio_pin_clock_check()