367 static void uarte_int_unlock(NRF_UARTE_Type * p_uarte, uint32_t int_mask)  in uarte_int_unlock()  argument
369     nrfy_uarte_int_enable(p_uarte, int_mask);  in uarte_int_unlock()
552     uint32_t int_mask = tx_int_mask | ((event_handler) ? rx_int_mask : 0);  in nrfx_uarte_init()  local
554     nrfy_uarte_int_enable(p_instance->p_reg, int_mask);  in nrfx_uarte_init()
1036     uint32_t int_mask;  in nrfx_uarte_tx_abort()  local
1038     int_mask = uarte_int_lock(p_uarte);  in nrfx_uarte_tx_abort()
1041         uarte_int_unlock(p_uarte, int_mask);  in nrfx_uarte_tx_abort()
1056     uarte_int_unlock(p_uarte, int_mask);  in nrfx_uarte_tx_abort()
2042                                          uint32_t int_mask)  in event_check_and_clear()  argument
2044     if (nrfy_uarte_event_check(p_uarte, event) && (int_mask & NRFY_EVENT_TO_INT_BITMASK(event))) {  in event_check_and_clear()
2054                                uint32_t int_mask)  in event_check()  argument
2057            (int_mask & NRFY_EVENT_TO_INT_BITMASK(event));  in event_check()
2064     uint32_t int_mask = nrfy_uarte_int_enable_check(p_uarte, UINT32_MAX);  in irq_handler()  local
2065     bool txstopped = event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED, int_mask);  in irq_handler()
2066     bool endtx =  event_check(p_uarte, NRF_UARTE_EVENT_ENDTX, int_mask);  in irq_handler()
2070         if (event_check_and_clear(p_uarte, NRF_UARTE_EVENT_ERROR, int_mask))  in irq_handler()
2078         bool rxto = event_check_and_clear(p_uarte, NRF_UARTE_EVENT_RXTO, int_mask);  in irq_handler()
2079         bool rxstarted = event_check_and_clear(p_uarte, NRF_UARTE_EVENT_RXSTARTED, int_mask);  in irq_handler()
2080         bool endrx = event_check_and_clear(p_uarte, NRF_UARTE_EVENT_ENDRX, int_mask);  in irq_handler()
2081         bool rxdrdy = event_check_and_clear(p_uarte, NRF_UARTE_EVENT_RXDRDY, int_mask);  in irq_handler()
2095                 rxstarted = event_check_and_clear(p_uarte, NRF_UARTE_EVENT_RXSTARTED, int_mask);  in irq_handler()