Lines Matching refs:a
3 This directory contains a set of files describing valid pin configurations for
4 multiple Microchiop PIC32C/PIC32M MCUs (PIC32C/PIC32M) devices. This configuration files maps a
5 pin to a peripheral signal which multiplex, at end, I/O lines pins. For example,
32 - `variants`: Each variant has a different set of valid pin combinations because
33 of a different number of pins.
75 - [a, eic, extint8]
85 - [a, eic, extint9]
95 - [a, eic, extint4]
106 - [a, eic, extint5]
116 - [a, eic, extint6]
127 The `series` key define a list of SoC models `[cx1025sg41, cx1025sg60, cx1025sg61]`. This list
130 Some pic32 SoC have optimized pins in some revisions. To differentiate those a
134 The `variants` key define a list of available packages by SoC series. This means
137 challenges like define a part number which uses same pin code with different
139 add a `WARNING` message to uses in the auto generated file asking to user look
143 The `pins` section is a variable length list of pin definitions. Each entry is
144 a pin itself composed by one mandatory properties which is `pincodes` and many
148 signals. It is a variable length list where each entry is a list. Each peripheral
157 can find a column named `extra` and another as `systems`. The syntax is the
171 - [a, eic, extint0]
181 - at position `a` the `eic` controller have access to signal `extint0`
221 - [a, pwm, pwmh0]
236 - [a, twi1, twck1]
276 PIC32_PINMUX(a, 0, a, periph)
285 In this case `PA0A_EIC_EXTINT0` is at PORT `a` pin `0` using alternate
286 function `a`, which selects pin for external interrupt controller `EIC`