494                 DDRCFG->DFI.PHY_DFI_INIT_START.PHY_DFI_INIT_START   = 0x0U;  in ddr_setup()
503             DDRCFG->DFI.PHY_DFI_INIT_START.PHY_DFI_INIT_START   = 0x0U;  in ddr_setup()
578                             DDRCFG->DFI.PHY_DFI_INIT_START.PHY_DFI_INIT_START   = 0x00000000U;  in ddr_setup()
1648                 DDRCFG->DFI.PHY_DFI_INIT_START.PHY_DFI_INIT_START   =\  in ddr_setup()
1651                 DDRCFG->DFI.PHY_DFI_INIT_START.PHY_DFI_INIT_START   =\  in ddr_setup()
1667             if((DDRCFG->DFI.STAT_DFI_INIT_COMPLETE.STAT_DFI_INIT_COMPLETE\  in ddr_setup()
1791 …          if ((DDRCFG->DFI.STAT_DFI_TRAINING_COMPLETE.STAT_DFI_TRAINING_COMPLETE & 0x01U) == 0x01U)  in ddr_setup()
2127                 DDRCFG->DFI.CFG_DFI_T_PHY_WRLAT.CFG_DFI_T_PHY_WRLAT =\  in ddr_setup()
4679     DDRCFG->DFI.CFG_DFI_T_RDDATA_EN.CFG_DFI_T_RDDATA_EN =\  in init_ddrc()
4681     DDRCFG->DFI.CFG_DFI_T_PHY_RDLAT.CFG_DFI_T_PHY_RDLAT =\  in init_ddrc()
4683     DDRCFG->DFI.CFG_DFI_T_PHY_WRLAT.CFG_DFI_T_PHY_WRLAT =\  in init_ddrc()
4685     DDRCFG->DFI.CFG_DFI_PHYUPD_EN.CFG_DFI_PHYUPD_EN =\  in init_ddrc()
4687     DDRCFG->DFI.INIT_DFI_LP_DATA_REQ.INIT_DFI_LP_DATA_REQ =\  in init_ddrc()
4689     DDRCFG->DFI.INIT_DFI_LP_CTRL_REQ.INIT_DFI_LP_CTRL_REQ =\  in init_ddrc()
4691     DDRCFG->DFI.INIT_DFI_LP_WAKEUP.INIT_DFI_LP_WAKEUP =\  in init_ddrc()
4693     DDRCFG->DFI.INIT_DFI_DRAM_CLK_DISABLE.INIT_DFI_DRAM_CLK_DISABLE =\  in init_ddrc()
4695     DDRCFG->DFI.CFG_DFI_DATA_BYTE_DISABLE.CFG_DFI_DATA_BYTE_DISABLE =\  in init_ddrc()
4697     DDRCFG->DFI.CFG_DFI_LVL_SEL.CFG_DFI_LVL_SEL =\  in init_ddrc()
4699     DDRCFG->DFI.CFG_DFI_LVL_PERIODIC.CFG_DFI_LVL_PERIODIC =\  in init_ddrc()
4701     DDRCFG->DFI.CFG_DFI_LVL_PATTERN.CFG_DFI_LVL_PATTERN =\  in init_ddrc()
4703     DDRCFG->DFI.PHY_DFI_INIT_START.PHY_DFI_INIT_START =\  in init_ddrc()
5176                 (uint32_t *)&DDRCFG->DFI,\  in debug_read_ddrcfg()
5177                 (sizeof(DDRCFG->DFI)/4U));  in debug_read_ddrcfg()