28 void illegal_insn_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc);
29 void misaligned_store_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc);
30 void misaligned_load_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc);
31 void pmp_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc);
46 void misaligned_store_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc)  in misaligned_store_trap()  argument
49     (void)mcause;  in misaligned_store_trap()
56 void misaligned_load_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc)  in misaligned_load_trap()  argument
59     (void)mcause;  in misaligned_load_trap()
66 void illegal_insn_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc)  in illegal_insn_trap()  argument
69     (void)mcause;  in illegal_insn_trap()
76 void pmp_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc)  in pmp_trap()  argument
79     (void)mcause;  in pmp_trap()
731     volatile uintptr_t mcause = read_csr(mcause);  in trap_from_machine_mode()  local
733 …if (((mcause & MCAUSE_INT) == MCAUSE_INT) && ((mcause & MCAUSE_CAUSE)  > 15U)&& ((mcause & MCAUSE_…  in trap_from_machine_mode()
735         handle_local_interrupt((uint8_t)(mcause & MCAUSE_CAUSE));  in trap_from_machine_mode()
737     else if (((mcause & MCAUSE_INT) == MCAUSE_INT) && ((mcause & MCAUSE_CAUSE)  == IRQ_M_EXT))  in trap_from_machine_mode()
741     else if (((mcause & MCAUSE_INT) == MCAUSE_INT) && ((mcause & MCAUSE_CAUSE)  == IRQ_M_SOFT))  in trap_from_machine_mode()
745     else if (((mcause & MCAUSE_INT) == MCAUSE_INT) && ((mcause & MCAUSE_CAUSE)  == IRQ_M_TIMER))  in trap_from_machine_mode()
758                 i = mcause; /* so mcause is not optimised out */  in trap_from_machine_mode()
761         switch(mcause)  in trap_from_machine_mode()