57     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_setup_transfer()  local
72     if (pdmareg->control_reg & MASK_PDMA_CONTROL_RUN)  in MSS_PDMA_setup_transfer()
80         pdmareg->control_reg |= ((uint32_t)MASK_PDMA_ENABLE_DONE_INT);  in MSS_PDMA_setup_transfer()
84         pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_DONE_INT);  in MSS_PDMA_setup_transfer()
89         pdmareg->control_reg |= ((uint32_t)MASK_PDMA_ENABLE_ERR_INT);  in MSS_PDMA_setup_transfer()
93         pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_ERR_INT);  in MSS_PDMA_setup_transfer()
97     pdmareg->control_reg |= (uint32_t)MASK_CLAIM_PDMA_CHANNEL;  in MSS_PDMA_setup_transfer()
100     pdmareg->next_destination = channel_config->dest_addr;  in MSS_PDMA_setup_transfer()
101     pdmareg->next_source      = channel_config->src_addr;  in MSS_PDMA_setup_transfer()
104     pdmareg->next_bytes       = channel_config->num_bytes;  in MSS_PDMA_setup_transfer()
109         pdmareg->next_config |= MASK_REPEAT_TRANSCTION;  in MSS_PDMA_setup_transfer()
113         pdmareg->next_config &= ~((uint32_t)MASK_REPEAT_TRANSCTION);  in MSS_PDMA_setup_transfer()
118         pdmareg->next_config |= ((uint32_t)MASK_FORCE_ORDERING);  in MSS_PDMA_setup_transfer()
122         pdmareg->next_config &= ~((uint32_t)MASK_FORCE_ORDERING);  in MSS_PDMA_setup_transfer()
126     pdmareg->next_config |=  in MSS_PDMA_setup_transfer()
128     pdmareg->next_config |=  in MSS_PDMA_setup_transfer()
183     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_start_transfer()  local
187     pdmareg->control_reg |= ((uint32_t)MASK_PDMA_CONTROL_RUN);  in MSS_PDMA_start_transfer()
207     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_get_active_transfer_type()  local
209     return pdmareg->exec_config;  in MSS_PDMA_get_active_transfer_type()
227     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_get_number_bytes_remaining()  local
229     return pdmareg->exec_bytes;  in MSS_PDMA_get_number_bytes_remaining()
247     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_get_destination_current_addr()  local
249     return pdmareg->exec_destination;  in MSS_PDMA_get_destination_current_addr()
267     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_get_source_current_addr()  local
269     return pdmareg->exec_source;  in MSS_PDMA_get_source_current_addr()
287     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_get_transfer_complete_status()  local
289     if (pdmareg->control_reg & MASK_PDMA_TRANSFER_DONE)  in MSS_PDMA_get_transfer_complete_status()
314     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_get_transfer_error_status()  local
316     if (pdmareg->control_reg & MASK_PDMA_TRANSFER_ERROR)  in MSS_PDMA_get_transfer_error_status()
343     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_clear_transfer_complete_status()  local
345     if (pdmareg->control_reg & MASK_PDMA_TRANSFER_DONE)  in MSS_PDMA_clear_transfer_complete_status()
348         pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_TRANSFER_DONE);  in MSS_PDMA_clear_transfer_complete_status()
371     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET(channel_id);  in MSS_PDMA_clear_transfer_error_status()  local
373     if (pdmareg->control_reg & MASK_PDMA_TRANSFER_ERROR)  in MSS_PDMA_clear_transfer_error_status()
376         pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_TRANSFER_ERROR);  in MSS_PDMA_clear_transfer_error_status()
393     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET  in dma_ch0_DONE_IRQHandler()  local
396     pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_DONE_INT);  in dma_ch0_DONE_IRQHandler()
408     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET  in dma_ch0_ERR_IRQHandler()  local
411     pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_ERR_INT);  in dma_ch0_ERR_IRQHandler()
423     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET  in dma_ch1_DONE_IRQHandler()  local
426     pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_DONE_INT);  in dma_ch1_DONE_IRQHandler()
438     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET  in dma_ch1_ERR_IRQHandler()  local
441     pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_ERR_INT);  in dma_ch1_ERR_IRQHandler()
454     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET  in dma_ch2_DONE_IRQHandler()  local
457     pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_DONE_INT);  in dma_ch2_DONE_IRQHandler()
469     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET  in dma_ch2_ERR_IRQHandler()  local
472     pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_ERR_INT);  in dma_ch2_ERR_IRQHandler()
484     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET  in dma_ch3_DONE_IRQHandler()  local
487     pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_DONE_INT);  in dma_ch3_DONE_IRQHandler()
499     volatile mss_pdma_t *pdmareg = (mss_pdma_t *)MSS_PDMA_REG_OFFSET  in dma_ch3_ERR_IRQHandler()  local
502     pdmareg->control_reg &= ~((uint32_t)MASK_PDMA_ENABLE_ERR_INT);  in dma_ch3_ERR_IRQHandler()