Lines Matching refs:u
22 #define WRITE_DIR 0u
26 #define NO_TRANSACTION 0u
189 this_i2c->master_tx_idx = 0u; in MSS_I2C_write()
262 this_i2c->master_rx_idx = 0u; in MSS_I2C_read()
313 ASSERT(offset_size > 0u); in MSS_I2C_write_read()
315 ASSERT(read_size > 0u); in MSS_I2C_write_read()
318 if ((read_size > 0u) && (offset_size > 0u)) in MSS_I2C_write_read()
344 this_i2c->master_tx_idx = 0u; in MSS_I2C_write_read()
348 this_i2c->master_rx_idx = 0u; in MSS_I2C_write_read()
480 this_i2c->slave_tx_idx = 0u; in MSS_I2C_set_slave_tx_buffer()
505 this_i2c->slave_rx_idx = 0u; in MSS_I2C_set_slave_rx_buffer()
549 this_i2c->transfer_completion_handler = 0u; in MSS_I2C_register_transfer_completion_handler()
621 this_i2c->is_slave_enabled = 0u; in MSS_I2C_disable_slave()
678 this_i2c->master_tx_idx = 0u; in mss_i2c_isr()
682 this_i2c->master_rx_idx = 0u; in mss_i2c_isr()
697 this_i2c->is_transaction_pending = 0u; in mss_i2c_isr()
759 if (hold_bus == 0u) in mss_i2c_isr()
768 clear_irq = 0u; in mss_i2c_isr()
852 if (hold_bus == 0u) in mss_i2c_isr()
862 clear_irq = 0u; in mss_i2c_isr()
906 this_i2c->slave_rx_idx = 0u; in mss_i2c_isr()
907 this_i2c->random_read_addr = 0u; in mss_i2c_isr()
972 if (this_i2c->slave_write_handler != (mss_i2c_slave_wr_handler_t)0u) in mss_i2c_isr()
991 this_i2c->is_slave_enabled = 0u; in mss_i2c_isr()
1009 this_i2c->slave_tx_idx = 0u; in mss_i2c_isr()
1045 this_i2c->slave_tx_idx = 0u; in mss_i2c_isr()
1069 this_i2c->random_read_addr = 0u; in mss_i2c_isr()
1101 this_i2c->slave_tx_idx = 0u; in mss_i2c_isr()
1113 this_i2c->slave_tx_idx = 0u; in mss_i2c_isr()
1149 this_i2c->slave_tx_idx = 0u; in mss_i2c_isr()