956     uint32_t shift = 0, nu = 0, descr = 0, descr_init = 0, didx = 0;  in mec_hal_qspi_ldma()  local
989     while (nbytes && (didx < MEC5_QSPI_NUM_DESCRS)) {  in mec_hal_qspi_ldma()
1002         descr |= (((didx + 1u) << MEC_QSPI_DESCR_NEXT_Pos) & MEC_QSPI_DESCR_NEXT_Msk);  in mec_hal_qspi_ldma()
1003         base->DESCR[didx] = descr;  in mec_hal_qspi_ldma()
1004         base->LDMA_RXEN |= MEC_BIT(didx);  in mec_hal_qspi_ldma()
1006             base->LDMA_TXEN |= MEC_BIT(didx);  in mec_hal_qspi_ldma()
1009         didx++;  in mec_hal_qspi_ldma()
1012     descr = base->DESCR[didx - 1u] | MEC_BIT(MEC_QSPI_DESCR_LAST_Pos);  in mec_hal_qspi_ldma()
1016     base->DESCR[didx - 1u] = descr;  in mec_hal_qspi_ldma()
1090     uint32_t didx = 0, descr = 0;  in mec_hal_qspi_cfg_gen_ts_clocks()  local
1100     didx = ctx->ndescrs;  in mec_hal_qspi_cfg_gen_ts_clocks()
1101     if (didx >= MEC5_QSPI_NUM_DESCRS) {  in mec_hal_qspi_cfg_gen_ts_clocks()
1114     ctx->descrs[didx] = descr;  in mec_hal_qspi_cfg_gen_ts_clocks()
1197     uint8_t didx;  in mec_hal_qspi_descrs_cfg1()  local
1218     didx = ctx->ndescrs;  in mec_hal_qspi_descrs_cfg1()
1221         if (didx >= MEC5_QSPI_NUM_DESCRS) {  in mec_hal_qspi_descrs_cfg1()
1234             ctx->descrs[didx] = (((nu << MEC_QSPI_DESCR_QNUNITS_Pos) & MEC_QSPI_DESCR_QNUNITS_Msk)  in mec_hal_qspi_descrs_cfg1()
1239             ctx->descrs[didx] = (((nb << MEC_QSPI_DESCR_QNUNITS_Pos) & MEC_QSPI_DESCR_QNUNITS_Msk)  in mec_hal_qspi_descrs_cfg1()
1244         didx++;  in mec_hal_qspi_descrs_cfg1()
1247     ctx->ndescrs = didx;  in mec_hal_qspi_descrs_cfg1()
1255     size_t didx, max_ndescr;  in mec_hal_qspi_load_descrs()  local
1273     for (didx = 0; didx < max_ndescr; didx++) {  in mec_hal_qspi_load_descrs()
1274         descr = ctx->descrs[didx];  in mec_hal_qspi_load_descrs()
1276         descr |= ((((uint32_t)didx + 1u) << MEC_QSPI_DESCR_NEXT_Pos) & MEC_QSPI_DESCR_NEXT_Msk);  in mec_hal_qspi_load_descrs()
1277         regs->DESCR[didx] = descr;  in mec_hal_qspi_load_descrs()
1283                 regs->LDMA_TXEN |= MEC_BIT(didx);  in mec_hal_qspi_load_descrs()
1286                 regs->LDMA_TXEN &= (uint32_t)~MEC_BIT(didx);  in mec_hal_qspi_load_descrs()
1293                 regs->LDMA_RXEN |= MEC_BIT(didx);  in mec_hal_qspi_load_descrs()
1296                 regs->LDMA_RXEN &= (uint32_t)~MEC_BIT(didx);  in mec_hal_qspi_load_descrs()
1304     didx = max_ndescr - 1u;  in mec_hal_qspi_load_descrs()
1306         regs->DESCR[didx] |= MEC_BIT(MEC_QSPI_DESCR_LAST_Pos);  in mec_hal_qspi_load_descrs()
1310         regs->DESCR[didx] |= MEC_BIT(MEC_QSPI_DESCR_CLOSE_Pos);  in mec_hal_qspi_load_descrs()
1323     uint32_t didx, didx_lim, n;  in mec_hal_qspi_load_descrs_at()  local
1333     didx = start_descr_idx;  in mec_hal_qspi_load_descrs_at()
1334     didx_lim = didx + ndescr;  in mec_hal_qspi_load_descrs_at()
1340     while (didx < didx_lim) {  in mec_hal_qspi_load_descrs_at()
1341         regs->DESCR[didx++] = descrs[n++];  in mec_hal_qspi_load_descrs_at()