73 static void pwm_disable(struct mec_pwm_regs *regs)  in pwm_disable()  argument
75     regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos);  in pwm_disable()
78 static void pwm_enable(struct mec_pwm_regs *regs)  in pwm_enable()  argument
80     regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos);  in pwm_enable()
84 static void pwm_off(struct mec_pwm_regs *regs)  in pwm_off()  argument
86         regs->CNT_ON = 0u;  in pwm_off()
87         regs->CNT_OFF = 1u;  in pwm_off()
91 static void pwm_on(struct mec_pwm_regs *regs)  in pwm_on()  argument
93         regs->CNT_OFF = 0u;  in pwm_on()
94         regs->CNT_ON = 1u;  in pwm_on()
149 static int prog_pwm_fd(struct mec_pwm_regs *regs, uint32_t period_cycles, uint32_t pulse_cycles)  in prog_pwm_fd()  argument
185     cfg = regs->CONFIG & (uint32_t)~(MEC_PWM_CONFIG_CLKDIV_Msk | MEC_PWM_CONFIG_CLK_SRC_SLOW_Msk);  in prog_pwm_fd()
190     regs->CNT_ON = cnt_on;  in prog_pwm_fd()
191     regs->CNT_OFF = cnt_off;  in prog_pwm_fd()
192     regs->CONFIG = cfg;  in prog_pwm_fd()
197 static int prog_pwm(struct mec_pwm_regs *regs, uint32_t period_cycles, uint32_t pulse_cycles)  in prog_pwm()  argument
200         pwm_disable(regs);  in prog_pwm()
206         pwm_off(regs);  in prog_pwm()
212         pwm_on(regs);  in prog_pwm()
216     return prog_pwm_fd(regs, period_cycles, pulse_cycles);  in prog_pwm()
240 int mec_hal_pwm_off(struct mec_pwm_regs *regs)  in mec_hal_pwm_off()  argument
242     if (!regs) {  in mec_hal_pwm_off()
246     pwm_off(regs);  in mec_hal_pwm_off()
252 int mec_hal_pwm_on(struct mec_pwm_regs *regs)  in mec_hal_pwm_on()  argument
254     if (!regs) {  in mec_hal_pwm_on()
258     pwm_on(regs);  in mec_hal_pwm_on()
280 int mec_hal_pwm_init(struct mec_pwm_regs *regs, uint32_t period_cycles,  in mec_hal_pwm_init()  argument
284     const struct mec5_pwm_info *info = get_pwm_info((uintptr_t)regs);  in mec_hal_pwm_init()
290     regs->CONFIG = 0;  in mec_hal_pwm_init()
298         regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos);  in mec_hal_pwm_init()
301     ret = prog_pwm(regs, period_cycles, pulse_cycles);  in mec_hal_pwm_init()
307         pwm_enable(regs);  in mec_hal_pwm_init()
313 int mec_hal_pwm_reset(struct mec_pwm_regs *regs)  in mec_hal_pwm_reset()  argument
315     const struct mec5_pwm_info *info = get_pwm_info((uintptr_t)regs);  in mec_hal_pwm_reset()
326 int mec_hal_pwm_set_polarity(struct mec_pwm_regs *regs, uint8_t polarity_inverted)  in mec_hal_pwm_set_polarity()  argument
328     if (!regs) {  in mec_hal_pwm_set_polarity()
333         regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos);  in mec_hal_pwm_set_polarity()
335         regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos);  in mec_hal_pwm_set_polarity()
341 int mec_hal_pwm_enable(struct mec_pwm_regs *regs, uint8_t enable)  in mec_hal_pwm_enable()  argument
344         regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos);  in mec_hal_pwm_enable()
346         regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos);  in mec_hal_pwm_enable()
352 int mec_hal_pwm_is_enabled(struct mec_pwm_regs *regs)  in mec_hal_pwm_is_enabled()  argument
354     if (regs->CONFIG & MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos)) {  in mec_hal_pwm_is_enabled()
361 uint32_t mec_hal_pwm_get_freq_in(struct mec_pwm_regs *regs)  in mec_hal_pwm_get_freq_in()  argument
365     if (regs->CONFIG & MEC_BIT(MEC_PWM_CONFIG_CLK_SRC_SLOW_Pos)) {  in mec_hal_pwm_get_freq_in()
372 uint32_t mec_hal_pwm_get_count(struct mec_pwm_regs *regs, uint8_t on_count)  in mec_hal_pwm_get_count()  argument
375         return (uint32_t)regs->CNT_ON;  in mec_hal_pwm_get_count()
377         return (uint32_t)regs->CNT_OFF;  in mec_hal_pwm_get_count()
381 uint32_t mec_hal_pwm_get_freq_out(struct mec_pwm_regs *regs)  in mec_hal_pwm_get_freq_out()  argument
386     if (regs->CONFIG & MEC_BIT(MEC_PWM_CONFIG_CLK_SRC_SLOW_Pos)) {  in mec_hal_pwm_get_freq_out()
394     ps = ((regs->CONFIG & MEC_PWM_CONFIG_CLKDIV_Msk) >> MEC_PWM_CONFIG_CLKDIV_Pos) + 1u;  in mec_hal_pwm_get_freq_out()
395     cnt_on = regs->CNT_ON + 1u;  in mec_hal_pwm_get_freq_out()
396     cnt_off = regs->CNT_OFF + 1u;  in mec_hal_pwm_get_freq_out()
404 int mec_hal_pwm_set_freq_out(struct mec_pwm_regs *regs, uint32_t period_cycles,  in mec_hal_pwm_set_freq_out()  argument
407     return prog_pwm(regs, period_cycles, pulse_cycles);  in mec_hal_pwm_set_freq_out()