34     uint8_t mask;  member
396 int mec_hal_gpio_set_config_mask(uint32_t pin, uint32_t cfg, uint32_t mask)  in mec_hal_gpio_set_config_mask()  argument
404     uint16_t pin_cfg = MEC_MMCR16_RD(&MEC_GPIO->CTRL[pin]) & (uint16_t)~mask;  in mec_hal_gpio_set_config_mask()
406     pin_cfg |= (uint16_t)(cfg & mask);  in mec_hal_gpio_set_config_mask()
418     uint32_t msk0 = mec_cfg_tbl[prop_id].mask;  in mec_hal_gpio_get_ctrl_property()
432     uint32_t msk0 = mec_cfg_tbl[prop_id].mask;  in mec_hal_gpio_set_ctrl_property()
453     uint32_t msk0 = mec_cfg_tbl[prop_id].mask;  in mec_hal_gpio_get_property()
477     uint32_t msk0 = mec_cfg_tbl[prop_id].mask;  in mec_hal_gpio_set_property()
521         uint32_t mask = mec_cfg_tbl[prop].mask;  in mec_hal_gpio_set_props()  local
522         uint32_t val = gprops[n].val & mask;  in mec_hal_gpio_set_props()
525             ctrl2 = (ctrl2 & ~(mask << bitpos)) | (val << bitpos);  in mec_hal_gpio_set_props()
527             ctrl = (ctrl & ~(mask << bitpos)) | (val << bitpos);  in mec_hal_gpio_set_props()
721 int mec_hal_gpio_set_ctrl_mask(uint32_t pin, uint32_t val, uint32_t mask)  in mec_hal_gpio_set_ctrl_mask()  argument
728     MEC_GPIO->CTRL[pin] = (MEC_GPIO->CTRL[pin] & ~mask) | (val & mask);  in mec_hal_gpio_set_ctrl_mask()
763 int mec_hal_gpio_ctrl2_mask(const uint32_t pin, uint32_t val, uint32_t mask)  in mec_hal_gpio_ctrl2_mask()  argument
770     MEC_GPIO->CTL2[pin] = (MEC_GPIO->CTL2[pin] & ~mask) | (val & mask);  in mec_hal_gpio_ctrl2_mask()
1029 int mec_hal_gpio_parout_port_set_bits(const uint8_t port, const uint32_t mask)  in mec_hal_gpio_parout_port_set_bits()  argument
1035     MEC_GPIO->PAROUT[port] |= mask;  in mec_hal_gpio_parout_port_set_bits()
1040 int mec_hal_gpio_parout_port_mask(const uint8_t port, const uint32_t newval, const uint32_t mask)  in mec_hal_gpio_parout_port_mask()  argument
1046     MEC_GPIO->PAROUT[port] = (MEC_GPIO->PAROUT[port] & ~mask) | (newval & mask);  in mec_hal_gpio_parout_port_mask()
1125 int mec_hal_gpio_port_ia_status_clr_mask(uint8_t port, uint32_t mask)  in mec_hal_gpio_port_ia_status_clr_mask()  argument
1133     MEC_ECIA0->GIRQ[girq_idx].SOURCE = mask;  in mec_hal_gpio_port_ia_status_clr_mask()