Lines Matching refs:MEC_GPIO
315 if (MEC_GPIO->CTRL[pin] & (MEC_GPIO_CTRL_DIR_OUTPUT << MEC_GPIO_CTRL_DIR_Pos)) { in mec_hal_gpio_is_output()
330 MEC_GPIO->CTRL[pin] |= MEC_BIT(MEC_GPIO_CTRL_INPD_Pos); in mec_hal_gpio_disable_input_pad()
343 MEC_GPIO->CTRL[pin] &= ~MEC_BIT(MEC_GPIO_CTRL_INPD_Pos); in mec_hal_gpio_enable_input_pad()
360 if (MEC_GPIO->LOCK[MEC_GPIO_PORT_MAX - 1u - port] & MEC_BIT(bitpos)) { in mec_hal_gpio_is_locked()
378 *config = MEC_GPIO->CTRL[pin] & 0xffffu; in mec_hal_gpio_get_config()
391 MEC_MMCR16_WR(&MEC_GPIO->CTRL[pin], cfg & 0xffffu); in mec_hal_gpio_set_config()
404 uint16_t pin_cfg = MEC_MMCR16_RD(&MEC_GPIO->CTRL[pin]) & (uint16_t)~mask; in mec_hal_gpio_set_config_mask()
407 MEC_MMCR16_WR(&MEC_GPIO->CTRL[pin], pin_cfg); in mec_hal_gpio_set_config_mask()
452 uintptr_t regaddr = (uintptr_t)&MEC_GPIO->CTRL[pin]; in mec_hal_gpio_get_property()
479 uintptr_t regaddr = (uintptr_t)&MEC_GPIO->CTRL[pin]; in mec_hal_gpio_set_property()
515 uint32_t ctrl = MEC_GPIO->CTRL[pin]; in mec_hal_gpio_set_props()
516 uint32_t ctrl2 = MEC_GPIO->CTL2[pin]; in mec_hal_gpio_set_props()
531 MEC_GPIO->CTL2[pin] = ctrl2; in mec_hal_gpio_set_props()
532 MEC_GPIO->CTRL[pin] = ctrl; in mec_hal_gpio_set_props()
632 MEC_GPIO->CTL2[pin] = ctrl; in mec_hal_gpio_pin_config()
657 MEC_GPIO->CTRL[pin] = ctrl; in mec_hal_gpio_pin_config()
660 MEC_GPIO->CTRL[pin] |= MEC_BIT(MEC_GPIO_CTRL_PAREN_Pos); in mec_hal_gpio_pin_config()
668 return MEC_GPIO->CTRL[pin]; in mec_hal_gpio_get_ctrl_nc()
673 MEC_GPIO->CTRL[pin] = ctrl_val; in mec_hal_gpio_set_ctrl_nc()
680 return MEC_GPIO->CTRL[pin]; in mec_hal_gpio_port_get_ctrl_nc()
688 MEC_GPIO->CTRL[pin] = ctrl_val; in mec_hal_gpio_port_set_ctrl_nc()
703 *ctrl = MEC_GPIO->CTRL[pin]; in mec_hal_gpio_get_ctrl()
716 MEC_GPIO->CTRL[pin] = new_ctrl; in mec_hal_gpio_set_ctrl()
728 MEC_GPIO->CTRL[pin] = (MEC_GPIO->CTRL[pin] & ~mask) | (val & mask); in mec_hal_gpio_set_ctrl_mask()
745 *ctrl2 = MEC_GPIO->CTL2[pin]; in mec_hal_gpio_get_ctrl2()
758 MEC_GPIO->CTL2[pin] = new_ctrl2; in mec_hal_gpio_set_ctrl2()
770 MEC_GPIO->CTL2[pin] = (MEC_GPIO->CTL2[pin] & ~mask) | (val & mask); in mec_hal_gpio_ctrl2_mask()
783 return (int)((MEC_GPIO->CTL2[pin] & MEC_GPIO_CTL2_SLR_Msk) >> MEC_GPIO_CTL2_SLR_Pos); in mec_hal_gpio_get_slew_rate()
807 MEC_GPIO->CTL2[pin] = ((MEC_GPIO->CTL2[pin] & ~(MEC_GPIO_CTL2_SLR_Msk)) in mec_hal_gpio_set_slew_rate()
821 return (int)((MEC_GPIO->CTL2[pin] & MEC_GPIO_CTL2_DRVSTR_Msk) >> MEC_GPIO_CTL2_DRVSTR_Pos); in mec_hal_gpio_get_drive_strength()
851 MEC_GPIO->CTL2[pin] = ((MEC_GPIO->CTL2[pin] & ~(MEC_GPIO_CTL2_DRVSTR_Msk)) in mec_hal_gpio_set_drive_strength()
866 MEC_GPIO->CTRL[pin] |= MEC_BIT(MEC_GPIO_CTRL_ALTVAL_Pos); in mec_hal_gpio_alt_out()
868 MEC_GPIO->CTRL[pin] &= (uint32_t)~MEC_BIT(MEC_GPIO_CTRL_ALTVAL_Pos); in mec_hal_gpio_alt_out()
882 MEC_GPIO->CTRL[pin] ^= MEC_BIT(MEC_GPIO_CTRL_ALTVAL_Pos); in mec_hal_gpio_alt_out_toggle()
898 *padin = (uint8_t)((MEC_GPIO->CTRL[pin] >> MEC_GPIO_CTRL_PADIN_Pos) & MEC_BIT(0)); in mec_hal_gpio_pad_in()
917 *pinval = (uint8_t)((MEC_GPIO->PARIN[port] >> bitpos) & MEC_BIT(0)); in mec_hal_gpio_par_in()
941 MEC_GPIO->PAROUT[port] |= MEC_BIT(bitpos); in mec_hal_gpio_par_out()
943 MEC_GPIO->PAROUT[port] &= (uint32_t)~MEC_BIT(bitpos); in mec_hal_gpio_par_out()
955 *val = MEC_GPIO->PARIN[port]; in mec_hal_gpio_parin_port()
973 *val = MEC_GPIO->PARIN[port]; in mec_hal_gpio_parin_by_pin()
984 *val = MEC_GPIO->PAROUT[port]; in mec_hal_gpio_parout_port_get()
1002 *val = MEC_GPIO->PAROUT[port]; in mec_hal_gpio_parout_port_get_by_pin()
1013 MEC_GPIO->PAROUT[port] = newval; in mec_hal_gpio_parout_port()
1024 MEC_GPIO->PAROUT[port] ^= xormask; in mec_hal_gpio_parout_port_xor()
1035 MEC_GPIO->PAROUT[port] |= mask; in mec_hal_gpio_parout_port_set_bits()
1046 MEC_GPIO->PAROUT[port] = (MEC_GPIO->PAROUT[port] & ~mask) | (newval & mask); in mec_hal_gpio_parout_port_mask()