Lines Matching refs:r

417     uint32_t r = 0;  in mec_hal_espi_vw_ct_irq_sel_set_all()  local
434 r |= (temp << (n * 8u)); in mec_hal_espi_vw_ct_irq_sel_set_all()
437 ctvw->SRC_ISELS = r; in mec_hal_espi_vw_ct_irq_sel_set_all()
453 uint32_t r[3]; in mec_hal_espi_vwg_ct_config() local
460 r[0] = ctvw->HIRSS; in mec_hal_espi_vwg_ct_config()
461 r[1] = ctvw->SRC_ISELS; in mec_hal_espi_vwg_ct_config()
462 r[2] = ctvw->STATES; in mec_hal_espi_vwg_ct_config()
464 r[0] &= (uint32_t)~MEC_ESPI_VW_CTVW_HIRSS_HOST_IDX_Msk; in mec_hal_espi_vwg_ct_config()
465 r[0] |= (((uint32_t)cfg->host_idx << MEC_ESPI_VW_CTVW_HIRSS_HOST_IDX_Pos) in mec_hal_espi_vwg_ct_config()
470 r[0] &= (uint32_t)~MEC_ESPI_VW_CTVW_HIRSS_RST_SRC_Msk; in mec_hal_espi_vwg_ct_config()
471 r[0] |= (((uint32_t)cfg->reset_src << MEC_ESPI_VW_CTVW_HIRSS_RST_SRC_Pos) in mec_hal_espi_vwg_ct_config()
478 r[0] |= MEC_BIT(i + MEC_ESPI_VW_CTVW_HIRSS_RST_STATE_Pos); in mec_hal_espi_vwg_ct_config()
480 r[0] &= ~MEC_BIT(i + MEC_ESPI_VW_CTVW_HIRSS_RST_STATE_Pos); in mec_hal_espi_vwg_ct_config()
489 r[1] = ((r[1] & ~msk) | ((uint32_t)vw_ct_ien_xlat_tbl[j] << (i * 8))); in mec_hal_espi_vwg_ct_config()
492 r[2] |= MEC_BIT(i * 8); in mec_hal_espi_vwg_ct_config()
494 r[2] &= ~MEC_BIT(i * 8); in mec_hal_espi_vwg_ct_config()
499 ctvw->STATES = r[2]; in mec_hal_espi_vwg_ct_config()
500 ctvw->SRC_ISELS = r[1]; in mec_hal_espi_vwg_ct_config()
501 ctvw->HIRSS = r[0]; in mec_hal_espi_vwg_ct_config()
742 uint32_t r[2]; in mec_hal_espi_vwg_tc_config() local
745 r[0] = tcvw->HIRCS; in mec_hal_espi_vwg_tc_config()
746 r[1] = tcvw->STATES; in mec_hal_espi_vwg_tc_config()
748 r[0] &= (uint32_t)~MEC_ESPI_VW_TCVW_HIRCS_HOST_IDX_Msk; in mec_hal_espi_vwg_tc_config()
749 r[0] |= (((uint32_t)cfg->host_idx << MEC_ESPI_VW_TCVW_HIRCS_HOST_IDX_Pos) in mec_hal_espi_vwg_tc_config()
754 r[0] &= (uint32_t)~MEC_ESPI_VW_TCVW_HIRCS_RST_SRC_Msk; in mec_hal_espi_vwg_tc_config()
755 r[0] |= (((uint32_t)cfg->reset_src << MEC_ESPI_VW_TCVW_HIRCS_RST_SRC_Pos) in mec_hal_espi_vwg_tc_config()
762 r[0] |= MEC_BIT(i + MEC_ESPI_VW_TCVW_HIRCS_RST_STATE_Pos); in mec_hal_espi_vwg_tc_config()
764 r[0] &= ~MEC_BIT(i + MEC_ESPI_VW_TCVW_HIRCS_RST_STATE_Pos); in mec_hal_espi_vwg_tc_config()
769 r[1] |= MEC_BIT(i * 8); in mec_hal_espi_vwg_tc_config()
771 r[1] &= ~MEC_BIT(i * 8); in mec_hal_espi_vwg_tc_config()
776 tcvw->HIRCS = r[0]; in mec_hal_espi_vwg_tc_config()
777 tcvw->STATES = r[1]; in mec_hal_espi_vwg_tc_config()