391     volatile struct mec_espi_vw_ctvw_regs *ctvw;  in mec_hal_espi_vw_ct_irq_sel_set()  local
399     ctvw = &vwbase->CTVW[vw_idx];  in mec_hal_espi_vw_ct_irq_sel_set()
405     ctvw->SRC_ISELS = (ctvw->SRC_ISELS & ~msk) | isel;  in mec_hal_espi_vw_ct_irq_sel_set()
416     volatile struct mec_espi_vw_ctvw_regs *ctvw;  in mec_hal_espi_vw_ct_irq_sel_set_all()  local
424     ctvw = &vwbase->CTVW[vw_idx];  in mec_hal_espi_vw_ct_irq_sel_set_all()
437     ctvw->SRC_ISELS = r;  in mec_hal_espi_vw_ct_irq_sel_set_all()
452     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vwg_ct_config()  local
460     r[0] = ctvw->HIRSS;  in mec_hal_espi_vwg_ct_config()
461     r[1] = ctvw->SRC_ISELS;  in mec_hal_espi_vwg_ct_config()
462     r[2] = ctvw->STATES;  in mec_hal_espi_vwg_ct_config()
499     ctvw->STATES = r[2];  in mec_hal_espi_vwg_ct_config()
500     ctvw->SRC_ISELS = r[1];  in mec_hal_espi_vwg_ct_config()
501     ctvw->HIRSS = r[0];  in mec_hal_espi_vwg_ct_config()
511     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_host_index_set()  local
512     uint32_t temp = ctvw->HIRSS & (uint32_t)~MEC_ESPI_VW_CTVW_HIRSS_HOST_IDX_Msk;  in mec_hal_espi_vw_ct_host_index_set()
515     ctvw->HIRSS = temp;  in mec_hal_espi_vw_ct_host_index_set()
527     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_reset_source_get()  local
528     uint32_t temp = ctvw->HIRSS;  in mec_hal_espi_vw_ct_reset_source_get()
543     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_reset_source_set()  local
544     uint32_t temp = ctvw->HIRSS;  in mec_hal_espi_vw_ct_reset_source_set()
549     ctvw->HIRSS = temp;  in mec_hal_espi_vw_ct_reset_source_set()
561     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_reset_state_set()  local
562     uint32_t temp = ctvw->HIRSS;  in mec_hal_espi_vw_ct_reset_state_set()
568     ctvw->HIRSS = temp;  in mec_hal_espi_vw_ct_reset_state_set()
580     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_irqsel_set()  local
583     uint32_t temp = ctvw->SRC_ISELS & ~msk;  in mec_hal_espi_vw_ct_irqsel_set()
586     ctvw->SRC_ISELS = temp;  in mec_hal_espi_vw_ct_irqsel_set()
605     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_config()  local
606     uint32_t regval = ctvw->HIRSS;  in mec_hal_espi_vw_ct_config()
624     ctvw->HIRSS = regval;  in mec_hal_espi_vw_ct_config()
632         regval = ctvw->SRC_ISELS & ~msk;  in mec_hal_espi_vw_ct_config()
634         ctvw->SRC_ISELS = regval;  in mec_hal_espi_vw_ct_config()
646     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_wire_set()  local
649         ctvw->STATES |= MEC_BIT(widx * 8u);  in mec_hal_espi_vw_ct_wire_set()
651         ctvw->STATES &= ~MEC_BIT(widx * 8u);  in mec_hal_espi_vw_ct_wire_set()
664     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_wire_get()  local
666     *val = (uint8_t)((ctvw->STATES >> (widx * 8u)) & 0x1u);  in mec_hal_espi_vw_ct_wire_get()
683     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_group_set()  local
696     ctvw->STATES = (ctvw->STATES & ~chgmsk) | rval;  in mec_hal_espi_vw_ct_group_set()
722     volatile struct mec_espi_vw_ctvw_regs *ctvw = &vwbase->CTVW[ctidx];  in mec_hal_espi_vw_ct_group_get()  local
724     *val = vw_group_get(ctvw->STATES);  in mec_hal_espi_vw_ct_group_get()