74     if (flags & MEC_BIT(MEC_ESPI_TAF_INTR_ECP_DONE_POS)) {  in iflags_to_bitmap()
75         bitmap |= MEC_BIT(MEC_ESPI_TAF_ECP_GIRQ_POS);  in iflags_to_bitmap()
77     if (flags & MEC_BIT(MEC_ESPI_TAF_INTR_HWMON_ERR_POS)) {  in iflags_to_bitmap()
78         bitmap |= MEC_BIT(MEC_ESPI_TAF_HWMON_GIRQ_POS);  in iflags_to_bitmap()
85    if (regs->PR_DIRTY & MEC_BIT(pridx)) {  in pr_is_dirty()
93     uint32_t girq_bm = MEC_BIT(MEC_ESPI_TAF_ECP_GIRQ_POS) | MEC_BIT(MEC_ESPI_TAF_HWMON_GIRQ_POS);  in taf_disable_clear_intr()
134     if (src & MEC_BIT(MEC_ESPI_TAF_ECP_GIRQ_POS)) {  in mec_hal_espi_taf_girq_status()
135         bitmap |= MEC_BIT(MEC_ESPI_TAF_INTR_ECP_DONE_POS);  in mec_hal_espi_taf_girq_status()
137     if (src & MEC_BIT(MEC_ESPI_TAF_HWMON_GIRQ_POS)) {  in mec_hal_espi_taf_girq_status()
138         bitmap |= MEC_BIT(MEC_ESPI_TAF_INTR_HWMON_ERR_POS);  in mec_hal_espi_taf_girq_status()
149     if (src & MEC_BIT(MEC_ESPI_TAF_ECP_GIRQ_POS)) {  in mec_hal_espi_taf_girq_result()
150         bitmap |= MEC_BIT(MEC_ESPI_TAF_INTR_ECP_DONE_POS);  in mec_hal_espi_taf_girq_result()
152     if (src & MEC_BIT(MEC_ESPI_TAF_HWMON_GIRQ_POS)) {  in mec_hal_espi_taf_girq_result()
153         bitmap |= MEC_BIT(MEC_ESPI_TAF_INTR_HWMON_ERR_POS);  in mec_hal_espi_taf_girq_result()
166     if (regs->FC_MISC & MEC_BIT(MEC_ESPI_TAF_FC_MISC_TAF_EN_Pos)) {  in mec_hal_espi_taf_is_activated()
181         regs->FC_MISC |= MEC_BIT(MEC_ESPI_TAF_FC_MISC_TAF_EN_Pos);  in mec_hal_espi_taf_activate()
183         regs->FC_MISC &= (uint32_t)~MEC_BIT(MEC_ESPI_TAF_FC_MISC_TAF_EN_Pos);  in mec_hal_espi_taf_activate()
197     if (initflags & MEC_BIT(MEC_ESPI_TAF_INIT_RESET_POS)) {  in mec_hal_espi_taf_init()
203     if (!(ioregs->CAP0 & MEC_BIT(MEC_ESPI_IO_CAP0_FC_SUPP_Pos))) {  in mec_hal_espi_taf_init()
208     if (initflags & MEC_BIT(MEC_ESPI_TAF_CAF_SHARE_POS)) {  in mec_hal_espi_taf_init()
242     if (thwcfg->flags & MEC_BIT(MEC_ESPI_TAF_HW_CFG_FLAG_FREQ_POS)) {  in taf_qspi_freq_timing()
250     if (thwcfg->flags & MEC_BIT(MEC_ESPI_TAF_HW_CFG_FLAG_CPHA_POS)) {  in taf_qspi_freq_timing()
254     if (thwcfg->flags & MEC_BIT(MEC_ESPI_TAF_HW_CFG_FLAG_CSTM_POS)) {  in taf_qspi_freq_timing()
258     if (thwcfg->flags & MEC_BIT(MEC_ESPI_TAF_HW_CFG_FLAG_TAPS_POS)) {  in taf_qspi_freq_timing()
298     flags = MEC_BIT(MEC_QSPI_OPT_ACTV_EN_POS) | MEC_BIT(MEC_QSPI_OPT_TAF_DMA_EN_POS)  in mec_hal_espi_taf_qspi_init()
299             | MEC_BIT(MEC_QSPI_OPT_RX_LDMA_EN_POS) | MEC_BIT(MEC_QSPI_OPT_TX_LDMA_EN_POS);  in mec_hal_espi_taf_qspi_init()
320     regs->PR_DIRTY = MEC_BIT(pr_idx);  in mec_hal_espi_taf_pr_dirty_clr()
382     if (pr->flags & MEC_BIT(MCHP_TAF_PR_FLAG_ENABLE)) {  in mec_hal_espi_taf_pr_set()
389         regs->PR_DIRTY = MEC_BIT(pr->pr_num);  in mec_hal_espi_taf_pr_set()
391         if (pr->flags & MEC_BIT(MCHP_TAF_PR_FLAG_LOCK)) {  in mec_hal_espi_taf_pr_set()
392             regs->PR_LOCK |= MEC_BIT(pr->pr_num);  in mec_hal_espi_taf_pr_set()
399         regs->PR_DIRTY = MEC_BIT(pr->pr_num);  in mec_hal_espi_taf_pr_set()