19 static void set_supported_channels(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_supported_channels()  argument
25     if (capabilities & MEC_BIT(MEC_ESPI_CFG_PERIPH_CHAN_SUP_POS)) {  in set_supported_channels()
29     if (capabilities & MEC_BIT(MEC_ESPI_CFG_VW_CHAN_SUP_POS)) {  in set_supported_channels()
33     if (capabilities & MEC_BIT(MEC_ESPI_CFG_OOB_CHAN_SUP_POS)) {  in set_supported_channels()
37     if (capabilities & MEC_BIT(MEC_ESPI_CFG_FLASH_CHAN_SUP_POS)) {  in set_supported_channels()
44 static void set_supported_max_freq(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_supported_max_freq()  argument
47     uint32_t temp = capabilities & MEC_ESPI_CFG_MAX_SUPP_FREQ_MSK;  in set_supported_max_freq()
66 static void set_supported_io_modes(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_supported_io_modes()  argument
70     temp |= ((((capabilities >> MEC_ESPI_CFG_IO_MODE_SUPP_POS)  in set_supported_io_modes()
88 static void set_supported_alert_io_pin_mode(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_supported_alert_io_pin_mode()  argument
92     if (capabilities & MEC_BIT(MEC_ESPI_CFG_ALERT_OD_SUPP_POS)) {  in set_supported_alert_io_pin_mode()
99 static void set_pc_capabilities(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_pc_capabilities()  argument
103     temp |= ((((capabilities >> MEC_ESPI_CFG_PC_MAX_PLD_SZ_POS)  in set_pc_capabilities()
118 static void set_vw_capabilities(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_vw_capabilities()  argument
122     temp |= ((((capabilities >> MEC_ESPI_CFG_VW_CNT_MAX_POS)  in set_vw_capabilities()
137 static void set_oob_capabilities(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_oob_capabilities()  argument
141     temp |= ((((capabilities >> MEC_ESPI_CFG_OOB_MAX_PLD_SZ_POS)  in set_oob_capabilities()
156 static void set_fc_max_pld(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_fc_max_pld()  argument
158     uint32_t temp = ((capabilities >> MEC_ESPI_CFG_FLASH_MAX_PLD_SZ_POS)  in set_fc_max_pld()
209 static void set_fc_shared_mode(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_fc_shared_mode()  argument
212     uint8_t regval = fc_sharing_hw(capabilities);  in set_fc_shared_mode()
224 static void set_fc_capabilities(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_fc_capabilities()  argument
226     uint32_t temp = ((capabilities >> MEC_ESPI_CFG_FLASH_MAX_PLD_SZ_POS)  in set_fc_capabilities()
233     if (capabilities & MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_TAF_POS)) {  in set_fc_capabilities()
234         if (capabilities & MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_CAF_POS)) {  in set_fc_capabilities()
263 static void set_pltrst_source(struct mec_espi_io_regs *iobase, uint32_t capabilities)  in set_pltrst_source()  argument
267     if (capabilities & MEC_BIT(MEC_ESPI_CFG_PLTRST_EXT_POS)) {  in set_pltrst_source()
333     set_supported_channels(iobase, cfg->capabilities);  in mec_hal_espi_init()
334     set_supported_max_freq(iobase, cfg->capabilities);  in mec_hal_espi_init()
335     set_supported_io_modes(iobase, cfg->capabilities);  in mec_hal_espi_init()
336     set_supported_alert_io_pin_mode(iobase, cfg->capabilities);  in mec_hal_espi_init()
337     set_pc_capabilities(iobase, cfg->capabilities);  in mec_hal_espi_init()
338     set_vw_capabilities(iobase, cfg->capabilities);  in mec_hal_espi_init()
339     set_oob_capabilities(iobase, cfg->capabilities);  in mec_hal_espi_init()
340     set_fc_capabilities(iobase, cfg->capabilities);  in mec_hal_espi_init()
341     set_pltrst_source(iobase, cfg->capabilities);  in mec_hal_espi_init()