25     if (capabilities & MEC_BIT(MEC_ESPI_CFG_PERIPH_CHAN_SUP_POS)) {  in set_supported_channels()
26         temp |= MEC_BIT(MEC_ESPI_IO_CAP0_PC_SUPP_Pos);  in set_supported_channels()
29     if (capabilities & MEC_BIT(MEC_ESPI_CFG_VW_CHAN_SUP_POS)) {  in set_supported_channels()
30         temp |= MEC_BIT(MEC_ESPI_IO_CAP0_VW_SUPP_Pos);  in set_supported_channels()
33     if (capabilities & MEC_BIT(MEC_ESPI_CFG_OOB_CHAN_SUP_POS)) {  in set_supported_channels()
34         temp |= MEC_BIT(MEC_ESPI_IO_CAP0_OOB_SUPP_Pos);  in set_supported_channels()
37     if (capabilities & MEC_BIT(MEC_ESPI_CFG_FLASH_CHAN_SUP_POS)) {  in set_supported_channels()
38         temp |= MEC_BIT(MEC_ESPI_IO_CAP0_FC_SUPP_Pos);  in set_supported_channels()
92     if (capabilities & MEC_BIT(MEC_ESPI_CFG_ALERT_OD_SUPP_POS)) {  in set_supported_alert_io_pin_mode()
93         temp |= MEC_BIT(MEC_ESPI_IO_CAP1_ALERT_OD_SUPP_Pos);  in set_supported_alert_io_pin_mode()
179     if (cfg & MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_TAF_POS)) {  in fc_sharing_hw()
180         if (cfg & MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_CAF_POS)) {  in fc_sharing_hw()
198         cfg |= MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_TAF_POS);  in fc_sharing_get()
200         cfg |= MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_CAF_POS);  in fc_sharing_get()
202             cfg |= MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_TAF_POS);  in fc_sharing_get()
233     if (capabilities & MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_TAF_POS)) {  in set_fc_capabilities()
234         if (capabilities & MEC_BIT(MEC_ESPI_CFG_FLASH_SHARED_CAF_POS)) {  in set_fc_capabilities()
267     if (capabilities & MEC_BIT(MEC_ESPI_CFG_PLTRST_EXT_POS)) {  in set_pltrst_source()
268         iobase->PLTRST_SRC |= MEC_BIT(MEC_ESPI_IO_PLTRST_SRC_SEL_Pos);  in set_pltrst_source()
270         iobase->PLTRST_SRC &= (uint8_t)~MEC_BIT(MEC_ESPI_IO_PLTRST_SRC_SEL_Pos);  in set_pltrst_source()
280     iobase->ERIS = MEC_BIT(MEC_ESPI_IO_ERIS_CHG_Pos);  in mec_hal_espi_reset_change_clr()
293         iobase->ERIE |= MEC_BIT(MEC_ESPI_IO_ERIE_CHG_INTR_Pos);  in mec_hal_espi_reset_change_intr_en()
295         iobase->ERIE &= (uint8_t)~MEC_BIT(MEC_ESPI_IO_ERIE_CHG_INTR_Pos);  in mec_hal_espi_reset_change_intr_en()
346     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_VW_CT_GIRQ_EN_POS)) {  in mec_hal_espi_init()
351     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_PC_GIRQ_EN_POS)) {  in mec_hal_espi_init()
352         girq_en |= MEC_BIT(MEC_ESPI_PC_GIRQ_POS);  in mec_hal_espi_init()
355     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_BM1_GIRQ_EN_POS)) {  in mec_hal_espi_init()
356         girq_en |= MEC_BIT(MEC_ESPI_PC_BM1_GIRQ_POS);  in mec_hal_espi_init()
359     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_BM2_GIRQ_EN_POS)) {  in mec_hal_espi_init()
360         girq_en |= MEC_BIT(MEC_ESPI_PC_BM2_GIRQ_POS);  in mec_hal_espi_init()
363     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_LTR_GIRQ_EN_POS)) {  in mec_hal_espi_init()
364         girq_en |= MEC_BIT(MEC_ESPI_PC_LTR_GIRQ_POS);  in mec_hal_espi_init()
367     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_OOB_UP_GIRQ_EN_POS)) {  in mec_hal_espi_init()
368         girq_en |= MEC_BIT(MEC_ESPI_OOB_UP_GIRQ_POS);  in mec_hal_espi_init()
371     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_OOB_DN_GIRQ_EN_POS)) {  in mec_hal_espi_init()
372         girq_en |= MEC_BIT(MEC_ESPI_OOB_DN_GIRQ_POS);  in mec_hal_espi_init()
375     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_FC_GIRQ_EN_POS)) {  in mec_hal_espi_init()
376         girq_en |= MEC_BIT(MEC_ESPI_FC_GIRQ_POS);  in mec_hal_espi_init()
379     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_VW_CHEN_GIRQ_EN_POS)) {  in mec_hal_espi_init()
380         girq_en |= MEC_BIT(MEC_ESPI_VW_CHEN_GIRQ_POS);  in mec_hal_espi_init()
383     if (cfg->cfg_flags & MEC_BIT(MEC_ESPI_CFG_FLAG_ERST_GIRQ_EN_POS)) {  in mec_hal_espi_init()
384         girq_en |= MEC_BIT(MEC_ESPI_RESET_GIRQ_POS);  in mec_hal_espi_init()
398         iobase->ACTV |= MEC_BIT(MEC_ESPI_IO_ACTV_EN_Pos);  in mec_hal_espi_activate()
400         iobase->ACTV &= (uint32_t)~MEC_BIT(MEC_ESPI_IO_ACTV_EN_Pos);  in mec_hal_espi_activate()
407         if (iobase->ACTV & MEC_BIT(MEC_ESPI_IO_ACTV_EN_Pos)) {  in mec_hal_espi_is_activated()
433         if (cfg & MEC_BIT(MEC_ESPI_CFG_PERIPH_CHAN_SUP_POS)) {  in mec_hal_espi_capability_set()
434             iobase->CAP0 |= MEC_BIT(MEC_ESPI_IO_CAP0_PC_SUPP_Pos);  in mec_hal_espi_capability_set()
436             iobase->CAP0 &= (uint8_t)~MEC_BIT(MEC_ESPI_IO_CAP0_PC_SUPP_Pos);  in mec_hal_espi_capability_set()
443         if (cfg & MEC_BIT(MEC_ESPI_CFG_VW_CHAN_SUP_POS)) {  in mec_hal_espi_capability_set()
444             iobase->CAP0 |= MEC_BIT(MEC_ESPI_IO_CAP0_VW_SUPP_Pos);  in mec_hal_espi_capability_set()
446             iobase->CAP0 &= (uint8_t)~MEC_BIT(MEC_ESPI_IO_CAP0_VW_SUPP_Pos);  in mec_hal_espi_capability_set()
453         if (cfg & MEC_BIT(MEC_ESPI_CFG_OOB_CHAN_SUP_POS)) {  in mec_hal_espi_capability_set()
454             iobase->CAP0 |= MEC_BIT(MEC_ESPI_IO_CAP0_OOB_SUPP_Pos);  in mec_hal_espi_capability_set()
456             iobase->CAP0 &= (uint8_t)~MEC_BIT(MEC_ESPI_IO_CAP0_OOB_SUPP_Pos);  in mec_hal_espi_capability_set()
463         if (cfg & MEC_BIT(MEC_ESPI_CFG_FLASH_CHAN_SUP_POS)) {  in mec_hal_espi_capability_set()
464             iobase->CAP0 |= MEC_BIT(MEC_ESPI_IO_CAP0_FC_SUPP_Pos);  in mec_hal_espi_capability_set()
466             iobase->CAP0 &= (uint8_t)~MEC_BIT(MEC_ESPI_IO_CAP0_FC_SUPP_Pos);  in mec_hal_espi_capability_set()
498     if (iobase->CAP1 & MEC_BIT(MEC_ESPI_IO_CAP1_ALERT_OD_SUPP_Pos)) {  in mec_hal_espi_capabilities_get()
499         cv |= MEC_BIT(MEC_ESPI_CFG_ALERT_OD_SUPP_POS);  in mec_hal_espi_capabilities_get()
503     if (iobase->CAP0 & MEC_BIT(MEC_ESPI_IO_CAP0_PC_SUPP_Pos)) {  in mec_hal_espi_capabilities_get()
504         cv |= MEC_BIT(MEC_ESPI_CFG_PERIPH_CHAN_SUP_POS);  in mec_hal_espi_capabilities_get()
509     if (iobase->CAP0 & MEC_BIT(MEC_ESPI_IO_CAP0_VW_SUPP_Pos)) {  in mec_hal_espi_capabilities_get()
510         cv |= MEC_BIT(MEC_ESPI_CFG_VW_CHAN_SUP_POS);  in mec_hal_espi_capabilities_get()
515     if (iobase->CAP0 & MEC_BIT(MEC_ESPI_IO_CAP0_OOB_SUPP_Pos)) {  in mec_hal_espi_capabilities_get()
516         cv |= MEC_BIT(MEC_ESPI_CFG_OOB_CHAN_SUP_POS);  in mec_hal_espi_capabilities_get()
521     if (iobase->CAP0 & MEC_BIT(MEC_ESPI_IO_CAP0_FC_SUPP_Pos)) {  in mec_hal_espi_capabilities_get()
522         cv |= MEC_BIT(MEC_ESPI_CFG_FLASH_CHAN_SUP_POS);  in mec_hal_espi_capabilities_get()
539     if (cfg & MEC_BIT(MEC_ESPI_CAP_GL_SUPP_PC_POS)) {  in set_espi_global_cap()
540         cap |= MEC_BIT(MEC_ESPI_IO_CAP0_PC_SUPP_Pos);  in set_espi_global_cap()
542     if (cfg & MEC_BIT(MEC_ESPI_CAP_GL_SUPP_VW_POS)) {  in set_espi_global_cap()
543         cap |= MEC_BIT(MEC_ESPI_IO_CAP0_VW_SUPP_Pos);  in set_espi_global_cap()
545     if (cfg & MEC_BIT(MEC_ESPI_CAP_GL_SUPP_OOB_POS)) {  in set_espi_global_cap()
546         cap |= MEC_BIT(MEC_ESPI_IO_CAP0_OOB_SUPP_Pos);  in set_espi_global_cap()
548     if (cfg & MEC_BIT(MEC_ESPI_CAP_GL_SUPP_FLASH_POS)) {  in set_espi_global_cap()
549         cap |= MEC_BIT(MEC_ESPI_IO_CAP0_FC_SUPP_Pos);  in set_espi_global_cap()
557     if (cfg & MEC_BIT(MEC_ESPI_CAP_GL_SUPP_ALERT_OD_POS)) {  in set_espi_global_cap()
558         cap |= MEC_BIT(MEC_ESPI_IO_CAP1_ALERT_OD_SUPP_Pos);  in set_espi_global_cap()
567     if (cfg & MEC_BIT(MEC_ESPI_CAP_GL_PLTRST_EXT_POS)) {  in set_espi_global_cap()
568         cap |= MEC_BIT(MEC_ESPI_IO_PLTRST_SRC_SEL_Pos);  in set_espi_global_cap()
579     if (hwval & MEC_BIT(MEC_ESPI_IO_CAP0_PC_SUPP_Pos)) {  in get_espi_global_cap()
580         cfg |= MEC_BIT(MEC_ESPI_CAP_GL_SUPP_PC_POS);  in get_espi_global_cap()
582     if (hwval & MEC_BIT(MEC_ESPI_IO_CAP0_VW_SUPP_Pos)) {  in get_espi_global_cap()
583         cfg |= MEC_BIT(MEC_ESPI_CAP_GL_SUPP_VW_POS);  in get_espi_global_cap()
585     if (hwval & MEC_BIT(MEC_ESPI_IO_CAP0_OOB_SUPP_Pos)) {  in get_espi_global_cap()
586         cfg |= MEC_BIT(MEC_ESPI_CAP_GL_SUPP_OOB_POS);  in get_espi_global_cap()
588     if (hwval & MEC_BIT(MEC_ESPI_IO_CAP0_FC_SUPP_Pos)) {  in get_espi_global_cap()
589         cfg |= MEC_BIT(MEC_ESPI_CAP_GL_SUPP_FLASH_POS);  in get_espi_global_cap()
597     if (hwval & MEC_BIT(MEC_ESPI_IO_CAP1_ALERT_OD_SUPP_Pos)) {  in get_espi_global_cap()
598         cfg |= MEC_BIT(MEC_ESPI_CAP_GL_SUPP_ALERT_OD_POS);  in get_espi_global_cap()
601     if (iobase->PLTRST_SRC & MEC_BIT(MEC_ESPI_IO_PLTRST_SRC_SEL_Pos)) {  in get_espi_global_cap()
602         cfg |= MEC_BIT(MEC_ESPI_CAP_GL_PLTRST_EXT_POS);  in get_espi_global_cap()