Lines Matching refs:regs
59 static inline uint32_t btimer_fast_idx(struct mec_btmr_regs *regs) in btimer_fast_idx() argument
61 return (((uint32_t)regs >> 5) & 0x7u); in btimer_fast_idx()
98 int mec_hal_btimer_init(struct mec_btmr_regs *regs, uint32_t freq_div, in mec_hal_btimer_init() argument
101 const struct mec_btimer_info *info = find_btimer_info((uintptr_t)regs); in mec_hal_btimer_init()
110 regs->CTRL = MEC_BIT(MEC_BTMR_CTRL_RESET_Pos); in mec_hal_btimer_init()
111 regs->CTRL = ((freq_div - 1u) & MEC5_BTMR_PRESCALE_MSK0) << MEC_BTMR_CTRL_PRESCALE_Pos; in mec_hal_btimer_init()
112 regs->PRELOAD = count; in mec_hal_btimer_init()
113 regs->COUNT = count; in mec_hal_btimer_init()
117 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos); in mec_hal_btimer_init()
120 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_RESTART_Pos); in mec_hal_btimer_init()
124 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_CNT_DIR_Pos); in mec_hal_btimer_init()
128 regs->IEN |= MEC_BIT(MEC_BTMR_IEN_EVENT_Pos); in mec_hal_btimer_init()
132 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_START_Pos); in mec_hal_btimer_init()
138 int mec_hal_btimer_has_counter32(struct mec_btmr_regs *regs) in mec_hal_btimer_has_counter32() argument
140 int idx = find_btimer_index((uint32_t)regs); in mec_hal_btimer_has_counter32()
151 int mec_hal_btimer_reset(struct mec_btmr_regs *regs, uint32_t flags) in mec_hal_btimer_reset() argument
155 if (!regs) { in mec_hal_btimer_reset()
167 ctrl = regs->CTRL; in mec_hal_btimer_reset()
168 regs->CTRL = MEC_BIT(MEC_BTMR_CTRL_RESET_Pos); in mec_hal_btimer_reset()
169 mec_hal_btimer_intr_clr(regs); in mec_hal_btimer_reset()
172 regs->CTRL = (regs->CTRL & (uint32_t)~msk) | (ctrl & msk); in mec_hal_btimer_reset()
178 bool mec_hal_btimer_is_enabled(struct mec_btmr_regs *regs) in mec_hal_btimer_is_enabled() argument
180 if (regs->CTRL & MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos)) { in mec_hal_btimer_is_enabled()
187 uint32_t mec_hal_btimer_freq(struct mec_btmr_regs *regs) in mec_hal_btimer_freq() argument
191 if (regs) { in mec_hal_btimer_freq()
192 freqhz = (regs->CTRL & MEC_BTMR_CTRL_PRESCALE_Msk) >> MEC_BTMR_CTRL_PRESCALE_Pos; in mec_hal_btimer_freq()
199 int mec_hal_btimer_girq_ctrl(struct mec_btmr_regs *regs, uint8_t enable) in mec_hal_btimer_girq_ctrl() argument
201 const struct mec_btimer_info *info = find_btimer_info((uintptr_t)regs); in mec_hal_btimer_girq_ctrl()
212 int mec_hal_btimer_girq_status_clr(struct mec_btmr_regs *regs) in mec_hal_btimer_girq_status_clr() argument
214 const struct mec_btimer_info *info = find_btimer_info((uintptr_t)regs); in mec_hal_btimer_girq_status_clr()
225 void mec_hal_btimer_pre_and_reload(struct mec_btmr_regs *regs, uint32_t preload, in mec_hal_btimer_pre_and_reload() argument
228 uint32_t ctrl = regs->CTRL; in mec_hal_btimer_pre_and_reload()
233 regs->PRELOAD = preload; in mec_hal_btimer_pre_and_reload()
234 regs->CTRL = ctrl; in mec_hal_btimer_pre_and_reload()
236 regs->PRELOAD = preload; in mec_hal_btimer_pre_and_reload()
240 void mec_hal_btimer_start_load(struct mec_btmr_regs *regs, uint32_t initial_count, in mec_hal_btimer_start_load() argument
244 uint32_t ctrl = regs->CTRL; in mec_hal_btimer_start_load()
254 regs->PRELOAD = initial_count; in mec_hal_btimer_start_load()
265 regs->STATUS = MEC_BIT(MEC_BTMR_STATUS_EVENT_Pos); in mec_hal_btimer_start_load()
266 regs->COUNT = initial_count; in mec_hal_btimer_start_load()
267 regs->CTRL = ctrl; in mec_hal_btimer_start_load()
268 regs->IEN = ien; in mec_hal_btimer_start_load()
271 bool mec_hal_btimer_is_started(struct mec_btmr_regs *regs) in mec_hal_btimer_is_started() argument
275 if ((regs->CTRL & msk) == msk) { in mec_hal_btimer_is_started()
282 bool mec_hal_btimer_is_counting_up(struct mec_btmr_regs *regs) in mec_hal_btimer_is_counting_up() argument
284 if (regs->CTRL & MEC_BIT(MEC_BTMR_CTRL_CNT_DIR_Pos)) { in mec_hal_btimer_is_counting_up()
291 void mec_hal_btimer_auto_restart(struct mec_btmr_regs *regs, uint8_t enable) in mec_hal_btimer_auto_restart() argument
294 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_RESTART_Pos); in mec_hal_btimer_auto_restart()
296 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_BTMR_CTRL_RESTART_Pos); in mec_hal_btimer_auto_restart()
300 bool mec_hal_btimer_is_auto_restart(struct mec_btmr_regs *regs) in mec_hal_btimer_is_auto_restart() argument
302 if (regs->CTRL & MEC_BIT(MEC_BTMR_CTRL_RESTART_Pos)) { in mec_hal_btimer_is_auto_restart()
311 void mec_hal_btimer_reload_run(struct mec_btmr_regs *regs, uint32_t new_count) in mec_hal_btimer_reload_run() argument
313 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_HALT_Pos); in mec_hal_btimer_reload_run()
314 regs->COUNT = new_count; in mec_hal_btimer_reload_run()
315 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_BTMR_CTRL_HALT_Pos); in mec_hal_btimer_reload_run()
318 void mec_hal_btimer_intr_clr(struct mec_btmr_regs *regs) in mec_hal_btimer_intr_clr() argument
320 uint32_t devi = btimer_instances[btimer_fast_idx(regs)].devi; in mec_hal_btimer_intr_clr()
322 regs->STATUS = MEC_BIT(MEC_BTMR_STATUS_EVENT_Pos); in mec_hal_btimer_intr_clr()
326 void mec_hal_btimer_intr_en(struct mec_btmr_regs *regs, uint8_t enable) in mec_hal_btimer_intr_en() argument
329 regs->IEN |= MEC_BIT(MEC_BTMR_IEN_EVENT_Pos); in mec_hal_btimer_intr_en()
331 regs->IEN &= (uint32_t)~MEC_BIT(MEC_BTMR_IEN_EVENT_Pos); in mec_hal_btimer_intr_en()
347 struct mec_btmr_regs *regs = (struct mec_btmr_regs *)btimer_instances[i].base_addr; in mec_hal_btimer_pm_save_disable() local
349 btimer_pm_save_buf[i] = (uint8_t)(regs->CTRL & MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos)); in mec_hal_btimer_pm_save_disable()
350 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos); in mec_hal_btimer_pm_save_disable()
357 struct mec_btmr_regs *regs = (struct mec_btmr_regs *)btimer_instances[i].base_addr; in mec_hal_btimer_pm_restore() local
360 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos); in mec_hal_btimer_pm_restore()