26     if (flags & MEC_BIT(MEC_ADC_SINGLE_INTR_POS)) {  in adc_intr_flag_to_bitmap()
27         bm |= MEC_BIT(MEC_ADC_SM_GIRQ_POS);  in adc_intr_flag_to_bitmap()
29     if (flags & MEC_BIT(MEC_ADC_REPEAT_INTR_POS)) {  in adc_intr_flag_to_bitmap()
30         bm |= MEC_BIT(MEC_ADC_RM_GIRQ_POS);  in adc_intr_flag_to_bitmap()
41     uint32_t girq_bm = MEC_BIT(MEC_ADC_SM_GIRQ_POS) | MEC_BIT(MEC_ADC_RM_GIRQ_POS);  in mec_hal_adc_init()
58         if (flags & MEC_BIT(MEC_ADC_CFG_SOFT_RESET_POS)) {  in mec_hal_adc_init()
59             regs->CTRL = MEC_BIT(MEC_ADC_CTRL_SRST_Pos);  in mec_hal_adc_init()
61                 if (!(regs->CTRL & MEC_BIT(MEC_ADC_CTRL_SRST_Pos))) {  in mec_hal_adc_init()
68         if (flags & MEC_BIT(MEC_ADC_CFG_PWR_SAVE_DIS_POS)) {  in mec_hal_adc_init()
69             regs->CTRL |= MEC_BIT(MEC_ADC_CTRL_PWR_SAVE_Pos);  in mec_hal_adc_init()
71             regs->CTRL &= (uint32_t)~MEC_BIT(MEC_ADC_CTRL_PWR_SAVE_Pos);  in mec_hal_adc_init()
74         if (flags & MEC_BIT(MEC_ADC_CFG_SAMPLE_TIME_POS)) {  in mec_hal_adc_init()
84         if (flags & MEC_BIT(MEC_ADC_CFG_WARM_UP_POS)) {  in mec_hal_adc_init()
90         if (flags & MEC_BIT(MEC_ADC_CFG_RPT_DELAY_POS)) {  in mec_hal_adc_init()
100         if (flags & MEC_BIT(MEC_ADC_CFG_SAR_CFG_OVR_POS)) {  in mec_hal_adc_init()
105     regs->CTRL |= MEC_BIT(MEC_ADC_CTRL_ACTV_Pos);  in mec_hal_adc_init()
112     uint32_t msk = MEC_BIT(MEC_ADC_CTRL_RDONE_Pos) | MEC_BIT(MEC_ADC_CTRL_SDONE_Pos);  in mec_hal_adc_activate()
121         ctrl |= MEC_BIT(MEC_ADC_CTRL_ACTV_Pos);  in mec_hal_adc_activate()
123         ctrl &= (uint32_t)~MEC_BIT(MEC_ADC_CTRL_ACTV_Pos);  in mec_hal_adc_activate()
190         regs->SAR_CTRL |= MEC_BIT(MEC_ADC_SAR_CTRL_SELDIFF_Pos);  in mec_hal_adc_differential_input_enable()
192         regs->SAR_CTRL &= (uint32_t)~MEC_BIT(MEC_ADC_SAR_CTRL_SELDIFF_Pos);  in mec_hal_adc_differential_input_enable()
287     if (flags & MEC_BIT(MEC_ADC_SINGLE_INTR_POS)) {  in mec_hal_adc_status_clear()
289         ctrl_val |= MEC_BIT(MEC_ADC_CTRL_SDONE_Pos);  in mec_hal_adc_status_clear()
290         girq_clr_bm |= MEC_BIT(MEC_ADC_SM_GIRQ_POS);  in mec_hal_adc_status_clear()
293     if (flags & MEC_BIT(MEC_ADC_REPEAT_INTR_POS)) {  in mec_hal_adc_status_clear()
295         ctrl_val |= MEC_BIT(MEC_ADC_CTRL_RDONE_Pos);  in mec_hal_adc_status_clear()
296         girq_clr_bm |= MEC_BIT(MEC_ADC_RM_GIRQ_POS);  in mec_hal_adc_status_clear()
315         start_val |= MEC_BIT(MEC_ADC_CTRL_SSTART_Pos);  in mec_hal_adc_start()
316         ctrl_sts |= MEC_BIT(MEC_ADC_CTRL_SDONE_Pos);  in mec_hal_adc_start()
317         girq_clr_bm |= MEC_BIT(MEC_ADC_SM_GIRQ_POS);  in mec_hal_adc_start()
322         start_val |= MEC_BIT(MEC_ADC_CTRL_RSTART_Pos);  in mec_hal_adc_start()
323         ctrl_sts |= MEC_BIT(MEC_ADC_CTRL_RDONE_Pos);  in mec_hal_adc_start()
324         girq_clr_bm |= MEC_BIT(MEC_ADC_RM_GIRQ_POS);  in mec_hal_adc_start()
354     if (ctrl & MEC_BIT(MEC_ADC_CTRL_ACTV_Pos)) {  in mec_hal_adc_pm_save_disable()
361     ctrl &= MEC_BIT( MEC_ADC_CTRL_RSTART_Pos) | MEC_BIT(MEC_ADC_CTRL_PWR_SAVE_Pos);  in mec_hal_adc_pm_save_disable()
367     uint32_t ctrl = MEC_ADC0->CTRL & (MEC_BIT( MEC_ADC_CTRL_RSTART_Pos)  in mec_hal_adc_pm_restore()
368                                       | MEC_BIT(MEC_ADC_CTRL_PWR_SAVE_Pos));  in mec_hal_adc_pm_restore()
371         ctrl |= MEC_BIT(MEC_ADC_CTRL_ACTV_Pos);  in mec_hal_adc_pm_restore()