Lines Matching refs:__IOM
167 __IOM uint32_t CNT; /*!< (@ 0x00000000) BTMR Count */
168 __IOM uint32_t PRLD; /*!< (@ 0x00000004) BTMR Preload */
169 __IOM uint8_t STS; /*!< (@ 0x00000008) BTMR Status */
171 __IOM uint8_t IEN; /*!< (@ 0x0000000c) BTMR Interrupt Enable */
173 __IOM uint32_t CTRL; /*!< (@ 0x00000010) BTMR Control */
234 __IOM uint16_t PRLD; /*!< (@ 0x00000000) HTMR Preload */
236 __IOM uint16_t CTRL; /*!< (@ 0x00000004) HTMR Control */
315 __IOM uint32_t CTRL; /*!< (@ 0x00000000) CCT Control */
316 __IOM uint32_t CAP0_CTRL; /*!< (@ 0x00000004) CCT Capture 0 Control */
317 __IOM uint32_t CAP1_CTRL; /*!< (@ 0x00000008) CCT Capture 1 Control */
318 __IOM uint32_t FREE_RUN; /*!< (@ 0x0000000c) CCT Free run counter */
319 __IOM uint32_t CAP0; /*!< (@ 0x00000010) CCT Capture 0 */
320 __IOM uint32_t CAP1; /*!< (@ 0x00000014) CCT Capture 1 */
321 __IOM uint32_t CAP2; /*!< (@ 0x00000018) CCT Capture 2 */
322 __IOM uint32_t CAP3; /*!< (@ 0x0000001c) CCT Capture 3 */
323 __IOM uint32_t CAP4; /*!< (@ 0x00000020) CCT Capture 4 */
324 __IOM uint32_t CAP5; /*!< (@ 0x00000024) CCT Capture 5 */
325 __IOM uint32_t COMP0; /*!< (@ 0x00000028) CCT Compare 0 */
326 __IOM uint32_t COMP1; /*!< (@ 0x0000002c) CCT Compare 1 */
377 __IOM uint32_t CNT; /*!< (@ 0x00000000) RTMR Counter */
378 __IOM uint32_t PRLD; /*!< (@ 0x00000004) RTMR Preload */
379 __IOM uint8_t CTRL; /*!< (@ 0x00000008) RTMR Control */
381 __IOM uint32_t SOFTIRQ; /*!< (@ 0x0000000c) RTMR Soft IRQ */
477 __IOM uint32_t CTRL; /*! (@ 0x00000000) WKTMR control */
478 __IOM uint32_t ALARM_CNT; /*! (@ 0x00000004) WKTMR Week alarm counter */
479 __IOM uint32_t TMR_COMP; /*! (@ 0x00000008) WKTMR Week timer compare */
481 __IOM uint32_t SS_INTR_SEL; /*! (@ 0x00000010) WKTMR Sub-second interrupt select */
482 __IOM uint32_t SWK_CTRL; /*! (@ 0x00000014) WKTMR Sub-week control */
483 __IOM uint32_t SWK_ALARM; /*! (@ 0x00000018) WKTMR Sub-week alarm */
484 __IOM uint32_t BGPO_DATA; /*! (@ 0x0000001c) WKTMR BGPO data */
485 __IOM uint32_t BGPO_PWR; /*! (@ 0x00000020) WKTMR BGPO power */
486 __IOM uint32_t BGPO_RST; /*! (@ 0x00000024) WKTMR BGPO reset */