Lines Matching refs:MCHP_QMSPI_BASE_ADDR
43 #define MCHP_QMSPI_BASE_ADDR 0x40070000u macro
106 #define MCHP_QMSPI_MODE_ADDR (MCHP_QMSPI_BASE_ADDR + 0x00)
107 #define MCHP_QMSPI_CTRL_ADDR (MCHP_QMSPI_BASE_ADDR + 0x04)
108 #define MCHP_QMSPI_EXE_ADDR (MCHP_QMSPI_BASE_ADDR + 0x08)
109 #define MCHP_QMSPI_IFC_ADDR (MCHP_QMSPI_BASE_ADDR + 0x0c)
110 #define MCHP_QMSPI_STS_ADDR (MCHP_QMSPI_BASE_ADDR + 0x10)
111 #define MCHP_QMSPI_BUFCNT_STS_ADDR (MCHP_QMSPI_BASE_ADDR + 0x14)
112 #define MCHP_QMSPI_TX_BCNT_STS_ADDR (MCHP_QMSPI_BASE_ADDR + 0x14)
113 #define MCHP_QMSPI_RX_BCNT_STS_ADDR (MCHP_QMSPI_BASE_ADDR + 0x16)
114 #define MCHP_QMSPI_IEN_ADDR (MCHP_QMSPI_BASE_ADDR + 0x18)
115 #define MCHP_QMSPI_TXB_ADDR (MCHP_QMSPI_BASE_ADDR + 0x20)
116 #define MCHP_QMSPI_RXB_ADDR (MCHP_QMSPI_BASE_ADDR + 0x24)
117 #define MCHP_QMSPI_CSTM_ADDR (MCHP_QMSPI_BASE_ADDR + 0x28)
119 (MCHP_QMSPI_BASE_ADDR + (0x30 + (((uint32_t)(n) & 0x0fu) << 2)))