210 	uint32_t line_err_status = (regs->lsr & BSETS_UART_LSR_ERROR);  in sedi_dma_event_cb()
229 			SEDI_UART_POLL_WAIT(!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED)));  in sedi_dma_event_cb()
304 	SEDI_UART_POLL_WAIT(!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED)));  in io_vec_write_callback()
370 	uint32_t lsr = regs->lsr;  in handle_unsol_rx_data()  local
375 	while (lsr & SEDI_RBFVM(UART, LSR, DR, READY)) {  in handle_unsol_rx_data()
381 		lsr = regs->lsr;  in handle_unsol_rx_data()
492 				uint32_t lsr = regs->lsr;  in sedi_uart_isr_handler()  local
503 				if (lsr & status_report_mask[uart]) {  in sedi_uart_isr_handler()
511 							lsr & BSETS_UART_LSR_ERROR, 0);  in sedi_uart_isr_handler()
516 				if (lsr & SEDI_RBFVM(UART, LSR, DR, READY)) {  in sedi_uart_isr_handler()
550 			regs->lsr & (SEDI_RBFVM(UART, LSR, ADDR_RCVD, 1) | BSETS_UART_LSR_ERROR);  in sedi_uart_isr_handler()
645 	unused_lsr = regs->lsr;  in sedi_uart_set_config()
659 	uint32_t lsr = regs->lsr;  in sedi_uart_get_status()  local
662 		lsr & (SEDI_RBFVM(UART, LSR, OE, OVER_RUN_ERROR) |  in sedi_uart_get_status()
673 	} else if (!(lsr & (SEDI_RBFVM(UART, LSR, TEMT, ENABLED)))) {  in sedi_uart_get_status()
677 	if (lsr & SEDI_RBFVM(UART, LSR, DR, READY)) {  in sedi_uart_get_status()
696 	ret = SEDI_UART_POLL_WAIT(!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED)));  in sedi_uart_write()
703 	ret = SEDI_UART_POLL_WAIT(!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED)));  in sedi_uart_write()
719 	uint32_t lsr = regs->lsr;  in sedi_uart_read()  local
721 	while (!(lsr & SEDI_RBFVM(UART, LSR, DR, READY))) {  in sedi_uart_read()
722 		lsr = regs->lsr;  in sedi_uart_read()
725 	if (lsr & status_report_mask[uart]) {  in sedi_uart_read()
727 			*status = (lsr & BSETS_UART_LSR_ERROR);  in sedi_uart_read()
786 		SEDI_UART_POLL_WAIT(regs->lsr & SEDI_RBFVM(UART, LSR, THRE, ENABLED));  in sedi_uart_write_buffer()
791 	return SEDI_UART_POLL_WAIT(!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED)));  in sedi_uart_write_buffer()
810 	uint32_t lsr = 0;  in sedi_uart_read_buffer()  local
813 		while (!(lsr & SEDI_RBFVM(UART, LSR, DR, READY))) {  in sedi_uart_read_buffer()
814 			lsr = regs->lsr;  in sedi_uart_read_buffer()
817 		*status = (lsr & status_report_mask[uart]);  in sedi_uart_read_buffer()
825 		lsr = 0;  in sedi_uart_read_buffer()
1025 	regs->lsr;  in sedi_uart_rs485_enable()
1154 			ret = SEDI_UART_POLL_WAIT(!(regs->lsr &  in sedi_uart_9bit_send_address()
1204 	uint32_t lsr = regs->lsr;  in sedi_uart_read_rx_fifo()  local
1207 	if (!(lsr & SEDI_RBFVM(UART, LSR, DR, READY))) {  in sedi_uart_read_rx_fifo()
1211 	while (lsr & SEDI_RBFVM(UART, LSR, DR, READY)) {  in sedi_uart_read_rx_fifo()
1212 		if (lsr & status_report_mask[uart]) {  in sedi_uart_read_rx_fifo()
1217 		lsr = regs->lsr;  in sedi_uart_read_rx_fifo()
1329 	return !!(SEDI_UART[uart]->lsr & SEDI_RBFVM(UART, LSR, THRE, ENABLED));  in is_tx_fifo_full()
1342 	return SEDI_UART[uart]->lsr & SEDI_RBFVM(UART, LSR, DR, READY);  in sedi_is_rx_data_available()
1401 	return !!(SEDI_UART[uart]->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED));  in sedi_uart_is_tx_complete()
1971 		ret = SEDI_UART_POLL_WAIT(!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED)));  in sedi_uart_dma_io_polled()
2095 	*status = regs->lsr & BSETS_UART_LSR_ERROR;  in sedi_uart_dma_read_polled()