Lines Matching +full:- +full:s
2 * Copyright (c) 2023 - 2024 Intel Corporation
4 * SPDX-License-Identifier: BSD-3-Clause
11 /* define two 64-bit registers for easy access with SEDI REG APIs */
12 SEDI_REG_DEFINE(HPET, T0CV, 0x108, RW, (uint64_t)-1, (uint64_t)-1);
13 SEDI_REG_DEFINE(HPET, MCV, 0x0f0, RW, (uint64_t)-1, (uint64_t)0x0);
44 uint32_t one_shot : 1; /* select period/non-period mode */
47 uint64_t microsec; /* user's parameter */
131 /* it's wrong to set into a 32-bits timer */ in sedi_hpet_set_comparator()
139 diff = (int64_t)(value - now); in sedi_hpet_set_comparator()
141 diff = (int32_t)((uint32_t)value - (uint32_t)now); in sedi_hpet_set_comparator()
222 * Initial state of HPET is unknown, so put it back in a reset-like in sedi_hpet_init()
225 sedi_hpet_update_comparator(HPET_0, (uint64_t)-1); in sedi_hpet_init()
226 sedi_hpet_update_comparator(HPET_1, (uint64_t)-1); in sedi_hpet_init()
227 sedi_hpet_update_comparator(HPET_2, (uint64_t)-1); in sedi_hpet_init()
322 sedi_hpet_update_comparator(timer_id, (uint64_t)-1); in sedi_hpet_kill_timer()